JP2005276431A - Information recording medium, information recording method and information recording apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To display a high definition main video and a sub video having high image quality, to secure large capacity and high compatibility of formats, to heighten reliability of write-once type rewriting or rewriting of PC data and reproduction of address information, to enhance reference clock extracting accuracy from a wobble signal and to ensure high speed access and extendibility to a single-sided two recording layer structure. <P>SOLUTION: Lands and grooves as tracks for information recording of an information recording surface are alternately disposed in a radial direction, address information of the tracks is recorded by modulating the wobble of the grooves, gray codes are used for generating the address information and indefinite bits generated by wobble modulation are dispersed and disposed in the lands and grooves. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an information recording medium (or information storage medium), an information reproducing apparatus, and an information recording / reproducing apparatus, and particularly to a data recording format of an optical disk and an optical disk based on the format, an information reproducing method, or an information recording method. Have

  The following documents are related to optical disks.

  Japanese Patent No. 2,663,817 (Document 1). The identification information is shared between the land (L) and the groove (G) and deviated from the center of the land and the groove. This is related to the current DVD-RAM disc standard.

  Japanese Patent Laid-Open No. 04-172623 (Document 2), Japanese Patent Laid-Open No. 2000-11460 (Document 3)... A recording mark is formed at a groove position, and a land pre-pit for address is provided at a land portion. This is related to current DVD-RW discs and DVD-R discs.

Japanese Patent Laid-Open No. 11-149644 (Document 4)... L (Land) / G (Groove) shows a method of recording, and address information is recorded by wobble modulation using a Gray code.
Japanese Patent No. 2,663,817 Japanese Patent Laid-Open No. 04-172623 JP 2000-11460 A JP-A-11-149644

  There is a user request to view more “high-definition” video in a system using a reproduction-only DVD-Video disc in which moving images are recorded in the MPEG-2 format. In order to meet this requirement and to secure “high definition” and a longer reproduction time (135 minutes) than the present, it is necessary to further increase the capacity of the information recording medium (optical disk).

  Therefore, the appropriateness of the technique of the above-mentioned literature in the direction of obtaining “high definition” video is as follows.

[Technology of Patent 2,663,817]
1. Format compatibility is poor with respect to a DVD-ROM disc which is a read-only information recording medium. This complicates the circuit scale and control firmware of a playback apparatus or recording / playback apparatus having compatibility between DVD-ROM and DVD-RAM. Therefore, it is difficult to reduce the price of the apparatus and the performance is not stable (problems during control are likely to occur).

2. Since the recording mark (recordable data) cannot be recorded in the CAPA (prepit) portion, the recording capacity cannot be increased.

[Technology of JP 04-172623 A and JP 2000-11460]
1. Since a recording mark (recordable data) is recorded only in the groove, the recording capacity is inferior in principle compared with the L / G recording method.

2. Since serial recording is premised, it is difficult to append or rewrite data in fine data units, and if you forcibly perform recording processing (Restricted Overwrite) in fine units, part of the already recorded data will be destroyed. The reliability of recorded data is significantly impaired.

[Technology of JP-A-11-149644]
Here, wobble information of an indefinite bit in a land portion (a place where the bit contents change between adjacent grooves) is detected by a radial push-pull signal (FIGS. 1 and 2 in the literature). When this detection method is used, "tracking offset (tracking at a position shifted from the center)", "information recording medium tilt (radial tilt)", "playback optical head characteristic variation", etc. occur. Then, the radial push-pull signal amplitude and polarity at the indefinite bit position of the land part greatly vary. Therefore, the method of this document has poor detection accuracy and it is very difficult to ensure the reliability as a product.

  Further, this document does not describe any format compatibility between the read-only information recording medium, the write-once information recording medium, and the rewritable information recording medium, and the data recorded on the information recording medium is “ECC format”. Since it has only three layers of “/” frame (= sector (FIG. 4)) / “segment”, it is difficult to ensure format compatibility with the read-only information recording medium.

  Also, in this document, error check codes are not added to various addresses having gray code characteristics (error check codes obtained by dividing a gray code by a generator polynomial do not have gray code characteristics). Therefore, it was conventionally considered impossible to add an error check code to the Gray code). Therefore, even if various addresses are discriminated from the reproduction signal from the wobble signal, it is impossible to evaluate whether or not the discrimination result is correct. Therefore, there is a problem that the reproduction reliability of various address information having the gray code characteristic is very low.

  As described above, it is difficult for the techniques of Documents 1 to 4 to easily achieve the purpose of obtaining a “high-definition” image as requested by the user.

  Further, the user has the following demands.

  The current DVD-Video disc has “Sub-picture” information in addition to the main video in “Subtitle display” and “User selectable menu display”. In the current DVD-Video disc, this sub-picture can express only 16 colors. In order to satisfy the user's request to view “high-definition” images that exceed the above-mentioned current DVD-Video discs, the format aimed at improving the image quality of the above-mentioned sub-images has been reviewed, such as by increasing the number of expression colors from 16 colors. Need arises.

Therefore, the present invention has been made to solve the above problems,
α] Information for enabling high-definition main video that surpasses the current DVD-Video disc and the corresponding high-quality video to display sub-video, as well as long-time playback of the high-quality video. Increasing the capacity of recording media
[epsilon]] In order to solve the unstable reading due to the increase in capacity, the reference clock extraction accuracy from the wobble signal recorded in advance on the information recording medium is improved, that is, the recording reference from the wobble signal is recorded. Clock synchronization (Phase Lock Loop processing) and reference clock synchronization (Phase Lock Loop processing) during information reproduction from a recording mark recorded on the information recording medium are performed.

ζ] Guarantee of high-speed access, that is, ensuring the frequency of arrangement of address information recorded in advance on the (recordable / rewritable) information recording medium,
It is an object of the present invention to provide an information recording medium, an information recording method, and an information recording apparatus that are capable of recording information.

  According to the present invention, lands and grooves are alternately formed in the radial direction as information recording tracks on the information recording surface, and the address information of the tracks is recorded by wobble modulation of the grooves. Gray codes are used to generate address information, and indefinite bits generated due to wobble modulation are distributed over the lands and grooves.

  By using the above means, the occurrence of indefinite bits, which is a problem in “L / G recording + wobble modulation”, is reduced by using a Gray code or special track code to reduce the frequency of indefinite bits, and addition and subtraction in units of bits. It is possible to add an error detection code and scramble processing while retaining the Gray code characteristic or special track code characteristic by performing an exclusive OR operation, and the address detection accuracy can be greatly increased.

  Embodiments of the present invention will be described below with reference to the drawings.

  In this specification, the expression “recordable information recording medium” is used for an information recording medium generically referred to as a recordable information recording medium and a rewritable information recording medium.

0] Points of the Present Invention Prior to the description of the present embodiment, the points of the present invention over a broad sense for achieving the object of the present invention are summarized below. In the following, the contents of the big invention points are described as alphabets, for example, C), the contents for executing each big invention point (intermediate level of the invention points) are summarized as, for example, (c14), and the contents The details of the invention necessary for realizing the above are described as, for example, (c141). That is, the contents of the points of the invention are described in a hierarchical structure.

  In the description of the embodiments in the future, the alphabetical numbers corresponding to the following invention points will be indicated in parentheses.

  A) File separation or directory (folder) separation as shown in FIGS. 1 and 2 is performed. With this separation method, the conventional SD (Standard Definition) Object File and management file and the HD (High Definition) Object File and management file corresponding to high-quality video can be separated and managed on the information recording medium. Make it possible. [Effects]... If the Object File and the management file recorded on the information recording medium are separated for SD and HD, it becomes possible to determine which file is in advance before the Object File is reproduced. As a result, SD or HD decoders can be pre-prepared before playback of the Object File, and preparation time until video playback starts is greatly reduced, so that video playback can be started immediately when the user wants to watch it. .

  B) A 4-bit representation of sub-picture information and a compression rule are unique. [Effect] ... High-quality video including sub-video can be provided to users.

C) In the present invention, a plurality of types of recording formats can be set for the read-only information recording medium. [Effect] ... The medium (data) structure can be optimized according to the content of content recorded on the reproduction-only information recording medium. In other words, (ca) In the case of content that can be freely copied as many times as possible (not so important), as in the past, it is possible to have a structure in which data is continuously recorded by connecting (packing) each segment. To do.

(Cb) In the case of important content contents subject to copy restriction, each segment is separately arranged on the information recording medium, and “identification information of the read-only information recording medium” is provided in the gap (between the preceding and following segments). “Copy control information”, “encryption key-related information”, “address information”, etc. can be recorded, so that content protection in the information recording medium and high-speed access can be guaranteed. For this reason, (c11) the format is common within the same disk (format change is not possible from the middle of the disk)
(C12) Allow two formats to be mixed in the same disc according to the content content to be recorded.
(C13) The two types have a part of the common format area (read there when starting up).

[Effect] If the data structure is different across the entire area of the information recording medium, the playback apparatus is wondering which one to deal with when starting playback of the information recording medium for the first time, and the playback start time is longer than necessary. End up. First, at the time of start-up (when the information reproducing apparatus or information recording / reproducing apparatus starts reproducing immediately after the information recording medium is installed) by sharing the data structure of part of the information recording medium (Lead-in and Lead-out parts) You can access that part first and play back the minimum required information in the same format. Therefore, it is possible to start reproduction stably and at high speed at the time of startup. (C14) Record the DVD-ROM format identification flag information (whether or not two proposals are included) on the disc.
(C141) Record format identification flag information in a common format area.
(C142) The format identification flag information is recorded in the recordable area.
D) Use ECC block structure with product code,
As shown in FIGS. 26 and 27, in the present invention, data to be recorded on the information recording medium is two-dimensionally arranged, and as additional bits for error correction, PI (Parity in) in the row direction and in the column direction. Has a structure with PO (Parity out) added. [Effect] ... High error correction capability by erasure correction and repeated vertical and horizontal correction processing.
(D11) 32 sectors constitute one error correction unit (ECC block). That is, as shown in FIGS. 26 and 27, in the embodiment of the present invention, the ECC block is configured by sequentially arranging 32 sectors from “0 sector” to “31 sector” vertically. One sector has 6 rows. [Effects] The next-generation DVD is required to be able to reproduce accurate information by error correction processing even when the surface of the information recording medium has a scratch of the same length as the current-generation DVD. In the embodiment of the present invention, the recording density was increased in order to increase the capacity corresponding to the high-quality video. As a result, in the case of the conventional 1 ECC block = 16 sectors, the length of the physical flaw that can be corrected by error correction is shorter than that of the conventional DVD. By adopting a structure in which one ECC block is composed of 32 sectors as in the embodiment of the present invention, it is possible to increase the permissible length of scratches on the surface of an information recording medium that can be error-corrected and to maintain compatibility with the ECC block structure of the current DVD. Can be secured.

E) The same sector is divided into a plurality of parts, and a different product code (small ECC block) is formed for each divided part.
As shown in FIG. 27, intra-sector data are alternately arranged on the left and right sides every 172 bytes, and are grouped separately on the left and right sides (the data belonging to the left and right groups are interleaved in a “nested” manner). . As shown in FIG. 27, the divided left and right groups are collected by 32 sectors to form small ECC blocks on the left and right. In FIG. 27, for example, “2-R” means a sector number and a left / right group identification symbol (for example, data on the second Right (right) side). (L in FIG. 27 represents Left (left).)
[Effect]… Improving the reliability of recorded data by improving the error correction capability of intra-sector data.

  For example, consider a case where a track is removed during recording and the recorded data is overwritten, and data for one sector is destroyed. In the embodiment of the present invention, error correction is performed on the corrupted data in one sector using two small ECC blocks, so the burden of error correction in one ECC block is reduced, and error correction with better performance is performed. Guaranteed.

  In the embodiment of the present invention, since the data ID (Data ID) is arranged at the head position of each sector even after the ECC block is formed, the data position at the time of access can be confirmed at high speed.

  (E11) The same sector is interleaved (included in different groups alternately at equal intervals), and each group belongs to a different small ECC block. [Effects]... A structure resistant to burst errors can be provided by the embodiment of the present invention. For example, consider a burst error state in which a long flaw in the circumferential direction of the information recording medium makes it impossible to read data exceeding 172 bytes. In this case, burst errors exceeding 172 bytes are distributed in two small ECC blocks, so that the burden of error correction in one ECC block is reduced, and error correction with better performance is guaranteed.

F) A plurality of types of sync frame structures are defined by sectors constituting the ECC block. A feature is that the Sync frame structure is changed as shown in FIG. 29 depending on whether the sector number of a sector constituting one ECC block is an even number or an odd number. [Effect] ... Since the data ID is arranged at the head position of the sector even after the ECC block is configured, the data position can be confirmed at high speed during access.
(F11) The interleaving / insertion position of the PO is different on the left and right (FIG. 28). [Effects]... Even after the ECC block is configured, the data ID is arranged at the head position of the sector, so that the data position at the time of access can be confirmed at high speed.

G) Segment division structure in ECC block. [Effects] ... High format compatibility between read-only / write-once / rewritable,
Combination with L / G wobble modulation: suitable for zone arrangement (ECC block does not enter one round).

H) Header layout structure between segments. [Effects]: Discrimination between read-only / write-once / rewritable types can be made quickly and easily.
(H11) Data contents are changed between read-only / write-once / rewritable type (→ for use in identification)
(H12) Random signals are used for the DVD-ROM header, [Effect]... DPD signal can be detected stably at the DVD-ROM header position even if the positions of adjacent tracks match.

  I) A guard area is partially overlapped and recorded in a segment format for a recordable information recording medium. [Effect] ... When there is a gap (a part where no recording mark exists) between the front and rear guard areas between segments, there is a difference in the light reflectance depending on the presence or absence of the recording mark. A difference in light reflectance occurs. For this reason, when the single-sided, two-recording layer structure is used, the information reproduction signal from the other layer is disturbed due to the influence from that portion, and errors during reproduction frequently occur. By partially overlapping the guard area as in the present invention, it is possible to prevent the occurrence of a gap where no recording mark exists, and to eliminate the influence of the interlayer crosstalk from the already recorded area in the single-sided two-recording layer, so that a stable reproduction signal can be obtained. can get.

  J) The address information is arranged a plurality of times per segment. [Effect] ... It is possible to detect off-track during recording at high speed. If the track is off during recording of the recording mark, the already recorded information is overwritten on the already recorded portion and the recorded information is destroyed. When the address information is arranged n times per segment, the address information can be ideally detected n times while the reproduction focusing spot passes through the one segment area, so the information is arranged per segment. The time required to reproduce the address information once is shortened by the larger number of address information. The ECC block structure in the embodiment of the present invention has an error correction capability for two sectors. Even if the recorded information is partially destroyed due to the off-track at the time of recording, it is possible to detect the off-track at high speed by arranging the address information multiple times per segment as in the present invention. Destruction information can be interpolated by error correction processing.

K) A condition is added to the address number assigning method for address information (particularly segment address information). [Effect] ... Increase the polarity reversal frequency in units of wobble symbols (address bits), and increase the detection accuracy of the boundary position of symbols (address bits).
(K11) The address number starts from “1” instead of “0” in which all bits have the same value.
(K12) An address number in which “1” or “0” appears three or more times consecutively is omitted.

  L) Address information is recorded by L / G recording + wobble modulation. [Effect] ... The largest capacity is possible.

  M) Indefinite bits are distributed and arranged in land and groove by L / G recording + wobble modulation. [Effects]... When the indefinite bits are concentratedly arranged in either the Land or the Groove, the frequency of erroneous detection when address information is reproduced in the portion where the indefinite bits are concentrated is greatly increased. By distributing undefined bits to Land and Groove, it is possible to distribute the risk of false detection and provide a system that can easily detect address information stably as a whole.

(M11) An indefinite bit is formed in the groove by locally changing the groove width.
(M12) An indefinite bit is formed in the groove by locally changing the wobble amplitude of the groove.

  N) Wobble phase modulation of 180 degrees (± 90 degrees) is adopted in L / G recording. [Effect] ... When an indefinite bit is generated on the land due to the change of the groove track number in "L / G recording + groove wobble modulation", the overall level of the reproduction signal from the recording mark recorded thereon changes. However, there is a problem that the error rate of the reproduction signal from the recording mark is locally deteriorated. However, since the wobble modulation for the groove is made 180 ° (± 90 °) phase modulation as in the present invention, the land width changes symmetrically and in the form of a sine wave at the indefinite bit position on the land. The overall level change of the reproduced signal from the recording mark becomes a very straightforward shape close to a sine wave shape. Further, when tracking is stably performed, an indefinite bit position on the land can be predicted in advance. Therefore, according to the embodiment of the present invention, it is possible to realize a structure in which the reproduction signal quality is easily improved by applying correction processing in a circuit to the reproduction signal from the recording mark.

  O) Gray code is adopted for the track address. [Effects]... Suppresses the occurrence frequency of indefinite bits on the land due to the change of the groove track number in "L / G recording + groove wobble modulation". At an indefinite bit position on the land, the land width locally changes in a symmetrical manner. As a result, the wobble detection signal cannot be obtained from the indefinite bit position on the land, and the entire level of the reproduction signal from the recording mark recorded thereon changes, and the error of the reproduction signal from the recording mark there occurs. There is a problem that the rate deteriorates locally. In this way, by suppressing the occurrence frequency of indefinite bits on the land, the occurrence frequency of the above-mentioned problem portion can be suppressed, and the reproduction of the wobble detection signal and the reproduction signal from the recording mark can be stabilized.

P) An error detection code having a gray code characteristic with respect to the gray code is added. [Effect] ... By adding an Error Detection Code to the track address information, the playback accuracy of the track address information is dramatically improved. 2. Since the error detection code has a gray code characteristic, the number of indefinite bits in the land portion is small, so that the reproduction / discrimination accuracy of the track address information in the land portion including the error detection code area is improved. for that reason,
(P11) The wobble address arrangement areas 561 and 562 are finely divided into error correction units 606 and error detection units 607 and 608. [Effect] ... Even if indefinite bits are mixed, the influence is included in one error detection unit. It is possible to improve the accuracy of reproducing other data. Further, when the indefinite bit position is detected using the EDC information 613 and 614, it is possible to determine the track number even for the indefinite bit mixed place by the combination of the even number track / odd number track detection information.

  Q) The gray code is simply scrambled by an exclusive OR operation process. [Effect]... The code after being scrambled also satisfies the Gray code condition, so that an increase in indefinite bits in the land portion can be suppressed.

  R) A shift reserve area is provided in the wobble address format, and the address information position is shifted. (Combination effect comes out).

S) Shifting the indefinite bit position with respect to the track address information and rearranging (effective in combination),
(S11) Within the same track, the relative indefinite bit position matches regardless of the segment position.
(S12) The relative indefinite bit position is shifted depending on the segment position even within the same track.
(S13) The relative indefinite bit position is shifted depending on the segment position even within the same track.
(S14) The indefinite bit positions are shifted by sequentially circulating the upper bits of the track number information A 611 and B 612.

T) The address information is scrambled. [Effect] ... Increase the polarity reversal frequency in units of wobble symbols (address bits), and increase the detection accuracy of the boundary position of symbols (address bits).
(T11) Scramble using segment number as seed
(T111) Change the data pattern to be exclusive ORed using M-sequence change,
(T112) The data pattern to be subjected to Exclusive OR is fixed. (T12) The scrambled pattern is changed between the track number information A 611 and B 612 by performing the scramble while changing the scrambled M-sequence. ,
(T13) The scramble seed is changed between two address areas in the same segment.
(T131) It has two kinds of seeds, a front address and a rear address, and uses fixed seeds everywhere on the disk.
(T132) Both segment address information and wobble address number information are used as seeds.

U) Change pattern contents between two address areas in the same segment, [Effect] ... Increase the frequency of polarity inversion in wobble symbol (address bit) units, and increase the detection accuracy of the boundary position of symbols (address bits) ,
(U11) Bit inversion processing is performed between two address areas in the same segment.

V) The even / odd identification information of the track number is arranged in the inter-segment area. [Effect] ... Since the even / odd identification information is outside the recording information area formed by the recording mark, the even / odd identification information does not affect the reproduction signal from the recording mark. To that end, (v11) Physically arrange even / odd identification information, [Effect] ... with high detection accuracy and high speed detection,
(V12) Cutting the groove locally, [Effect] ... Higher manufacturability and higher yield, so the price can be reduced. 1-beam recording is possible, so an inexpensive general-purpose master recording device can be used. (V13) Prepits are placed in the land.
(V14) The groove is locally meandered greatly (including “groove cutting + land pre-pit”),
[Effects] ... Productivity is high and yield is high, so it is possible to reduce the price. Since one beam recording is possible, an inexpensive general-purpose master recording apparatus can be used. Interlayer crosstalk from the recorded area in the single-sided two-recording layer (influence from another recording layer on the reproduction signal during information reproduction) can be greatly reduced.

  W) The address can be determined even if there is an indefinite bit by detecting the even / odd number of the track number and the device of the gray code. [Effect] ... Address can be determined with high precision regardless of the result of determination from undefined bits.

X) The track number information A / B (611/612) is used to shift the address number, and the track address is determined even on the land using a special track code. [Effect]... By providing an area in which the track address is fixed without any undefined bits in the land part, it is possible to detect the address with high precision even in the land part. (X11) Increment the track number in a zigzag manner. To do. The track numbers of the land areas sandwiched between the same track numbers are determined, and the track numbers of the land areas sandwiched between different track numbers are determined by the track number even / odd determining means.

  Y) Indefinite bits are also distributed in the groove area. [Effects]... By providing an area in which the track address is determined without any indefinite bits in the land portion, it is possible to detect an address with high accuracy in the land portion. Since an area where the track address is fixed can be predicted in advance without the indefinite bit in each of the land part and the groove part, the track address detection accuracy is improved.

(Y11) When the groove is created, the groove width is locally changed to create a land land constant region,
(Y12) An indefinite bit is arranged in the groove area by changing the wobble amplitude width in the groove.

Z) The zone identification information and the segment address information are arranged in the segment, and the track address is arranged in the header area between the segments. [Effect] ... 1. Since all recording is performed by wobble modulation, there is no discontinuous portion of the reproduction signal in the pre-pit header portion as in the current DVD-RAM. As a result, it is possible to stably reproduce data from the recording mark. 2. Compared with the current DVD-RAM, the zone identification information and the segment address information are arranged in the segment (record marks can be recorded in the same place), so that the recording efficiency is improved and the capacity can be increased. 3. Since the track address is arranged in the header area between the segments, there is no indefinite bit position on the land in the segment area, and the error rate during reproduction from the recording mark does not decrease. for that purpose,
(Z11) Distributed recording across a plurality of header areas with track addresses.
(Z12) Only the lower bits of the track address are recorded.

1) Description of video information recording format on information recording medium according to the present invention (A)
FIG. 1 shows a video information file arrangement on an information recording medium in the present invention. Conventional SD (Standard Definition) Object File (existing SD specific title object (VTS1TT_VOBS) file) 216, management files 206, 208, 211, 123, and HD (High Definition) compatible with high-quality video Object File (High-Definition HD Specific Title Object (VTS2TT_VOBS) File) 217 and management files 201, 209, 212, and 214 are separated from each other and coexisting in the conventional DVD-Video dedicated directory 202 doing.

  FIG. 2 shows another embodiment. Here, a conventional SD (Standard Definition) Object File (existing SD specific title object (VTS1TT_VOBS) file) 216 and management files 206, 208, 211, 123, and HD (High Definition) corresponding to high-quality video. Object file (specific image object (VTS2TT_VOBS) file 217 for high image quality HD) and management files 201, 209, 212, and 214 are arranged separately under different directories 203 and 204, respectively. If the Object File and management file are separated for SD and HD, not only will file management be easier, but it will also be possible to prepare an SD or HD decoder in advance for playback of the Object File. The preparation time before starting is greatly shortened.

  As shown in FIG. 3, according to the present invention, information is recorded on an information recording medium in the form of a program stream in accordance with a multiplexing rule defined by MPEG layer 2. That is, the main video information in the video information is distributed and arranged in the video packs 252 to 254, and the audio information is distributed and arranged in the audio pack 255. Although not shown in the system of the present invention, the navigation pack 251 is arranged at the head position of VOBU (Video Object Unit) which is the minimum unit of video information. In addition to the main video recorded in the video packs 252 to 254, sub-video information indicating subtitles and menus is defined. Sub-picture information is distributed in sub-picture packs 256-258. When reproducing video information from an information recording medium, sub-picture information distributed in the sub-picture packs 256 to 258 is collected to form a sub-picture unit 259, and then video processing is performed by a video processor (not shown). And then display it to the user.

  In the embodiment of the present invention, sectors 231 to 238 having a size of 2048 bytes are management units for information recorded on the information recording medium 221. Therefore, the data size per pack 241 to 248 is also set to 2048 bytes according to the sector size.

2] Sub-picture information expression format and compression rule (B) in the present invention
(a) Run-length compression rule
Run-length compression is used to compress sub-pictures. Some of the compression rules are described here. Several run-length compression rules have been developed for SD and HD.

  1) Case where 4 bits are set as one unit (refer to compression rule (1) of sub-picture information in FIG. 4). If pixel data (pixel data) having the same value is continued for 1 to 3, the first 2 bits indicate the number of pixels (pixel number), and the subsequent 2 bits represent specific pixel data.

  2) A case where 8 bits are set as one unit (see sub-picture information compression rule (2) in FIG. 4). If pixel data having the same value is continuously 4-15, the first 2 bits are set to 0. The next 4 bits indicate the number of pixels, and the next 2 bits represent specific pixel data.

  3) Case in which 12 bits are set as one unit (see sub-picture information compression rule (3) in FIG. 4). If pixel data having the same value continues for 16 to 63, the first 4 bits are set to 0. The next 6 bits indicate the number of pixels, and the next 2 bits represent specific pixel data.

  4) A case where 16 bits are set as one unit (see the compression rule explanatory diagram (4) of sub-picture information in FIG. 4). If pixel data having the same value is continuously 64 to 255, the first 6 bits are set to 0. The next 8 bits indicate the number of pixels, and the next 2 bits represent specific pixel data.

  5) A case where 16 bits are set as one unit (see the compression rule explanatory diagram (5) of the sub-picture information in FIG. 4). If pixel data of the same value continues to the end of one line, the first 14 bits are set to 0. Then, specific pixel data is represented by the following 2 bits.

  6) If byte alignment cannot be realized when pixels for one line are expressed, a 4-bit dummy ('0000b') is inserted for adjustment.

  The above is a rule used when compressing a sub-picture for SD, but a rule used when compressing a sub-picture for HD has also been developed.

  FIG. 5 shows a state in which pixel data is expressed by 4 bits and a pixel name is assigned to each pixel data.

  Pixel data is raw data or data obtained by compressing bitmap data for each line by a special run-length compression method described in a run-length compression rule. The pixel data shown in FIG. 5 is assigned to the pixels of the bitmap data.

Pixel data is allocated to data classified into fields or plane data as shown in FIG. Within each sub-picture unit (SPU), the pixel data is organized so that all of the portions of pixel data displayed during one field are continuous. In the example shown in FIG. 6A, top field pixel data is recorded first (after SPUH), then bottom field pixel data is recorded, and pixel data suitable for interlaced display is allocated. In the example shown in FIG. 6B, pixel data that is recorded as plane data and is suitable for non-interlaced display is assigned. FIG. 6 shows a sub-picture unit that is used to collect sub-picture information. Pixel data is assigned to data classified into fields in the sub-picture unit or plane data. Within each sub-picture unit (SPU), the pixel data is organized so that all of the portions of pixel data displayed during one field are continuous. This sub-video unit is a unit constructed by collecting a plurality of sub-video packets.

  In the example shown in FIG. 6A, top field pixel data is recorded first (after SPUH), then bottom field pixel data is recorded, and pixel data suitable for interlaced display is allocated. In the example shown in (b) of FIG. 6, pixel data that is recorded as plane data and suitable for non-interlaced display is assigned. An even number of “00b” may be added to the end of the pixel data so as to meet the size limit of SP_DCSQT. FIG. 7 shows the relationship between the pack and the sub-picture unit.

  The sub-picture unit header (SPUH) is composed of address information of each data in the sub-picture unit (SPU). As shown in FIG. 8, the 4-byte sub-picture unit size (SPU_SZ) and 4-byte display control are provided. The start address (SP_DCSQT_SA) of the sequence table, 4-byte pixel data width (PXD_W), 4-byte pixel data height (PXD_H), 1-byte sub-picture category (SP_CAT), and 1-byte reservation are described.

  The sub-picture unit size (SPU_SZ) describes the size of the sub-picture unit in bytes. The maximum size is 524,287 bytes (“7FFFFh”). The size must be an even number of bytes. If the size is an odd number of bytes, 1 byte of “FFh” is added to the end of the sub-picture data in order to make it an even number of bytes. The size of the start address (SP_DCSQT_SA) in the sub-picture unit (SPU) is equal to or smaller than the size of the SPU.

  The start address (SP_DCSQT_SA) describes the start address of the display control sequence table (SP_DCSQT) as a relative byte number RBN from the start byte of the sub-picture unit. The maximum value of the pixel data width (PXD_W) is 1920, and the maximum value of the pixel data height (PXD_H) is 1080.

  In the sub-picture category (SP_CAT), as shown in FIG. 9, bit numbers b7 to b2 are reserved, bit number b1 is a flag (Stored_Form) indicating a data storage method in the pixel data PXD area of 4 bits / 1 pixel, bit number b0 Describes a flag (Raw) indicating run length compression / non-compression of the pixel data PXD.

  For interlaced display, the flag (Stored_Form) indicating the data storage method in the PXD area must be “0b” (top / bottom), and the display data should be stored in separate locations, top and bottom. Thus, it is possible to realize a data structure that facilitates data retrieval and interlaced display. When non-interlaced display is performed, “1b” (plane) is designated and display data is stored in a lump to realize a data structure that facilitates data retrieval and non-interlaced display. In the SD system, interlaced display is performed, and in the HD system, non-interlaced display is performed. This flag (Stored_Form) can be used for standby of the HD decoder.

  The run length compression / non-compression flag (Raw) is set to “0b” (compression) for a subtitle stream with a good compression ratio, such as subtitles. “1b” (uncompressed) is specified for a slightly complicated image stream that invites users. As a result, compression / non-compression can be specified in units of sub-picture units (SPU), information can be assigned to main video data and other data (audio, etc.), and sub-picture information can be stored on the information recording medium. Since efficient recording is possible, high-quality content can be maintained. This flag (Raw) can be used for standby of the HD decoder.

  When high-definition TV system high-quality content is recorded on a DVD video disc, sub-picture information that has been used as subtitles and menu information is also required to be recorded in the high-definition TV system. The sub-picture run length compression rule according to the present embodiment will be described below.

  As shown in FIG. 10, the pixels of the bitmap data are compressed according to the following rules for each line. The compressed pixel pattern basically has 5 parts: run length compression flag (Comp), pixel data field (Pixel data), counter extension flag (Ext), counter field (Counter), extended counter field (Coutner (Ext) ). In the run length compression flag (Comp), “0b” is described if the pixel data is not compressed, and “1b” is described if the pixel data is compressed by run length coding. When pixel data is not compressed, one data unit represents only one pixel, and there is no counter extension flag (Ext) or later.

  The pixel data describes any of the 16 pixel data shown in FIG. 5, and this value represents an index of the color lookup table. The counter extension flag (Ext) describes “0b” if the counter field is 3 bits, and “1b” if it is 7 bits. The counter field specifies the number of consecutive pixels. When the flag (Ext) is set to “0b”, this field is 3 bits. When the flag (Ext) is set to “1b”, this field is 7 bits (extended counter field is used).

  Data compressed by this compression rule is composed of a plurality of units. Each unit has four points at the pixel change point. The unit is composed of a unit header forming a bundle of four run length flags shown in FIG. 11 (a) and the following four types of compression patterns shown in FIGS. 11 (b) to 11 (e).

  The unit header shown in FIG. 11A is a set of run-length compression flags (Comp) indicating whether or not a run-length exists. If the run-length does not continue, “0b” is maintained and the run-length continues. Then, “1b” is described. In the compression pattern (A) shown in (b) of FIG. 11, if pixels having the same value do not continue, the run-length compression flag (Comp) is set to “0b” and 4-bit pixel data is described. In the compression pattern (B) shown in FIG. 11C, if 1 to 7 pixels having the same value follow, the run length compression flag (Comp) is set to “1b” and the pixel data is described in the first 4 bits. The next 1 bit (flag Ext) designates “0b” and describes the counter in the next 3 bits. In the compression pattern (C) shown in FIG. 11D, if 8 to 127 pixels having the same value follow, the run length compression flag (Comp) is set to “1b”, and pixel data is described in the first 4 bits. The next 1 bit (flag Ext) designates “1b”, describes the counter in the next 3 bits, and describes the counter extension in the next 4 bits. Compression pattern (D) shown in (e) of FIG. 11: When pixels having the same value are consecutive at the end of the line, “0b” is described in all 8 bits, and the run length compression flag (Comp) is set. “1b” is assumed.

  If the byte adjustment is not completed when the description of one line of pixels is completed, 4-bit dummy data “0000b” is inserted for adjustment. The size of run-length coded data in one line is 7,680 bits or less.

  The encoding / decoding method according to the present embodiment performs run-length compression / expansion by a combination of the following (1) to (4).

  (1) It has a run-length compression flag (Comp) that indicates whether or not the runs are continuous and thereby determines compression / no compression. (2) A counter extension flag (Ext) is provided to extend the run continuation counter (Counter) and add an extension counter (Counter (Ext)) according to the number of consecutive runs. (3) The four run change points are handled as one unit, and a nibble (4 bits) configuration that facilitates byte alignment makes it easy to process. (4) Run-length compression / expansion has an end code E for each line (however, this information may be omitted if the information about the capacity of one line can be given in advance to the encoder and decoder) Is possible).

  FIG. 12 is a diagram showing a “run length compression rule (in line units) of 3-bit 8-color representation in 3-bit data” that is a run-length compression rule according to the present embodiment (in this case, it can be handled in 4-bit units. FIG. 13 is a diagram showing a “run length compression rule (unit of line) of 4-bit 16-color expression in 4-bit data”, and FIG. 14 is a diagram of the run-length compression rule according to the present embodiment. FIG. 15 to FIG. 17 are diagrams showing an example of unitizing this data structure, and FIG. 18 is an example of a run-length compression rule for 4-bit 16-color expression in 4-bit data ( It is a figure which shows the other example of "line unit)".

  According to the encoding method of the sub-picture encoder unit according to the present embodiment, pixel data is not continuous even in the case of sub-picture image data of 1-pixel 4-bit representation (16 colors) in which run discontinuity is relatively large. In this case, since the counter is not used, the data length is not increased. Even if there is a run continuation that lasts longer than a predetermined number, this can be reliably reproduced using an extension counter (Counter (Ext)). Accordingly, a sufficient compression effect can be exhibited by the functions of the run length compression flag (Comp), the basic counter (Counter), the extension counter (Counter (Ext)), the counter extension flag (Ext), and the like. The run length compression flag (Comp) is collected as a 4-bit representation (or a multiple thereof) and arranged at the beginning of the data string, thereby improving the decoding processing speed by adopting a form that facilitates the decoding processing using 4-bit information. It is also possible.

  The line end code E generated by the line end code generation unit is not necessarily required for the encoding / decoding process if the number of pixels in one line is known in advance. That is, even if the line end position is not known, the sub-picture image data for each line can be encoded / decoded by counting the number of pixels from the start position.

  According to the decoding method of the sub-picture decoder section according to the present embodiment, these run-length compression flags can be used even for sub-picture image data of 1 pixel 4-bit representation (16 colors) in which run discontinuity is relatively large. (Comp), the basic counter (Counter), the extension counter (Counter (Ext)), the counter extension flag (Ext), and the like can provide a sufficient compression effect. The run length compression flag (Comp) is collected as a 4-bit representation (or a multiple thereof) and arranged at the beginning of the data string, thereby improving the decoding processing speed by adopting a form that facilitates the decoding processing using 4-bit information. It is also possible.

  As in the case of the encoding process, the line end code E detected by the line end code detection unit is not necessarily required for the encoding / decoding process. If the number of pixels in one line is known in advance, the line end code E is set to this number of pixels. Accordingly, the decoding process can be performed for each line.

  Next, an example of a data structure compressed and expanded by the encoding / decoding method according to the present embodiment will be described.

  FIG. 12 shows a run-length compression rule (line unit) of 3-bit 8-color representation in 4-bit data. The basic data structure is a 1-bit run length compression flag (Comp) (d0) indicating the presence or absence of run continuation, 3-bit pixel data (d1 to d3) indicating run pixel data, and a run length compression flag (Comp). = 1 (present), 1-bit counter extension flag (Ext) (d4) indicating the presence or absence of counter extension, 3-bit counter (Counter) (d5 to d7) of consecutive runs, and counter extension flag (Ext ) = 1 (present), it is composed of a 4-bit extension counter (Counter (Ext)) (d8 to d11) used as a 7-bit run counter in combination with the 3-bit counter.

  The pattern shown in (a) of FIG. 12 can represent one pixel data without run continuation, and the pattern shown in (b) of FIG. ). In addition, the pattern shown in FIG. 12C can represent 9 to 128 pixel data that are run continuously using a counter and an extension counter (Counter (Ext)). The pattern shown in (d) of FIG. 12 is a line end code E indicating the end of run length compression in line units.

  The data structure of each pattern shown in (a) to (d) of FIG. 12 has a 4-bit (nibble) configuration, and unlike FIG. Can be constructed easily.

  FIG. 13 is a diagram showing a run length compression rule (line unit) that is the basis of the present embodiment. In this figure, the basic data structure is a 1-bit run length compression flag (Comp) (d0) indicating the presence or absence of run continuation, 4-bit pixel data (d1 to d4) indicating run pixel data, and run length compression. When the flag (Comp) = 1 (present), a 1-bit counter expansion flag (Ext) (d5) indicating the presence or absence of counter expansion, a continuous run 3-bit counter (Counter) (d6 to d8), and counter expansion When the flag (Ext) = 1 (present), a 4-bit extension counter (Counter (Ext)) (d9 to d12) used in combination with the 3-bit counter is used as a 7-bit counter.

  The pattern shown in (a) of FIG. 13 can express one pixel data without run continuation, and the pattern shown in (b) of FIG. 13 is a counter (Counter ). Further, the pattern shown in FIG. 13C can represent 9 to 128 pixel data that are run continuously using a counter and an extension counter (Counter (Ext)). The pattern shown in FIG. 13D is a line end code E indicating the end of run-length compression in line units.

  The data structure of each pattern shown in (a) to (d) of FIG. 13 has an odd-bit configuration, and byte alignment is not performed as it is, and the processing system tends to be complicated.

  FIG. 14 shows a practical data structure in the present embodiment. In the same figure, the four run change points are set as one unit so that the data structure of each pattern shown in FIGS. 13A to 13D has a nibble (4 bits) configuration that is easy to byte-align. The four run length compression flags (Comp) are 4-bit unit flags (d0 to d3) (see FIG. 10). By doing so, it is possible to construct a system that is easy to perform byte processing with four run change points as a unit relatively easily.

  FIG. 15 shows one unit example of run-length compression using the unitized data structure of FIG.

  (1) First, the subsequent data pattern is determined by the 4-bit run length compression flag (Comp) (d0 to d3).

  (2) From d0 = 0, it can be seen that the first run is composed of one non-continuous pixel, and the pattern of FIG. 14A is applied, and the subsequent pixel data (d4 to d7) are developed.

  (3) From d1 = 1, it can be seen that the second run is continuous, and any one of the patterns (b) to (d) in FIG. 14 is applied. First, the pixel data (d8 to d11) are held, and subsequently the extension counter (Counter (Ext)) (d12) causes d12 = 0 and the number of counters (d13 to d15) is not zero. The pixel data (d8 to d11) is developed, and then the pixel data (d8 to d11) of the number of 7 or less indicated by the 3-bit counter (d13 to d15) is developed.

  (4) From d2 = 1, it can be seen that the third run is continuous, and as in (3), any one of the patterns (b) to (d) in FIG. 14 is applied. First, the pixel data (d16 to d19) are held, and subsequently the pattern of (c) in FIG. 14 from d20 = 1 by the run length compression flag (Comp) (d20), and the counter (Counter) (d21 to d23). And the expansion counter (Counter (Ext)) (d24 to d27), expands the pixel data (d16 to d19), and continues to the number of pixels of 127 or less indicated by the 7-bit counter (d21 to d27) Data (d16 to d19) is expanded.

  (5) From d3 = 0, it can be seen that the last run is composed of one non-consecutive pixel, the pattern of FIG. 14A is applied, and the subsequent pixel data (d28 to d31) are developed.

  In this way, run length development is performed with four change points as one unit.

  FIG. 16 shows a unit example of the run-length compression rule according to the present embodiment.

  (A) of FIG. 16 shows the case where all are uncompressed and expresses pixel data of 4 pixels as they are. FIG. 16B represents a continuous run of 8 pixels or less and uncompressed pixel data of 3 pixels. (C) of FIG. 16 represents run continuation of 128 pixels or less and uncompressed pixel data of 3 pixels. (D) of FIG. 16 shows the case of all compression, and expresses the pixel data of four continuous runs (maximum 512 pixels) of 128 pixels or less.

  FIG. 17 shows a unit example having a termination code E indicating the line termination of the run-length compression rule according to the present embodiment and a unit example having a background code. The unit ends when the end code E is inserted, and the run length compression flag (Comp) in the subsequent units is ignored. FIG. 17A shows an example including only the termination code E. FIG. 17B is an example including one pixel and a termination code E. FIG. 17C is an example composed of two pixels and a termination code E. (D) of FIG. 17 is an example comprised of the run continuation of 2 to 8 pixels and the termination code E. FIG. 17E shows an example composed of run continuations of 128 pixels or less and a termination code E, and FIG. 17F shows an example using a background code.

  FIG. 17 (f) is a data string equivalent to FIG. 17 (b). However, when the number of pixels in one line is known and the end code is not used, “00000000” is used as the background code. Yes. In other words, if a background image is created with the same image data for one line, one pixel data is placed after the run length compression flag (Comp) unit, and then one line is the same background image. It is also possible to display this by putting a background code that means As described above, the background image is displayed and encoded, and the background image corresponding to one pixel data is decoded accordingly, so that the background image can be compressed and expanded at a high compression rate.

  FIG. 18 shows another pattern of the basic run-length compression rule (line unit) shown in FIG. The basic data structure is the same as in FIG. 13, when the 1-bit run length compression flag (Comp) (d0) indicating the presence or absence of run continuation and the run length compression flag (Comp) = 1 (present), the counter expansion When the 1-bit counter extension flag (Ext) (d1) indicating the presence or absence of the counter, the 3-bit counter (Counter) (d2 to d4) of the continuous run and the counter extension flag (Ext) = 1 (present), the 3 According to the 4-bit extension counter (Counter (Ext)) (d5 to d8) used as a 7-bit counter in combination with the bit counter, and the patterns (a) to (c) in FIG. It consists of 4-bit pixel data ((a) d1 to d4, (b) d5 to d8 and (c) d9 to d12) indicating run pixel data.

  Similarly to FIG. 13, the pattern shown in FIG. 18A can represent one pixel data without run continuation, and the pattern shown in FIG. Pixel data can be expressed using a counter. The pattern shown in FIG. 18C can represent 9 to 128 pixel data that are run continuously using a counter and an extension counter (Counter (Ext)). The pattern shown in (d) of FIG. 18 is a line end code E indicating the end of run-length compression for each line.

  The encoding / decoding method according to the present embodiment can be widely applied to general digital data processing as one encoding / decoding method as well as the encoder unit and the decoder unit of the disk device. Accordingly, by taking the same procedure in the form of a microcomputer and a computer program that gives instructions to the microcomputer, the same operational effects are exhibited.

Sub-picture header and display control sequence (FIGS. 19A to 19C)
The display control sequence table (SP_DCSQT) is a display control sequence for starting / stopping display of sub-picture data and changing attributes during the effective period of the sub-picture unit (SPU). As shown in FIG. (SP_DCSQ) is described in the execution order. Display control sequences (SP_DCSQ) having the same execution time must not exist in the display control sequence table (SP_DCSQT). One or more display control sequences (SP_DCSQ) must be described in the sub-picture unit.

  In each display control sequence (SP_DCSQ), as shown in FIGS. 19B and 19C, the start time (SP_DCSQ_STM) of the 2-byte display control sequence (SP_DCSQ) and the next display control sequence of 4 bytes. The head address (SP_NXT_DCSQ_SA) and one or more display control commands (SP_DCCMD) are described.

  The display control sequence start time (SP_DCSQ_STM) describes the execution start time of the SP display control command (SP_DCCMD) described in the display control sequence (SP_DCSQ) as a relative PTM from the PTS described in SP_PKT. The display control sequence from the first top field after the described execution start time is disclosed according to the display control sequence (SP_DCSQ).

  The start time (SP_DCSQ_STM) in the first display control sequence (SP_DCSQ (SP_DCSQ # 0)) must be “0000b”. The execution start time must be greater than or equal to the PTS recorded in the SP packet header. Therefore, the display control sequence start time (SP_DCSQ_STM) must be “0000b” or a positive integer value calculated below.

SP_DCSQ_STM [25 ... 10]
= (225 × n) / 64
In addition, 0 ≦ n ≦ 18641 (in the case of 625/50 SDTV system)
SP_DCSQ_STM [25 ... 10]
= (3003 × n) / 1024;
In addition, 0 ≦ n ≦ 22347 (in the case of 525/60 SDTV system)
SP_DCSQ_STM [25 ... 10]
= 225 × n) / 64
In addition, 0 ≦ n ≦ 18641 (in the case of HDTV system)
In the above formula, n is the video frame number after the PTS of the SPU. n = 0 means a video frame exactly at the PTS time. “/” Means integer division by truncation after the decimal point.

  The last PTM in the SPU must be less than or equal to the PTS described in the SP packet containing the next SPU. The last PTM is defined as follows:

Final PTM SPU # I
= PTM SPU # i + SP_DCSQ_STMlast SPDCSQ
+1 video frame period The start address (SP_NXT_DCSQ_SA) of the next display control sequence describes the start address of the next display control sequence (SP_DCSQ) as a relative byte number (RBN) from the start byte of the SPU. When the next display control sequence (SP_DCSQ) does not exist, the head address of this display control sequence (SP_DCSQ) is described by RBN from the head byte of the SPU.

  SP_DCCMD # n describes one or more display control commands (SP_DCCMD) executed in the present display control sequence (SP_DCSQ). The same display control command (SP_DCCMD) must not be described more than once.

3] Data structure portion common to the read-only information recording medium (next-generation DVD-ROM), write-once information recording medium (next-generation DVD-R), and rewritable information recording medium (next-generation DVD-RAM) of the present invention As shown in FIG. 20, data recorded in the data field of the information recording medium includes a data frame, a scrambled frame, a recording frame, or a recording data field (depending on the signal processing stage). The Recording frame or the Recorded data field). The data frame is composed of 2048 bytes, and has main data, a 4-byte data ID, a 2-byte ID error detection code (IED), a 6-byte reserved byte, and a 4-byte error detection code (EDC).

  After the error detection code (EDC) is added, the main data is scrambled. Here, a cross-reed-Solomon error correction code (Cross Reed-Solomon error correction code) is applied to the 32 scrambled data frames (scrambled frames), and so-called ECC encoding processing is executed. Thereby, a recording frame is formed. This recording frame includes an outer parity code (the Parity of Outer-code (PO)) and an inner parity code (the Parity of Inner-code (PI)).

  PO and PI are error correction codes created for each ECC block composed of 32 scrambled frames.

  The recording data field is 4/6 modulated. A sync code (SYNC) is added to the head every 91 bytes to form a recording frame. Four recording data fields are recorded in one data field.

  FIG. 20 shows how the data changes from the main data to the recording frame. FIG. 21 shows the form of a data frame. The data frame is 2064 bytes composed of 172 bytes × 2 × 6 rows, and includes 2048 bytes of main data.

  FIG. 22 shows a data ID. The data ID is composed of 4 bytes. The first 1 byte of bits b31 to b24 is data field information, and 3 bytes (bits b23 to b0) are data field numbers.

  The data field information in the embossed data zone is as follows. Information such as sector format type, tracking method, reflectivity, recording type, area type, data type, and layer number is included.

  Sector format type ... 1b zone format type, tracking method ... 0b pit tracking, reflectance ... 1b equal to or less than 40%, recording type ... 0b general, 1b real time information (defect management method with 0b and 1b) Area type ... 01b, lead-in area, data type ... 0b, read-only data, layer number ... 0b, dual layer 0 or single layer disc, 1b, dual layer 1 .

  The data field information in the rewritable data zone is as follows.

  Sector format type ... 1b, zone format type, tracking method ... 1b, groove tracking, reflectance ... 1b, equal to or less than 40%, recording type ... 0b, general, 1b, real-time information (defect management method with 0b and 1b) Area type ... 00b, data area, 01b, lead-in area, 10b, lead-out area, data type ... 1b, rewritable data, layer number ... 0b, dual layer 0 or single layer disc 1b shows layer 1 of the dual layer. These bits must also be assigned according to the above rules.

  FIG. 23 shows the contents of the data field number. When the ECC block belongs to an embossed data zone, a defect management area, or a disc identification zone, a sector number is described in any case. When the ECC block belongs to the data area, the data field number is “logical sector number (LSN) + 031000h”. At this time, the ECC block includes user data.

  An ECC block belongs in the data area, but this ECC block does not include user data, that is, it may be an unused ECC block. In such a case, it is one of the following three. (1) Bits 0 to 3 of the first sector are 0, and a serially incremented field number is described in the succeeding sector. (2) A field number between 00 0000h and 00 000Fh is described. (3) Or nothing is described.

  FIG. 24 shows the definition of the recording type.

  That is, it is “reserved” when the ECC block is in the embossed data zone. When the ECC block is in the rewritable data zone and in the lead-in area or lead-out area, it is “reserved”. When the ECC block is in the rewritable data zone and in the data area, 0b means general data, and 1b means real-time data.

In the case of general data data, if a block is defective, a linear replacement algorithm is applied to the corresponding sector. In the case of real-time data, if a block is defective, the linear replacement algorithm is not applied to the corresponding sector.

  Next, an error detection code (IED) for data ID will be described.

Now, each byte arranged in the matrix is Ci, j (i = 0 to 11, j = 0 to 171).
Assuming that each byte for the IED is C0, j (j = 0-4), the IED can be expressed as follows.

here,

α is represents the primitive root of the primitive polynomial.

  Next, 6-byte RSV will be described.

  The first byte of RSV is used as seed information for scrambling. The other 5 bytes are 0h and are reserved.

The error detection code (EDC) is a 4-byte check code and is attached to 2060 bytes of the data frame before scramble. Assume that the MSB of the first byte of the data ID is b16511 and the LSB of the last byte is b0. Then, each bit bi (i = 31 to 0) for EDC is

here

FIG. 25A shows an example of initial values given to the feedback shift register when creating a scrambled frame, and FIG. 25B shows a feedback shift register for creating a scramble byte. Sixteen preset values are prepared.

  r7 (MSB) to r0 (LSB) are shifted by 8 bits and used as a scramble byte. The initial preset number in FIG. 25A is equal to 4 bits (b7 (MSB) to b4 (LSB)) of the data ID. At the start of data frame scrambling, the initial values of r14 to r0 must be set to the initial preset values in the table of FIG.

  The same initial preset value is used for 16 consecutive data frames. Next, the initial preset values are switched, and the same switched preset values are used for 16 consecutive data frames.

The lower 8 bits of the initial values of r7 to r0 are taken out as a scramble byte S0. Thereafter, an 8-bit shift is performed, and then a scramble byte is taken out, and such an operation is repeated 2047 times. When the scrambled bytes S0 to S2047 are extracted from r7 to r0, the data frame changes from the main byte Dk to the scrambled byte D′ k. This scrambled byte D'k is

  It becomes.

Next, the configuration of the ECC block will be described. (D) (E)
FIG. 26 shows an ECC block. The ECC block is formed of 32 consecutive scrambled frames. 192 rows + 16 rows are arranged in the vertical direction, and (172 + 10) × 2 columns are arranged in the horizontal direction. B0, 0, B1, 0,... Are each 1 byte. PO is PI, error correction code, and outer parity and inner parity.

  In the ECC block of FIG. 26, a unit of (6 rows × 172 bytes) is handled as one scrambled frame. FIG. 27 is a diagram rewritten as the scrambled frame arrangement in this way. That is, it consists of 32 consecutive scrambled frames. Further, in this system, (block 182 bytes × 207 bytes) is handled as a pair. When L is added to the number of each scrambled frame of the left ECC block and R is added to the number of each scrambled frame of the right ECC block, the scrambled frames are arranged as shown in FIG. That is, left and right scrambled frames exist alternately in the left block, and scrambled frames exist alternately in the right block.

  That is, the ECC block is formed from 32 consecutive scrambled frames. Each row in the left half of the odd sector is replaced with a row in the right half. 172 × 2 bytes × 192 rows is equal to 172 bytes × 12 rows × 32 scrambled frames and is an information field. A 16-byte PO is added to form an outer code of RS (208, 192, 17) in each 172 × 2 column. Also, 10-byte PI (RS (182, 172, 11)) is added to each 208 × 2 row of the left and right blocks. PI is also added to the PO line.

  The numbers in the frame indicate the scrambled frame number, and the suffixes R and L mean the right half and the left half of the scrambled frame. The PO and PI shown in FIG. 26 are generated according to the following procedure.

First, 16-byte Bi, j (i = 192 to 207) is added to the column j (j = 0 to 171 and j = 182 to 353). This Bi, j is defined by the following polynomial Rj (X),
This polynomial forms the outer code RS (208, 192, 17) in 172 × 2 columns.

here

Next, 10 bytes of Bi, j (j = 172 to 181, j = 354 to 363) are added to the row i (i = 0 to 207). This Bi, j is defined by the following polynomial Ri (X),
This polynomial forms the inner code RS (182, 172, 11) in each row of (208 × 2) / 2.

here

here

Bi, j which is an element of each B matrix in FIG. 26 constitutes 208 rows × 182 × 2 columns. This B matrix is interleaved between the rows so that Bi, j is rearranged at Bm, n. This interleaving rule is expressed by the following equation.

  As a result, as shown in FIG. 28, the 16 parity rows are distributed one by one. That is, 16 parity rows are arranged one by one for every two recording frames. Accordingly, a recording frame consisting of 12 lines is 12 lines + 1 line. After this row interleaving is performed, 13 rows × 182 bytes are referred to as a recording frame. Therefore, the ECC block after row interleaving is 32 recording frames. In one recording frame, as described with reference to FIG. 27, there are six rows of blocks on the right side and the left side. The POs are arranged so that they are located in different rows between the left block (182 × 208 bytes) and the right block (182 × 208 bytes). In the figure, one complete ECC block is shown. However, during actual data reproduction, such ECC blocks continuously arrive at the error correction processing unit. This is the result of employing an interleaving method as shown in FIG. 28 in order to improve the correction capability of such error correction processing.

  Next, the configuration (point F) of the recording data field will be described.

  A recording frame (2366 bytes) of 13 rows × 182 bytes is continuously modulated, and two synchronization codes are added thereto. One synchronization code is added before the 0th column, and the other synchronization code is added before the 91st column. At the start of the data field, the state of the synchronization code Y0 is state 1 (state 1 in FIG. 30). As shown in FIG. 29, the recording data field is 13 sets × 2 sync frames. One recorded data field of 29016 channel bit length is equivalent to 2418 bytes before modulation.

  SY0 to SY3 in FIG. 29 are synchronization codes (SYNC) codes, which are selected from the codes shown in FIG. The numbers 24 and 1092 shown in FIG. 29 are channel bit lengths.

  In FIG. 29, both the even recorded data field (Oven Recorded data field) and the odd recorded data field (Odd Recorded data field) are the last two sync frames (that is, the last “SYNC code is SY3” and the “sync” immediately thereafter). The PO (Parity Out) information shown in FIG. 28 is inserted into the sync data area in the “data” and “SYNC code is SY1” and the “sync data” immediately after that portion).

    “Part of the left PO” shown in FIG. 27 is inserted in the last two sync frame locations in the even recorded data field, and the last two sync frame locations in the odd recorded data field are shown in FIG. “Part of the right PO” is inserted. As shown in FIG. 27, each ECC block is composed of left and right “small ECC blocks”, and PO groups (POs belonging to the left small ECC block or right small ECC block that are alternately different for each sector). Data belonging to PO) is inserted.

  The left data field in which the synchronization codes SY3 and SY1 are continuous is shown in the upper part (A) of FIG. 29, and the right data field in which the synchronization codes SY3 and SY1 are continuous is shown in the lower part (B) of FIG. Has been.

  FIG. 31 shows an example of physical sector layout numbering of an information recording medium (optical disk). FIG. 31A shows a single-layer disc, and FIGS. 31B and 31C show a disc having a plurality of layers. The sector number X in FIG. 31C is calculated so that the bit value of x is replaced with 0 or 1 and inverted. It is a multiple of sector number X16.

  As shown in FIG. 31, a sector number indicating a sector address is set. The present invention provides a format corresponding to a single-sided, two-recording layer not only for read-only information recording media but also for recordable information recording media.

  FIG. 32 is an explanatory diagram of the data structure in the lead-in area in the read-only information recording medium in the present invention.

  FIG. 33 is an explanatory diagram of the entire data structure in the rewritable information recording medium of the present invention.

4] First embodiment (C) in the read-only information recording medium (next-generation DVD-ROM) of the present invention
In the present invention, two types of data structures of recording data in the read-only information recording medium (next-generation DVD-ROM) are allowed, and the content provider can select one of them depending on the data contents to be recorded.

4-1) Description of data structure in the first embodiment of the read-only information recording medium (next-generation DVD-ROM) of the present invention Data that can be recorded on the information recording medium or data recorded on the information recording medium in the present invention A first data unit (ECC block 401), the first data unit is composed of second data units (segments 411 to 418), and the second data unit is a third data unit (sector); 230 to 241), the third data unit is composed of a fourth data unit (sync data 432), and error detection or error correction of data is possible within the first data unit. It is characterized by things.

  In other words, in the embodiment of the present invention, the data recorded on the information recording medium 221 has a hierarchical structure in units of data as shown in FIG. 34 regardless of the type of the information recording medium 221 (reproduction only / writable / rewritable type). have. One ECC block 401, which is the largest data unit capable of data error detection or error correction, is divided into eight segments 411 to 418, which is the most basic feature of the present invention. Corresponding to point (G)]. Each of the segments 411 to 418 is composed of four sectors 230 to 233 or 234 to 238, respectively. Each sector 230 to 241 shown in FIG. 34 shows the same contents as the sectors 231 to 238 recorded in pack units shown in FIG. As already described with reference to FIG. 29 and FIG. 28 and again as shown in FIG. 34, each sector 230 to 241 is composed of 26 sync frames # 0 420 to # 25 429. In one sync frame, sync code 431 and sync data 432 shown in FIG. One sync frame includes data of 1116 channel bits (24 + 1096) as shown in FIG. 29, and a sync frame length 433 which is a physical distance on the information recording medium 221 on which the one sync frame is recorded. Is almost constant everywhere (excluding changes in physical distance for intra-zone synchronization).

  In addition, the present invention is also characterized in that a plurality of types of recording formats can be set in the read-only information recording medium (corresponding to the invention point (C)). Specifically, there are two types of recording formats shown in the first and second embodiments of the read-only information recording medium. The difference between the first embodiment and the second embodiment in the read-only information recording medium of the present invention is shown in FIG. FIG. 35 (a) shows the first embodiment, and the segments # 1 411 to # 8 418 are physically packed and continuously recorded on the information recording medium 221. FIG. On the other hand, in the second embodiment, as shown in FIG. 35B, header areas # 1 441 to # 8 448 are inserted and arranged between the segments # 1 411 to # 8 418, respectively. Corresponding to point (H)]. The physical length of each header area # 1 441 to # 8 448 matches the sync frame length 433.

As can be seen from FIG. 31, the physical distance of the data recorded on the information recording medium 221 is handled with the sync frame length 433 as a basic unit, and thus the physical length of each of the header areas # 1 441 to # 8 448. In addition, matching the sync frame length 433 has an effect of facilitating management of physical arrangement and control of access to the data recorded on the information recording medium 221.

4-2) Common part of the read-only information recording medium (next-generation DVD-ROM) of the present invention with the second embodiment
Lead-in and Lead-out are packed into a data structure to be recorded. [Effect] ... When the data structure is different across the entire area of the information recording medium, the playback device starts playback of the information recording medium for the first time. Sometimes he / she decides which method to deal with, and the playback start time takes longer than necessary. First, at the time of start-up (when the information reproducing apparatus or information recording / reproducing apparatus starts reproducing immediately after the information recording medium is installed) by sharing the data structure of part of the information recording medium (Lead-in and Lead-out parts) You can access that part first and play back the minimum required information in the same format. Therefore, it is possible to start reproduction stably and at high speed when starting up.

4-3) Recording location of identification information of two types of formats (corresponding to invention point (C))
(4-311) Format is common within the same disk (format change not possible from the middle of the disk)
As another embodiment, (4-312) allows two formats to be mixed in the same disc in accordance with the contents of the contents to be recorded. (4-313) DVD-ROM format identification flag information (contains some of the two plans) Record to disc,
(4-321) Record the format identification flag information in the common format area .... Record it in the Control Data Zone shown in FIG.
(4-322) The format identification flag information is recorded in the recordable area. For the rewritable information recording medium, the identification flag is provided in the Disc identification zone in the Rewritable data zone in FIG.

5] Second embodiment of read-only information recording medium (next-generation DVD-ROM) of the present invention 5-1) Description of structure in which "ROM header" is arranged between segments Second of read-only information record medium of the present invention The recording format shown in the embodiment has a structure in which header areas # 1 441 to # 8 448 are inserted and arranged between the segments # 1 411 to # 8 418 as described above and shown in FIG. 35 (b). Corresponding to (C)].

5-2) Explanation of specific data structure in “ROM header” in the second embodiment (corresponding to invention point (H))
In the conventional ROM media playback operation, it is necessary to first read the error correction block including the requested data block, and calculate the position where the specified block will exist from the current position from the block number difference, etc., and predict the position The seek operation is started. After seeking to the specified designated location, the readout clock is extracted from the information data, channel bit synchronization and frame synchronization signal detection and symbol synchronization are performed, the symbol data is read out, and then the block number is detected to designate the designated block. It will be confirmed. In other words, in general ROM media playback, there is only a detection signal for the RF signal from the information pits, so all of the disk rotation control, information linear velocity, and channel bit read clock generation, which is the data read clock, are left to the RF signal. It is done. In the recording / reproducing media, the address information, which is the target of the present invention, exists in a signal form different from the recording of the data information in order to specify the recording location. Therefore, the channel bit clock generation PLL, etc. Such a signal can be used to detect the linear velocity and the like, and the PLL transmission frequency can be controlled in the vicinity of the correct channel bit clock frequency. For this reason, it is possible not only to shorten the lock-up time of the PLL but also to provide an optimal system that can prevent runaway. However, since such a signal cannot be used in ROM media, a similar control system cannot be used. Therefore, a system is constructed by using a maximum code length (Tmax) or shortest code length (Tmin) signal of a conventional information signal. It was. That is, in the ROM medium, it is important how the PLL can be brought into an early locked state, and it has been desired to provide a signal form for that purpose. However, since the data / track structure of the ROM media in existing CDs and DVDs is determined by focusing only on the recording density, and the data / track structure of the recording / reproducing media is subsequently constructed, a data stream that differs for each medium, etc. It has become.

  In developing a recording method for next-generation media while approximating data streams of recording / reproducing media such as ROM media and R / RAM, introduction of measures for improving recording density is being studied. As one of the recording density improvement techniques, there is an improvement in modulation efficiency, and introduction of a new modulation method is considered in which the shortest pit length (Tmin) with respect to the recording / reproducing beam diameter is reduced. When the shortest pit length is reduced with respect to the beam system, it is difficult to detect the phase of the channel bit clock generation PLL that performs channel bit separation even if the signal amplitude cannot be obtained and the data can be read out by the PRML technology. Become. As described above, the ease of PLL lock in ROM media that relies only on the pit signal becomes increasingly severe with the introduction of high-density technology, making high-speed seeks difficult, and the insertion of auxiliary signals for that becomes necessary. ing.

  The recording format shown in the second embodiment of the read-only information recording medium of the present invention is as described above and as shown in FIG. 35 (b), the ROM medium also includes a header area # 1 441 between the segments # 1 411 to # 8 418. # 8 448 is inserted and arranged, and the same control as the playback processing of the recording / playback media can be realized by inserting the signals necessary for the ease of seeking and the lockability of the PLL for generating the channel bit clock into the header area. There is also the purpose of realizing.

  FIG. 68 is a diagram showing an example of the header area in the ROM medium. The header area is composed of header synchronization (Header Sync) 1001 and a specific code (Specific code) 1002. Header Sync has a structure in which a channel bit length longer than Tmax in the information signal is repeated a plurality of times, and Specific code is error correction. The ECC block number, segment number (Segment-No), copyright protection signal and other control information signals are configured. The code length of the Tmax signal used for the frame synchronization signal of information data is determined in consideration of channel bit synchronization and symbol synchronization performance, but since the synchronization signal in the segment header area has few restrictions, seek operation in variable speed playback Inside, if a signal form different from other information data areas can be detected, by examining the detection distance, it becomes a prediction signal such as linear velocity, and even if the oscillation frequency of the PLL for channel bit clock generation is runaway, It is possible to control in the vicinity. As a specific method, a method in which a signal having a longer code length than that of the Tmax signal inserted in the frame synchronization signal or the like is configured a plurality of times can be considered.

The Specific code can be used to arrange a special control signal that is not configured in the data area. For example, a copyright protection signal, a media specific information signal, and the like. By securing such a special information area, system expandability becomes possible.

  FIG. 69 is a diagram showing another embodiment. The header area includes a header sync 1001 and a random code 1003. In the area of the specific code in FIG. 68, a random signal is arranged so that the channel bit clock generation PLL can easily enter the locked state. Conventionally, in a recording medium such as a DVD-RAM, a repetitive signal (VFO) having a fixed code length is inserted so that the PLL can easily realize a locked state. In ROM media, the phase difference detection method is likely to be used as a tracking error signal detection method. In this phase difference detection method, if the signal pattern of the adjacent track continues to approximate the signal pattern of this track, the adjacent track A phenomenon occurs in which the tracking error signal cannot be detected due to crosstalk. For this reason, there is a problem in adopting a VFO signal composed of a signal with a fixed period used for a recording medium or the like. On the other hand, with the shortest code length when the PRML method or the like is used for high density, there are many signals that are difficult to detect the phase difference in the channel bit clock generation PLL. Of course, in order to facilitate the phase locking of the PLL, the detection sensitivity becomes higher as the number of phase detections is larger. Therefore, it is necessary to consider this point. Therefore, the Random code portion in FIG. 69 is a combination of a limited code length in which the partial code length on the shortest pit side where the PLL phase detection is not reliable and the partial code length on the longest pit side where the number of detections is reduced are deleted. Introduce a random signal. That is, a random signal using a code whose run length is limited is used.

  68 may be scrambled with a random signal from a random number generator whose initial value is specified by a segment number. When the scrambled data at this time is modulated into a recording signal, it is desirable to modify the modulation table so that the recording signal stream is limited in run length. By such processing, it is possible to prevent adjacent track pattern matching in the Specific code area as well as the scramble processing function corresponding to the data area of the current DVD-ROM.

6] Description of the format relationship between the recordable information recording medium of the present invention and the read-only information recording medium (next-generation DVD-ROM) The recordable storage medium and read-only information of the present invention will be described with reference to FIG. The relationship on the recording format (format) on the recording medium will be described. 36 (a) and 36 (b) are the reproduction of the first and second embodiments of the read-only information recording medium shown in FIG. 35 as they are. For the recordable information recording medium, a header area having the same length as the sync frame length 433 is provided between each segment # 1 411 to # 8 418 as in the second embodiment of the read-only information recording medium. Yes. However, the patterns of data (record marks) recorded in the header area are different between the read-only information recording medium and the header areas # 2 452 to # 8 458 of the recordable information recording medium shown in FIG. Similarly, header areas # 2 442 to # 8 448 of the read-only information recording medium shown in FIG. 36B and header areas # 2 462 to # 8 468 of the rewritable information recording medium shown in FIG. The pattern of data (record mark) recorded in the area is different. As a result, the type of the information recording medium 221 can be determined.

  The method of using the header area of the read-only information recording medium has been described in the above section [5]. Here, the method of using the header area resulting from the difference between the read-only information recording medium and the recordable type information recording medium. Will be described with reference to FIGS. 36 (b), (c), and (d). The write-once information recording medium shown here is a write-once recording medium in which the recording operation is performed only once. Normally, continuous recording processing is performed, but when recording in a specific block unit, Since the method of recording the next data block by the write-once method is adopted in succession to the previously recorded block, FIG. 36 is read as a write-once information recording medium.

  Before explaining the difference in the header structure of each medium, I would like to explain the difference between the data stream of the read-only information recording medium and the recording / reproducing medium. In the read-only information recording medium, the relationship between channel bits and symbol data is continuous in the specified relationship in all data blocks including the header area. However, in the write-once information recording medium, at least the phase of the channel bit changes between the blocks where the recording operation is stopped. In the rewritable information recording medium, there is a high possibility that the phase changes in segment units. That is, in the read-only medium, the channel bit phase is continuous from the beginning to the end, but in the recordable medium, the channel bit phase has a characteristic that changes greatly in the header area.

  On the other hand, since the recording track of the recording medium is physically formed with a recording track groove, and the groove is wobbled for the purpose of recording rate control and insertion of addressing information, the channel bit clock generation PLL is transmitted. The frequency can be controlled, and the runaway of the transmission frequency can be prevented even in processing operations such as variable speed reproduction. However, in the recordable information recording medium, since the medium after recording is used exclusively for reproduction, the adjacent track, which is a consideration when the phase difference method is introduced in the tracking error detection method described in the section [5], is used. I want to avoid recording signal pattern matching between the two. In the rewritable information recording medium, in general, when the phase difference method is not used as a tracking error detection method, there is no problem with information signal pattern matching in adjacent tracks. A structure that can be easily locked, that is, a random code region in FIG. 69, is preferably a signal with a constant period such as VFO.

  Since these media types have different properties, the structure of (b) header area 442, (c) header area 452, and (d) header area 462 in FIG. 36 is optimal in consideration of the characteristics of the medium. Data structure is introduced.

  In the header area of the read-only information recording medium, the pattern is easy to detect the linear velocity, and the signal is easy to lock to the channel bit generation PLL using a random signal.

  In the header area of the write-once information recording medium, the channel bit clock generation PLL oscillation frequency is prevented by runaway by wobbling detection and can be controlled in the vicinity. It consists of a lock generation signal of the bit generation PLL.

  In the rewritable information recording medium, the PLL lock facilitation can introduce a VFO pattern with a fixed period, and is composed of other header mark signals and the like.

  It should be noted that by making the header area different depending on the type of information recording medium, it is easy to identify the medium, and the protection capability is also improved by making the read-only and recordable media different from the copyright protection system. .

7] Description of common technical features in embodiments of rewritable information recording medium of the present invention 7-1) Description of zone structure The rewritable information recording medium of the present invention has a zone structure as shown in FIG. The number of segments and the number of tracks for each zone in the zone structure are shown in detail in FIG.

In the present invention, the reproduction linear velocity is 5.6 m / s.
Channel length: 0.086μm
Track pitch: 0.34 μm
Channel frequency: 64.8MHz
Recorded data (RF signal): (1,7) RLL
Wobble carrier frequency: about 700kHz (93T / Wobble)
Modulation phase difference [deg]: ± 90.0
Segment / track: 12-29 segments
Zone: About 18 zones.

7-2) Description of address information recording format in embodiments of the present invention (phase modulation + wobble modulation by NRZ method)
In the present invention, the address information in the recording type information recording medium is recorded in advance using wobble modulation. As a wobble modulation method, phase modulation of ± 90 degrees (180 degrees) is used and an NRZ (Non Reture to Zero) method is adopted. Also, the L / G (Land and Groove) recording method is used for the rewritable information recording medium. A significant feature of the embodiment of the present invention is that the wobble modulation method is adopted in the L / G recording method. A specific description will be given with reference to FIG. In the embodiment of the present invention, the inside of one address bit (also referred to as an address symbol) area 511 is expressed by 8 wobbles or 12 wobbles, and the frequency, amplitude and phase are consistent throughout the 1 address bit area 511. In addition, when the same value as the address bit value continues, the same phase continues at the boundary portion of each address bit area 511 (the portion marked with “black triangle” in FIG. 38), and the address bit is inverted. In this case, inversion of the wobble pattern (180 degree phase shift) occurs.

7-3) Description of L / G recording method and indefinite bit mixing by wobble modulation Zone number information and segment address which are zone identification information in the rewritable information recording medium according to the present invention as information indicating the address on the information recording medium 221 It has three types of address information: segment number information, which is information, and track number information indicating track address information. The segment number means a number within one turn, and the track number means a number within a zone. When the zone structure shown in FIG. 37 is adopted, the zone identification information and the segment address information in the address information take the same value between adjacent tracks, but the track address information takes different address information between adjacent tracks.

Consider a case where “... 0 1 10...” Is recorded as track address information in the groove area 501 and “... 0 0 10. In this case, in the land area 503 sandwiched between “1” and “0” in the adjacent groove area, the land width periodically changes, and an area in which the address bit by wobble is not determined occurs. In the present invention, this area is referred to as “indefinite bit area 504”. When the condensing spot passes through the indefinite bit region 504, the land width periodically changes. Therefore, the total amount of light reflected from this and passing through the objective lens (not shown) periodically changes. . Since a recording mark is also formed in the indefinite bit area 504 in the land, the reproduction signal with respect to this recording mark periodically fluctuates due to the above-described influence, and the reproduction signal detection characteristics deteriorate (deterioration of the error rate of the reproduction signal). The problem of causing

7-4) Description of Gray Code and Special Track Code (Subject of the Present Invention) Adopted in the Embodiment of the Present Invention In the present invention, with the aim of reducing the occurrence frequency of the indefinite bit 504 area, it is known in the past. The “grey code” or the gray code is improved, and a special track code newly proposed in the present invention (corresponding to the invention point (O)) is used.

  FIG. 40 shows the gray code. There is a feature of the Gray code where “only 1 bit changes” every time “1” changes in decimal (becomes alternating binary).

  FIG. 41 shows a special track code newly proposed in the present invention. This special track code is “decimal value is changed only by 1 bit” every time “2” changes in decimal system (track numbers m and m + 2 are alternating binary) and 2n and 2n + 1 with respect to the integer value n. Between them, only the most significant bit changes, and all the other least significant bits match. The special track code according to the present invention is not limited to the above-described embodiment, but changes only by 1 bit every time the decimal value changes by “2” (track numbers m and m + 2 become alternating binary) and 2n By setting a code having a feature that the address bits change while “holding a specific relationship” between 1 and 2n + 1, the range of the embodiment of the present invention is satisfied.

8] Description of Embodiment Regarding Wobble Address Format Arrangement 8-1) Description of Embodiment of Segment Format FIG. 42 shows a recording format of rewritable data recorded on the rewritable information recording medium. FIG. 42 (a) shows the same contents as FIG. 36 (d) described above. In the embodiment of the present invention, the rewritable data is rewritten for each segment, and the rewritable data structure in the rewrite unit is shown in FIG. The rewritable data on the information recording medium is rewritten in the rewriting unit 531 of the segment # 2 information. The data content of the rewritable data 525 in the segment # 2 is a reproduction-only information recording medium (FIG. 36). (A), (b)), write-once information recording medium (FIG. 36 (c)), etc., all have the same data structure regardless of the type of medium, and data of 9672 bytes can be recorded respectively. ing. That is, the data content of the rewritable data 525 in the segment # 2 is composed of four pieces of sector data as shown in FIG. 34, and each sector data is 26 as shown in FIG. 34 or FIG. 29 (data field structure). It consists of one sync frame. As shown in FIG. 42C, in the rewrite unit 531 of the segment # 2 information, 2 bytes are allocated to the copy information area 524 corresponding to the copy protection preceding the rewritable data 525 in the segment # 2, and before that, 3 bytes are set in the presync area 523 indicating the end position of the VFO area. A VFO (Variable Frequency Oscillator) area 522 set for 35 bytes is used to synchronize with the rewritable data 525 reproduction. Immediately after the rewritable data 525, a postamble area 526 indicating the end position of the rewritable data 525 is arranged. Guard areas 521 and 527 are arranged at the front end and rear end of the rewrite unit 531 of the segment # 2 information. The front guard area 521 is 30 bytes + J, and the rear guard area 527 is 22 bytes-J. By changing the value of “J”, the writing / writing end position of the rewriting unit 531 of the segment # 2 information is changed. “Random shift” is possible. In the case of a phase change recording film, there is a characteristic that the characteristic deterioration of the recording film is likely to occur remarkably at the start / end position of rewritable data. In the embodiment of the present invention, the characteristic shift of the phase change recording film can be prevented by performing the random shift as described above.

  In order to compare the physical range of the rewrite unit, FIG. 42B shows a part 530 of the rewrite unit of the segment # 1 information, and FIG. 42D shows a part 532 of the rewrite unit of the segment # 3 information. ing. The present invention is characterized in that rewriting is performed so that the front guard region 522 and the rear guard region 527 partially overlap at the overlapping portions 541 and 542 at the time of rewriting (corresponding to the invention point (I)). By rewriting in such a way that partly overlaps, interlayer crosstalk in the recordable information recording medium having two recording layers on one side can be removed.

  Next, a recording format of address information using wobble modulation in the recordable information recording medium of the present invention will be described with reference to FIG. FIG. 43 (a) corresponds to FIG. 36 (c) or (d). 43 describes the rewritable information recording medium, but the present invention is not limited to this and can be applied to a write-once information recording medium. That is, write-once header areas 452 and 453 can be replaced in place of the rewritable header areas 462 and 463 in FIG. The physical area in which the information of the segment # 2 412 is recorded is recorded in advance as a wobble address area 551 by wobble modulation using 180 degree phase modulation as shown in FIG. As shown in FIG. 39, the groove area 501 is wobbled. A total of 1248 wobbles are recorded in advance in this area. In the embodiment of the present invention, as shown in FIG. 38, the NRZ method is used, and one address bit is expressed by 8 wobbles or 12 wobbles. As shown in FIG. 43 (c), the wobble address area 551 is divided into two areas, the wobble address 1 arrangement area 561 and the wobble address 2 arrangement area 562 (each area has 624 cycles). However, in both cases, substantially the same address information is recorded (although the modulation information form differs depending on the scramble process). Thus, the present invention is characterized in that address information is arranged a plurality of times per segment # 2 412 (corresponding to the invention point (J)). Further, as shown in FIG. 43 (b), track number even / odd determination areas 552 and 553, which will be described later, exist in areas where rewritable header areas 462 and 463 before and after the wobble address area 551 are recorded.

  FIG. 43 (d) shows another embodiment of the present invention. Track address recording areas 571 and 572 are arranged in place of the track number even / odd determination areas 552 and 553. FIG. Detailed contents of the track address recording areas 571 and 572 will be described later.

8-2) Description of embodiment in which EDC is attached to each track address FIG. 44 and FIG. 45 show the data structure in the wobble address 1 arrangement area 561 or wobble address 2 arrangement area 562 shown in FIG. Show. Both are described in the address bit representation shown in FIG. 44 and 45, the error correction unit 606 and the error detection units 6-7 and 608 are finely divided, and the influence of indefinite bits is stopped within the error detection unit, thereby guaranteeing the reproduction reliability for other data. Even indefinite bit positions can be discriminated by detecting even / odd number of tracks. In the example of FIG. 44, 0 ≦ K ≦ 4, and a gray code or special track code is used for “track number information”. The segment number corresponding to the segment address information starts from “000001” and thereafter.

  In the embodiment shown in FIGS. 44 and 45, one address bit is expressed by 8 wobbles. Further, “(... B)” in parentheses shown in FIG. 44 and FIG. 45 represents the data length in units of address bits of each information, and the total value is equivalent to 78 address bits = 624 wobbles. To do. The data structure in the wobble address arrangement areas 561 and 562 is basically composed of address sync information 603 indicating the start position of the wobble address, track address information recording area 605 and address information recording area 604 other than the track address. Yes. In the embodiment of the present invention, the rewritable information recording medium shown in FIG. 44 has the zone structure shown in FIG. 37, and the write-once information recording medium shown in FIG. 45 has a CLV (Constant Linear Velocity) structure.

  Therefore, the difference in structure appears in the difference in format between FIG. 44 and FIG. In the rewritable information recording medium having the zone structure, the address bit position shift area 601 at the front end and the address bits at the rear end are used to prevent indefinite bits from being arranged in the vertical direction in the ECC block shown in FIG. 27 (details will be described later). A position shift area 602 is provided to enable shifting up to around 4 address bits at maximum (corresponding to the invention point (R)). The value of “K” in FIG. 44 can be any value from 0 to 4, and the output value of the random number generator (not shown) so that the value changes for each wobble address allocation region 561, 562. Is used to set the value of “K”.

  In the rewritable information recording medium shown in FIG. 44, the information shown in the following 1.2.3.4 is recorded as address information recorded in the wobble address arrangement areas 561 and 562.

  1. Track address information 605... Means the track number in the zone, and the track number having substantially the same contents is written twice in the track number information A 611 and the track number information B 612, but data scramble processing is performed as described later. Therefore, after the scramble, the track number information A 611 and the track number information B 612 are recorded in the track address information recording area 605 as different data code forms (corresponding to the invention point (U)).

  2. Segment address information 621, 622... Information indicating the segment number in the track (within one revolution in the information recording medium 221), and the segment numbers having substantially the same contents are written twice in the segment address information 621 and 622. . Since the first segment address information 621 is used as “seed” information for data scrambling, it is recorded in a raw form (a form that is not code-converted by scrambling), whereas the subsequent segment address information 622 is data It is recorded on the information recording medium 221 in the form of a converted code after being scrambled (corresponding to the invention point (U)). Since the value of the address bit changes at the boundary portion (“triangle mark” portion) of one address bit area 511 shown in FIG. 38, the information reproducing apparatus or information recording / reproducing apparatus has a PLL (Phased Lock Loop) at this boundary position. Is used to detect the address bits. Therefore, if the same value continues for a long time as the value of this address bit (“0” or “1”), the phase of the PLL with respect to the boundary position is shifted. For this reason, data scrambling is applied to prevent the same address bit value from continuing for a long time (corresponding to the invention point (T)).

      However, as described above, since the first segment address information 621 is used as “seed” information for data scrambling, it is recorded in a raw form (a form in which code conversion by scrambling is not performed). As shown in FIG. 44, the data length of the segment address information 621 is as long as 6 bits, and the present invention performs processing so that the same value does not last long for the first segment address information 621. When the segment number is counted from “0” as the segment address information 621, a pattern “000000” in which 6 bits “0” continues in the segment address information 621 appears. In order to avoid the above problem, the present invention is characterized in that the segment number is counted from “000001” (corresponding to the invention point (K)).

  The embodiment of the present invention is not limited to the above contents, but is characterized in that conditions are added to the address number assigning method. For example, “1” or “0” is included n times (for example, n in the address number information) in addition to the above embodiment. There is also a method of adding a condition such as a missing number for address numbers that appear consecutively.

3. Zone identification information 625, 626... Indicates the zone number in the information recording medium 221, and the value “n” of “Zone (n)” shown in FIG. 37 is recorded. The zone identification information 625 and 626 is written twice, but both are subject to data scrambling.
4). Recording layer identification information 626, 627... In the information recording medium 221 of the present invention, the read-only, write-once, and rewritable types each have a recording layer A 222 and a recording layer B 223 as shown in FIGS. It has a “single-sided two-recording layer” structure that can be reproduced or recorded / reproduced from the same surface side. Information indicating which of the recording layer A 222 and the recording layer B 223 corresponds to the recording layer currently being reproduced or recorded is the recording layer identification information 626 and 627, indicated by the recording layer number, and doubled. It is written.

  In the idea of the present invention, the information of 1.2.3.4 is recorded. Further, as shown in FIG. 43, the wobble address area 551 is divided into multiple parts, and the address information is recorded in each of them. Therefore, the wobble address number information 623 and 624 indicates which address information currently being reproduced corresponds to in the wobble address arrangement areas 561 and 562. Further, the rewritable information recording medium shown in FIG. 44 has information on the last segment identification information 628 and 629 in the track at the location where the segment number indicates the last value in the same track.

  As shown in FIG. 45, the write-once information recording medium employs the CLV method as described above, so that the zone identification information 625 and 626 and the in-track final segment identification information 628 and 629 are not necessary. In this case, since the track number is a serial number over the entire information recording medium 221, the data length is increased from 12 bits in FIG. 44 to 20 bits in FIG.

  44 and 45, one error correction unit 606 is configured in the address information recording area 604 other than the track address, and each track number information A 611 and B 612 is included in the track address information recording area 605. Error detection units 607 and 608 are configured. By separating the wobble address arrangement areas 561 and 562 into a plurality of error correction units 606 and error detection units 607 and 608 in this way, the influence of mixing the indefinite bit area 504 as shown in FIG. The error detection units 607 and 608 can be confined within the error detection unit 608, and the influence of the indefinite bit area 504 mixed into the data area outside the error detection units 607 and 608 can be blocked. As a result, it is possible to ensure high read reliability by error correction processing and error detection processing for the information of error correction unit 606 and error detection units 607 and 608 that do not include indefinite bits [Invention Point (P )]. In any case, 8 bits from the first segment address information 621 to the recording layer identification information 626 are regarded as a “seed” information recording area 641 for data scrambling. In FIG. 44, from the zone identification information 625 to the track number information B 612. In FIG. 45, the range from segment address information 622 to track number information B 612 is data scramble target data 642. By including the segment address information 621 or the wobble address number information 623 in the “seed” information of the data scramble as in the embodiment of the present invention, the scramble can be performed for each segment and for each wobble address arrangement area 561 and 562 in the same track. “Species” information is different. As a result, since the recording codes (converted codes) of the track number information A 611 and B 612 after the scramble process change for each segment and for each wobble address arrangement area 561 and 562, the indefinite bit area (504 in FIG. 39). ) Changes to prevent the indefinite bits from being arranged vertically in the ECC block shown in FIG.

  FIG. 46 shows the order of wobble address data creation processes in the embodiment of the present invention. First, in ST01, the above-described various address information (original data before being scrambled) is created. Next, as ST02, the track number information A 611 and B 612 are subjected to gray code conversion or special track code conversion processing shown in FIG. 40 or 41 (corresponding to the invention point (O)). Further, as ST03, 8 bits from the first segment address information 621 to the recording layer identification information 626 included in the “seed” information recording area 641 for data scrambling are extracted from the various address information. Data scramble is applied to all target data included in the data scramble range 642 using this kind of information (ST04) [corresponding to invention point (T) (Q)]. Thereafter, 8 bits for 24 bits from the segment address information 621 included in the error correction unit 606 to the last segment identification information 629 in the track (16 bits from the segment address information 621 to the recording layer identification information 627 in FIG. 45). ECC (Error Corroction Code) information 630 is added. In ST06, EDC (Error Detection Code) information for the error detection units 607 and 608 is finally added (corresponding to the invention point (Q)).

  The characteristics of the data scrambling and EDC (Error Detection Code) information adding method according to the present invention will be described below. As shown in FIG. 47, any one of “addition operation”, “subtraction operation”, or “Exclusive OR” operation is performed with respect to arbitrary data with respect to the data string 651 of the gray code series or special track code series. Alternatively, the data series obtained after performing the combination operation has a characteristic that the gray code characteristic or the special track code characteristic of the present invention is held unchanged. Taking advantage of the above characteristics, data scramble processing and EDC (EDC) can be performed within a range of “addition operation”, “subtraction operation”, “Exclusive OR” operation in combination with any data, or a combination operation thereof. The main feature of the present invention is that the error detection code information is added (corresponding to the invention points (P) and (Q)).

  FIG. 48 shows an embodiment of a scramble / descramble circuit for wobble address data. The combination of the shift register circuit 101 and the exclusive OR circuit 104 in FIG. 48 constitutes an “M series” random number generator. 46. In step ST03 of FIG. 46, “seed” data for scrambling is extracted, and the value is set as the initial value of the shift register circuit 101. The data in the range 642 to be subjected to the data scramble shown in FIG. 44 or 45 in the scramble process in step ST04 in FIG. 46, and the data before the scramble process created in step ST01 in FIG. 46 are sequentially transferred into the shift register circuit 102. Then, the data from “r0” to “r8” of the shift register circuit 101 and the “Exclusive OR” operation in bit units are performed (corresponding to the invention point (Q)).

  The data is loaded into the shift register circuit 103 every 8 bits and output as scrambled data 643. When each bit of the track number information A 611 enters the shift register circuit 102 and when each bit of the track number information B 612 enters the shift register circuit 102, the data pattern from “r0” to “r8” of the shift register circuit 101 Therefore, the pattern of the track number information A 611 and the pattern of the track number information B 612 after scramble processing are different. In the embodiment of the present invention, the wobble address number information 623 having different values in the wobble address 1 arrangement area 561 and the wobble address 2 arrangement area 562 is included in the scramble “seed” information. The pattern can be changed between the two address areas in the segment (the wobble address 1 arrangement area 561 and the wobble address 2 arrangement area 562) [corresponding to the invention point (U)].

  In the embodiment shown in FIG. 48, the pattern is changed between two address areas in the same segment by the scramble process, but instead of performing the scramble process as another embodiment, between the track number information A 611 and B 612 or It is also possible to change the pattern contents (corresponding to the invention point (U)) by inverting bits between the wobble address 1 arrangement area 561 and the wobble address 2 arrangement area 562.

  In the above embodiment, the data scramble processing is performed by exclusive OR operation. However, any of “addition operation”, “subtraction operation” or “exclusive OR” operation in bit units with any data is also possible. Alternatively, a method of performing data scramble processing within the range of the combination calculation is included in the scope of the present invention.

  Further, when descrambling, the information in the seed information recording area 641 for data scrambling is extracted and set as an initial value in the shift register circuit 101. When the scrambled data is sequentially input to the shift register circuit 102, descrambling is performed. Data 643 can be extracted as the output of the shift register 103.

  In the address information recording area 604 other than the track address in FIG. 44 or 45, the value does not change between adjacent tracks. Accordingly, as a method for generating the ECC code 630, a method in which a remainder obtained by division using a conventional generator polynomial is used as the ECC code 630 can be employed.

  Next, a method for generating EDC information 613 and 614 for track numbers in the present invention will be described with reference to FIG. In the present invention, the track number EDC information 613 and 614 has a gray code characteristic or a special track code characteristic, and has a great feature in that the occurrence frequency of indefinite bits is reduced (corresponding to the invention point (P)).

  In the conventional binary data, a change of a plurality of bits is allowed simultaneously at the time of progression (every number changes by 1). In contrast, the Gray Code shown in FIG. 40 is limited to a change of only 1 bit at the time of progression (every time the number changes by 1). FIG. 49 shows an example of a method of creating an EDC (Error Detection Code) having a Gray code characteristic or a special track code characteristic. When division is performed on the track number 101 with a remainder polynomial and EDC is added using the remainder value as in the conventional case, when the track number 101 changes by “1”, a plurality of bits in the EDC change. Therefore, it was considered difficult to add an error check code to Gray Code. On the other hand, in the present invention, when only one bit is changed in the target data (track number information A 611, B 612) to which the EDC information 613, 614 is added, whether “addition processing” or “subtraction processing” is specified. EDC information 613 and 614, which is data obtained as a result of performing an exclusive OR operation with a number or a combination process thereof, only changes the bit corresponding to the originally changed bit. Utilizes features.

  In the embodiment shown in FIG. 49, FIG. 44, or FIG. 45, the track number information 611, 612 is set to 12 bits in Gray Code or special track code, and Error Detection Code information having gray code characteristics or special track code characteristics corresponding thereto. 613 and 614 are added with 4 bits. The 12-bit track number data is added every 4 bits, and the parity (odd or even) of the value after the addition is used as Error Detection Code information 613 and 614. For example, “a10”, “a6”, and “a2” are added to each bit of “a11 to a0” constituting the track number information 611 and 612 to obtain “C2”. If the value of “C2” is an odd number, “b2” at the corresponding position in the Error Detection Code information 613 and 614 is set to “0”, and if it is an even number, “1” is set. For example, when only “a5” changes in the adjacent track, only the odd-numbered and even-numbered relationship of “C1” is inverted. As a result, only “b1” changes, and the Error Detection Code information 613 and 614 satisfies the gray code characteristic or the special track code characteristic.

  A method for avoiding an indefinite bit arrangement vertically in the ECC block will be described below. FIG. 44 shows a problem when the track number information A 611 and B 612 are not data scrambled and the front and rear address bit position shift areas 601 and 602 are not provided. In this case, the indefinite bit area 504 shown in FIG. 39 appears at the same position in the track number information A 611 and B 612 in the same track. As shown in FIG. 39, since the land width or groove width locally changes in the indefinite bit area 504, the reproduction signal level from the rewritable recording mark recorded thereon fluctuates, and the rewritable information The error rate is locally degraded. The places where the error rate is locally deteriorated are arranged in a line in the vertical direction in the ECC block shown in FIG.

  In the ECC block structure using the product code shown in FIG. 28 (corresponding to the invention point (D)), there is a problem that the error correction capability is lowered for errors arranged in a line in the vertical direction. In order to solve the above problem, the present invention is to improve the error correction capability in the ECC block structure using the product code shown in FIG. 28 by shifting an indefinite bit position where an error from a rewritable recording mark is likely to occur. There is a point [corresponding to the invention point (S)].

  In the present invention, as described above, (a) the address bit position shift areas 601 and 602 at the front end and the rear end are provided to shift the indefinite bit position (corresponding to the invention point (R)), (b) track The method of performing data scrambling on the number information A 611 and B 612 has been described.

  However, in the present invention, not limited to the above embodiment, as a method of shifting indefinite bits, for example, (c) the upper bits of the track number information 611 and 612 are circulated every time the segment and wobble address arrangement areas 561 and 562 change. It is also possible to use the method of shifting.

8-3) Description of an embodiment in which EDC is attached to the entire address FIG. 50 shows a second embodiment relating to the address bit arrangement for the rewritable information recording medium, and FIG. 51 shows a second embodiment relating to the address bit arrangement for the write-once information recording medium. An example is shown. Use gray code or special track code for “track number information”. The segment number corresponding to the segment address information starts from “000001” and thereafter. Each of the embodiments of FIGS. 50 and 51 is characterized in that EDC information 631 as shown in FIG. 49 is added to all information except the address sync information 603. Compared with the first embodiment shown in FIG. 44 and FIG. 45, since the entire error detection unit 609 is used, the total number of address bits required can be reduced. As a result, in the second embodiment shown in FIGS. 50 and 51, unlike the first embodiment shown in FIGS. 44 and 45, 12 wobble cycles are assigned to one address bit. There is an effect that (detection accuracy) is improved.

8-4) Description of Embodiment in which Wobble Address Does Not Have Track Address Information FIG. 52 shows a third embodiment of the present invention for a rewritable information recording medium. In FIG. 52, the track number information 611 and 612 are not recorded in the wobble address arrangement areas 561 and 562. Instead, the track number information 611 and 612 are rewritten (or write-once) shown in FIGS. ) Is distributed in the header areas 452 to 468. The segment number corresponding to the segment address information starts from “000001” and thereafter.

9] Description of the first embodiment of the track address setting method in the recordable information recording medium of the present invention [Method of devising the gray code setting method to enable address detection even if there are undefined bits]
(Concentrate undefined bits in all track address information on the land side) [Contents of Invention Point (W)]
Conventionally, an addressing method for land / groove recording tracks is formed by embossed prepits as in a DVD-RAM. Further, a method of embedding address information using groove track wobbling has been considered. The big problem here was the land track address formation. As one proposal, groove wobbling and groove wobbling are arranged separately. For the land, the adjacent grooves sandwiching the land are wobbled, but the land address is realized by adopting the structure as if it were land wobbled.

  However, this method requires more than twice as a track address area and is wasteful. If a set of address information can be used as both groove address information and land address information, efficient arrangement is possible. As a means for realizing the above, there is a method using a gray code as track address data.

  FIG. 70 shows the relationship between the track form when the groove wobble is phase-modulated by the track address data and the wobble detection signal in the land.

  When a wobble signal as address data is detected in Land-n between Groove-n address data (... 100 ...) and Groove-n + 1 address data (... 110 ...) (... 1X0 ...). Here, the X portion is a region sandwiched between (0) of Groove-n and (1) of Groove-n + 1, and the wobble detection signal is a signal having a center level amplitude of 0. In an actual system, the level of the data (1) side or (0) side is likely to be detected, although the level is lowered from the level of other regions due to the amount of the read beam off-track and the detector imbalance. In this way, it is conceivable that the land address signal is detected by comparing the position of the land with the position of the address data by utilizing the fact that the detection level is lowered in the land area sandwiched between different groove address data. However, this method is also good when the C / N of the wobble detection signal is high, but there is a possibility that the reliability cannot be obtained when the noise is large.

  Therefore, as a method of reading address data from the wobble detection signal in the land track, the land wobble detection data that the groove wobble data is facing differently is indefinite (determined as “0” or “1”). However, there is a need for a method that can determine correct land address data.

  Therefore, the groove track address adopts a method of wobble modulation with gray code data, and a land track is added with a special mark or a special identification code with wobble modulation. We propose a method that adopts a structure that can easily judge Odd-Land / Even-Land.

  If the land track can be determined to be odd / even, land address data can be easily determined from the nature of the gray code. The proof will be described with reference to FIG.

  As shown in FIG. 40, the gray code is a code configured such that one step of code change is only one bit. If the address of the groove track is performed with this gray code, only one bit of the land wobble composed of each groove wobble is detected as an indefinite code as shown in FIG.

  That is, when the address data as shown in FIG. 71 is arranged on the groove track, the wobble detection signal of the land track opposed to the groove track has only one bit of “0” or “1” or an indefinite bit. The bit is detected as the same value as the adjacent groove wobble signal. As the wobble detection signal in Even-Land (n) in FIG. 71, (n) or (n + 1) is detected. Similarly, (n + 1) or (n + 2) is detected in Odd-Land (n + 1).

  Here, if an odd land (Odd-Land) or an odd land (Even-Land) is identified in advance as a land track, (n + 1) is detected in the case of Odd-Land (n + 1). If the data is an address value, and (n + 2) is detected, (detection value-1) is the address value. Similarly, in the case of Even-Land (n), when (n) is detected, the value is an address value, and when (n + 1) is detected, (detected value-1) is an address value. However, n is an even number.

  As described above, if it is determined whether the land track is an odd track or an even track, the correct address value can be easily determined even if there is an indefinite bit in the wobble detection value in the land track. In the groove track, the wobble detection signal becomes the track address as it is.

  FIG. 72 shows specific detection contents when a gray code having a track address of 4 bits is arranged. When the Gray code address data of Groove-Track G- (n) is (0110) and G- (n + 1) is (1100), Even-Land L- (n) is (1100) or (0100). Although it is detected as a wobble signal, (0100) is determined as a correct address value because it is an even land according to the idea described with reference to FIG.

  However, even if “0” or (−1) is not corrected from the detection value described with reference to FIG. 71, if there is an odd / even discrimination first, the land track is considered to have two address values. It is done. Even if (1100) (0100) is detected in Even-Land L- (n) in FIG. 72, this code does not exist in other Even-Lands. Therefore, it is possible to determine the address data with the detected value.

  The above contents have the same characteristics as the special track code shown in FIG.

10] Explanation of embodiment regarding setting method of discrimination information of even / odd number of track number [corresponding to contents of invention point (V)]
FIG. 73 shows an example of an addressing format proposal in the case where both the groove track and the land track are used as recording / reproducing tracks in the rewritable information recording medium. In the header area added to each segment block shown in FIG. 36, a wobble address synchronization signal pattern is arranged, and in the data area, the zone number, track number, and segment number shown in FIG. 37 are embedded by wobble modulation. Yes.

  The odd / even identification of lands shown in FIGS. 71 and 72 is performed by marking pre-pits in the header area of the lands. In the groove wobble addressing system according to the present invention, odd land / even land identification is important for land address detection, and various methods can be considered as the identification mark system. 74 to 77 illustrate the identification mark method.

  In FIG. 74, a special pattern is inserted in the groove wobble, and odd / even land determination is performed using the positional relationship of the level-down portion as shown in FIG.

  FIG. 75 shows a method of arranging embossed pre-pit marks in the land header area as in FIG. FIG. 76 shows a method of placing a physical mark that cuts the recording track of only odd (or even) groove tracks. In the land track detection, the physical deformation structure of the groove track is detected as a crosstalk signal, and the mark signal is detected from only one direction of the opposing groove. Become.

  In FIG. 77, marks as shown in FIG. 76 are arranged in the header of the odd segment of the odd track and the even segment header of the even track. In this method, header area identification marks other than wobbling are attached to all tracks, and the above marks can also be used for header position detection. Odd / even land determination is performed using odd / even numbers of segment number data recorded by wobbling modulation. By using even information together, odd / even land identification is possible.

  Another embodiment related to FIG. 76 or 77 is shown in FIGS.

  In the embodiment shown in FIG. 53, a part of the groove area 502 is cut to create a groove cut area 508. Although not shown in the figure, when the reproduction condensing spot traces on the land areas 503 and 504, it is traced on the even track on the land by detecting the direction in which the track difference signal changes suddenly or on the odd track. It is possible to determine whether or not tracing is in progress.

  FIG. 54 shows another embodiment. As shown in FIG. 53, as a method for constructing a groove meandering region 509 that greatly meanders locally in the groove region 502 and another embodiment, as shown in FIG. 53, a blue groove is partially cut and a land prepit is formed at the cut portion. Cutting + land pre-pit area 500 "is provided. In either case, it is possible to determine whether the even-numbered track or the odd-numbered track on the land is traced in the change direction of the track difference signal.

  In a write once information recording medium used for a write-once information recording medium, it is important to approximate a recorded data stream as much as possible with a read-only information recording medium. The wobble of the groove track shown in FIGS. It is also possible to use the addressing format as it is.

11] Description of the second embodiment of the track address setting method in the recordable information recording medium of the present invention [The indefinite bit is provided only on the land side, but the track address determination area is provided in the land] [Invention Point ( Corresponds to the contents of X)]
11-1) Description of track address information setting method for rewritable information recording medium according to the present invention FIG. 55 shows a method for setting the track number information A 611 and B 612 in the embodiment shown in FIG. The values shown in FIG. 55 indicate raw information before performing the special track code conversion ST02 and the scramble process ST04 as shown in FIG. As shown in FIG. 55, track numbers are set in a zigzag manner for track number information A 611 and B 612 in the groove area. In the place where the same track number is set in the adjacent groove area, the same track number is set in the land area. Although the track number is not fixed at a place where a different track number is set in the adjacent groove area, the track number can be predicted and determined by the method shown in FIG. When extracting the features in the connection of information shown in FIG.
1. On the groove, the smaller value of A and B matches the track number.
2. On the land, the track number A is determined for even tracks and the track number B is determined for odd tracks.
3. On the land, the track number of the even track is B, and the track number of the odd track is A.
However, the track number can be predicted and determined by the method shown in FIG.

Further, according to the special track code of the present invention shown in FIG. There is an item that the value after the conversion of the special track code on the groove is an even-numbered track where the pattern of all the lower bits except the most significant bit matches and the lower-order bit also changes at the odd-numbered track.

11-2) Description of Track Address Determination Method in the Present Invention To 4. The track address can be determined using the features listed in. 56 shows a method for determining the address of the groove portion, and FIG. 57 shows a method for determining the address of the land portion. FIG. 56 shows an address determination method in the groove portion when the methods of FIGS. 41, 44, and 55 are used. FIG. 57 shows an address determination method in the land portion when the methods of FIGS. 41, 44, 53, 55, and 72 are used.

  As shown in FIG. 56, the groove portion determines whether all bits other than the most significant bit match in the state of the special track code (ST14), and determines whether the track number is even or odd. The track number (ST16, ST17) extracted based on the determination result is compared with the result of the process of selecting a small value in ST19, and if they match, the address is determined.

  As shown in FIG. 57, the land portion reads the even / odd identification information of the track number (ST31), and compares the track number (ST37) with the track number determined with the prediction determination result (ST38) for the track number. To confirm the address.

12] Explanation of third embodiment of track address setting method in recordable information recording medium of present invention [Groove width is changed locally to have indefinite bits in groove] [Invention point (Y)] Correspondence〕
12-1) Method of creating an information recording medium by changing the width of the groove portion without changing the width of the land portion in the adjacent position In the embodiments up to FIG. In this case, an area where the track width changes is generated in a part of the land part, and the address data in that part is indefinite (the level of the wobble signal is lowered, and the location where It is possible to detect data, but if there is a lot of noise etc., there is a high possibility that reliability will be reduced).

  On the contrary, by changing a part of the groove width by utilizing this phenomenon, it is possible to perform groove wobble modulation processing as if data was recorded on the land track.

  FIG. 78 shows the relationship of Groove (n + 1), Land (n + 1), and Groove (n + 2). In wobble modulation of a Groove (n + 1) track, address data (.. 100 × 2 ··). Here, the portion (x1) is formed by amplitude modulation in which the groove width changes so that Land (n) is “1” and Land (n + 1) is “0”. Similarly, in the (x2) region of Groove (n + 2), a groove is formed by amplitude modulation in which the width of Land (n + 1) is “0” and the width of Land (n + 2) is “1”. ing. Introducing a method for partially changing the groove width in this way enables wobble modulation so that the required land data is correctly detected even if the address data of the land track opposite to the groove track is different. FIG. 79 shows an example of an addressing format for a land / groove type rewritable information recording medium by introducing a technique for partially changing the groove width.

  The addressing format of FIG. 79 is groove wobbling, but has a structure in which a groove track address area and a land track address area are arranged at different positions by introducing a technique for changing a part of the groove width. A G synchronization signal (GS) for identifying the groove track address position is arranged, and then the address data of the groove track is recorded. Next, (LS) indicating a land address area is arranged and land address data is recorded. In this case, when the land address data to be opposed is different, recording is performed by changing the groove width as if it were recorded by the wobble modulation of the land track. With this processing, it is possible to obtain a correct detection signal in the address information detection in the land track recording / reproduction. In FIG. 79, the groove track address data and the land track address data are separately arranged. However, by using the technique for changing the groove width, the land and the land are subjected to the same groove wobbling modulation described in FIGS. 71 and 72. It is also possible to form groove address data.

  FIG. 80 is a diagram showing one embodiment. As described in the previous section, the land / groove address data can be expressed by the same groove wobble as long as the odd / even identification of the land can be determined. Groove width modulation can be used for this odd / even discrimination. That is, this is a system in which data “0” is arranged in the odd land and data “1” is arranged in the even land in the next bit of the track number in FIG. Since the track number of the groove track is fixed, detection may be ignored even if a redundant bit is added after the track number. In the land track, after detecting the track number, it is only necessary to determine whether the bit is “0” or “1”, which is an odd land or an even land. In the land track, as a result, the track number is determined by the data string including the odd / even track identification data, and the groove / land address data can be detected without the special odd / even track identification mark. . Further, a track width change region that occurs only in the land track due to the gray code also occurs in the groove track, and the groove / land detection system is configured by the same method, so that the system balance can be optimized.

In the above description, the G synchronization signal (GS) and the land address area (LS) are arranged. However, the present invention is not limited to this. For example, the G synchronization signal (GS) and the land address area (L-S) are shown. Instead of arranging S), land and groove address data can be arranged in the areas of track number information A 611 and B 612 whose positions are determined in advance as in the embodiment shown in FIG. That is, (*) The track number information A611 and the EDC information 613 of the track number A are set to match the groove width everywhere to determine the track address information on the groove side (the land side width is changed locally to change the land side Undefined bit)),
(*) The track number information B612 and the EDC information 614 of the track number B are set to match the land width everywhere to determine the track address information on the land side (the width on the blue side is locally changed to the groove side). At the same time, as shown in FIG. 81, (*) track number information A611 and track number information B612 record the same track number information.

In this case, (**) When tracing on the groove, the track number information A611 with the determined track number is reproduced and the track number information B612 is reproduced by the method shown in FIG. Make a prediction judgment of the track number,
(**) When the track is traced on the land, the track number information B612 in which the track number is fixed is reproduced, and the track number information A611 is subjected to the track number prediction determination by the method shown in FIG. Do.

Thus, the track address information of the groove is determined without including the indefinite bit in the groove area, and the track address of the groove can be predicted and determined using the method shown in FIG. 80 including the indefinite bit in the groove area. It is also possible to preset such parts in the same track. In this case, at the same time, the land track address information is determined without including indefinite bits in the land area, and the land track address is predicted using the method shown in FIG. The part that can be determined is set in advance in the same track. The address determination method in this case is the same as the procedure shown in FIGS. Error detection using EDC information 613 and 614 in the portion where track address information not including indefinite bits is confirmed (if no error is detected, proceed to the following 2.), and if an error is detected, the next wobble address To the reproduction of the wobble signal from the arrangement areas 561 and 562 of
2. Predictive judgment of the track number for the part where the track address including indefinite bits is predictable,
3. Descrambling,
4). Gray code inversion processing,
5). Comparison of the track number extraction result at the part where the track address information is determined and the track number prediction judgment result at the part where the track address can be predicted,
(If both match, the track address is confirmed, and if they do not match, the process moves to reproduction of the wobble signal from the next wobble address arrangement area 561, 562),
It becomes the procedure of.

  Next, FIG. 58 shows a method for locally changing the groove width without changing the land width in order to form indefinite bits in the groove area. Although not shown in the method shown in FIG. 58A, the groove width is obtained by changing the exposure amount of the condensed spot 791 for forming the groove region 502 in the master recording apparatus of the information recording medium 221 between the α position and the β position. And the width of the land regions 503 and 504 can be kept constant by adjusting the amount of change.

  In the method shown in FIG. 58 (b), two spots 702 and 703 are used as a condensing spot for forming a groove area in the master recording apparatus, and the relative positions of both are changed at the γ position and the δ position.

12-2) Description of the track address information setting method for the rewritable information recording medium in the present invention With the introduction of a technique for changing the groove width in part, the addressing format of the land / groove recording generation track system is an odd / Even-numbered land identification marks are not necessary, and are further approximated to the addressing structure of other information recording media. FIG. 81 shows an example thereof.

12-3) Format Description of Write-once Information Recording Medium in the Present Invention It is important that the write-once information recording medium used for the write-once information recording medium approximates the recorded data stream as much as possible with the read-only information recording medium. The groove track wobble addressing format of FIG. 81 is used as it is. However, since the odd / even discrimination determination is unnecessary, there is no need to change the track width, and that portion is deleted and a dummy code is added. Thus, the same addressing format as that of the rewritable land / groove track system can be configured.

13] Description of the fourth embodiment of the track address setting method in the recordable information recording medium of the present invention [Locally changing the wobble amplitude of the groove to give an indefinite bit in the groove] [Invention point (Y) (Corresponding to the contents)
As another embodiment of the method for locally distributing the indefinite bits in the groove area by locally changing the groove width as shown in FIG. 58, a method for changing the wobble amplitude width in the groove area 502 as shown in FIG. There is. In the indefinite bit area 710 in the groove area 502, since the wall surface is straight, a wobble detection signal cannot be obtained, but the other wall is wobbled at the ε and η positions of the land areas 503 and 507 adjacent thereto. A wobble signal can be obtained. Compared with the method shown in FIGS. 58 and 39, since the groove width variation in the indefinite bit area is small, the level variation of the reproduction signal from the recording mark recorded thereon is small, and the error rate of rewritable information is deteriorated. There is an effect to suppress. As a formatting method when this method is used, the same structure as that shown in FIG. 78 or 81 can be adopted.

14] Description of the fifth embodiment of the recordable information recording medium of the present invention [corresponding to the contents of the invention point (Z)]
14-1) General description of a method of arranging track addresses in the header area between segments The groove wobble method is advantageous as an addressing method in an information recording medium, but both land tracks and groove tracks are used as recording tracks. It is explained at the beginning that it is difficult to embed land track address data. As a solution to this, the technology of the present invention has been devised. Nevertheless, it is inevitable that the track width changes, although locally. In particular, when the track width is reduced in order to improve the recording density, the characteristics of the recording signal change between the narrow and wide track widths, and the data reliability differs. In view of this, the present invention has been devised to minimize the region in which the track width changes by using a gray code or the like. However, since it will exist locally, a countermeasure is required. In the data structure showing the basic structure of the present invention, the structure shown in FIG. 48 comprises a plurality of sectors as segment blocks, and a plurality of segment blocks are aggregated to constitute an error correction data block. When recording data is recorded with a header area 441 added in the segment data block unit, the header area exists in the segment unit, which means that information is overwritten. That is, no problem occurs even if the reliability is lower than that of the main data. Therefore, address data is composed of a combination of track number (T *), zone number (Z *) and segment number (S *) as the addressing arrangement structure in the land / groove recording track system, and the track width. The arrangement of the track number, which is the data to be changed, is arranged and recorded in the header area.

14-2) Description of track address recording format in rewritable information recording medium according to the present invention FIG. 82 shows the address data arrangement of the present invention as address data in the land / groove recording / reproducing track system used in the rewritable information recording medium. 1 illustrates one example of a structure.

Since the zone number and the segment number are the same data between the opposed tracks, it is not necessary to use the gray code, and the track width is not changed by using any code. Therefore, the reliability of both the recording / playback signal and the address information signal is reduced by using a code capable of minimizing the bit in which the data changes between opposing tracks, such as the gray code only for the track number, and arranging it in the header area. Thus, an effect that enables recording and reproduction is produced.

14-3) Description of format of write-once information recording medium in the present invention The write-once information recording medium also uses groove wobble addressing data as it is in the other inventions.

15] Description of Information Reproducing Apparatus or Information Recording / Reproducing Apparatus in the Present Invention FIGS. 60 and 61 show the internal structure of the information reproducing apparatus or information recording / reproducing apparatus in the embodiment of the present invention. In FIG. 60, data is taken into the interface unit 142. The fetched main data is guided to the data adding unit 168, where data processing as shown in FIG. 20 is started. A data ID is output from the data ID generation unit 165 and provided to the data addition unit 168. Data relating to copy protection is output from the CPR_MAI data generation unit 167 and provided to the data addition unit 165. Preset data is output from the preset data generation unit 166 and is supplied to the data addition unit 165. The data output from the data adding unit 168 is arranged in the data arrangement part exchanging unit 163 as shown in FIG. 27, and the scramble circuit 157 scrambles the main data part. Then, PO and PI are added to the output of the scramble circuit 157 in the ECC encoding circuit 161, and PO interleaving is performed as shown in FIG. The ECC block obtained as a result is input to the modulation circuit 151 and becomes a modulation signal. At this time, the modulation code of the modulation conversion table 153 is selected according to the input data. The modulation data from the modulation circuit 151 is added with a synchronization code as shown in FIG. The synchronization code is selected by the synchronization code selection unit 146 from the synchronization code selection table recording unit 147. At the time of this selection, the DSV value calculation unit 148 controls the selection of the synchronization code so that “0” and “1” runs fall within a predetermined range in the continuous portion of the synchronization code and data. A recording signal is given from the data synthesizing unit 144 to the information recording / reproducing unit 141. The control unit 143 controls the entire other block.

  FIG. 61 shows a reproduction system. The signal output from the information recording / reproducing unit 141 is input to the wobble signal demodulation circuit 150, the synchronization code position extraction unit 145, and the demodulation circuit 152. The wobble signal demodulated by the wobble signal demodulation circuit 150 becomes a reference signal for the spindle motor rotation control circuit 160, for example. The synchronization code (SYNC) extracted by the synchronization code extraction unit 145 controls the timing of the demodulation circuit 152. The demodulation circuit 152 demodulates the modulation signal using the conversion table recorded in the demodulation conversion table recording unit 154. The demodulated demodulated signal is input to the ECC decoding circuit 162. The ECC decoding circuit 162 processes the ECC block in the state shown in FIG. That is, PO is set to the original state, and error correction processing is performed using this PO (16 bytes) and PI (10 bytes). Next, the descrambling circuit 159 performs descrambling of the main data portion. Next, the data arrangement part exchanging unit 164 returns the row in which the left and right blocks are exchanged to the original block arrangement position. In this state, the main data extraction unit 173 can extract the demodulated main data, and this data is output via the interface 142. Further, the output of the data arrangement part exchanging unit 164 is supplied to the data ID extracting unit 171. The extracted data ID is input to the control unit 143 as recognition data and timing data. A part of the data ID is descrambled by the descrambling circuit 158. In addition, an error check is performed in the error check unit 172, and if the ID is not normal, the control unit 143 executes data fetch again.

Explanation of phase demodulation method 1
FIG. 62 shows a configuration example of the wobble signal demodulation circuit 150. The wobble signal read by the optical head of the reproduction unit and converted into an electric signal is reduced in noise by a bandpass filter (BPF) 1501a of the analog processing unit 1501, and phase synchronization is obtained in the wobble PLL unit 1501b. Thereby, the write clock and the carrier can be obtained from the wobble PLL unit 1501b. The carrier is input to the phase comparator 1502a of the digital processing unit 1502. The phase comparator 1502a compares the phase of the wobble signal with the carrier. When the phase of the wobble signal changes, phase difference information is obtained accordingly. This phase difference information is filtered by a low-pass filter (LPF) 1502b and then shaped by a slicer or multiplier 1502c. That is, the waveform data of this phase difference information becomes address data.

Explanation of phase demodulation method 2
FIG. 63 shows another example of the demodulation circuit for the phase-modulated wobble signal. The wobble signal includes noise peculiar to the medium and noise caused by crosstalk from adjacent tracks. For this reason, noise other than the frequency band of the wobble signal is removed via a band pass filter (BPF) 1505a and the like. The wobble signal from which noise has been removed is input to a phase lock loop circuit (PLL circuit) 1505b in order to generate a carrier wave. The PLL circuit 1505b outputs a carrier wave and a wobble signal delayed so as to be synchronized with the carrier wave, and then a multiplier 1505c multiplies both. When demodulating a phase-modulated signal, the polarity of the phase can generally be determined by multiplying the modulated signal and a carrier wave.

  As shown in FIG. 64, the waveform after multiplication is detected in a form offset by the first phase and the second phase. FIG. 64A shows a phase-modulated wobble signal, and FIG. 64B shows a carrier generated by the PLL circuit 1505b. FIG. 64C shows the output of the multiplier 1505c. Therefore, address data can be decoded by performing threshold detection or direct integration detection on a waveform obtained by removing a high frequency component using a low pass filter (LPF) or the like. The system of the seat branch 1505d and the slicer 1505e is a route for detecting a threshold value of a waveform excluding high-frequency components. Further, the multiplication output may be formed by the system of the LPF 1505f and the slicer 1505g and used as a control signal for the clock generator 1505h.

Example of Sync Signal and Address Information Detection FIG. 65 shows a sync signal detection method. A signal whose phase is detected by multiplying the wobble signal is input to the address detector. The configuration in the address detector 1505i is as shown in FIG. Parts corresponding to those in FIG. 63 are denoted by the same reference numerals.

  The phase-detected signal is integrated in the integrator i (11) based on the timing signal received from the clock generator 1505h. The integrated signal is input to the slicer i (13) for binary decoding and also input to the synchronization signal detector i (12). The address data controller i (14) receives the synchronization signal detection result and the binarized signal and controls the address information. From the address data controller i (14), control signals necessary for writing, RE signal reading, servo, and the like are transferred to the controller.

  FIG. 67 shows a specific example of the synchronization signal detector i (12). There is a method in which the synchronization signal is detected by comparing with a pattern prepared from the result of binarizing the integral output. At this time, for example, there is a method using a matched filter and a slicer as shown in FIG. The slicer threshold is appropriately selected according to the minimum hamming distance of the pattern that can occur in the portion other than the sync signal pattern and the sync signal. In addition, a method of detecting the synchronization signal by binarizing the integration result directly through a matched filter or the like is also conceivable.

  FIG. 83 shows a reproduction process in which information stored in a disk-shaped information storage medium D is read out, decoded and reproduced, and a video signal, a sub-video signal, and an audio signal are received and encoded. 2 shows a disk device that performs a recording process for recording the information on a disk-shaped information storage medium D.

  The information storage medium D is mounted on the disk drive unit 211L. The disk drive unit 211L rotates and drives the mounted information storage medium D, and reads, decodes and reproduces information stored in the information storage medium D using an optical pickup (when the information storage medium D is an optical disk). Alternatively, information corresponding to the encoded signal is recorded on the information recording medium.

  Hereinafter, the disk device according to the present embodiment will be described for the reproduction process. The information read by the disk drive unit 211L is supplied to an MPU (Micro Processing Unit) unit 213L, subjected to error correction processing, and then stored in a buffer (not shown). Of this information, management information in the control data area Is recorded in the memory unit 214L and used for reproduction control, data management, and the like.

  Of the information stored in the buffer, the video object area information is transferred to the separation unit 226L, and is separated for each of the main video pack 203L, the audio pack 204L, and the sub-video pack 205L. The information of the main video pack 203L is supplied to the video decoder unit 227, the information of the audio pack 204 is supplied to the audio decoder unit 229L, and the information of the sub video pack 205L is supplied to the sub video decoder unit 228L, and decoding processing is performed. The main video information decoded by the video decoder unit 227 and the sub-video information decoded by the sub-video decoder unit 228L are supplied to the D-processor unit 230L and subjected to superimposition processing, and then the D / A (Digital / Analogue) The analog signal is converted by the conversion unit 231, and the sub-video information is converted into the analog signal by the D / A conversion unit 232L and is output as a video signal to a video display device (not shown) (for example, CRT: Cathode Ray Tube). The The audio information decoded by the audio decoder unit 229L is converted into an analog signal by the D / A conversion unit 233L and output as an audio signal to an audio reproduction device (not shown) such as a speaker.

  A series of playback operations for the information storage medium D as described above are controlled in an integrated manner by the MPU unit 213. The MPU unit 213L receives operation information from the key input unit 212L and controls each unit based on a program stored in a ROM (Read Only Memory) unit 215L.

  Regarding the recording process, the disk device according to the present embodiment will be described. Each data input through the video, audio, and sub-video input terminals is supplied to the A / D converters 217L, 218L, and 219L, and converted from analog signals to digital signals. The video data digitally converted by the A / D converter 218 is supplied to the video encoder 220L and encoded. The sub video data digitally converted by the A / D conversion unit 218 is supplied to the sub video encoder unit 221 and encoded. The audio data digitally converted by the A / D converter 219L is supplied to the audio encoder 222L and encoded.

  The video, audio, and sub-picture data encoded by each encoder is supplied to a multiplexer (MUX: Multiplexer) 216L, which is packetized and packed into an MPEG-2 program stream as a video pack, audio pack, and sub-picture pack, respectively. Configure. The multiplexed data group is supplied to the file formatter unit 225 and converted into a file conforming to a file structure that can be recorded and reproduced by the disk device. This file is supplied to the volume formatter unit 224 and forms a data format conforming to the volume structure that can be recorded and reproduced by this disk device. Here, data filed by the file formatter unit 225L, reproduction control information for reproducing the filed data, and the like are added. Thereafter, the data is supplied to the physical formatter 223L, and the filed data is recorded on the disk D by the disk drive unit 211L.

  Such a reproduction operation and recording operation are performed by the MPU unit 213L executing an instruction from the key input unit 212L based on a series of processing programs stored in the ROM unit 215L of the disk device. Is. In this disk device, both the encoding process and the decoding process of the sub-picture data are performed. However, there are cases where only the encoding process is performed alone in the authoring system or only the decoding process is performed in the disk apparatus. Is possible.

  The optical disk device operates with reference to the logical format of the optical disk 10. In the optical disc 10, the volume space from the lead-in area to the lead-out area has the volume and file structure as described above. This structure is defined in conformity with a specific standard as a logical format, for example, micro UDF (micro UDF) and ISO9660. As described above, the volume space is physically divided into a plurality of sectors, and serial numbers are assigned to the physical sectors. The logical address means a logical sector number LSN as defined by micro UDF (micro UDF) and ISO9660, and the logical sector is 2048 bytes like the size of the physical sector, and the logical sector number LSN is the physical sector. A serial number is added in ascending order of the numbers.

  FIG. 84 shows a player reference model showing in detail the signal processing system of the above-described apparatus. During the playback period, each pack in the program stream read from the disc is sent from the interface unit (described above) of the decoding / error correction circuit 102K to the track buffer 104K and stored there. The output of the track buffer 104K is separated by the demultiplexer 114K and transferred to the input buffers 116K, 118K, 120K, and 122K for the target decoders 124K, 126K, 126K, 130K, 132K, and 134K defined by ISO / IEC 13818-1. Is done. The track buffer 104K is provided to ensure continuous data supply to the decoders 124K, 126K, 128K, 130K, 132K, and 134K. The DSI_PKT in the navigation pack is stored in the track buffer 104K and simultaneously in the data search information (DSI) buffer 106K, and is decoded by the DSI decoder 110K. A DSI decoder buffer 112K is also connected to the DSI decoder 110K, and a system buffer 108K is also connected to the decoding / error correction circuit 102K.

  The output (main video) of the video buffer 116K is supplied to the HD decoder 124K and the SD decoder 126K. The outputs of the HD decoder 124K and SD decoder 126K are supplied to the selector 156K as they are, and also supplied to the selector 156K via the buffers 136K and 138K. The output of the selector 156K is supplied to the mixer 162K via the letterbox converter 160K.

  The output of the sub-picture buffer 118K is supplied to the HD decoder 128K and the SD decoder 130K. The outputs of the HD decoder 128K and SD decoder 130K are supplied to the selector 158K as they are, and also supplied to the selector 158K via the buffers 142K and 144K. The output of the selector 158K is supplied to the mixer 162K.

  The output of the audio buffer 120K is supplied to the audio decoder 132K. The output of the reproduction control information (PCI) buffer 122K is supplied to the PCI decoder 134K. An audio decoder buffer 146K is also connected to the audio decoder 132K, and the output of the audio decoder 132K is output as it is. A PCI decoder buffer 148K is also connected to the PCI decoder 134K, and the output of the PCI decoder 134K is supplied to the HIL decoder 152K via the highlight (HIL) buffer 150. An HIL decoder buffer 154K is also connected to the HIL decoder 152K, and the output of the HIL decoder 152K is output as it is.

  The power-on timing of each decoder 124K, 126K, 128K, 130K, 132K, 134K is controlled according to the above-mentioned version number and compression / non-compression flag, and the necessary decoders are put on standby according to the SD / HD system to save power. Meanwhile, the reproduction can be started quickly.

  A sub-picture unit composed of sub-picture data of a plurality of sub-picture packets will be described with reference to FIG. A sub-picture unit as still image data (for example, subtitles) for more than ten screens can be recorded in one GOP. The sub-picture unit (SPU) includes a sub-picture unit header (SPUH), pixel data (PXD) composed of bitmap data, and a display control sequence table (SP_DCSQT).

  The size of the display control sequence table (SP_DCSQT) is less than half of the sub-picture unit. The display control sequence (SP_DCSQ) describes the contents of display control for each pixel. Each display control sequence (SP_DCSQ) is continuously recorded in contact with each other.

  The sub-picture unit (SPU) is divided into an integer number of sub-picture packs SP_PCK and recorded on the disc. The sub-picture pack SP_PCK can have a padding packet or a stuffing byte only for the final pack of one sub-picture unit (SPU). Adjustment is made when the length of SP_PCK including the final data of the unit is less than 2048 bytes. SP_PCKs other than the final pack cannot have padding packets.

  The PTS of the sub-picture unit (SPU) must be matched to the top field, for example. The effective period of the sub-picture unit (SPU) is from the PTS of the sub-picture unit (SPU) to the PTS of the sub-picture unit (SPU) to be reproduced next. However, when a still occurs in the navigation data during the effective period of the sub-picture unit (SPU), the effective period of the sub-picture unit (SPU) is until the still ends.

  The display of the sub-picture unit (SPU) is defined below.

  1) When the display is turned on during the effective period of the sub-picture unit (SPU) by the display control command, sub-picture data is displayed. 2) When the display is turned off during the effective period of the sub-picture unit (SPU) by the display control command, the sub-picture data is cleared. 3) When the effective period of the sub-picture unit (SPU) expires, the sub-picture unit (SPU) is forcibly cleared and the sub-picture unit (SPU) is discarded from the decoder buffer. The sub-picture unit header (SPUH) is as described above.

As described above, the system according to the present invention is
<Main data has a segment unit structure>
That is, in an information recording medium capable of reproducing information or recording information using focused light, data recordable on the information recording medium or data recorded on the information recording medium has a first data unit (ECC block). . The first data unit is composed of a second data unit (segment), the second data unit is composed of a third data unit (sector), and the third data unit is fourth data. An information recording medium comprising a unit (sink data) and capable of detecting or correcting an error in the data within the first data unit, or information reproduction for reproducing the data from the information recording medium An information recording / reproducing apparatus for recording the data on the apparatus or the information recording medium is provided.

  <Effect> Since the ECC block is divided into a plurality of segments, the segments composed of a plurality of sectors can be separated from the information recording medium. As a result, The medium structure can be optimized in accordance with the content of the information recording medium dedicated to reproduction. That is, 1A] In the case of data contents that can be freely copied as many times as possible (not so important) ... As in the prior art, this is a structure in which data is continuously connected (packed) for each segment. 1B] In the case of important data contents subject to copy restrictions: Each segment is separately arranged on the information recording medium, and “identification information of the reproduction-only information recording medium” “copy” is placed in the gap (between the preceding and following segments). This is a structure capable of recording control information, “encryption key related information”, “address information”, and the like. As a result, the data recorded on the information recording medium can be protected and the access speed can be ensured. In addition, 2. Data structure compatibility with a read-only / appendable / rewritable information recording medium is ensured, and the playback device or the processing circuit / control software of the recording / playback device can be shared / simplified. 2A] When the reproduction-only information recording medium has the structure [1A], the data having the structure [1A] is divided at the segment boundary, and specific information is arranged between them. It becomes possible to perform additional recording processing / rewriting processing in segment units for the recordable / rewritable information recording medium. 2B] When the reproduction-only information recording medium has the structure [1B], the contents of the data inserted between the segments (gap) with respect to the data of the structure [1B] are referred to as the reproduction-only information recording medium. It is possible to distinguish between the recordable information recording medium and the rewritable information recording medium, and it is possible to perform the appending process / rewriting process on a segment basis for the recordable / rewritable information recording medium.

In the present invention,
<Track address is recorded in Gray Code or placed in the gap between segments>
That is, in an information recording medium capable of recording and reproducing information using focused light, data recordable on the information recording medium or data reproducible from the information recording medium has the first data unit (ECC block). The first data unit is composed of a second data unit (segment), and the second data unit is composed of a third data unit (sector). The third data unit is composed of a fourth data unit (sync data), and data error detection or error correction is possible within the first data unit. At least one of zone identification information, segment address information, and track address information is recorded in advance. The zone identification information or segment address information is recorded by wobble modulation, and the track address information is in a specific format. It is possible to provide an information recording medium that is recorded in the above, an information reproducing apparatus that reproduces the data from the information recording medium, or an information recording / reproducing apparatus that records the data on the information recording medium.

  <Effect> Since zone identification information and segment address information are recorded by wobble modulation, it is possible to record data (record marks) that can be additionally written or rewritten in the area where zone identification information and segment address information are recorded. Become. Therefore, a pre-pit address is formed, and the pre-pit address position is compared with a conventional DVD-RAM disc (rewritable information recording medium) in which recording of additionally writable or rewritable data (record marks) is prohibited. Recording capacity can be improved. 2. When the zone structure is adopted, the wobble modulation information in which the zone identification information and the segment address information are recorded has the same form between adjacent tracks. Track address information that differs in form between adjacent tracks is recorded in a specific format (recorded in Gray Code or placed in the gap between segments), so it can be recorded in L / G Become. Therefore, compared with the conventional DVD-RW disc (rewritable information recording medium) for groove recording, the system of the present invention can improve the recording capacity.

In the present invention,
<Adding / subtracting / adding / exclusive OR to / from track address / addition of EDC> In other words, information can be recorded and reproduced using focused light, and zone identification information, segment address information, track address information In an information recording medium having a structure in which at least one of them is recorded in advance, at least one of addition processing, subtraction processing, or exclusive OR operation processing for track address information or at least two of the processing An information recording medium characterized by having an error detection code added by combination processing, or an information reproducing apparatus for reproducing the data from the information recording medium, or an information recording / reproducing for recording the data on the information recording medium Equipment can be provided.

  <Effect> An error created by adding at least one of the addition processing, subtraction processing, or exclusive OR operation processing to the track address information having the gray code or modified gray code characteristics, or a combination processing of at least two of them Similarly, the detection code retains the gray code or modified gray code characteristics.

  Therefore 1. By adding an Error Detection Code to the track address information, the playback accuracy of the track address information is dramatically improved. 2. Since the error detection code has a gray code characteristic, the number of indefinite bits in the land portion is small, so that the reproduction / discrimination accuracy of the track address information in the land portion including the error detection code area is improved.

  Next, the information recording medium of the present invention, the reproducing apparatus and method thereof, the information recording apparatus and method of the present invention will be described with reference to Tables 1 and 2 in which the whole image is inserted before the brief description of the drawings. To.

  The combination effect produced by the combination of points in the present invention will be described with reference to Table 1.

Note) “Circle” mark is related to the content of the invention point that is the center of exhibiting the unique effect in the list, but the content of the invention point is related to the content of the unique effect but is additional and not necessarily essential Is marked with a “triangle”.

Explanation of effects for each effect number corresponding to Table 1 <Guaranteed large capacity for high-quality video and improved access reliability to high-quality video>
(1) When an HD video is recorded on an information storage medium by file or folder separation with respect to a conventional SD video, the HD video has a high resolution, and thus the recording capacity of the information storage medium must be increased. Since the recording capacity can be increased in the L / G recording than in the groove recording, and the recording mark cannot be formed on the prepit address, the recording efficiency is higher in the address information recording by the wobble modulation than the prepit address. “/ G recording + wobble modulation” increases the recording capacity most. In this case, since the track pitch becomes dense, it is necessary to further improve the address detection performance and increase the access reliability. Adopting gray code or special track code for the occurrence of indefinite bits that are a problem in “L / G recording + wobble modulation”, reducing the occurrence frequency of indefinite bits, and adding, subtracting, exclusive OR operation in bit units, etc. Thus, error detection code addition and scramble processing while maintaining the gray code characteristic or special track code characteristic are performed, and the address detection accuracy can be greatly increased.

  (2) Although the quality of the sub-picture needs to be improved in accordance with the improvement in the quality of the picture recorded on the information storage medium, the amount of data to be recorded increases if the sub-picture is changed from the conventional 2-bit to 4-bit representation. Therefore, it is necessary to increase the capacity of the information storage medium for recording it. Since the recording capacity can be increased in the L / G recording than in the groove recording, and the recording mark cannot be formed on the prepit address, the recording efficiency is higher in the address information recording by the wobble modulation than the prepit address. “/ G recording + wobble modulation” increases the recording capacity most. In this case, since the track pitch becomes dense, it is necessary to further improve the address detection performance and increase the access reliability. Adopting gray code or special track code for the occurrence of indefinite bits that are a problem in “L / G recording + wobble modulation”, reducing the occurrence frequency of indefinite bits, and adding, subtracting, exclusive OR operation in bit units, etc. Thus, error detection code addition and scramble processing while maintaining the gray code characteristic or special track code characteristic are performed, and the address detection accuracy can be greatly increased.

<Efficient zone division is possible to improve recording efficiency and guarantee large capacity according to high-quality video >>>
(3) When an HD video is recorded on an information storage medium by file or folder separation with respect to a conventional SD video, the HD video has a high resolution, so it is essential to increase the recording capacity of the information storage medium. Since the recording capacity can be increased in the L / G recording than in the groove recording, and the recording mark cannot be formed on the prepit address, the recording efficiency is higher in the address information recording by the wobble modulation than the prepit address. “/ G recording + wobble modulation” increases the recording capacity most. Since the recording capacity can be increased in the L / G recording than in the groove recording, and the recording mark cannot be formed on the prepit address, the recording efficiency is higher in the address information recording by the wobble modulation than the prepit address. “/ G recording + wobble modulation” increases the recording capacity most. In the case of L / G recording, the zone structure shown in FIG. 37 is adopted. However, if the zones are arranged so that one round is an integral multiple of the ECC block, the recording efficiency becomes very poor. On the other hand, as in the present invention, one ECC block is divided into a plurality of segments (eight in the embodiment of the present invention), and zones are arranged so that one round on the information storage medium is an integral multiple of the segments. With this setting, the recording efficiency becomes very high.

  (4) Although it is necessary to improve the image quality of the sub-picture in accordance with the improvement of the image quality of the video recorded on the information storage medium, the amount of data to be recorded increases if the sub-picture is expressed from 2 bits to 4 bits. Therefore, it is necessary to increase the capacity of the information storage medium for recording it. Since the recording capacity can be increased in the L / G recording than in the groove recording, and the recording mark cannot be formed on the prepit address, the recording efficiency is higher in the address information recording by the wobble modulation than the prepit address. “/ G recording + wobble modulation” increases the recording capacity most. In the case of L / G recording, the zone structure shown in FIG. 37 is adopted. However, if the zones are arranged so that one round is an integral multiple of the ECC block, the recording efficiency becomes very poor. On the other hand, as in the present invention, one ECC block is divided into a plurality of segments (eight in the embodiment of the present invention), and zones are arranged so that one round on the information storage medium is an integral multiple of the segments. With this setting, the recording efficiency becomes very high.

<Protecting high-quality video, identifying media type, and ensuring access speed>
(4) When an HD video is recorded on an information storage medium by file or folder separation with respect to a conventional SD video, the HD video has a high resolution, and there is a high demand for enhancing protection against unauthorized copying. As in the present invention, the ECC block is divided into a plurality of segments, two types of recording formats are provided in the reproduction-only information storage medium, and a header is provided between the segments for high-quality video for which illegal copy protection is desired. As a result, format compatibility among read-only / write-once / rewritable formats can be ensured, and medium types can be easily identified. Further, in the write-once type / rewritable type, since the address information is recorded a plurality of times in the segment as a part of the identification information, a side effect of improving the access speed is exhibited at the same time.

  (6) It is necessary to improve the quality of sub-pictures in accordance with the improvement of the quality of videos recorded on information storage media. There is a high demand for enhancing the protection of unauthorized copying for high-quality sub-pictures that have been converted from conventional 2-bit to 4-bit representation. . As in the present invention, the ECC block is divided into a plurality of segments, and there are two types of recording formats in the reproduction-only information storage unit. In addition to ensuring format compatibility among read-only / write-once / rewritable types, medium type identification is facilitated. Further, in the write-once type / rewritable type, since the address information is recorded a plurality of times in the segment as a part of the identification information, a side effect of improving the access speed is exhibited at the same time.

<Guaranteed that the scratches on the surface will be the same length as the present even if the recording density is increased to match the high-quality video>
(7) When an HD video is recorded on an information storage medium by file or folder separation with respect to a conventional SD video, it is essential to increase the recording capacity of the information storage medium because the HD video has a high resolution. As the recording density increases, the range of influence on recording data caused by the same length of scratches on the surface of the information storage medium becomes relatively large. In the conventional DVD, one ECC block is composed of 16 sectors. In the present invention, one ECC block is composed of twice as many as 32 sectors. Guaranteed to be as long as the current. Furthermore, one ECC block is composed of two small ECC blocks and one sector is distributed to two ECC blocks so that data in the same sector is substantially interleaved. The impact on burst errors can be reduced.

  (8) Although the quality of the sub-picture needs to be improved in accordance with the improvement in the quality of the picture recorded on the information storage medium, the amount of data to be recorded increases when the sub-picture is changed from the conventional 2-bit to 4-bit representation. Therefore, it is necessary to increase the capacity of the information storage medium for recording it. . As the recording density increases, the range of influence on recording data caused by the same length of scratches on the surface of the information storage medium becomes relatively large. In the conventional DVD, one ECC block is composed of 16 sectors. In the present invention, one ECC block is composed of twice as many as 32 sectors. Guaranteed to be as long as the current. Furthermore, one ECC block is composed of two small ECC blocks and one sector is distributed to two ECC blocks so that data in the same sector is substantially interleaved. The impact on burst errors can be reduced.

  (9) When an HD video is recorded on an information storage medium by file or folder separation with respect to a conventional SD video, since the HD video has a high resolution, it is essential to increase the recording capacity of the information storage medium. As the recording density increases, the range of influence on recording data caused by the same length of scratches on the surface of the information storage medium becomes relatively large. In the conventional DVD, one ECC block is composed of 16 sectors. In the present invention, one ECC block is composed of twice as many as 32 sectors. Guaranteed to be as long as the current. Further, since one ECC block is composed of two small ECC blocks and PO data belonging to a small ECC block which is different for each sector is inserted in the present invention, PO data in the small ECC block is interleaved in every other sector. Since it is arranged (distributed arrangement), the reliability of the PO data is improved, and an error correction process with high accuracy is possible.

  (10) Although the quality of the sub-picture needs to be improved in accordance with the improvement of the quality of the picture recorded on the information storage medium, the amount of data to be recorded increases if the sub-picture is changed from the conventional 2-bit representation to the 4-bit representation. Therefore, it is necessary to increase the capacity of the information storage medium for recording it. As the recording density increases, the range of influence on recording data caused by the same length of scratches on the surface of the information storage medium becomes relatively large. In the conventional DVD, one ECC block is composed of 16 sectors. In the present invention, one ECC block is composed of twice as many as 32 sectors. Guaranteed to be as long as the current. Further, since one ECC block is composed of two small ECC blocks and PO data belonging to a small ECC block which is different for each sector is inserted in the present invention, PO data in the small ECC block is interleaved in every other sector. Since it is arranged (distributed arrangement), the reliability of the PO data is improved, and an error correction process with high accuracy is possible.

<Fully compatible with read-only and write-once types, and can be added in small units>
(11) In conventional DVD-R or DVD-RW, additional writing / rewriting in fine units is impossible, and if the Restricted Overwrite process is performed forcibly, part of the recorded information is destroyed. There was a problem that. As in the present invention, a plurality of types of recording formats can be set exclusively for reproduction, and a recording structure having a header between segments divided in the ECC block can be provided for reproduction only. Full compatibility is possible. Furthermore, since additional writing / rewriting can be performed from the middle of the header portion, there is no risk of destroying information in the segment already recorded by the additional recording / rewriting process. At the same time, since the guard area is partially overlapped and recorded in the header portion during the additional recording / rewriting, the crosstalk between the two layers by the gap region is prevented in order to prevent the presence of a gap region in which no recording mark exists in the header portion. And the problem of interlayer crosstalk in the single-sided two-recording layer can be solved at the same time.

<Increase fixed address information allocation frequency and secure access speed>
(12) In the embodiment of the present invention, prediction determination of indefinite bits is possible using the even / odd identification information of the track number, but it is not surely determined within the prediction determination range. On the other hand, track information can be detected with very high accuracy in a portion having no indefinite bit and having an error detection code added thereto. Therefore, in the present invention, the indefinite bits are arranged in the groove area, and the indefinite bits are distributed in both the land area and the groove area so that the land area does not have the indefinite bits and the error detection code is added. Can be formed. However, since indefinite bits are distributed and arranged in both the land area and the groove area, the arrangement frequency of the track number information 611 and 612 having no indefinite bits is relatively lowered. On the other hand, in the present invention, by arranging the address information a plurality of times in the segment, both the land area and the groove area have an indefinite bit and the arrangement frequency of the part to which the error detection code is added is increased. Address information reproduction accuracy is improved and a high access speed is secured.

<Increase wobble address reading accuracy>
(13) As shown in FIG. 38, the wobble address reading accuracy is improved by increasing the wobble inversion frequency at the boundary position of the 1-address bit area 511 (the portion of “triangle”). Therefore, “000000” is excluded as a possible value of the segment address information 621 shown in FIG. 44 and FIG. 45 to increase the inversion frequency of the wobble, and the data scramble (642) is multiplied by the boundary position of the one address bit area 511 (“triangle” The frequency of wobble reversal at “mark” is increased. At this time, if “0” continues long in the scramble seed information 641, the effect of increasing the frequency of wobble inversion when data scramble is applied hardly appears. Therefore, by eliminating “000000” as a possible value of the segment address information 621 and increasing the appearance frequency of “1” in the seed information 641, the function of promoting the effect of increasing the wobble inversion frequency when data scramble is applied. To do.

<Accurate track number playback on the land improves track number playback accuracy on the land>
(14) In the embodiment of the present invention, prediction determination of indefinite bits is possible using the even / odd identification information of the track number, but it is not surely determined within the prediction determination range. On the other hand, track information can be detected with very high accuracy in a portion having no indefinite bit and having an error detection code added thereto. Therefore, in the present invention, the indefinite bits are arranged in the groove area, and the indefinite bits are distributed in both the land area and the groove area so that the land area does not have the indefinite bits and the error detection code is added. Can be formed. As a result, the track number can be read with high reproduction accuracy even on the land, and the access stability and high access speed in the land portion can be ensured.

Next, the correspondence between various combinations and effect numbers will be described with reference to Table 2.
[Explanation of effects for each effect number corresponding to Table 2]
<Indefinite bits can be distributed in the groove area and land area in a very easy way>
(15) In the embodiment of the present invention, by adopting ± 90 degree wobble phase modulation, the exposure amount modulation of the focused spots 701 to 703 for forming the groove region shown in FIG. 58 or the relative position change between the two focused spots. Indefinite bits can be distributed and arranged in the groove area and the land area by a very simple method. Therefore, the embodiment of the present invention can be realized by a conventional master recording apparatus for creating an information storage medium. Since it can be carried out with an existing apparatus, it is possible to manufacture an inexpensive information storage medium without requiring the introduction of new equipment.

<Reproduction accuracy (reliability) of wobble address information can be greatly improved>
(16) In the embodiment of the present invention, generation of EDC code is performed within a range of “addition operation”, “subtraction operation”, “exclusive OR” operation in combination with any data, or a combination operation thereof. Since both data scramble processing can be performed, the reproduction accuracy (reliability) of wobble address information can be greatly improved by a very simple method (error detection by EDC and frequency of occurrence of wobble inversion position by scramble can be increased and reproduced) Since the PLL is easily applied in the system), and only a few additional circuits are required to implement it, an inexpensive information reproducing apparatus or information recording / reproducing apparatus can be provided.

<Prevents indefinite bits from being aligned vertically in the ECC block and ensures error correction capability>
(17) The wobble address arrangement areas 561 and 562 shown in FIG. 43 (c) and the data arrangement of the track number information 611 and 612 shown in FIGS. The bit positions are aligned vertically in the ECC block shown in FIG. 28, which causes a problem that the error correction capability in the ECC block is greatly reduced. In the present invention, the arrangement of indefinite bits is shifted by various methods to prevent the indefinite bits from being lined up vertically in the ECC block, and performance for error correction capability in the ECC block can be ensured. As a result, the error rate (after correction) of reproduction information from the recording mark recorded on the information storage medium is reduced, and high-precision reproduction is possible.

<Reproducibility of wobble address information reproduction is very simple and inexpensive>
(18) As shown in FIG. 48, data is scrambled by a very simple circuit, and the wobble inversion frequency at the boundary portion of the address bit area is increased to facilitate detection of the boundary position of the address bit area. Not only can the information reproduction reliability be improved, but the circuit shown in FIG. 48 can be manufactured at a very low cost, so that an inexpensive information reproducing apparatus or an inexpensive information recording / reproducing apparatus can be provided.

  (19) By changing the pattern contents in the two address areas, the wobble inversion frequency at the boundary part of the address bit area is increased as a result, so that the boundary position of the address bit area can be easily detected, and wobble address information is reproduced. Increased reliability.

<Even / odd identification information of track number can be arranged with high detection accuracy and does not affect the recording mark>
(20) Since the even / odd identification information of the track number is recorded not by the wobble modulation data structure but by the physical shape change as shown in FIG. 53 or 54, high detection for the even / odd identification information of the track number is performed. Accuracy can be secured. Further, since the even / odd identification information of the track number is arranged in the header area between the segments, there is no adverse effect on the recording information by the recording mark recorded in each segment. At the same time, this information can be used to identify the type of read-only / write-once / rewritable information storage media, making it easy to detect unauthorized copies of high-quality video information and high-quality sub-video information that you want to prevent unauthorized copying. It becomes.

<Predictive judgment of indefinite bits with high accuracy is possible>
(21) Since the even / odd identification information of the track number is recorded not by the wobble modulation data structure but by the physical shape change as shown in FIG. 53 or 54, high detection for the even / odd identification information of the track number is performed. Accuracy can be secured. For this reason, prediction determination of indefinite bits can be performed with reference to the even / odd identification information of the track number that can ensure this high detection accuracy, so that prediction determination can be performed with relatively high accuracy.

<The address number is determined accurately on the land area without having an indefinite bit in the groove area>
(22) In the embodiment of the present invention, prediction determination of indefinite bits is possible using the even / odd identification information of the track number, but it is not surely determined within the prediction determination range. On the other hand, track information can be detected with very high accuracy in a portion having no indefinite bit and having an error detection code added thereto. As shown in FIG. 55, in the present invention, the track number information is progressively set in a zigzag manner in the L / G recording method so that the groove area does not have an indefinite bit and the land area does not have an indefinite bit, and an error detection code is added. This makes it possible to set the location where the address number is accurately determined, and not only can the track number be determined with high accuracy even in the land area, but also ensure a relatively high access speed (because the address number is determined earlier). Is possible.

<Easy and fast address number determination for both land and groove>
(23) Since the location of the address determination / prediction determination area is determined in advance for both the land and the groove as shown in FIGS. 79 to 81, 44, and 45, the address determination area and the address prediction area are immediately determined. Because the address number information can be confirmed and predicted for each, not only the address information reproduction processing method becomes easy, but also the address number can be confirmed at high speed, so that relatively high-speed access processing is possible. Become.

<Reproduction reliability of recorded mark in segment>
(24) In the present invention, the ECC block is divided into a plurality of segments, a header is arranged between each segment, and track address information is arranged in this header area as shown in FIG. As a result, even when address information is recorded by wobble modulation in L / G recording, it is possible to prevent indefinite bits from being mixed into the segment area, and a high quality reproduction signal can be obtained from the recording mark in the segment area. High reproduction reliability can be secured.

As described above, the present invention is capable of displaying “high-definition” main video, high-quality sub-video, increasing capacity, ensuring high format compatibility, adding or rewriting PC data, and high reliability for address information reproduction. Providing an information recording medium that can improve the accuracy of extracting a reference clock from a wobble signal, guaranteeing high-speed access, and guaranteeing extensibility to a single-sided two-recording layer structure, and stably reproducing data from the information recording medium An information reproducing apparatus capable of recording data or an information recording / reproducing apparatus capable of stably recording data is provided.

The figure which shows the example of file arrangement | positioning with respect to the information recording medium which concerns on this invention. The figure which shows the other example of the file arrangement | positioning with respect to the information recording medium which concerns on this invention. Explanatory drawing of the recording method of the video information with respect to the information recording medium which concerns on this invention. Explanatory drawing which shows the example of the compression rule of the subvideo recorded on the information recording medium which concerns on this invention. Explanatory drawing which shows the example of the pixel data showing the subpicture recorded on the information recording medium which concerns on this invention. Explanatory drawing which shows the example of the unit of a subpicture. Explanatory drawing which shows the relationship between the unit of a subvideo, and a packet. Explanatory drawing of a subpicture unit header. Explanatory drawing which shows a part of sub-picture unit header. Explanatory drawing which shows the other example of the compression rule of the subvideo recorded on the information recording medium which concerns on this invention. Explanatory drawing which further shows the compression rule shown in FIG. The figure which shows the run length compression rule (line unit) of 3 bit 8 color expression in 3 bit data which is the run length compression rule which concerns on embodiment of this invention. The figure which shows the run length compression rule (line unit) of 4 bit 16 color expression in 4 bit data which is the run length compression rule which concerns on embodiment of this invention. The figure which shows an example of the practical data structure according to the run length compression rule which concerns on embodiment of this invention. The figure which shows the example which unitized the practical data structure according to the run length compression rule which concerns on embodiment of this invention. The figure which shows the example which unitized the practical data structure according to the run length compression rule which concerns on embodiment of this invention. The figure which shows the example in the various cases which unitized the practical data structure according to the run length compression rule which concerns on embodiment of this invention. The figure which shows the other example of the run length compression rule (line unit) of 4 bit 16 color expression in 4 bit data which is the run length compression rule which concerns on embodiment of this invention. The figure which shows the detail of a display control sequence table (SP_DCSQT), and the figure which shows the detail of the display control sequence (SP_DCSQ) in FIG. 19, and the detail of the start time of a display control sequence (SP_DCSQ). Explanatory drawing which shows the process sequence which produces | generates a recording data field. Explanatory drawing which shows the structure of a data frame. Explanatory drawing which shows the content of data ID of FIG. Explanatory drawing which shows the content of the data field number of FIG. Explanatory drawing of a definition of a recording type. An example of an initial value of a shift register when scrambling main data and an explanatory diagram of the shift register. Explanatory drawing which shows the structure of an ECC block. Explanatory drawing which shows the example of arrangement | positioning of a scrambled frame. The figure which shows a mode that the outer parity (PO) was interleaved by the left block and the right block, respectively, in the ECC block. Explanatory drawing which shows a mode that the data of the ECC block were modulated and the synchronous code was added. The figure which shows the kind of synchronous code of FIG. The figure which shows the example of the physical sector layout numbering of an information recording medium (optical disk). FIG. 3 is an explanatory diagram of a data structure in a lead-in area in a read-only information recording medium. FIG. 3 is an explanatory diagram of the entire data structure in a rewritable information recording medium. Explanatory drawing of the data unit of the data recorded on an information recording medium. The figure shown in order to demonstrate the difference between the 1st Example and the 2nd Example in this invention read-only information recording medium. The comparison explanatory drawing of the data recording format for every various information recording media based on this invention. The figure which shows the zone structure of the rewritable information recording medium in this invention. Explanatory drawing of 180 degree phase modulation and NRZ method in wobble modulation. FIG. 5 is a diagram illustrating the principle of indefinite bit generation when wobble modulation is performed in land (L) / groove (G) recording. The figure which shows the example of a gray code. Explanatory drawing of the special track code which concerns on this invention. Explanatory drawing of the data recording method of the rewritable data recorded on the rewritable information recording medium of this invention. Explanatory drawing of the wobble information on the rewritable information recording medium of the present invention. Explanatory drawing regarding arrangement | positioning of the address bit in the arrangement | positioning area | region of the wobble address of the rewritable information recording medium of this invention. Explanatory drawing regarding arrangement | positioning of the address bit in the arrangement | positioning area | region of the wobble address of the recordable information recording medium of this invention. Explanatory drawing of the production process of wobble address data in a recordable information recording medium. The explanatory view of the signal applied to the fundamental idea of the present invention, and its processing contents. Explanatory drawing of the scramble / descramble process with respect to wobble address data. The figure for demonstrating the setting method of EDC information with a Gray code characteristic. Explanatory drawing which shows the other example regarding arrangement | positioning of the address bit in the arrangement | positioning area | region of the wobble address of the rewritable information recording medium of this invention. Explanatory drawing which shows the other example regarding arrangement | positioning of the address bit in the arrangement | positioning area | region of the wobble address of the recordable information recording medium of this invention. Explanatory drawing which shows the further another example regarding arrangement | positioning of the address bit in the arrangement | positioning area | region of the wobble address of the rewritable information recording medium of this invention. Explanatory drawing of the setting method of the land odd / even identification information in L / G recording. Explanatory drawing of the other setting method of the odd / even identification information of the land in L / G recording. The figure which shows the setting method of the track number information of a rewritable information recording medium. Explanatory drawing of the example of the address estimation method in a groove part. Explanatory drawing of the example of the address estimation method in a land part. Explanatory drawing of the method to change a groove width. Explanatory drawing which shows the other example which arrange | positions an indefinite bit in the groove area | region in L / G recording. Explanatory drawing of the recording system of the apparatus based on this invention. Explanatory drawing of the reproduction | regeneration system of the apparatus which concerns on this invention. The figure which shows the example of a wobble signal demodulation circuit. The figure which shows the example of the demodulation circuit of the wobble signal of the apparatus which concerns on this invention. Explanatory drawing of the method of performing the waveform process of a wobble signal. Explanatory drawing of the detection method of a synchronizing signal. FIG. 66 is a diagram showing a configuration in the address detector of FIG. 65. The figure which shows the specific example of a synchronizing signal detector. The figure which showed an example of the header area | region in ROM media. The figure which showed another example of the header area | region. The figure which shows the relationship between the track form when a groove wobble is phase-modulated by track address data, and the wobble detection signal in a land. Explanatory drawing of the address detection value in the land track in groove wobbling. Explanatory drawing of the track number by groove wobbling and the detection data in a land track. The figure which shows the example of an addressing format. The figure which shows the example of the identification mark system for performing odd land / even land identification. The figure which shows the other example of the identification mark system for performing odd land / even land identification. The figure which shows the further another example of the identification mark system for performing odd land / even land identification. The figure which shows the other example of the identification mark system for performing odd land / even land identification. The figure which shows the example of embedding the address information of a land track. The figure which shows the example which formed the land address by changing a part of groove width. Explanatory drawing which shows the principle when detecting the odd / even land track by changing the groove width partially. The figure which shows the example of the addressing format of a rewritable information recording medium. Explanatory drawing which shows the example of address arrangement | positioning. 1 is a configuration explanatory diagram of an optical disc apparatus to which the present invention is applied. FIG. FIG. 84 is a configuration explanatory diagram further illustrating a signal processing system of the apparatus of FIG. 83. The figure shown in order to demonstrate subpicture processing.

Explanation of symbols

141 ... Information recording / reproducing unit 142 ... Interface unit 143 ... Control unit 144 ... Data synthesis unit 145 ... Synchronization code extraction unit 146 ... Synchronization code selection unit 150 ... Wobble signal demodulation circuit 151 ... Modulation circuit 152 ... Demodulator circuit 161... ECC encoding circuit 162.

Claims (3)

Lands and grooves are alternately arranged in the radial direction as information recording tracks on the information recording surface,
The track address information is recorded by wobble modulation of the groove or land.
Gray code is used to generate the address information,
Indefinite bits generated due to wobble modulation are distributed in the land and groove,
An information recording medium characterized by the above. Lands and grooves are alternately arranged in the radial direction as information recording tracks on the information recording surface of the information recording medium,
The address information of the track is recorded by wobble modulation of the groove or land, and a gray code is used to generate the address information, and indefinite bits generated due to wobble modulation are recorded on the land and groove. An information recording method characterized by being arranged in a distributed manner. In an apparatus for forming lands and grooves alternately arranged in the radial direction as information recording tracks on the information recording surface of the information recording medium,
Means for wobble modulating the groove or land in order to include the address information of the track;
An information recording apparatus comprising: means for using a Gray code to generate the address information, and setting so that indefinite bits generated due to wobble modulation are distributed and arranged in the land and the groove .

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