JP2005269357A - Electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that it is not discriminated whether a generated error is the accidental one caused by a user or the inevitable one caused by a fault. <P>SOLUTION: An electronic apparatus includes: a detecting means for detecting an operation defect during an operation; and a storage means which stores error information corresponding to the operation defect which is detected by the detecting means and has a storage area corresponding to each kind of error information. When the operation defect is detected by the detecting means, data in the storage area corresponding to the error information which corresponds to the operation defect is counted. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an electronic apparatus having means for detecting an error and means for storing error information.

Conventionally, when an error occurs, an error number corresponding to the type of the error is read, the error number and various information associated therewith are stored in an EEPROM (Erasable Programmable Read-Only Memory), and the data is read. Has been proposed to elucidate the cause of camera failure (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 11-027704

  However, in the above configuration, since there are only a few error information histories, a camera failure can be dealt with only by the error information for these several times. Further, it has not been possible to distinguish whether the error that has occurred is accidentally caused by the user or is inevitable due to a failure.

  Further, when a power-related error occurs, there is a possibility that the EEPROM data storing the error information is destroyed.

  Therefore, the electronic device according to claim 1 of the present application stores a detection unit that detects a malfunction during operation, error information corresponding to the malfunction detected by the detection unit, and each error information. Storage means having a corresponding storage area, and when the detection means detects a malfunction, the data in the storage area according to the error information corresponding to the malfunction is counted. To do.

  In addition, the electronic device according to claim 2 of the present application includes a detection unit that detects an operation failure during operation, a power source different from the main power source, and a temporary storage memory operable by the other power source, When an error occurs, error information is stored in a temporary storage area.

  According to the present invention, by storing the occurrence frequency for each error number, it is possible to determine whether the error is a temporary error or an error due to a failure and notify the user. According to this configuration, when an accidental error that can be recovered immediately occurs, it is not necessary to take excessive measures such as sending a repair request to the user, and an error due to an unrecoverable failure has occurred. If this is the case, the user can be notified for immediate repair.

  Moreover, even if a power-related error occurs, the error information can be stored quickly and safely without being destroyed.

  Hereinafter, the present invention will be described in detail based on the illustrated embodiments.

  FIG. 1 is a block diagram showing a circuit configuration of a camera according to an embodiment of the present invention.

  2 and 3 are flowcharts showing the operation contents of the camera, and FIGS. 4 and 5 are explanatory diagrams regarding an error storage area of the EEPROM for storing error information.

  First, the circuit configuration of the camera will be described with reference to FIG.

  In FIG. 1, reference numeral 101 denotes a camera microcomputer that controls operations of the following circuits. Reference numeral 102 denotes a switch group, which includes SW2 (release switch), SW1 (photometry and distance measurement operation start switch), and the like. Reference numeral 103 denotes a signal input circuit for detecting various operation switch groups 102 of the camera. Reference numeral 104 denotes a photometric circuit that performs photometry of a subject using a photometric sensor and sends a photometric output to the microcomputer 101. The microcomputer performs A / D conversion on a plurality of inputted photometric outputs, and exposure conditions (aperture, shutter speed). Used for setting. Reference numeral 105 denotes a focus detection circuit including an area sensor for performing autofocus (AF) by an existing phase difference detection method and a circuit unit for storing and reading it, and is controlled by the microcomputer 101. Reference numeral 106 denotes a motor drive circuit for driving a film feeding motor. Reference numeral 107 denotes a shutter control circuit for controlling the shutter magnet. Reference numeral 108 denotes a battery check circuit, which applies a load to the power supply according to an instruction from the microcomputer and informs the microcomputer of the voltage state at that time. Reference numeral 109 denotes a liquid crystal display circuit for notifying the photographer of each piece of camera shooting information, for example, shutter speed, aperture value, ISO sensitivity, number of films, and the like. Reference numeral 110 denotes a connector for connecting the lens control circuit and the camera body. Reference numeral 111 denotes a lens communication circuit that performs focus adjustment and diaphragm control of a photographing lens (not shown). In the microcomputer 101, a ROM (101a) storing a program for controlling camera operations, a RAM (101b) for storing variables, and an EEPROM (101c: electrical erasing and writing) for storing various parameters and error information Possible memory).

  Next, the camera operation of the present invention will be described with reference to FIGS.

  In FIG. 2, in step S01, internal information is initialized by initializing each circuit, reading EEPROM data, or the like as an initialization operation of the camera.

  In step S02, the error number, which is the data in the RAM, is initialized to 00, so that there is no error.

  In step S03, a battery check is performed by a battery check circuit to detect a power supply state.

  In step S04, if the result of the battery check in step S03 is that the power supply is lower than the predetermined voltage and the camera operation is affected, the process proceeds to step S05. If the power supply is higher than the predetermined voltage and the camera operation is not affected, step S06 is performed. Migrate to

  In step S05, since the power supply affects the camera operation, 01 is input as the error number as an error, and the process proceeds to step S06.

  In step S06, various switch states are read according to information from the switch input circuit.

  In step S07, communication with the lens control circuit is performed, and lens information (lens type, lens focal length, open Fno, etc.) is received.

  In step S08, it is determined whether or not a communication error has occurred during lens communication in step S07. If there is no communication error, the process proceeds to step S09, and if not, the process proceeds to step S10.

  In step S09, since there is a communication error in lens communication, 02 is input as an error number as an error, and the process proceeds to step S10. Communication error determination at the time of communication is one of known communication error determination processes. If the sum check of the received sum check data is not the same as the sum check of the transmitted communication data, it is determined as a communication error.

  In step S10, if the error number is 00, it is determined that there is no error and the process proceeds to step S12. If the error number is not 00, it is determined that there is an error and the process proceeds to step S11.

  The error processing in step S11 will now be described in detail with reference to the error processing flowchart of FIG. 3 and FIG.

  In step S101 in FIG. 3, the data of the address corresponding to the generated error number is read from the EEPROM. Here, the EEPROM area of FIG. 4 will be described. In the EEPROM address of FIG. 4, address 0001 is defined as an error frequency 01 occurrence frequency storage area, and address 0002 is defined as an error number 01 occurrence frequency storage area.

  That is, when error number 01 occurs, the data at address 0001 of the EEPROM is read in step S101, and when error number 02 occurs, the data at address 0002 of the EEPROM is read. In the first embodiment, the error numbers are only 01 and 02, but if the error numbers increase, the error numbers can be increased as shown in FIG.

  Returning to FIG. 3, in S102, it is determined whether or not the read data is the maximum value of data that can be stored (for example, if the stored data is 1 byte, the maximum value is 0xFF), and if it is the maximum value, the process proceeds to S105. If it is not the maximum value, the process proceeds to S103.

  In S103, 1 is added to the read data.

  In S104, the data added in 103 is written into the EEPROM corresponding address of the error number that occurred.

  In S105, it is determined whether the data (number of errors) added in 103 is equal to or greater than a predetermined value (10 times). If it is 10 times or more, the process proceeds to S106, and if not, the process proceeds to S107.

  In S106, since the number of errors exceeds a predetermined value, the error display 2 different from the normal error display is displayed, the user is notified that a failure has occurred, and this error processing is terminated. If it is an accidental error, the possibility of continuous occurrence is low, and the predetermined value is not easily reached. The fact that the number of specific errors reaches a predetermined value means that the specific error frequently occurs, and since there is a high possibility that it is due to a failure, the user is informed of that fact.

  In S107, since the number of errors has not reached the predetermined value, it is regarded as an error that has occurred accidentally, a normal error display is performed, the user is notified that an error has occurred, and this error processing is terminated.

  Here, the error display will be described in detail with reference to FIGS.

  FIG. 9 is a part for displaying camera information and displays all segments that can be displayed. FIG. 10 shows an error display 1 (normal error display). In this display, a temporary error occurs and can be recovered thereafter. FIG. 11 shows an error display 2 (failure error display). In this display, the number of errors is greater than or equal to a predetermined value, and the possibility of failure is high, indicating that repair is required.

  Returning to FIG. 2, in step S12, if SW1 is on, the process proceeds to step S13, and if not, the process proceeds to step S20.

  In step S13, the subject brightness is measured by the photometry circuit, and the shutter speed and aperture value are calculated according to the brightness.

  In step S14, the distance to the subject is measured by calculation with the focus detection circuit.

  In step S15, the lens is driven based on the information calculated in step S13.

  In step S16, the shutter speed, aperture value, and the like are displayed on a liquid crystal display.

  In step S17, if SW2 is off, the process proceeds to step S19. If SW2 is on, the process proceeds to step S18.

  In step S18, a release process such as aperture control, shutter control, flash control, and film feed control is performed to photograph the subject.

  In step S19, if SW1 is off, the process proceeds to step S20. If not, the process proceeds to step S06, and the camera photographing operation is repeated.

  In step S20, as the end process, the changed internal data or the like is stored in the EEPROM, the end process of various circuits is performed, and the camera operation is ended. The above is the description of the first embodiment.

  FIG. 6 is a block diagram showing a circuit configuration according to the second embodiment of the present invention. 7 and 8 are flowcharts showing the operation contents of the camera.

  FIG. 6 illustrates the circuit configuration of the camera. The difference from FIG. 1 is that a sub power source 112 and a temporary storage memory 113 operable by the sub power source 112 are provided. The temporary storage memory 113 is connected to the 101 microcomputer and can move data by communication.

  Next, the camera operation of the present invention will be described with reference to FIGS.

  In FIG. 7, in step S201, internal information is initialized by initializing each circuit, reading EEPROM data, or the like as an initialization operation of the camera.

  In step S202, the error number, which is data in the RAM, is initialized to 00, and no error occurs.

  In step S203, a battery check is performed by a battery check circuit to detect a power supply state.

  In step S204, if the result of the battery check in step S203 is that the power supply is lower than the predetermined voltage and the camera operation is affected, the process proceeds to step S205. If the power supply is higher than the predetermined voltage and the camera operation is not affected, step S206 is performed. Migrate to

  In step S205, since the power supply affects the camera operation, 01 is input as the error number as an error, and the process proceeds to step 206.

  In step S206, if the error number is 00, it is determined that there is no error, and the process proceeds to step S208. If the error number is not 00, it is determined that there is an error and the process proceeds to step S207.

  The error processing in step S207 will now be described in detail with reference to the error processing flowchart of FIG.

  In step S301 of FIG. 8, error information such as an error number is transmitted to the temporary storage memory and data is written to the temporary storage memory. This temporary storage memory is a volatile memory, and data cannot be held without power supplied from the sub power supply, but its writing speed is faster than that of the EEPROM. When a battery error is detected, error information is held by the sub power source and temporary storage memory data.

  In step 302, display is performed to notify the photographer that an error has occurred.

  In step 303, various circuits are terminated as termination processing, the camera operation is terminated, and the error processing is terminated.

  Returning to FIG. 7, in step S208, the error information held in the temporary storage memory is read, and the error information in the temporary storage memory is cleared. This is because the battery data is not detected in step S204, so that there is no fear that the data in the EEPROM is destroyed.

  In step S209, another error is detected. If an error is detected, error information is written in the EEPROM in step S210, and the process proceeds to step S211. If not detected, the process proceeds to step S211.

  In step S211, various switch states are read according to information from the switch input circuit.

  In step S212, communication with the lens control circuit is performed, and lens information (lens type, lens focal length, open Fno, etc.) is received.

  In step S213, if SW1 is on, the process proceeds to step S214, and if not, the process proceeds to step S221.

  In step S214, the subject brightness is measured by the photometry circuit, and the shutter speed and aperture value are calculated according to the brightness.

  In step S215, the distance to the subject is measured by calculation with the focus detection circuit.

  In step S216, the lens is driven based on the information calculated in step S214.

  In step S217, the shutter speed, aperture value, etc. are displayed on a liquid crystal display.

  In step S218, if SW2 is off, the process proceeds to step S220. If SW2 is on, the process proceeds to step S219.

  In step S219, the subject is photographed by performing release processing such as aperture control, shutter control, flash control, and film feed control.

  In step S220, if SW1 is off, the process proceeds to step S221. Otherwise, the process proceeds to step S211 and the camera photographing operation is repeated.

  In step S221, as the end process, the changed internal data or the like is stored in the EEPROM, the end process of various circuits is performed, and the camera operation is ended.

It is a figure which shows the exemplary circuit structure of the camera which concerns on Example 1 of this invention. It is a figure which shows the example imaging | photography flow of the camera which concerns on Example 1 of this invention. It is a figure which shows the flow of the error process of the camera which concerns on Example 1 of this invention. It is a figure which shows the memory area of EEPROM which memorize | stores error information. It is a figure which shows the memory area of EEPROM which memorize | stores error information. It is a figure which shows the exemplary circuit structure of the camera which concerns on Example 2 of this invention. It is a figure which shows the example imaging | photography flow of the camera which concerns on Example 2 of this invention. It is a figure which shows the flow of the error process of the camera which concerns on Example 2 of this invention. It is a figure which shows the information display part of a camera when all the segments which can be displayed are displayed. It is a figure which shows the camera information display part at the time of normal error generation. It is a figure which shows the camera information display part at the time of the error generation by failure.

Explanation of symbols

101 ROM with built-in microcomputer 101a
101b Built-in RAM
101c Built-in EEPROM
DESCRIPTION OF SYMBOLS 102 Switch group 103 Switch input circuit 104 Photometry circuit 105 Focus detection circuit 106 Feed motor 107 Shutter control circuit 108 Battery check circuit 109 Liquid crystal display circuit 110 Connection connector 111 Lens control circuit 112 Sub power supply 113 Temporary storage memory

Claims (3)

  A detection unit that detects a malfunction during operation; and a storage unit that stores error information corresponding to the malfunction detected by the detection unit and has a storage area corresponding to each error information. An electronic device characterized in that when an operation failure is detected by the detection means, data in a storage area corresponding to error information corresponding to the operation failure is counted.   When an error occurs in an electronic device having a power supply different from the main power supply and a detection means for detecting a malfunction during operation, the error information is stored in the temporary storage area when an error occurs. Electronic equipment characterized by memorization.   In the electronic device according to claim 2, which has an EEPROM operable by a main power supply, in the case of normal operation (when no error is detected), data is read from the data in the temporary storage memory, and if an error has occurred, An electronic device characterized in that error information is transferred from a temporary storage area to an EEPROM.

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