JP2005252105A - Substrate processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate processing apparatus capable of realizing high throughput, by minimizing the effect of film formation times different among lots onto the processing, when conducting parallel operations. <P>SOLUTION: In the substrate processing apparatus, a plurality of processing chambers 202, 137, 139 for applying film-forming processing to substrates, and a plurality of preparation chambers 122, 123 with substrates placed in them are continuously connected to a transfer chamber 103. One of transfer units 111, 112 provided in the transfer chamber applies carrying processing of the substrates in the processing chambers and the preparation chambers. The other transfer unit 121 provided to the outside of the transfer chamber carries the substrate of the processing object into the transfer chamber at a prescribed interval from a plurality of cassettes 100 storing the substrates. One of a plurality of the processing chambers corresponds to one of a plurality of the cassettes, and the other processing chamber corresponds to the other cassette. The film-forming processing applied to the substrate stored in one cassette, and the film-forming processing applied to the substrate stored in the other cassette, are executed in parallel. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a substrate processing apparatus having a plurality of vacuum processing chambers, and more particularly to a substrate processing apparatus that performs scheduling for realizing high throughput when performing parallel operation.

  In a single-wafer type substrate processing apparatus that processes substrates one by one, the substrate to be processed is taken out from the cassette, transported to a vacuum processing chamber (hereinafter referred to as PM (Process Module)), and after film formation there, The process of returning to the cassette through cooling is performed for each of a plurality of substrate units (lots).

  In such a single-wafer substrate processing apparatus, lot processing is not performed for each cassette, such as performing lot processing for one cassette and then processing lots for another cassette in order to improve production efficiency. In some cases, lot processing for other cassettes may be performed in parallel during lot processing for one cassette. In this case, there is no overlap in the transport path, and the residence time of the substrate to be processed in the PM is constant. It is required that the throughput does not decrease. In such a conventional technique, a cassette (hereinafter referred to as FOUP (Front Opening Unified Pod) is referred to as an FOUP (hereinafter referred to as FOUP) based on an event-driven method in which the end of a certain control is used as a trigger in accordance with a substrate (hereinafter referred to as a wafer) processing sequence. In general, the start timing control is performed only for a part of the control such as the timing of taking out the wafer from ()).

  However, the film formation processing time is often different for each PM (or for each lot), and in order to prevent a collision of control such as transport timing on the route, throughput drops more than necessary, or the difference in process time is parallel. There is a problem that the timing is distorted between the operations being performed, and only a part of the substrates in the lot stays abnormally long after the process in PM. Furthermore, in order to avoid this, there is a case where adjustment of the film formation processing time, the waiting time, etc. between the two lots is performed manually, and there is a problem that full automation is hindered.

  The present invention minimizes the influence of film formation times that differ between lots when performing parallel operation, and performs automatic scheduling without human intervention, thereby improving usability and high throughput. An object of the present invention is to provide a substrate processing apparatus that can be realized.

In order to solve the above-described problems, the present invention, for example, in the case of forming a film with a small number of substrates according to different customer specifications, includes the first substrate of the first cassette (for example, the first specification of about 20 sheets), As a method of enabling film formation efficiently (for example, with good throughput) when forming a second substrate of the second cassette (for example, about 20 second specifications), the first substrate in the first cassette is used. A film is formed in a plurality of chambers, and then the second substrate in the second cassette is not put in the plurality of chambers, but is operated in parallel. That is, a plurality of processing chambers for processing a substrate and a plurality of preliminary chambers for placing the substrate are connected to the transfer chamber, and the substrate is provided by another transfer device provided outside the transfer chamber. The substrate to be processed is transferred from a plurality of cassettes in which the substrate is stored to one of the plurality of preliminary chambers at a predetermined interval, and the plurality of processing chambers of the plurality of processing chambers are transferred from the preliminary chamber to the one of the plurality of processing chambers. One of the plurality of cassettes corresponds to one of the plurality of processing chambers, and another cassette corresponds to one of the plurality of cassettes. In the substrate processing apparatus in which the processing chamber is adapted,
A process for a substrate stored in one cassette and a process for a substrate stored in another cassette are performed in parallel.

  In the present invention, the film forming process (customer specifications) can be made different for each cassette, and different film forming processes (specifications) include temperature, pressure, and gas flow rate (film forming gas, impurities). This means that at least one condition of the processing time of gas and inert gas (and carrier gas) is made different.

  As described in detail above, according to the present invention, when performing parallel operation, the influence on the film formation time that differs between lots is minimized, and automatic scheduling is performed without human intervention. In addition, a substrate processing apparatus capable of realizing high throughput can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

<Flow of wafer processing 1 sequence>
FIG. 1 is a plan view showing a configuration of a substrate processing apparatus according to the present embodiment.

In the substrate processing apparatus to which the present invention is applied, the FOUP 100 is used as a carrier for transporting a substrate such as a wafer. In the following description, front, rear, left and right are based on FIG. That is, with respect to the paper surface shown in FIG. 1, the front is below the paper surface, the rear is above the paper surface, and the left and right are the left and right sides of the paper surface.
As shown in FIG. 1, the substrate processing apparatus has a transfer chamber (hereinafter referred to as TM (Transfer Module)) 103 having a load lock chamber structure that can withstand a pressure (negative pressure) less than atmospheric pressure such as a vacuum state. TM103 is provided with first wafer transfer machines 111 and 112 for transferring the wafer 200 under a negative pressure. The first wafer transfer devices 111 and 112 are configured to be moved up and down by the elevator 115 while maintaining the airtightness of the TM 103.

  Load-lock chambers (hereinafter referred to as LM (Loadlock Module)) 122 and 123 are connected to the front-side side walls of the casing 101 through gate valves 244 and 127, respectively. The load lock chamber structure can withstand the load. Furthermore, the LM 122 is provided with a substrate table 140 on which two substrates can be placed, and the LM 123 is provided with a substrate table 141 on which two substrates can be placed. The processed wafer 200 is configured to be cooled (hereinafter referred to as cooling) on any of the substrate platforms.

  At the front side of the LM 122 and the LM 123, an atmospheric transfer mechanism (hereinafter referred to as EFEM (Equipment Front End Module)) 121 used under substantially atmospheric pressure is connected through gate valves 128 and 129. The EFEM 121 is provided with a second wafer transfer machine 124 for transferring the wafer 200. The second wafer transfer device 124 is configured to be moved up and down by an elevator installed in the EFEM 121, and is configured to be reciprocated in the left-right direction by a linear actuator.

  As shown in FIG. 1, a wafer alignment device (hereinafter referred to as AU (Alignment Unit)) 106 is installed on the left side of the EFEM 121.

  As shown in FIG. 1, a housing 125 of the EFEM 121 includes a wafer loading / unloading port 134 for loading / unloading the wafer 200 to / from the EFEM 121, a lid for closing the wafer loading / unloading port, and a FOUP opener. 108 are installed. The FOUP opener (cap opening / closing mechanism) 108 includes a cap of the FOUP 100 placed on the IO stage 105 and a cap opening / closing mechanism that opens and closes a lid that closes the wafer loading / unloading port 134, and is placed on the IO stage 105. The FOUP 100 can be loaded and unloaded by opening and closing the cap of the FOUP 100 and the lid for closing the wafer loading / unloading port 134 by the cap opening / closing mechanism. The FOUP 100 is supplied to and discharged from the IO stage 105 by an in-process transfer device (hereinafter referred to as RGV) (not shown).

  As shown in FIG. 1, a processing furnace PM2 (202), a processing furnace PM3 (137), and a processing furnace PM4 (139) for performing a desired process on the wafer are adjacent to the side wall of the housing 101, respectively. Are connected.

  Hereinafter, a processing process using the substrate processing apparatus having the above-described configuration will be described for one wafer.

  In a state where a maximum of 25 unprocessed wafers 200 are stored in the FOUP 100, the wafer 200 is transferred to the substrate processing apparatus for performing the processing process by the in-process transfer apparatus. As shown in FIG. 1, the transported FOUP 100 is delivered from the in-process transport apparatus and placed on the IO stage 105. The cap for opening and closing the cap and the wafer loading / unloading port 134 of the FOUP 100 is removed by the cap opening / closing mechanism 108, and the wafer loading / unloading port of the FOUP 100 is released.

  When the FOUP 100 is opened by the FOUP opener 108, the second wafer transfer machine 124 installed in the EFEM 121 picks up the wafer 200 from the FOUP 100, conveys it to the AU 106, and performs alignment. Thereafter, the wafer 200 is loaded into the LM 122 or 123 and the wafer 200 is transferred to the substrate table 140 or 141. During the transfer operation, the gate valve 244 on the TM 103 side is closed, and the negative pressure of the TM 103 is maintained. When the transfer of the wafer 200 to the substrate table 140 is completed, the gate valve 128 is closed, and the LM 122 is exhausted to a negative pressure by an exhaust device (not shown).

  When the LM 122 is depressurized to a preset pressure value, the gate valve 244 is opened, and the first wafer transfer device 111 of the TM 103 picks up the wafer 200 from the substrate table 140. The gate valve 244 is closed and loaded into the target PM2 (202), PM3 (137), or PM4 (139). At this time, the gate valve 130 and the like are opened along with the conveyance, and are closed when the conveyance is completed. Then, the processing gas is supplied into PM 2 to 4 (202 or 137 or 139), and a desired process is performed on the wafer 200.

  When the above-described processing is completed at PM2-4 (202, 137, or 139), the processed wafer 200 is unloaded to TM103 by the second wafer transfer device 112 of TM103 (S1).

  Then, the second wafer transfer device 112 loads the wafer 200 unloaded from the processing furnaces PM2 to PM4 (202, 137, or 139) into the LM2 (123), transfers the wafer 200 to the substrate table 141, and then moves to the LM2 (123). Is closed by a gate valve 127 to cool the processed wafer. At this time, the inside of LM2 (123) is returned to approximately atmospheric pressure by the inert gas.

  When a preset cooling time has elapsed in LM2 (123), the gate valve 129 is opened and returned to the original slot of the original FOUP.

  In the substrate processing apparatus shown here, two wafer transfer machines 111 and 112 are provided in the TM 103. However, when a plurality of wafers are continuously processed, the next wafer is first processed in advance in the process of S1. The wafer transfer device 111 is transported, and a processed wafer is taken out from the PM and a next unprocessed wafer is carried in continuously. Hereinafter, this operation is referred to as SWAP conveyance.

  By repeating the above operations, the wafers are sequentially processed.

  In the above-described substrate processing apparatus, the wafer placement tables (two locations each) in the LMs 122 and 123 are prevented from colliding with each other by passing through a route predetermined according to the order of loading of the wafers. Yes. In addition, it has been found that this method increases the throughput as compared to fixing the LM for loading and unloading.

  2 to 5 show the above processing as sequence diagrams. 2 to 4 show a flow of one sequence. In these figures, there are portions where each control represented by a rectangle overlaps vertically, which indicates that the controls are performed simultaneously.

<Fixed schedule method (delay control)>
In FIG. 6, a processing sequence during one lot operation of the substrate processing apparatus to which the present invention is applied will be described.

  In FIG. 6A, the cycle for controlling the schedule is 200 msec. The counter is incremented every cycle, and the control is started when the counter value reaches a target value.

  The conveyance LP → AU is scheduled for 16 seconds. When 16 seconds have passed (control counter = 80), the transfer LP → AU has been completed, and at this time, a process (hereinafter referred to as “Leak process”) in which AU and LM are brought into a substantially atmospheric pressure state is set as a schedule.

  FIG. 6B shows a state in which the transport LP → AU has finished about 1 second beyond the schedule.

FIG. 6C shows details of FIG. 6B.
Before the control counter is incremented from 79 to 80, it is checked whether or not the scheduled transport LP → AU has been completed, but it is not completed here. Therefore, in order to prevent other control from proceeding any more, the increment of the control counter is frozen and the delay counter is incremented instead (S2).

  The process of S2 is repeated every control cycle, and the process waits until the transfer of LP → AU is completed.

  When the completion of the conveyance is confirmed, the control counter is incremented from 79 to 80, thereby starting the leak processing of the alignment unit and the LM that was to be started by the control counter 80.

  Since the control cycle is 200 msec, when a delay occurs, the control cycle is covered. If this is a 1-second cycle, a subtle delay appears in the deviation of the entire schedule, and the tact time is likely to be affected.

  Here, the tact time is a film formation process start time interval for one wafer and a film formation process start time for the next wafer in the same PM. Further, this time is synonymous with an interval for sequentially taking out wafers for the same PM from the FOUP.

  Here, it is assumed that the control counter is not incremented during the delay occurrence, but similar control can be realized by using two or more types of counters, control flags, and the like.

<Processing sequence for 1 lot (1PM) operation>
7 to 10, a processing sequence at the time of one lot operation of the substrate processing apparatus to which the present invention is applied will be described.

  After the # 1 wafer is taken out from the FOUP, the tact time is 3 minutes and 6 seconds, and the # 2 wafer is taken out from the FOUP. This tact time can be obtained by calculation.

  After 4 minutes and 13 seconds from the start of the sequence of # 1, the wafer of # 2 is taken out from the LM. After 4 minutes and 24 seconds, when the # 2 wafer is ready to be loaded into the PM, the SWAP transfer operation is performed upon completion of the process. Further, in order to carry the # 1 wafer paid out at this time into the LM, the LM is decompressed (hereinafter referred to as Evac). After 4 minutes and 45 seconds, the process is started for the # 2 wafer loaded into the PM. The interval between the process start times of # 1 and # 2 is 3 minutes 6 seconds.

  By repeating the above processing, processing for one lot is performed.

<Processing sequence for 2 lot (2PM) parallel operation>
In FIG. 11 to FIG. 14, a processing sequence at the time of two-lot parallel operation of the substrate processing apparatus to which the present invention is applied will be described.

  It is assumed that operation A and operation B are instructed to start operation with no significant time difference.

Operation A- # 1 After the wafer is taken out of the FOUP, the wafer of operation B- # 1 is taken out of the FOUP after 1 minute 2 seconds, which is the batch interval. This time is a time interval at which the operation B is started with respect to the reference operation A. This batch interval is obtained by calculation, and here, it is assumed that batch interval = tact time ÷ 3.
Here, the batch interval is a start time interval between a wafer film forming process in one PM and a wafer film forming process in another PM. This time is synonymous with the interval at which wafers for these different PMs are taken out from the respective FOUPs.

  Four minutes and eight seconds after the start, the wafer in operation B # 2 is taken out of the FOUP.

  After 5 minutes and 11 seconds from the start, the wafer in operation B # 2 is taken out of the LM and is transferred to SWAP with operation B # 1. This operation is performed after the SWAP operations of # 1 and # 2 of operation A are completed. There is no interference. Each wafer of operation B is scheduled so that there is no collision on the route and control with each wafer of operation A.

  Operation A- # 1 is completed up to the wafer cooling and is carried to return to LP. At this time, the wafer in operation B- # 3 is loaded into the same location of the LM so as to be replaced. This is executed by the EFEM-side atmospheric transfer port bot.

Generally, schedule calculation is performed such that tact time = batch interval × n, but the optimum n is determined by the number of PMs, process time, transport time, and the like.
In the case of the exemplified sequence, it is possible to make n = 3.

In FIG. 15, the subsequent start timing when n = 3 will be described.
Here, in order to simplify the explanation, the subsequent operation start timing in the case of batch interval = tact time ÷ 3 is described, where tact time = 3 minutes and batch interval = 1 minute. The late start operation designation is optional, but here it is assumed that the late start operation instruction has been given before the start side # 2 starts.

  FIG. 15A shows the start of the starting side # 1 wafer processing. FIG. 4B shows the start timing when the start of the start side is designated within 60 seconds after the start of the start side # 1 wafer processing. FIG. 4C shows the start timing when the start of the subsequent side is designated within 60 seconds to 120 seconds after the start of the start side # 1 wafer processing. FIG. 4D shows the start timing of the starting side # 2 (S2). As shown in FIG. 5E, the start time after 240 seconds after the start of the start side # 1 wafer processing does not overlap with the start side of S2, so the start time is 240 seconds later.

Here, the driving start timing on the later side is different between n = 3 and n = 2, but which is better is verified.
In the case of FIG. 15, if the tact interval is 3 minutes (180 seconds), the batch interval is 60 seconds, and (60 × 1/3) + (120 × 1/3) + (240 × 1/3) = 140 ( 16 (a), and it is understood from FIG. 16 (a) that the average driving start delay time on the late side is 140 seconds.

  FIG. 16 (b) assumes the case where n = 2 under the same conditions. When the tact interval is 3 minutes (180 seconds), the batch interval is 90 seconds and (90 × 1/2) + ( 270 × 1/2) = 180 (seconds), and the average operation start delay time is 180 seconds.

  In the sequence of n = 3, the FOUP turnaround time is improved as compared with the case of n = 2.

FIG. 15 shows that in the sequence of n = 3, there are two subsequent operation start timings for one batch sequence of the starting operation.
The later operation start timing is performed at an arbitrary timing. For this reason, it is natural that the appropriate batch start timing is automatically detected based on the later designated timing.

<2 lot (2PM) parallel operation: Processing sequence when process time is different>
17 to 24, a processing sequence at the time of two lot operation where the process time of the substrate processing apparatus to which the present invention is applied is different will be described.
17 to 20, the parallel operation sequence in the case of the advance operation side, that is, (the advance operation process time <the subsequent operation process time) will be described.

  The starting operation process time is 2 minutes and 45 seconds (scheduled at the starting time of 2 minutes and 45 seconds), and the process time on the schedule is unified thereafter. The process time on the late operation side is 3 minutes, and the difference of 15 seconds from the previous operation is delayed to put the entire schedule in a wait state.

  Since the process time of the subsequent operation B- # 1 is not completed even after 2 minutes and 45 seconds, the delay state is entered and the schedule control enters the hold state. At this time, the carrying operation or the like being executed is not temporarily stopped.

  After the process time of operation B- # 1 has elapsed for 3 minutes (after 15 seconds from the start of delay), the process ends and schedule control is resumed.

  During the process delay of operation B- # 1, the process of operation A- # 2 remains in execution. However, since the entire schedule is delayed, the scheduled transfer operation has not started in advance. The 15 seconds that have not started in advance appear as residence time in PM.

  The payout from the LM for operation A- # 1 and the delivery to the LM for operation B- # 3 are just in time. The timing is maintained by delaying the entire schedule.

The process of late operation B- # 2 is delayed. Similarly, the timing is maintained by delaying the entire schedule.
Similarly, the timing is maintained in the delay detection schedule hold state thereafter.

  21 to 24, the case of the first driving side, that is, (first driving process time> second driving operation time) will be described.

  The starting operation process time is 2 minutes and 45 seconds (scheduled at the starting time of 2 minutes and 45 seconds), and the process time on the schedule is unified thereafter. The process time on the late operation side is 2 minutes 30 seconds, and the difference of 15 seconds from the previous operation does not affect the entire schedule as PM retention.

  The process time for the late operation is 2 minutes 30 seconds. The entire schedule control is maintained by retaining the difference of -15 seconds from the starter in the PM after the process.

Although the process time of the subsequent operation B- # 1 ended after 2 minutes and 30 seconds, the preparation operation for payout has not been completed yet. Wait 15 seconds. Thereafter, payout (SWAP operation) is performed at a timing of 2 minutes 45 seconds.
This stagnation does not affect the entire schedule.

  Thereafter, every time the process of operation B is performed, a stay of 15 seconds occurs, but the schedule is not affected.

It is a top view which shows the structure of the substrate processing apparatus by this Embodiment. FIG. 6 is a first diagram illustrating a wafer loading / unloading sequence. FIG. 10 is a second diagram illustrating a wafer loading / unloading sequence. FIG. 10 is a third diagram illustrating a wafer loading / unloading sequence. It is a table showing the time required for each process. It is a figure explaining the processing sequence at the time of 1 lot operation | movement of the substrate processing apparatus to which this invention is applied. It is a figure (the 1) which shows the processing sequence of 1 lot (1PM) driving | operation. It is a figure (the 2) which shows the processing sequence of 1 lot (1PM) driving | operation. It is FIG. (The 3) which shows the processing sequence of 1 lot (1PM) driving | operation. It is FIG. (The 4) which shows the processing sequence of 1 lot (1PM) driving | operation. It is a figure (the 1) which shows the basic sequence of parallel operation. It is FIG. (2) which shows the basic sequence of parallel operation. It is FIG. (The 3) which shows the basic sequence of parallel operation. It is FIG. (4) which shows the basic sequence of parallel operation. It is a figure which shows the subsequent operation start timing in case batch interval is 1/3 of tact time. It is a figure which shows a late operation timing comparison in the comparison with the case where the case where a batch space | interval is 1/3 of tact time is 1/2. It is a figure (the 1) which shows a parallel operation sequence in case of prior operation process time <late operation process time. FIG. 10 is a diagram (No. 2) illustrating a parallel operation sequence in a case where the starting operation process time <the subsequent operation process time. FIG. 11 is a diagram (No. 3) illustrating the parallel operation sequence in the case of the starting operation process time <the subsequent operation process time. FIG. 11 is a diagram (No. 4) illustrating a parallel operation sequence in a case where the starting operation process time <the subsequent operation process time; It is a figure (the 1) which shows a parallel operation sequence in case of prior operation process time> late operation process time. FIG. 10 is a diagram (part 2) illustrating a parallel operation sequence in a case where the starting operation process time> the subsequent operation process time. FIG. 11 is a diagram (No. 3) illustrating a parallel operation sequence in a case where the starting operation process time> the subsequent operation process time. FIG. 14 is a diagram (No. 4) illustrating a parallel operation sequence in a case where the starting operation process time> the subsequent operation process time.

Explanation of symbols

  100 FOUP, 101 housing, 103 TM, 105 IO stage, 106 AU, 108 FOUP opener, 112, 112 Wafer transfer machine, 121 EFEM, 122, 123 LM, 134 Wafer loading / unloading port, 137, 139, 202 PM, 140, 141 Substrate table, 200 wafers.

Claims (1)

A plurality of processing chambers for processing a substrate and a plurality of spare chambers for placing the substrate are connected to the transfer chamber, and the substrate is stored by another transfer device provided outside the transfer chamber. The substrate to be processed is transferred from one of the plurality of cassettes to one of the plurality of preliminary chambers at a fixed interval, and one of the plurality of processing chambers is transferred from the preliminary chamber to the one of the plurality of processing chambers by one transfer device provided in the transfer chamber. The one processing chamber corresponds to one of the plurality of cassettes, and another processing is performed for the other cassette. In the substrate processing apparatus in which the chamber is adapted,
A substrate processing apparatus for performing processing on a substrate stored in one cassette and processing on a substrate stored in another cassette in parallel.

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