JP2005244546A - Crystal oscillation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of the conventional crystal oscillation circuit wherein the circuit cannot obtain stable oscillation characteristics due to delays in the oscillation start and a deviation in an operating point at steady-state oscillation, since a DC bias is automatically set to a reference level, in the conventional crystal oscillation circuits including a resonance section and an amplifier section, wherein a reference current source applies constant current bias to a first MOSFET configuring the amplifier section, a second MOSFET is self-biased, and an oscillation amplitude is given to both the MOSFETs in terms of AC. <P>SOLUTION: The DC bias of the crystal oscillation circuit disclosed herein can be optimally set by controlling the base level of the second MOSFET to an optional level by a base level control means. Thus, the oscillation start-up performance of the crystal oscillation circuit is improved and the stability and the reliability at the steady-state oscillation are improved. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a configuration of a crystal oscillation circuit that excites a resonance unit having an oscillation capacitor and a crystal resonator in an amplification unit composed of a complementary field effect transistor (referred to as CMOSFET).

  A configuration and operation of a crystal oscillation circuit generally used in an electronic timepiece will be described with reference to FIG. 9 is a crystal oscillation circuit, 10 is a resonance unit, 11 is a first oscillation capacitor, 12 is a second oscillation capacitor, 13 is a crystal resonator, 21 is a first MOSFET, 22 is a second MOSFET, and 23 is feedback. Resistor, 120 is an amplifying unit, 123a is an input terminal, 123b is an output terminal, 130 is an oscillation circuit, 90 is a constant voltage means, 91 is a reference potential, 92 is a regulated voltage, and 93 is a power supply voltage.

The crystal oscillation circuit 9 shown in FIG. 8 includes an oscillation circuit 130 having an amplification unit 120 and a resonance unit 10 and constant voltage means 90.
The crystal oscillation circuit 9 uses a constant voltage means 90 to step down the power supply voltage 93 such as a battery to the regulated voltage 92 and uses it as a power supply.

The resonance unit 10 includes a first oscillation capacitor 11, a second oscillation capacitor 12, and a crystal resonator 13, and the resonance frequency is adjusted to be 32.768 kHz.
The amplifying unit 120 includes a first MOSFET 21, a second MOSFET 22, and a feedback resistor 23. The first MOSFET 21 and the second MOSFET 22 constitute a CMOSFET, and the feedback resistor 23 is connected between the input and output. Yes.
Oscillation is continued by amplifying the mechanical vibration attenuation amount of the crystal unit 13 by the amplification unit 120 and applying positive feedback between the resonance unit 10 and the amplification unit 120.

A silver battery or a lithium ion battery having a voltage range of about 1.2 V to 3.0 V is used as a power source for a portable device such as a wristwatch.
In particular, since the driving power is kept as small as possible, the battery life is extended, the environmental destruction is reduced by discarding the battery, and the battery replacement frequency is reduced for the user, the oscillation circuit 130 and the frequency divider circuit connected to the subsequent stage (illustrated) A constant voltage means 90 that steps down the voltage of the battery voltage from the battery voltage to reduce the driving power.
The constant voltage means 90 generates a regulated voltage 92 from the reference potential 91 and the power supply voltage 93.

  However, when driving from a state where the electronic timepiece is completely stopped, or when a state where the electronic timepiece is temporarily stopped due to some disturbance from the normal driving state occurs, the constant voltage means 90 should be driven from the initial stage of oscillation start. Then, it takes time to start oscillation or a phenomenon that oscillation does not start occurs.

This is because the feedback resistor 23, which is a high resistance, is connected between the input terminal 123 a and the output terminal 123 b of the amplifying unit 120, so that the DC bias of the amplifying unit 120 is always ½ of the power supply voltage 93. Determined.
Therefore, the operation cannot be performed unless a voltage about twice the threshold voltage of the first MOSFET 21 and the second MOSFET 22 constituting the amplifying unit 120 is supplied as the power source of the oscillation circuit 130.
This means that the MOSFET operates in a linear region or a saturation region, where the power supply voltage is higher than the threshold voltage, as an operating characteristic of the MOSFET.

The amplification factor of the signal by the amplifying unit 120 is maximized in the vicinity of the operating state where the first MOSFET 21 and the second MOSFET 22 are complementarily switched from high level to low level and from low level to high level. In the saturation region, which is the operating region, the amplification factor increases in proportion to the power supply voltage.
The operation state in which the first MOSFET 21 and the second MOSFET 22 are complementarily switched is called a DC bias point.
That is, the phenomenon that it takes time to start oscillation or does not oscillate at the initial stage of oscillation start of the oscillation circuit 130 is due to the fact that the amplification factors of the first MOSFET 21 and the second MOSFET 22 are small.

Therefore, when the oscillation of the oscillation circuit 130 is stopped, a means for increasing the amplification factors of the first MOSFET 21 and the second MOSFET 22 may be taken.
This detects the oscillation and non-oscillation of the oscillation circuit 130. When the oscillation is stopped, the circuit is operated with the power supply voltage 93. When the oscillation is steadily oscillating, the power supply voltage is suppressed to reduce power consumption. The voltage is lowered from 93 to the regulated voltage 92 by the constant voltage means 90 to drive the circuit.

  However, in the oscillation circuit 130 shown in FIG. 8, the DC bias point is determined to be ½ of the power supply voltage 93 as described above. Therefore, in order to obtain a stable oscillation operation, the power supply voltage 93 applied to the oscillation circuit 130. Cannot be set below the threshold voltage of the first MOSFET 21 and the second MOSFET 22. Therefore, there is a limit in causing the oscillation circuit 130 to oscillate with low power driving.

Further, when the oscillation circuit 130 is set to the power supply voltage at the time of oscillation start and is stepped down to the regulated voltage 92 by the constant voltage means 90 at the time of steady oscillation, the response to the frequency of the constant voltage means 90 at the time of voltage drop from the oscillation start to the steady oscillation. The regulation voltage 92 fluctuates due to lack of stability, causing problems such as oscillation being stopped or oscillation being unstable.
In order to improve the frequency response of the constant voltage means 90, the drive current of the constant voltage means 90 may be increased to improve the frequency characteristics. However, this increases the current consumption of the entire crystal oscillation circuit 9. It is disadvantageous for low power drive.
This power supply variation becomes more noticeable as the voltage difference between the power supply voltage 93 and the regulated voltage 92 is larger.
In general, PMOSFETs and NMOSFETs constituting an integrated circuit have a processing dimension error due to ambient temperature and manufacturing fluctuations, and the characteristics of the regulation voltage 92 and the amplification unit 120 fluctuate, so that stable oscillation characteristics can be obtained. Can not.

  As an example for solving this problem, there is an oscillation circuit invented by the author first (for example, see Patent Document 1).

  The conventional technique shown in Patent Document 1 will be described with reference to FIG. 8 is a crystal oscillation circuit, 10 is a resonance unit, 11 is a first oscillation capacitor, 12 is a second oscillation capacitor, 13 is a crystal resonator, 20 is an amplification unit, 21 is a first MOSFET, and 22 is a second oscillation capacitor. MOSFET, 23a is an input terminal, 23b is an output terminal, 24 is a first bias resistor, 25 is a second bias resistor, 26 is a first coupling capacitor, 27 is a second coupling capacitor, and 30 is an oscillation circuit , 41 is a control PMOSFET, 42 is a first reference resistor, 43 is a second reference resistor, 43a is a connection point, 44 is a reference current control means, 45 is a PMOSFET, 46 is an NMOSFET, 47 is a PMOSFET, and 48 is NMOSFET, 49 is the first column, 50 is the second column, 50a is the output, 51 is the reference current source, 52 is the reference current generating means, 60 is the control signal generating means, 91 is the reference potential, 93 The power supply is a voltage.

The crystal oscillation circuit 8 includes a reference current source 51, an oscillation circuit 30, and a control signal generating means 60.
The feature of this circuit is that the DC bias can be determined regardless of the power supply voltage, so that it can be operated at a lower voltage than the conventional crystal oscillation circuit 9 shown in FIG.
In the conventional crystal oscillation circuit 9 shown in FIG. 8, the power supply voltage 93 is required to be about twice the threshold voltage of the MOSFET constituting the amplification unit 120, whereas in the conventional technique shown in Patent Document 1 This technique can oscillate even if it is not more than twice the threshold voltage. This is because it is possible to oscillate in an operation region called a subthreshold region in the operation region in the gate voltage region below the threshold voltage.
The amplification factor in the subthreshold region of the MOSFET increases in proportion to only the current flowing through the MOSFET, regardless of the power supply voltage and the size of the MOSFET, similarly to the characteristics of the bipolar transistor.
The conventional technique shown in Patent Document 1 utilizes the characteristics and adopts a method of shortening the oscillation start time at the initial stage of oscillation and lowering the driving power at the time of steady oscillation.

That is, the state of the output terminal 23b of the oscillation circuit 30 is detected by the control signal generator 60, and a signal corresponding to the result is output to vary the current flowing through the reference current source 51.
The voltage of the output 50a of the reference current source 51 is changed by the current flowing through the reference current source 51, and the gate voltage of the first MOSFET 21 of the oscillation circuit 30 is changed.
When the gate voltage of the first MOSFET 21 changes, the current flowing through the first MOSFET 21 changes, so that the amplification factor in the subthreshold region can be changed.

When the control signal generating means 60 receives the oscillation stop signal from the output terminal 23b of the oscillation circuit 30, the control signal generating means 60 outputs a low level signal to turn on the PMOSFET 41 for controlling the reference current source 51. .
At this time, the first reference resistor 42 is set to a low resistance of about one digit compared to the second reference resistor 43. Since the control PMOSFET 41 is on, the combined resistance of the first reference resistor 42 and the second reference resistor 43 is substantially determined by the first reference resistor 42.
When the value of the reference resistance decreases, the current flowing through the reference current source 51 increases, and the voltage of the output 50a of the reference current source 51 outputs a voltage closer to the power supply voltage 93, and is supplied to the first MOSFET 21 of the amplifying unit 20. Increase the flowing current.
That is, when the oscillation is stopped, the amplification factor of the oscillation circuit 30 increases.

When the oscillation amplitude gradually increases and the control signal generating means 60 detects an oscillation signal from the output terminal 23b of the oscillation circuit 30, the output of the control signal generating means 60 outputs a high level, and the control of the reference current source 51 is controlled. The PMOSFET 41 is turned off.
When the control PMOSFET 41 is turned off, the off-resistance of the control PMOSFET 41 becomes infinite, and the combined resistance with the second reference resistor 43 is almost determined by the second reference resistor 43.
The second reference resistor 43 is set so that a current necessary for oscillation at least flows through the first MOSFET 21.
When the current flowing through the reference current source 51 decreases, the voltage of the output 50a is shifted to the reference potential 91 side compared to when the oscillation is stopped, and the current flowing through the first MOSFET 21 is decreased.
That is, the amplification factor of the first MOSFET 21 is reduced.

As described above, in the conventional technique shown in Patent Document 1, a DC bias can be set independently of the power supply voltage, and the crystal oscillation circuit is configured to operate in the sub-threshold region of the MOSFET.
Since the amplification factor in the subthreshold region is proportional only to the current flowing through the MOSFET, the amplification factor is varied by detecting the oscillation stop state and the oscillation state.
The crystal oscillation circuit having such a configuration is one method for realizing stable oscillation startability and steady oscillation.

In the conventional crystal oscillation circuit 8 shown in Patent Document 1, the current flowing through the first MOSFET 21 is determined by the reference current source 51, and the gate voltage of the second MOSFET 22 is determined automatically according to the current. It has become.
That is, the point at which the diode characteristic of the second MOSFET 22 connected between the gate and the drain by the second bias resistor 25 intersects the constant current flowing through the first MOSFET 21 is the DC bias of this oscillation circuit. Is a point.
The point of the direct current bias is a pinch-off point that shifts from the linear region of the first MOSFET 21 to the saturation region.
In terms of DC bias controllability, if only the current flowing through the first MOSFET 21 is determined, the gate voltage of the second MOSFET 22 is also determined, so that the configuration is very stable.

JP 2002-359524 A (page 3-5, FIG. 1)

However, at the time of steady oscillation, the first MOSFET 21 and the second MOSFET 22 have the same amplification factor, and the DC bias is set in the vicinity of ½ of the power supply voltage to enable more stable oscillation.
The amplification factor of the inverter is the average value of the PMOSFET and NMOSFET, and the fact that the DC bias is biased to the reference potential or the power supply potential means that the balance of the amplification factors of the MOSFETs is lost. Yes.

  The problems to be solved are that the oscillation characteristics deteriorate due to the influence of some disturbance due to the unbalanced DC bias, and the characteristics of the MOSFETs constituting the amplification part of the oscillation circuit cannot be maximized. This is the point.

  In order to solve the above problems, the present invention adopts the following configuration.

A resonance unit and an amplification unit, and the amplification unit includes a first MOSFET and a second MOSFET, the first MOSFET is constant-current biased by a reference current source, and the second MOSFET is self-biased, In a crystal oscillation circuit that inputs oscillation amplitude to both MOSFETs in an alternating current manner,
The substrate potential of the second MOSFET is controlled to an arbitrary potential by the substrate potential control means.

  The substrate potential control means is an arbitrary voltage generation circuit.

  The arbitrary voltage generation circuit includes a resistance unit that divides a potential between a reference potential and a power supply potential by an arbitrary resistance ratio.

  The arbitrary voltage generation circuit is a constant voltage generation circuit having a band gap reference type constant voltage source, a differential amplifier circuit, and an actuator.

  The substrate potential control means controls the threshold voltage of the second MOSFET to be higher than the design value.

  The substrate potential control means controls the DC bias of the second MOSFET to a half potential between the reference potential and the power supply potential.

The crystal oscillation circuit of the present invention controls the substrate potential of the second MOSFET constituting the amplification unit of the oscillation circuit to an arbitrary potential using the substrate potential control means. With such a configuration, the DC bias can be set independently of the power supply voltage without deteriorating the characteristics of the MOSFET.
The crystal oscillation circuit of the present invention has an advantage that the DC bias can be set so that the oscillation start time is the fastest and steady oscillation is stabilized. In addition, from the initial stage of oscillation to steady oscillation, by setting the DC bias at an appropriate position, the amplification factor of the PMOSFET and NMOSFET constituting the oscillation circuit can be balanced, resulting in high stability and excellent reliability. In addition to providing excellent oscillation characteristics, the present invention has an unprecedented excellent effect of having an extremely low voltage operation.

Hereinafter, the configuration of a crystal oscillation circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a crystal oscillation circuit according to the present invention.
8 is a crystal oscillation circuit, 10 is a resonance unit, 11 is a first oscillation capacitor, 12 is a second oscillation capacitor, 13 is a crystal resonator, 20 is an amplification unit, 21 is a first MOSFET, and 22 is a second oscillation capacitor. MOSFET, 23a is an input terminal, 23b is an output terminal, 24 is a first bias resistor, 25 is a second bias resistor, 26 is a first coupling capacitor, 27 is a second coupling capacitor, and 30 is an oscillation circuit 43 is a reference resistor, 43a is a connection point, 45 is a PMOSFET, 46 is an NMOSFET, 47 is a PMOSFET, 48 is an NMOSFET, 49 is a first column, 50 is a second column, 50a is an output, 51 is a reference current source , 52 is a reference voltage generating means, 90 is a constant voltage means, 91 is a reference potential, 93 is a power supply potential, and 101 is a reference potential control means.

The crystal oscillation circuit shown in FIG. 1 includes a reference current source 51, an oscillation circuit 30, a constant voltage means 90, and a substrate potential control means 101.
The constant voltage means 90 is for stepping down the voltage of the power supply voltage 93 such as a battery as all driving power supplies, and the reference current source 51 and the oscillation circuit 30 operate using the output of the constant voltage means 90 as a power supply. .
In general, in a portable terminal device such as a wristwatch, circuit blocks other than a circuit block that does not operate unless the battery voltage or the like is directly used as a power source are used by reducing the battery voltage or the like in order to reduce power consumption.

The reference current source 51 is a band gap reference type constant voltage circuit, and determines the current flowing through the first MOSFET 21 of the oscillation circuit 30. The voltage corresponding to the output voltage of the reference current source 51 is the first MOSFET 21. Is applied as a gate voltage.
When the reference current source 51 is in steady operation, the output point 50a always outputs a constant voltage.

If the output point 50 a of the reference current source 51 outputs a constant voltage, the voltage is the gate voltage of the first MOSFET 21, so that a constant current flows through the first MOSFET 21.
The current flowing through the first MOSFET 21 is determined by the size ratio W / L of both MOSFETs and the current flowing through the PMOSFET 47 because the first MOSFET 21 and the PMOSFET 47 are current mirror connected.
The gate voltage of the second MOSFET 22 is automatically determined when the current flowing through the first MOSFET 21 is determined.
As described in the conventional technique shown in Patent Document 1, when a constant current is passed through the first MOSFET 21 and the second MOSFET 22 is self-biased, the DC bias is equal to the constant current characteristic of the first MOSFET 21 and the second current. It is determined at the point where the diode characteristic of the MOSFET 22 intersects.

  The feature of the present invention is that the substrate potential of the second MOSFET 22 is controlled by the substrate potential control means 101, and the DC bias of the oscillation circuit 30 can be set freely.

Next, an embodiment in which the substrate potential control means 101 is a circuit that generates an arbitrary voltage will be described with reference to FIG. FIG. 2 is a diagram showing a configuration of the crystal oscillation circuit 8 according to the first embodiment of the present invention.
Reference numeral 94 denotes a first constant voltage generation circuit, and reference numeral 102 denotes an arbitrary voltage generation circuit. Reference numerals 102 a and 102 b denote resistors constituting the arbitrary voltage generation circuit 102. Note that the crystal oscillation circuit 8, the reference current source 51, the oscillation circuit 30, the elements constituting them, the reference potential 91, and the power supply voltage 93 are the same as in FIG. Omitted.
The crystal oscillation circuit 8 shown in FIG. 2 includes a reference current source 51, an oscillation circuit 30, a first constant voltage generation circuit 94, and an arbitrary voltage generation circuit 102.
Here, a case where a resistor is used as the arbitrary voltage generation circuit 102 will be described. In addition, since the combination of the conductivity type of the MOSFET, the positive / negative of the power supply voltage, the conductivity type of the silicon crystal substrate for manufacturing the circuit, etc. is not uniquely determined, the following conditions will be described.
The first MOSFET is a PMOSFET, and the second MOSFET is an NMOSFET. The reference potential is 0 V and the power supply potential is a negative voltage. The circuit is fabricated on an N-type conductivity type silicon crystal substrate.

[Description of Reference Current Source 51]
First, the configuration of the reference current source 51 will be described. The reference current source 51 includes a reference resistor 43 and a reference current generating unit 52.

The reference resistor 43 is connected between the reference potential 91 and the connection point 43a. The reference current generating means 52 includes a first column 49 and a second column 50.
The first column 49 is composed of a PMOSFET 45 and an NMOSFET 46, and the second column 50 is composed of a PMOSFET 47 and an NMOSFET 48.
The first column 49 and the second column 50 are positioned so that the PMOSFET 45 and the PMOSFET 47 and the NMOSFET 46 and the NMOSFET 48 face each other.
Each of the PMOSFET 47 and the NMOSFET 46 has a so-called diode connection in which the gate and the drain are connected.
The source of the PMOSFET 45 is connected to the reference resistor 43 through the connection point 43a, and the source of the PMOSFET 47 is connected to the reference potential 91.
The source of the NMOSFET 46 and the source of the NMOSFET 48 are connected to the output of the first low voltage generation circuit 94.

This reference current source 51 is a generally known band gap reference type constant voltage circuit, and changes the current flowing through the reference current source 51 by the reference resistor 43 to determine the voltage of the output terminal 50a.
The output voltage of the reference current source 51 becomes the gate voltage of the first MOSFET 21 of the oscillation circuit 30 and determines the current flowing through the first MOSFET 21.
This is a constant current bias, and a constant current is always constant regardless of the power supply voltage applied to the oscillation circuit 30 (here, the voltage stepped down from the power supply voltage 93 by the first constant voltage generation circuit 94). It flows in.

[Description of Oscillation Circuit 30]
Next, the configuration of the oscillation circuit 30 shown in FIG. 2 will be described. The oscillation circuit 30 includes a resonance unit 10 and an amplification unit 20. The resonance unit 10 includes a first oscillation capacitor 11, a second oscillation capacitor 12, and a crystal resonator 13.
The first oscillation capacitor 11 is connected between the reference potential 91 and the input terminal 23 a of the amplifier unit 20, and the second oscillation capacitor 12 is connected between the reference potential 91 and the output terminal 23 b of the amplifier unit 20.
The crystal resonator 13 is connected between the input terminal 23a and the output terminal 23b of the amplification unit 20.

  The amplifying unit 20 includes a first MOSFET 21, a second MOSFET 22, a first bias resistor 24, a second bias resistor 25, a first coupling capacitor 26, and a second coupling that operate complementarily to an input signal. It consists of a capacitor 27.

The first bias resistor 24 and the second bias resistor 25 have a resistance value of several hundred MΩ in consideration of the temperature coefficient of the resistor and manufacturing variation so that the AC signal of the oscillation circuit 30 is not fed back to the reference current source 51. To do.
The first coupling capacitor 26 and the second coupling capacitor 27 are for transmitting an alternating current component generated by the oscillation circuit 30 to the gates of the first MOSFET 21 and the second MOSFET 22. From the pressure ratio, the capacitance value is set to 10 times or more the gate capacitance of the first MOSFET 21 and the second MOSFET 22. For example, if the gate capacitance is 1 pF, the first coupling capacitance 26 and the second coupling capacitance 27 are set to 10 pF.

One terminal of the first coupling capacitor 26 and the second coupling capacitor 27 is connected to the input terminal 23 a of the amplifier 20, and the other terminal of the first coupling capacitor 26 is connected to the gate of the first MOSFET 21. The other terminal of the second coupling capacitor 27 is connected to the gate of the second MOSFET 22.
The first coupling capacitor 26 and the second coupling capacitor 27 reduce the DC bias fluctuation of the input terminal 23a that occurs when the input terminal 23a of the amplifying unit 20 leaks current due to humidity or the like. Can do.

The first bias resistor 24 is connected between the output terminal 50 a of the reference current source 51 and the gate of the first MOSFET 21, and the second bias resistor 25 is connected to the output terminal 23 b of the amplifier 20 and the second MOSFET 22. Connect between the gate.
As a result, the first MOSFET 21 is constant-current biased by the reference current source 51 via the first bias resistor 24, and the second MOSFET 22 provides a voltage negative feedback in a DC manner by the second bias resistor 25. Thus, self-bias is performed according to the result of biasing by the first MOSFET 21.

  The voltage output from the first constant voltage generation circuit 94 is applied to the power supply of the oscillation circuit according to the first embodiment of the present invention.

[Description of Arbitrary Voltage Generation Circuit 102]
Next, the arbitrary voltage generation circuit 102 for determining the substrate potential of the NMOSFET 22 constituting the amplifying unit 20 will be described.
The arbitrary voltage generating circuit 102 has resistors 102 a and 102 b connected in series between a reference potential 91 and a power supply voltage 94.
This resistance is divided by an arbitrary division ratio, and the division point is connected to the substrate potential terminal of the second MOSFET 22.

Here, it is assumed that the power supply voltage 93 is −1.2V and is stepped down from −1.2V to −0.5V by the first constant voltage generation circuit 94. At this time, −0.5 V is applied to the reference current source 51 and the oscillation circuit 30.
A voltage of about −0.15 V is applied to the gate of the second MOSFET 22, which is self-biased when −0.3 V is applied to the gate of the first MOSFET 21 by the voltage output from the reference current source 51. Is done.
The direct current bias at this time is a point where the constant current characteristic of the first MOSFET 21 and the diode characteristic of the second MOSFET 22 intersect, that is, a pinch-off point at which the linear region of the first MOSFET 21 shifts to the saturation region.
Even if the current flowing through the first MOSFET 21 is increased, the point that intersects the diode characteristics of the second MOSFET 22 is the pinch-off point of the first MOSFET 21.
As described above, the DC bias point is automatically determined by determining the current flowing through the first MOSFET 21. Since this point is the pinch-off point of the first MOSFET 21, the reference potential 91 with respect to the power supply voltage 93 is determined. You can see that it is biased to the side.
In other words, it can be said that the operating point of the oscillation circuit is set at a very unbalanced position.

In order to set this DC bias to a well-balanced position as the operating point of the oscillation circuit, it is an important point of the present invention to shift the substrate potential of the second MOSFET 22 to the power supply potential side.
In order to shift the current characteristics of the second MOSFET 22 toward the power supply potential, the absolute value of the threshold voltage of the second MOSFET 22 is made higher than the design value.
In the case of this embodiment, in order to increase the threshold voltage of the second MOSFET 22, a reverse bias may be applied to the substrate electrode of the second MOSFET 22.

In the first embodiment of the present invention, the reference potential is 0V, and the voltage applied to the oscillation circuit is −0.5V. In addition, the crystal oscillation circuit 8 uses an N-type conductive silicon substrate, and is an area of a reverse conductivity type with respect to the silicon substrate, that is, a P-type well type for electrical isolation from the silicon substrate. Is making. That is, the substrate electrode of the second MOSFET 22 is formed in a P-type conductivity type well.
In this case, the threshold voltage viewed from the gate side is increased by biasing the substrate electrode of the second MOSFET 22 with a voltage lower than the voltage applied to the oscillation circuit 30.

As apparent from the above description, in order to bias the bias applied to the substrate electrode of the second MOSFET 22 in the reverse direction to the voltage applied to the oscillation circuit 30, the reference potential 91 and the power supply voltage 93 are A resistor is connected, the resistors 102a and 102b are divided by an arbitrary division ratio, and the dividing point is connected to the substrate electrode of the second MOSFET 22.
By dividing the resistor by an arbitrary division ratio, the threshold voltage of the second MOSFET 22 can be controlled in any way.

Next, a change in oscillation start time when the DC bias of the oscillation circuit 30 is shifted from the reference potential 91 side to the power supply voltage 93 side will be described. FIG. 3 is a circuit diagram showing a measurement circuit when this measurement is performed.
110 is a first external power supply, and 111 is a second external power supply. Since the resonating unit 10 and the amplifying unit 20 constituting the oscillation circuit 30 and the components thereof, the reference potential 91, and the power supply potential 93 are the same as those described above, the description thereof is omitted.
The first external power supply 110 is applied to the gate of the first MOSFET 21 via the first bias resistor 24.
The second external power supply can apply a voltage lower than the power supply voltage 93 to the substrate electrode of the second MOSFET 22.
The reference potential 91 was 0V and the power supply voltage 93 was -0.5V.
A voltage of −0.3 V is applied to the gate of the first MOSFET 21 by the first external power supply 110. At that time, the source and substrate electrodes of the first MOSFET 21 are set to a reference potential 93 of 0V.
The substrate electrode of the second MOSFET 22 is reverse-biased to a P-type conductivity type well that is electrically isolated by the second external power supply 111.

  With such a measurement circuit, the change of the threshold voltage with respect to the substrate potential of the second MOSFET 22 is connected to the resonance unit 10 including the first oscillation capacitor 11, the second oscillation capacitor 12, and the crystal resonator 13. The oscillation start time was measured.

First, FIG. 4 shows a change in threshold voltage as viewed from the gate with respect to the substrate bias of the second MOSFET 22.
The horizontal axis of FIG. 4 represents a voltage difference between the voltage applied to the oscillation circuit 30 and the substrate bias of the second MOSFET 22. The vertical axis in FIG. 4 represents the threshold voltage as viewed from the gate of the second MOSFET 22, and indicates that the threshold voltage increases as it approaches the lower side of the figure.
As shown in FIG. 4, it can be seen that as the substrate bias of the second MOSFET 22 is increased, the threshold voltage as viewed from the gate increases.
In this case, increasing the substrate bias means applying a reverse bias to the P-type conductivity well in which the second MOSFET 22 is formed.

Next, FIG. 5 shows the relationship between the substrate bias of the second MOSFET 22 and the oscillation start-up time when the resonance unit 10 is connected.
The horizontal axis of FIG. 5 represents the voltage difference between the voltage applied to the oscillation circuit 30 and the substrate bias of the second MOSFET 22. The vertical axis in FIG. 5 represents the time from when the power is turned on until the output of the crystal oscillation circuit 8 is detected, and this is defined as the oscillation start time.
It can be seen that the oscillation start-up time becomes faster as the substrate bias of the second MOSFET 22 is increased. However, even if the DC bias exceeds ½ of the voltage applied to the oscillation circuit and is shifted to the power supply potential side, the oscillation start-up time will not be accelerated.
Rather, the current flowing through the second MOSFET 22 decreases, or the direct current bias shifts to the power supply voltage side this time, and the oscillation startability deteriorates due to the shift of the operating point.
As the measurement result shows, the appropriate applied voltage to the substrate electrode of the second MOSFET 22 has a certain width, and roughly, 1 / of the voltage applied to the reference potential 91 and the oscillation circuit 30. It can be seen that it may be applied in the vicinity of 2.

  According to this measurement result, a case where a resistor is connected between the reference potential 91 and the power supply voltage 93 in the first embodiment of the present invention shown in FIG. The specific examples are summarized as follows.

The resistor is connected between the reference potential 91 and the power supply voltage 93, and the dividing point of the resistor divided in two is connected to the substrate electrode of the second MOSFET 22.
Since the resistor is connected between the reference potential 91 and the power supply voltage 93, a constant current always flows, so that the current consumption is as high as 1/10 of the consumption current of the crystal oscillation circuit 30. Set the resistance.
For example, if the consumption current of the crystal oscillation circuit 8 is about 20 nA, the current flowing through this resistor is suppressed to about 2 nA.
In Embodiment 1 of the present invention, when the power supply voltage 93 is -1.2 V, about 600 MΩ is set. At this time, the current flowing to the power supply via this resistor is 2 nA.

From the above measurement results, when the substrate bias of the second MOSFET 22 is set to −0.6 V, the oscillation start-up time is the fastest. Therefore, the resistance of the resistor is set so that the voltage at the connection point of the resistance 600 MΩ becomes −0.6 V. Determine the split ratio.
As a result, it is divided into 1/2 of 600 MΩ, that is, 300 MΩ, and the division point is connected to the substrate electrode of the second MOSFET 22.
As described above, the set crystal oscillation circuit 8 shown in FIG. 2 starts to oscillate about 5 seconds faster than the case where the substrate bias is not set, and the DC bias is applied to the oscillation voltage 30 side. As a result, the oscillation continued at a more optimal operating point.

FIG. 6 is a diagram illustrating changes in the DC bias of the oscillation circuit 30 when the substrate bias of the second MOSFET 22 is not applied and when the substrate bias is optimized as described in the first embodiment.
201 is a curve, 201a is an intersection, 202 is a curve, and 202a is an intersection.
The constant current characteristics with respect to the voltage applied to the oscillation circuit 30 are the current characteristics of the first MOSFET 21, and the diode characteristics are the current characteristics of the second MOSFET 22.
A curve 201 is a case where a substrate bias is not applied to the second MOSFET 22, and a curve 202 shows a case where an optimum substrate bias is applied.
As shown in FIG. 6, the DC bias is shifted from the intersection 201a to the intersection 202a and the power supply voltage applied to the oscillation circuit.
It can be seen that the shift position is approximately half the potential applied to the oscillation circuit 30.

As described above, a method of setting the substrate bias of the second MOSFET 22 by dividing the resistors 102a and 102b of the arbitrary voltage generation circuit 102 connected between the reference potential 91 and the power supply potential 93 by an arbitrary division ratio is as follows. Although simple, in the LSI manufacturing process, the formation of the high resistance element causes variation in characteristics.
In this circuit, the optimum DC bias is not uniquely determined, and has a certain range, so that resistance variations that can be set in the optimum DC bias range can be absorbed.

Next, as a second embodiment of the present invention, an arbitrary voltage generation circuit 102 different from the first embodiment of the present invention will be described. In this method, the arbitrary voltage generation circuit 102 generates a substrate bias voltage by a method other than resistance division and applies the substrate bias of the second MOSFET 22. FIG. 7 is a circuit diagram showing Example 2 of the present invention.
Reference numeral 103 denotes a second constant voltage generation circuit. The crystal oscillation circuit 8, the reference current source 51, the oscillation circuit 30 and the components thereof, and the first low voltage generation circuit 94, the reference potential 91, and the power supply voltage 93 have been described above, and are described with the same reference numerals. Is omitted.

FIG. 7 shows an example in which the second constant voltage generation circuit 103 is used for setting the substrate bias of the second MOSFET 22 as the arbitrary voltage generation circuit 102. It is provided separately from the first constant voltage generation circuit 94 applied to the reference current source 51 and the oscillation circuit 30.
The first constant voltage generation circuit 94 steps down the battery voltage from -1.2V to -0.5V and outputs it. Similarly, the second constant voltage generation circuit 103 steps down the battery voltage from -1.2V to -0.6V and outputs it.
A general constant voltage generation circuit is composed of a band gap reference type constant voltage circuit, a differential amplifier circuit, and an actuator having a current supply capability.
The actuator determines the capacity depending on how much load is connected to the subsequent stage with the voltage output from the constant voltage generation circuit.
The output voltage of the constant voltage generating circuit can be easily changed by changing the set value of the band gap reference type constant voltage circuit.
In this way, the same effect as that of the first embodiment of the present invention can be obtained by connecting −0.6 V generated by the second constant voltage generation circuit 103 to the substrate electrode of the second MOSFET 22.

As described above, in the first and second embodiments of the present invention, the first MOSFET 21 is a PMOSFET, the second MOSFET 22 is an NMOSFET, and the DC bias of the first MOSFET 21 is set by the reference current source 51. Although the case where the second MOSFET 22 is self-biased has been described, the gist of the present invention does not change even if this setting is reversed.
Further, the reference potential is 0 V, the power supply potential is a negative voltage, and the silicon crystal substrate is an N-type conductivity type, but it goes without saying that this setting is also an example.

The present invention has a substrate potential control means for controlling the substrate bias of the second MOSFET in a crystal oscillation circuit that constant-current biases the first MOSFET of the amplifying part of the oscillation circuit and self-biass the second MOSFET. The threshold voltage viewed from the gate of the second MOSFET can be controlled.
With this configuration, it is possible to optimize the DC bias of the crystal oscillation circuit that can oscillate even with a power supply voltage that is twice or less the threshold voltage of the CMOSFET that constitutes the oscillation circuit. This makes it possible to provide a crystal oscillation circuit that achieves both improved oscillation start-up time and more stable steady-state oscillation.

A crystal oscillator circuit in a normal electronic device, in particular, a time measuring device or a timepiece that handles time information, must always operate once the power is turned on. Therefore, it is desirable that the crystal oscillation circuit has both stability and reliability.
The crystal oscillation circuit of the present invention achieves both improved oscillation start-up time and stable steady oscillation, and can be mounted on a portable electronic device typified by a wristwatch.

It is a block diagram which shows the crystal oscillation circuit of this invention. It is a circuit diagram which shows the crystal oscillation circuit in Example 1 of this invention. It is a measurement circuit diagram which performs the characteristic measurement of the crystal oscillation circuit in Example 1 of this invention. It is a figure which shows the characteristic measurement result of the crystal oscillation circuit in Example 1 of this invention. It is a figure which shows the characteristic measurement result of the crystal oscillation circuit in Example 1 of this invention. It is a figure which shows the characteristic measurement result of the crystal oscillation circuit in Example 1 of this invention. It is a circuit diagram which shows the crystal oscillation circuit in Example 2 of this invention. It is a circuit diagram which shows the crystal oscillation circuit in a prior art. It is a circuit diagram which shows the crystal oscillation circuit in a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Resonance part 20 Amplification part 30 Oscillation circuit 41 Control MOSFET
42 Reference resistance 44 Reference current control means 51 Reference current source 91 Reference potential 92 Regulated voltage 93 Power supply voltage 94 First constant voltage generation circuit 101 Substrate potential control means 102 Arbitrary voltage generation circuit 102a Resistance 102b Resistance 103 Second constant voltage Generator circuit

Claims (6)

A resonance unit and an amplifying unit; the amplifying unit includes a first MOSFET and a second MOSFET; the first MOSFET is biased with a constant current by a reference current source; In a crystal oscillation circuit that biases and inputs oscillation amplitude to both MOSFETs in an alternating manner,
A crystal oscillation circuit, wherein the substrate potential of the second MOSFET is controlled to an arbitrary potential by substrate potential control means.   2. The crystal oscillation circuit according to claim 1, wherein the substrate potential control means is an arbitrary voltage generation circuit.   3. The crystal oscillation circuit according to claim 2, wherein the arbitrary voltage generation circuit includes a resistance unit that divides a potential between the reference potential and a power supply potential by an arbitrary resistance ratio.   3. The crystal oscillation circuit according to claim 2, wherein the arbitrary voltage generation circuit is a constant voltage generation circuit having a band gap reference type constant voltage source, a differential amplifier circuit, and an actuator.   3. The crystal oscillation circuit according to claim 1, wherein the substrate potential control unit controls the threshold voltage of the second MOSFET to be higher than a design value. 4. .   3. The substrate potential control unit controls the DC bias of the second MOSFET to a potential that is approximately ½ between the reference potential and the power supply potential. The crystal oscillation circuit as described in any one.

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