JP2005236354A - Receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiver that recommends a program to even a plurality of viewers, the program being congenial to the viewers. <P>SOLUTION: The receiver includes: a tuner circuit 11 for receiving a television broadcast program; a display apparatus 13 for displaying a video signal of the television broadcast as a video image; an imaging element 21 for imaging the viewer; and a processor system 24 for processing the video signal obtained from the imaging element 21 to recognize each of a plurality of the viewers in real time and learns a correspondence between a program of a channel selected by the tuner circuit 11 and each of the viewers imaged by the imaging element 21 at that time. The processor system 24 recommends a program considered proper to each of the viewers in real time by integrating weight information items for a plurality of the viewers according to the learning result. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a television broadcast receiving apparatus.

  Conventional television receivers and STBs allow viewers to select and watch programs that they want to watch from newspaper TV program columns, program guide magazines, EPG or Web program guides, and the like. Some hard disk recorders automatically record a program that includes the keyword in the program name, performer name, etc. when the keyword is input. That is, the viewer's preference is taken into consideration.

For example, there are the following prior art documents.
JP 2002-315023 A

  However, in the case of a general television receiver or STB, once viewing of a program is started, it is difficult to obtain in real time information on what program is being broadcast on another channel at the same time. The viewer needs to stop viewing the current program and actively obtain program information in some way.

  Also, even a hard disk recorder that takes viewers' preferences into account, when the amount of information is too large, it is difficult to select a program that the user really wants to watch from that information.

  Furthermore, when multiple viewers watch a program together, such as a television set installed in a living room of a general home, the program selection does not follow a clear standard, and the situation at that time Determined by. When the viewer who has selected the program leaves the table, it is necessary to select the next program.

  The present invention is intended to solve the above problems.

In this invention,
A tuner circuit that receives a television broadcast and outputs a video signal;
A display for displaying the television broadcast video signal as video;
An image sensor for imaging a plurality of viewers;
A processor system, and
The processor system processes a video signal obtained by the image sensor and recognizes each of the plurality of viewers in real time.
Learning the correspondence between the program of the channel selected by the tuner circuit and each of the viewers imaged by the image sensor at this time,
By integrating the weight information for a plurality of viewers according to the learning result, the receiving device is configured to recommend in real time a program that seems appropriate for the plurality of viewers.

  According to the present invention, by integrating the weight information for a plurality of viewers, it is possible to recommend a program that satisfies more viewers at the same time. Furthermore, the program recommendation can be provided at an appropriate timing for the viewer according to the zap time (channel switching time interval).

[1] Outline of the present invention The present invention recognizes a plurality of viewers, selects viewers whose preference is given priority by a certain algorithm, and recommends a program that seems appropriate according to the selection result. That is, the feature information amount of the viewer is parameterized, and a content program that seems appropriate is recommended based on the combination of the plurality of viewers' identification and the plurality of preference information.

  At that time, a plurality of processors are connected to each other to execute the above processing, and the amount of information and the processor load state are taken into consideration. As a result, the difference in processing speed is dynamically absorbed and stable processing is realized.

[2] Hardware Configuration FIG. 1 shows an example of a receiving apparatus according to the present invention. The receiving apparatus includes a tuner circuit 11 that receives a television broadcast and outputs a video signal and an audio signal, a video / audio processing circuit 12 that performs various processes on the video signal and the audio signal output from the tuner circuit 11, and It has a display 13 that displays a video image supplied with the video signal processed by the video / audio processing circuit 12, and a speaker 14 that outputs the audio signal supplied with the audio signal processed by the video / audio processing circuit 12.

  1 includes an image sensor 21, an image processor 22 for pre-processing a video signal output from the image sensor 21, and main and sub high-speed processor systems 24 and 25 for image processing. Have. In this case, the imaging device 21 is for imaging a viewer who is watching the television broadcast on the display 13 (and the speaker 14), and is installed so as to mainly capture the face of the viewer. Furthermore, a memory 23 necessary for the image processing is connected to the image processing processor 22.

  The main high-speed processor system 24 includes a main high-speed processor unit 31 that performs central processing after image processing, and sub high-speed processor units 32 to 34 that perform distributed processing according to load conditions. The processor unit 31 and the processor units 32 to 34 are connected to each other through an internal bus, and the processor units 31 to 34 are connected to memories 35 to 38 necessary for their processing. Then, the signal processed by the image processor 22 is supplied to the processor unit 31.

  Also, the sub high-speed processor system 25 has the same architecture as that of the main high-speed processor system 24, and the corresponding parts are denoted by the same reference numerals and description thereof is omitted. These high-speed processor systems 24 and 25 are connected through a network 26 to enable distributed processing by grid computing.

  Further, a user input interface 27, a network interface 28, and a data storage device 29 are connected to the processor unit 31 of the main high speed processor system 24. In this case, the input interface 27 is a keyboard, a microphone, or the like, and is used by the viewer to register and delete preferences and various management information. The network interface 28 is a network such as Ethernet (registered trademark) for downloading program information, and the data storage device 29 is viewer information recognized by the high-speed processor systems 24 and 25, and selection of the viewer. It stores information on the programs that have been played and information on various programs.

  Further, a signal for channel selection is supplied from the processor unit 31 of the main high-speed processor system 24 to the tuner circuit 11, and signals for displaying various characters (including numbers and symbols) for the user interface are displayed. , And supplied to the video / audio processing circuit 12.

  As will be described in detail later, the image sensor 21 captures a viewer who is watching the television broadcast on the display 13 (and the speaker 14), and the video signal is preprocessed by the image processor 22. Processed by the systems 24, 25, viewers are recognized in real time. From this recognition result and the information of the program selected by the tuner circuit 11 at this time, the program preferred by the viewer at this time is learned in real time, and the learning result is accumulated in the storage device 29. Further, according to the learning result, the program name of the program that seems appropriate for the viewer at this time is displayed on the display 13 and recommended.

[3] Operation Block FIG. 2 shows operation blocks of the receiving apparatus shown in FIG. That is, the viewer is imaged by the imaging device 21 at intervals of, for example, several minutes, and the color video signal (three primary color signals, or luminance signal and color difference signal) is once written in the memory 24 as viewer image data. The written image data is supplied to the image processing processor 22 to be a pattern according to the luminance level on the XY plane.

  That is, if the original image pattern captured by the image sensor 21 is a pattern I (x, y) (0 ≦ x ≦ Nx−1, 0 ≦ y ≦ Ny−1), this pattern I (x, y) is In order to facilitate the acquisition of information necessary for pattern recognition, it is processed into a black and white image with 256 gradations. Note that the resulting pattern obtained by this processing is a post-image processing pattern M (x, y) (0 ≦ x ≦ Nx−1, 0 ≦ y ≦ Ny−1).

  This post-image processing pattern M (x, y) is compared with representative face patterns Ri (x, y) of some representative persons prepared in advance. Where i = 1 to n, n = representative face pattern, 0 ≦ x ≦ Nxp−1, 0 ≦ y ≦ Nyp−1, Nxp = number of pixels in the X direction of the face pattern, Nyp = face pattern Y direction The number of pixels.

  Here, a typical correlation method is used, and this is shown as equation (1) in FIG. The search window is determined by selecting the one having the largest representative face pattern R (m, n) in the equation (1) as a candidate having a high correlation.

  However, if a pattern search is performed with one processor unit for each pattern, it takes a very long time. Therefore, candidate patterns are shared and processed by grid computing.

  In FIG. 2, the processor unit 31 of the main high-speed processor system 24 serves as an arbitrator, and among the processor units 31 to 34 and 31 to 34 of the processor systems 24 and 25, The load value Li (i = 0 to m-1, m = number of processor units communicable with the main processor unit 31) is inquired. The load value Li uses the CPU utilization rate of each processor unit as an index.

  Based on the load value Li, a representative face pattern Ri (x, y) of a typical human face prepared in advance is assigned to a processor unit with a light load. In the case of FIG. 2, it is shown that “person feature comparison unit” for comparing the representative face pattern Ri and the post-image processing pattern M (x, y) is assigned to the processor units 32 to 34.

  After each process in each processor unit is completed, the process end status Reti (i = 1 to n) and the comparison result Compi (i = 1 to n) are transmitted to the processor unit 31 which is an arbitrator.

  If it is an effective comparison result from the calculation result, the search window is determined, personal features are extracted, and personal authentication is performed. In FIG. 2, the person feature comparison with the representative face pattern Ri (i = 1 to n) is completed in the order of the processor units 34, 33, and 32, and as a result, the result of the person feature comparison unit of the processor units 32 and 33 is obtained. Is higher than the threshold value, indicating that the feature of the person has been found. Based on the result, the search window is extracted from the search pattern Wk (k = 0 to nn-1, nn = the number of search windows. In this case, nn = 2, and the size of the search window is also xs, ys, respectively. ).

  This pattern Wk is compared with the registered viewer face pattern Sj (x, y) of the already registered viewer. J = 0 to n-1, n = number of registered data, 0 ≦ x ≦ Nxfp-1, 0 ≦ y ≦ Nyfp-1, Nxfp = number of pixels in the X direction of the registered viewer face pattern, Nyfp = registered This is the number of pixels in the Y direction of the viewer face pattern.

  Then, the current load value Li (i = 0 to m−1, m = the number of communicable processor units connected to the main processor unit) is transmitted to the processor unit with which the arbitrating processor unit 31 can communicate. Inquire. A search window is assigned according to the load value Li. At the same time, the main program for comparing features is transferred from the processor unit 31 to the processor units 33 and 34.

  The processor units 33 and 34 use the transferred data and program to compare the features in the “individual feature comparison unit”, and the degree of correlation Ik (k = 0 to mm−1, mm = number of patterns capable of extracting individual features) Is calculated. Here, the correlation degree Ik is calculated by using a typical correlation method, and this is shown as equation (2) in FIG.

  The above processing is performed on the corresponding search window and all registered viewer face patterns, and each correlation degree Ik is returned to the main processor unit 31. The processor unit 31 compares the returned correlations Ik (k = 0 to mm−1), and some patterns Ri (x, y) (i = 0 to nn−1, nn having the highest correlation). (= Number of patterns matched with personal features) corresponds to one of a plurality of current viewers imaged by the image sensor 21, and feedback that is recognized through the display 13 and the speaker 14 is fed back. For example, as the recognition result and the greeting, "Good morning, Mr. ×××", "Hello, ○○○-san" to display, such as on a display 13.

  If the viewer who has taken the image is not registered, a message indicating that the viewer has been newly registered is displayed on the display 13, and “Nice to meet you, what is your name?”, “Please select your favorite genre.” "Who is the talent?" When an answer to this inquiry is input through the input interface 27, the answer and the face pattern Si (x, y) are stored in the storage device 29 by the “person feature data storage unit” of the processor unit 33.

  Further, when the degree of correlation is low, a display for asking the viewer's name “is it XXX?” Is performed. Then, when the viewer inputs a reply, if it is the first name, the same processing as in the new registration is performed thereafter. If the same name is returned even though the degree of correlation is low, the registered viewer's face pattern Si (x, y) is changed by the person feature data storage unit of the processor unit 33. .

  After a plurality of viewers are determined as described above, the preference of each viewer is adjusted in real time. For example, the learning result of each user's preference is used to select a program with priority given to the preference of the user having the highest weight variable at that time. Specifically, a program that a specific viewer likes is learned and searched in real time. Categories, performers, keywords, and zap time can be set as learning items as viewer preferences.

  In this case, information on an arbitrary date and time and time zone is generated for each. Specifically, the weight is expressed as a function of time, the category weight variable is ωc (t), the performer weight variable is ωm (t), the keyword weight variable is ωk (t), and the zap time weight variable is Let ωz (t).

  The main processor unit 31 serves as an arbitrator, and among the processor units 31 to 34 and 31 to 34, the current load value Li (i = 0 to m-1, m = processor) The number of processor units connected to the unit 31 and capable of communicating is inquired. Based on the load value Li, a “zap information calculation unit” and a “preference information calculation unit” are allocated to the processor units. In the example of FIG. 2, the zap information calculation unit is assigned to the processor unit 33 and the preference information calculation unit is assigned to the processor unit 31.

  For example, when the viewer U1 starts viewing the C1 channel from H1 hour M1 minute S1 second on Monday, Monday, Monday (holiday) and switches the channel to the C2 channel at H2 hour M2 minute S2 second on the same day, For example, a data list as shown in FIG. 4 is obtained by acquiring the information.

  Based on this information, the weight variable ωc (t) of the category viewed by the viewer, the weight variable ωm (t) of the performer, and the weight variable ωk (t) of the keyword are calculated as preference information of the processor unit 31. Calculate in part. Further, each zap time weight variable ωz (t) is calculated in the zap information calculation unit of the processor unit 33. As a specific calculation method, there is a method of accumulating statistically enormous data. As an example of development, a method using a neural network or multivariate analysis can be considered.

  FIG. 5 shows an example of distribution of weights of the category table of the viewer U1 at a certain time, that is, H1 hour M1 minute S1 second on W day (holiday), and FIG. 6 shows the performer table of the viewer U1 at the same time. An example of the distribution of weights is shown. FIG. 7 shows an example of distribution of weights of the keyword table of the viewer U1 at the same time, and FIG. 8 shows an example of distribution of weights of the zap time of the viewer U1 at an arbitrary time.

  Similarly, FIG. 9 shows an example of the distribution of the weight of the category table of another viewer U2 at H1 hour M1 minute S1 second on W day (holiday), and FIG. 10 shows the performer table of the viewer U2 at the same time. An example of the distribution of weights is shown. FIG. 11 shows a distribution example of the weights of the keyword table of the viewer U2 at the same time, and FIG. 12 shows a distribution example of the weights of the zap time of the viewer U2 at any time. Note that the above data is a learning result based on the data when the user is watching alone.

  Since these are enormous amounts of data, at this point in time, a “zap information storage unit” and a “preference information storage unit” are allocated to the processor units based on the load value Li of each processor unit. , Preference information, and zap time data are stored in an appropriate data format according to each calculation method. In FIG. 2, the zap information storage unit is assigned to the processor unit 33 and the preference information storage unit is assigned to the processor unit 34. Further, based on the load value Li of each processor unit, a “program collection unit” is allocated to the processor unit 34 with a low load to collect EPG and Web data.

  Next, the “program preference comparison unit” of the processor unit 31 calculates the preference program information at the current time from the data of the preference information storage unit of the processor unit 34, and from the EPG or Web program information obtained previously. An appropriate program is searched from data in the program collection unit. Further, the channel switching timing obtained from the zap time at the current time is calculated from the zap information storage unit, and the program recommendation timing is calculated from the weight data in the zap information storage unit.

  Specifically, when the viewer U1 and the viewer U2 are recognized at H1 hour M1 minute S1 second, the heaviest information at that time is acquired from FIG. 5 to FIG. 7 and FIG. 9 to FIG. And compare. Then, since “news / report” with a weight of 50 is given from FIG. 5, if a program related to news / report is selected from EPC or the like, the preference of the viewer U1 is selected.

  And the “preference information recommendation section” is the optimal timing for the viewer U1 to switch to the normal channel, and information about the optimal program that the viewer U1 is expected to watch, for example, “News on the xx channel has started. Is displayed on the display 13 as in FIG.

  Therefore, according to the above-described apparatus, the program can be actively provided, and the viewer can view the optimum program in real time without being aware of the program guide. In addition, a favorite program can be viewed at an optimal timing when the viewer is expected to switch channels according to the zap time.

  As a method for specifying a plurality of viewers, composition between viewers can be used. Specifically, when the viewer U1 and the viewer U2 are recognized at H3 hours M3 minutes S3 seconds, the information with the highest weight at that time is acquired from FIGS. 5 to 7 and FIGS. 9 to 11. And the sum of the weights is calculated as shown in FIGS. Then, from this calculation result, “soccer” (see FIG. 15) having the largest weight variable at that time is selected, information relating to soccer at that time is obtained from the EPG, etc., and the optimum program information is provided to the viewer. To do.

  Therefore, in this case, it is possible to recommend a program that satisfies the preferences of the viewers U1 and U2.

  Alternatively, for example, as shown in FIG. 14, a program can be recommended based on preset preference order among viewers. It is also possible to recommend a program to the viewer according to the order of the length of time of viewing.

[4] Grid Computing Here, a grid computer system applicable to the receiving apparatus of FIG. 1 will be described.

[4-1] Configuration Grid computing is a technology that realizes high computing performance by cooperatively operating a plurality of information processing apparatuses connected to a network. An example of a system that performs distributed processing among three information processing apparatuses will be described below with reference to FIG.

  In the example shown in FIG. 17, three information processing apparatuses 100 to 300 are connected to each other through a network. The information processing apparatus 100 includes one main processor 101, one or a plurality of sub processors, in this example, three sub processors 111 to 113, a DMA controller 121, and a disk controller 122. The integrated circuit is configured.

  Further, the main processor 101 and the sub processors 111 to 113 each have a local storage 131. The main processor 101 performs schedule management and general management of program or data processing by the sub-processors 111 to 113. The sub processors 111 to 113 execute programs or data processing in parallel and independently under the control of the main processor 101.

  Note that a program may run in the main processor 101. In some cases, the program of the main processor 101 operates in cooperation with the program of the sub processor 111. Furthermore, in the information processing apparatuses 100 to 300, an identifier that can uniquely identify the information processing apparatus throughout the entire network is assigned as the information processing apparatus ID. In the main processor 101 and the sub processors 111 to 113, similarly identifiable identifiers are assigned as the main processor ID and the sub processor ID.

  The DMA controller 121 accesses a program or data stored in the main memory 141. The main memory 141 is connected to the outside of the information processing apparatus 100 and is, for example, a DRAM.

  In addition, the disk controller 122 accesses an external recording device 142 connected to the information processing apparatus 100. The external recording device 142 is assumed to be a fixed disk (hard disk), a removable disk, an optical disk such as MO, CD ± RW, DVD ± RW, a memory disk, and the like, and also includes an SRAM, a ROM, and the like.

  The main processor 101, the sub processors 111 to 113, the DMA controller 121, and the disk controller 122 are connected by a bus 102. Further, the other information processing apparatuses 200 and 300 are configured in the same manner as the information processing apparatus 100, and details thereof are omitted.

[4-2] Avoiding Data Inconsistency As described above, the sub-processors 111 to 113 execute program or data processing independently. However, if different sub-processors are connected to the same area of the same main memory 141, If data is read or written at the same time, data mismatch may occur. Therefore, when accessing the main memory 141, a certain procedure is required. The procedure will be described with reference to FIG.

  In FIG. 18A, the main memory 141 is composed of a plurality of addressable “memory locations”. Each memory location is allocated an “additional segment” for storing data state information. The additional segment includes “F / E bit”, “sub processor ID”, and “local storage address” (LS address). An “access key” is also assigned to each memory location, which will be described later.

The F / E bit is defined as follows.
When the F / E bit = “0” It is read by the sub-processor (111 to 113) and is being processed or is in an empty state, so it is invalid data that is not the latest data. Reading is not possible, but reservation is possible, and when it becomes “1”, it is read to the sub-processor ID and local storage address previously written in the additional segment as read reservation information.
In other words, when it is necessary to process data in multiple stages by a plurality of sub-processors, the sub-processor that performs the process in the previous stage transmits the processed data to a predetermined address in the main memory 141 by configuring as described above. Immediately after the data is written, the data is immediately read out to the sub-processor that performs the subsequent processing, which is very suitable. Further, it is writable and becomes “1” after writing.

When F / E bit = “1” The latest data that has not been read by the sub-processor (any of 111 to 113) and is not being processed. It can be read and becomes “0” after reading. It is not writable.
The F / E bit is defined as described above.

  The local storage 131 of the sub-processor 111 shown in FIG. 18B is also composed of a plurality of addressable memory locations. Again, an additional segment is allocated for each memory location. The additional segment includes a busy bit in addition to the contents of the additional segment in the main memory 141.

  When reading the data of the main memory 141 to the memory location of the local storage 131, the corresponding busy bit is set to “1” and reserved. Other data cannot be stored in the memory location where the busy bit is “1”. After reading to the memory location of the local storage 131, the busy bit becomes “0” and can be used for any purpose.

  Further, as shown in FIG. 18A, the main memory 141 of the information processing apparatus 100 has a plurality of “sandboxes”. The sandbox defines an area of the main memory 141, and each sandbox is assigned to the sub processors 111 to 113 and can be used exclusively. That is, each of the sub-processors 111 to 113 can use the sandbox assigned to itself, but cannot access data beyond the above-mentioned area. As shown in FIG. 18A, the main memory 141 is composed of a plurality of memory locations, and the sandbox is a set of these memory locations.

  Further, in order to realize exclusive control of the main memory 141, a key management table as shown in FIG. 19 is prepared. This key management table is prepared in a relatively high-speed memory such as SRAM and is associated with the DMA controller 121. Each entry of the key management table includes a “sub processor ID”, a “sub processor key”, and a “key mask” for identifying the sub processors 111 to 113.

  Here, a process when any of the sub processors 111 to 113 uses the main memory 141 will be described with reference to FIGS. 18 and 19. The sub processor outputs a read or write command to the DMA controller 121. This command includes the sub processor ID of the sub processor itself and the address of the main memory 141 that is the use request target. Before executing this command, the DMA controller 121 refers to the key management table and checks the sub processor key of the sub processor that is the use request source.

  Next, the DMA controller 121 compares the checked sub processor key with the access key allocated to the memory location of the main memory 141 shown in FIG. The above command is executed only when the two keys match.

  Further, as a method of using the key mask shown in FIG. 19, when any bit of the key mask becomes “1”, the corresponding bit of the associated sub processor key becomes “0” or “1”. it can.

  For example, assume that the sub-processor key is “1010”. Normally, this sub-processor key only allows access to a sandbox having an access key of “1010”. However, if the key mask associated with this sub-processor key is set to “0001”, this sub-processor key is used to access a sandbox with either “1010” or “1011” access key. Is possible. In this way, sandbox exclusivity is achieved.

  In other words, when it is necessary to process data in multiple stages by the plurality of sub-processors 111 to 113, the sub-processor that performs the process in the previous stage and the sub-process that performs the process in the subsequent stage are configured as described above. Only the processor can access a predetermined address of the main memory 141, and thus data can be protected.

[4-3] Procedure for Distributed Processing Here, the procedure for performing distributed processing using the system of FIG. 17 will be described. Software cells are transmitted between the information processing apparatuses 100 to 300 on the network. A certain information processing device can distribute processing by generating a software cell including a command, a program, and data and transmitting the software cell to another information processing device through a network.

  The software cell is configured as shown in FIG. 20, for example. Here, the “transmission source ID” includes the network address and the information processing device ID of the information processing device that is the transmission source of the software cell, and further includes the main processor ID and the sub processor ID. The “transmission destination ID” and the “response destination ID” include the same information for the information processing apparatus that is the transmission destination of the software cell and the information processing apparatus that is the response destination of the execution result of the software cell.

  The “cell interface” includes information necessary for using the software cell, and includes “global ID”, “necessary sub-processor”, “sandbox size”, and “previous software cell ID”. The global ID can uniquely identify the software cell throughout the network, and is created based on the transmission source ID and the creation or transmission date and time of the software cell. Also, the required sub-processor provides the minimum number of sub-processors necessary for executing the software cell.

  Further, the sandbox size gives the amount of memory in the main memory 141 and the local storage 131 of the sub processors 111 to 113 necessary for executing the software cell. The previous software cell ID provides the identifier of the previous software cell of a group of software cells that require sequential execution of streaming data or the like.

  In the software cell, the “execution section” is composed of “DMA command”, “program”, and “data”. The DMA command includes a series of DMA commands necessary for starting the program, and the program includes a sub processor program executed by the sub processor. The data is data processed by a program including these sub processor programs.

  Further, the DMA commands include “load command”, “kick command”, “status command”, “status return command”, and “function program execution command”. The load command is a command for loading information in the main memory 141 into the local storage of the sub processor. For this reason, the load command includes “main memory address”, “sub processor ID”, and “local storage address” (LS address) in addition to the load command main body.

  The main address indicates an address of a predetermined area of the main memory 141 from which information is loaded. The sub processor ID and the local storage address indicate the identifier of the sub processor to which the information is loaded and the address of the local storage 131.

  The kick command is a command for starting execution of the program. The kick command has a “sub processor ID” and a “program counter” in addition to the kick command body. The sub processor ID identifies a target sub processor to be kicked, and the program counter gives an address for a program counter for program execution.

  The status command is a command for requesting the current state (device information) of the information processing device indicated by the transmission destination ID, and the status reply command is as described later. Further, the function program execution command is a command for requesting execution of a function program from a certain apparatus to another apparatus. The slave that has received the function program execution command identifies a function program to be activated by a “function program ID” described later.

  The status reply command is a command in which the information processing apparatus that has received the status command responds to the information processing apparatus indicated by the response destination ID included in the status command with its own apparatus information. The status reply command stores device information in the data area of the execution section. FIG. 21 shows an example of the structure of the data area at that time.

  The structure of the data area of the software cell when the DMA command is a status return command will be described with reference to FIG.

  The “information processing apparatus ID” is an identifier for identifying an information processing apparatus that responds with its own apparatus information. When the power is turned on, the main processor 101 determines the date and time when the power is turned on, the network address of the information processing apparatus, It is generated based on the number of sub-processors. The “information processing apparatus type ID” includes a value representing the characteristics of the information processing apparatus. For example, the information processing apparatus may represent a product such as a hard disk recorder, PDA, or television, or may represent functions such as image processing or video recording / playback.

  “MS status” indicates whether the information processing apparatus is operating as a master or a slave. When “0”, the information processing apparatus operates as a master, and when “1”, the information processing apparatus operates as a slave.

  “Main processor operating frequency” represents the operating frequency of the main processor 101. The “main processor usage rate” represents the rate at which all programs currently running on the main processor 101 are using the main processor 101. “Number of sub-processors” represents the number of sub-processors included in the information processing apparatus. “Sub-processor ID” is an identifier for identifying a sub-processor in the information processing apparatus.

  “Sub-processor status” indicates the status of the sub-processor, and there are statuses such as “unused”, “reserved”, and “busy”. unused is when the subprocessor is unused. “reserved” indicates that it is currently unused, but if it is reserved, “busy” is in use.

  “Sub-processor usage rate” represents the rate at which a program running on the sub-processor is using that sub-processor. When the status is busy, the sub processor usage rate indicates the current usage rate. When the status is reserved, the sub processor usage rate indicates the usage rate when used later. The sub processor ID, the sub processor status, and the sub processor usage rate are set as one set, and there are the same number of sub processors.

  “Main memory total capacity” and “main memory usage” represent the total capacity of the main memory 141 connected to the information processing apparatus and the capacity currently in use.

  “Number of external recording devices” represents the number of external recording devices 142 connected to the information processing device, and “External recording device ID” uniquely identifies the external recording devices 142 connected to the information processing device. Represents information to be performed. The “external recording device type ID” includes information indicating the type of the corresponding external recording device 142. As the type of the external recording device 142, the above-described one is assumed. “External recording device total capacity” and “external recording device usage” represent the total capacity of the external recording device 142 identified by the external recording device ID and the capacity currently in use.

  The external recording device ID, the external recording device type ID, the external recording device total capacity, and the external recording device usage amount are set as one set, and there are as many external recording devices 142 as there are. That is, even when a plurality of external recording devices are connected to one information processing device, different external recording device IDs are assigned to the respective external recording devices, and the external recording device type ID and the external recording device are assigned. The total device capacity and the external recording device usage amount are also individually managed.

[4-4] Generation and Execution of Software Cell Here, a process from generation to execution of a software cell will be described. The main processor 101 of an information processing apparatus among the information processing apparatuses 100 to 300 generates a software cell and transmits the software cell to another information processing apparatus through a network. The information processing apparatus that is the transmission source, the information processing apparatus that is the transmission destination, and the information processing apparatus that is the response destination are identified by the above-described transmission source ID, transmission destination ID, and response destination ID.

  The main processor 101 of another information processing apparatus that has received the software cell stores the software cell in the main memory 141. The main processor 101 evaluates the software cell and processes the DMA command contained therein.

  Specifically, the main processor 101 first executes a load command. Then, the information is loaded from the main memory address of the main memory 141 included in the load command into the predetermined area of the local storage 131 of the sub processor corresponding to the sub processor ID and the local storage address. The information here includes a sub-processor program or data included in the received software cell, but may be other data.

  Next, the main processor 101 outputs the kick command to the sub processor 111 corresponding to the sub processor ID included in the kick command, together with the program counter included in the kick command. The sub processor 111 executes the sub processor program according to the kick command and the program counter. Then, the execution result is stored in the main memory 141, and then the main processor 101 is notified that the execution has been completed.

  It is also conceivable to transmit a main memory program executed in the main memory 141 to another information processing apparatus using a software cell. In that case, a load command including a program for the main memory 141 is transmitted instead of the sub processor 111 program.

  When the main memory program transmitted to the main memory 141 of another information processing apparatus is executed, the DMA command includes, for example, a main processor ID, a main memory address, an identifier for identifying the main memory program, and a program counter. Similarly, a software cell that is a kick command is transmitted to another information processing apparatus.

  By using the software cell in this way, the information processing device that is the transmission source of the software cell does not require the user to operate another information processing device that is the transmission destination, and the sub processor program or the main memory program is executed. The information can be transmitted to another information processing apparatus, the sub processor program can be loaded into the sub processor of the other information processing apparatus, and the sub processor program or the main memory program can be executed by the other information processing apparatus.

[4-5] Processing Example Here, a plurality of information processing apparatuses connected to the network, for example, as shown in FIG. 22, three information processing apparatuses 100 to 300 operate as one virtual apparatus. As a precondition process for this purpose, a process after power-on of the information processing apparatus will be described. FIG. 23 illustrates a software configuration stored in an arbitrary information processing apparatus among the information processing apparatuses 100 to 300, for example, the main memory 141 of the information processing apparatus 100. Each program is categorized by function or feature. These programs are stored in the external recording device 142 connected to the information processing apparatus 100 before the information processing apparatus 100 is turned on.

  When the power is turned on, the main processor 101 loads each program belonging to the device driver category and each program belonging to the control program category into the main memory 141. The procedure for loading each program into the main memory 141 is as follows.

  First, the main processor 101 reads a program from the external recording device 142 by executing a read command to the disk controller 122. Then, by executing a write command to the DMA controller 121, the read program is loaded into the main memory 141. As for each program belonging to the function program category, only the necessary program may be loaded when necessary, or may be loaded after the power is turned on, similarly to each program belonging to the other category.

  In the function program, a unique identifier for each function program is assigned as a function program ID. The function program ID is determined at the stage of creating the function program from the date, time, information processing apparatus ID, and the like.

  The main processor 101 secures an area for storing device information related to the information processing device on which it operates in the main memory 141, and records the device information as a device information table of the own device. The device information here is information below the information processing device ID shown in FIG.

  The main processor 101 executes the master / slave manager loaded in the main memory 141. When the processing is completed, the master / slave manager sends an end notification to the main processor 101. When the main processor 101 receives the end notification from the master / slave manager, it next executes the capability exchange program. The master / slave manager and the capability exchange program are resident programs that operate until the information processing apparatus 100 is powered off.

  When the master / slave manager detects that the information processing apparatus 100 on which the master / slave manager operates is connected to the network, the master / slave manager confirms the existence of other information processing apparatuses 200 and 300 connected to the same network. If the master / slave manager confirms that no other information processing apparatus exists in the network, the master / slave manager sets the MS status in the apparatus information table of the above-mentioned own apparatus to "0". When it is confirmed that another information processing apparatus exists in the network, the MS status is set to other than “0” (for example, “1”).

  In addition, the master / slave manager always checks the network status, and when a new information processing apparatus is connected to the network, the information processing apparatus connected to the network is turned off, or from the network. The information processing apparatus is monitored for disconnection, and when there is a change in the network connection state, the information is notified to the capability exchange program.

  The capability exchange program acquires device information regarding other information processing devices connected to the network when the information processing device on which it operates is a master. As described above, the device information is acquired by generating and transmitting a software cell in which the DMA command is a status command, and then the DMA command is a status return command, and includes software information including device information relating to another information processing device as data. Can be received.

  Similar to the device information table of the own device described above, the capability exchange program secures an area for storing device information relating to all other acquired information processing devices in the main memory 141 and stores the information in the device of another device. Record as an information table. That is, in the master main memory 141, device information tables of all information processing devices including itself connected to the network are recorded.

  On the other hand, when the information processing apparatus on which the capability exchange program operates is a slave, apparatus information on the master information processing apparatus connected to the network and all slave information processing apparatuses other than itself is acquired. Then, the information processing device ID and the MS status included in the device information are recorded in the main memory 141. That is, all the device information related to the device itself is recorded in the slave as a device information table, and the information processing device ID and the MS status of all the information processing devices other than the device connected to the network are stored in the device information table. Will be recorded.

  Further, when receiving a network state change notification indicating that the information processing apparatus is newly connected to the network from the master / slave manager, the capability exchange program acquires apparatus information related to the information processing apparatus. Similarly, when a network state change notification that the information processing apparatus is disconnected from the network or the power supply is disconnected is received, the apparatus information table of the apparatus is deleted from the main memory 141.

[4-6] Master and Slave Control Flow In order to operate a plurality of information processing apparatuses connected to the network as one virtual information processing apparatus, the master information processing apparatus (hereinafter referred to as “master”). However, it is necessary to grasp the operation status of the user's operation and the information processing apparatus serving as a slave (hereinafter referred to as “slave”).

  FIG. 24 shows a state in which the three information processing apparatuses 100 to 300 connected to the network operate as one virtual information processing apparatus. In this example, when the information processing apparatus 100 operates as a master, the information processing apparatus 200 and the information processing apparatus 300 operate as slaves, and a user operates the information processing apparatus 200, processing according to this operation is performed on the information processing apparatus. 300 is executed. FIG. 25 shows a flowchart in that case.

  When the user operates the information processing apparatus 200, the operation information is always transmitted to the master regardless of whether the operated information processing apparatus is a master or a slave. The main processor 101 in the master selects a function program to be executed according to the operation information. At this time, if necessary, a function program is loaded from the external recording device 142 to the main memory 141 according to the above-described method. At the time of execution, the function program notifies the main processor 101 of information related to the main processor 101, the sub processor 111, the main memory 141, and the external recording device 142 that are necessary when the function program is executed. The information here is information below the information processing apparatus ID shown in FIG.

  The main processor 101 selects a slave that can execute the function program on the basis of the device information table of the own device or another device recorded in the main memory 141. The master requests the selected slave to execute the function program. At this time, the master updates the device information table related to the selected slave recorded in its main memory 141 based on the information necessary for executing the function program.

  The slave main processor 101 requested to execute the function program executes the function program. Even in that case, if necessary, the slave main processor 101 loads the function program from the external recording device 142 to the main memory 141 according to the above-described method.

  Here, when the necessary function program is not recorded in the external recording device 142 connected to the slave that is requested to execute the function program, the other information processing apparatus 100 is set as the main memory 141 program. The function program may be transmitted to the slave that is requested to execute the function program. Further, similarly to the program for the main memory 141, the sub processor 111 program is also transmitted to another information processing apparatus 100 by using a software cell if necessary, and loaded to the sub processor 111 of the other information processing apparatus 100. The sub processor 111 program can be executed by another information processing apparatus 100.

  Then, after the processing of the function program ends, an end notification is transmitted to the master. The master updates the device information table related to the slave that executed the function program by receiving the end notification.

  Also, the master main processor 101 may select itself as the information processing apparatus 100 that can execute the function program based on the apparatus information table of the own apparatus or another apparatus. In that case, the master executes the function program. At that time, the device information table related to the master recorded in the slave main memory 141 is updated according to the operation status of the master.

  In this way, the user operates only one information processing apparatus among the plurality of information processing apparatuses, so that the plurality of information processing apparatuses can be virtually operated without operating other information processing apparatuses. It can be operated as one information processing apparatus.

[4-7] Specific Example of Information Processing Device FIG. 26 shows a specific example of the information processing device. The information processing apparatuses 100 and 200 constitute a hard disk drive and a hard disk recorder that records video and audio on the hard disk. The hard disk recorder (information processing apparatus) 100 is connected to a monitor 151 for displaying video and a speaker 152 for outputting sound. The information processing apparatus 300 constitutes a PDA (personal information terminal), and the information processing apparatus 400 constitutes a portable CD player.

  27, 28, and 29 show examples of the hardware configuration of the information processing apparatuses 100 to 400, that is, the hard disk recorders 100 and 200, the PDA 300, and the CD player, and the hard disk recorders 100 and 200, the PDA 300, and the CD player 400 Examples of the software configuration are shown in FIG. 30, FIG. 31, and FIG.

[4-8] Activation of Function Program Here, a specific example in which the activation of the function program is requested from the master to the slave will be described with reference to FIG. As a precondition, the hard disk free space of the master hard disk recorder 100 is 10 minutes in terms of recording time. The free space on the hard disk of the slave hard disk recorder 200 is 20 hours in terms of recording time.

  The user performs a 2-hour program recording reservation operation on the hard disk recorder 100. Since the hard disk recorder 100 is a master, a secondary having a free hard disk for two hours is searched from the information table of the information processing apparatus 100 connected to the network. In this case, the searched device is the hard disk recorder 200. The master requests the slave to execute a 2-hour program reservation.

  A process when the information processing apparatus 100 is disconnected from the network or the main power supply is disconnected will be described. When the information processing apparatus 100 is disconnected from the network, the master / slave manager of each information processing apparatus detects the disconnection of the apparatus, and notifies the capability exchange program of the disconnection information together with the disconnected information processing apparatus ID. The capability exchange program deletes the device information corresponding to the information processing device ID notified from the master / slave manager from the device information table.

  When the information processing apparatus disconnected from the network is the master, it is necessary to determine the apparatus to be changed from the slave to the master among the information processing apparatuses currently connected to the network. The process will be described next.

  When the disconnection information notified from the master / slave manager is the master, the information processing device ID is replaced with a numerical value, and the information processing device ID of the device is compared with the information processing device ID of the device information table managed by the device. If the information processing apparatus ID of the apparatus is minimum as compared with the information processing apparatus ID in the apparatus information table, the slave shifts to the master.

  In order to switch to the master operation, the slave to be transferred to the master sets the MS status to “0” and, similar to the acquisition of device information in the master described above, all of the information processing devices connected to the network. Device information is acquired and recorded in the main memory 141.

[5] Summary According to the receiving apparatus described above, a plurality of viewers are recognized, viewers whose preference is given priority are selected by a certain algorithm, and a program that seems to be appropriate is recommended according to the selection result. The TV program information according to the viewer's preference can be provided in real time. Furthermore, the recommendation of the program can be provided at an appropriate timing for the viewer according to the zap time.

  In addition, the process is divided into a plurality of processing units, and the state of each processor unit is recognized and assigned to a processor unit with a low load. Therefore, a viewer can be identified in real time, which is appropriate for the viewer. Can recommend programs.

[List of abbreviations]
CD: Compact Disc
CD ± RW: CD + ReWritable, CD ReWritable
CPU: Central Processing Unit
DMA: Direct Memory Access
RAM: Random Access Memory
DRAM: Dynamic RAM
DVD ± RW: DVD + ReWritable, DVD ReWritable
EPG: Electronic Program Guide
ID: IDentification
MO: Magneto-Optical disk
PDA: Personal Digital Assistant
ROM: Read Only Memory
SRAM: Static RAM
STB: Set Top Box
Web: World Wide Web

It is a systematic diagram showing one embodiment of the present invention. It is an operation block diagram showing one form of this invention. It is a figure which shows the numerical formula for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a figure which shows the table | surface for demonstrating this invention. It is a systematic diagram showing an example of a computer system. It is a figure for demonstrating the system of FIG. It is a figure for demonstrating the system of FIG. It is a figure for demonstrating the system of FIG. It is a figure for demonstrating the system of FIG. It is a figure for demonstrating a virtual information processing apparatus. It is a figure which shows an example of the software structure of information processing apparatus. It is a figure for demonstrating the apparatus of FIG. It is a figure for demonstrating the apparatus of FIG. It is a figure for demonstrating the apparatus of FIG. It is a figure which shows an example of the hardware constitutions of information processing apparatus. It is a figure which shows an example of the hardware constitutions of information processing apparatus. It is a figure which shows an example of the hardware constitutions of information processing apparatus. It is a figure which shows an example of the software structure of information processing apparatus. It is a figure which shows an example of the software structure of information processing apparatus. It is a figure which shows an example of the software structure of information processing apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Tuner circuit, 12 ... Audio / video circuit, 13 ... Display, 14 ... Speaker, 21 ... Image sensor, 22 ... Image processor, 24 and 25 ... High-speed processor system, 27 ... User input interface, 28 ... Network interface, 29 ... Data storage devices, 31-34 ... High-speed processor units

Claims (4)

A tuner circuit that receives a television broadcast and outputs a video signal;
A display for displaying the television broadcast video signal as video;
An image sensor for imaging a plurality of viewers;
A processor system, and
The processor system processes a video signal obtained by the image sensor and recognizes each of the plurality of viewers in real time.
Learning the correspondence between the program of the channel selected by the tuner circuit and each of the viewers imaged by the image sensor at this time,
A receiving apparatus that recommends a program that seems appropriate to the plurality of viewers in real time by integrating weight information for the plurality of viewers according to the learning result. The receiving device according to claim 1,
A receiving apparatus comprising a plurality of the processor systems and being connected to each other to constitute a grid computer system. The receiving device according to claim 2,
Each of the processor systems includes a main processor unit and a sub processor unit,
A receiving apparatus in which the main processor unit and the sub processor unit are configured by one integrated circuit. The receiving device according to claim 1,
A receiving device that recommends a program that is deemed appropriate for the viewer in real time according to the channel switching time interval of the viewer.

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