JP2005234928A - Storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology to change functions not depending on conventional firm-on-flash technologies. <P>SOLUTION: A memory area (222) for parameter blocks, which are used to change register configuration, is formed on a non-volatile semiconductor memory (22) to perform configuration processing for the register on the basis of the parameter blocks in reset exception processing of a microprocessor (24). With this method, only by rewriting the parameter blocks in the non-volatile semiconductor memory through a host computer, configuration contents of the register can be easily changed. Thereby, functions in a storage device can be changed not depending on conventional firm-on-flash technologies. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a technology for changing a function of a storage device using an electrically rewritable nonvolatile semiconductor memory as a storage medium, and relates to a technology that is effective when applied to, for example, a flash memory card.

  As a storage device using a nonvolatile semiconductor memory, there is a storage device using a flash memory. The flash memory must erase a block composed of one or more sectors to which data is written before data is written. Further, when connected to a host computer such as a personal computer, it is necessary to analyze commands issued by the personal computer and control reading and writing of data requested by the personal computer. Firmware is stored in the storage device to control the flash memory and between the host computers. As such a storage device, a module in which a defect in the RAM is corrected instead of a module in which a defect has occurred in the ROM by loading the flash memory into the RAM for reset exception processing (power-on process) at power-on. There is known a technique for taking measures against malfunctions of ROM firmware by using (see, for example, Patent Document 1). In such a technique, the firmware stored in the storage device includes a plurality of modules divided for each function and a jump table that is referred to for each module call. The jump table indicates the address of each module. The storage device also includes a flash memory, which is a nonvolatile semiconductor memory, a microprocessor, a ROM in which firmware is stored, and a jump table in the firmware stored in the ROM or a corrected jump table and a corrected module. It consists of RAM loaded from flash memory. The flash memory stores data to be written by the host computer, a corrected jump table, and a plurality of modules. Firmware is stored in the ROM in advance.

  After the power is turned on, the jump table stored in the first memory is copied from the ROM to the RAM by the microprocessor. When there is no malfunction in the firmware, the jump table copied to the RAM indicates the address of each module of the firmware stored in the ROM.

  When a failure occurs in the firmware stored in the ROM, the flash memory stores a corrected module for the failed module. At the same time, the jump table is also modified to indicate the address of the modified module and stored in the flash memory.

  After the jump table stored in the ROM is copied to the RAM and the modified jump table and the plurality of modules are stored in the flash memory, the modified jump table and the plurality of modules stored in the flash memory are stored. These modules are loaded into the RAM. At this time, the jump table copied from the ROM is rewritten to the corrected jump table stored in the flash memory. As a result, the module in which the problem stored in the ROM has occurred is not referred to, but the correction module loaded in the RAM is referred to.

  As described above, by correcting the module and jump table in which a problem has occurred and storing them in the flash memory, it is possible to easily correct the firmware even if a problem has occurred in the firmware stored in the ROM. . Such a technology is called a farm-on-flash technology.

Japanese Patent Laid-Open No. 11-265283 (FIG. 1)

  According to the above prior art, the capacity of the RAM required for the firmware correction is sufficient because the capacity of the module and the jump table in which the problem has occurred is sufficient, and in this sense, the RAM capacity can be reduced. Lower prices can be achieved.

  However, when the power is turned on, the trouble of the firmware is taken by using the correction module in the RAM instead of the module in which the trouble in the ROM has occurred by loading from the flash memory to the RAM. When the number of corrected modules increases, the free space of the RAM is reduced accordingly, and when the free space is exhausted in the RAM, it becomes impossible to take countermeasures against the problem.

  An object of the present invention is to provide a technique for enabling a function change without using a conventional firmware-on-flash technique.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  That is, a nonvolatile semiconductor memory whose data can be rewritten by a host computer, a program memory in which firmware is stored, a microprocessor for processing the firmware, and a register set by reset exception processing of the microprocessor When the semiconductor integrated circuit is formed, a parameter block storage area is provided in the non-volatile semiconductor memory that allows the setting of the register to be changed. In the microprocessor reset exception processing, the parameter block Based on the above, the register setting process is performed.

  According to the above means, since the register setting process is performed based on the parameter block in the reset exception process of the microprocessor, just rewriting the parameter block in the nonvolatile semiconductor memory via the host computer, The setting contents of the register can be easily changed. This achieves a function change inside the storage device without relying on the firmware on flash technology.

  At this time, a first interface capable of exchanging signals with the host computer, a second interface capable of exchanging signals with the nonvolatile semiconductor memory, and a work area of the microprocessor The register may include various registers included in the first interface and the second interface, and a part of a storage area in the work RAM.

  The parameter block may include address information for specifying the register, setting contents for the register, and identification information as to whether or not to set the contents in the register. In some cases, the microprocessor may be configured to determine the identification information and set a corresponding register in accordance with the determination result.

  Further, in a storage device having a controller and a rewritable nonvolatile semiconductor memory, the controller includes a host interface, a memory interface connected to the nonvolatile semiconductor memory, a processor that controls the host interface and the memory interface, and the processor Includes a non-rewritable program memory having a first executable program and a work RAM of the processor, and the nonvolatile semiconductor memory stores a second program executable by the processor. A first area and a second area for storing function setting parameters in the controller are formed. In the reset exception processing according to the first program, the processor transfers the second program from the first area to the work RAM, and sets function parameters from the second area to the controller. By transferring the above, the function of the controller can be changed and expanded. Even in this way, it is possible to change and extend the function of the controller simply by rewriting the parameter block in the nonvolatile semiconductor memory via the host computer.

  At this time, the function setting parameter transfer destination can be a predetermined area selected from the control register area of the host interface, the control register area of the memory interface, and the storage area of the work RAM.

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, since the register setting process is performed based on the parameter block in the reset exception process of the microprocessor, the setting contents of the register can be easily changed only by rewriting the parameter block in the nonvolatile semiconductor memory via the host computer. It is possible to change the function of the storage device without relying on the conventional firmware-on-flash technology. Further, such a function change is possible even when there is no free space in the RAM.

  FIG. 1 shows a flash memory card which is an example of a storage device according to the present invention.

  In FIG. 1, 1 is a host computer, and 2 is a flash memory card detachably coupled to the host computer 1. Various signals can be exchanged between the flash memory card 2 and the host computer 1 via the standard bus 101. Although not particularly limited, the host computer 1 is a personal computer.

  The flash memory card 2 includes a flash memory 22 which is an example of a nonvolatile semiconductor memory, and a controller 21 for controlling the operation of the flash memory card 2. Various signals can be exchanged between the controller 21 and the flash memory 22 via the flash bus 102. Here, the flash memory is an example of the nonvolatile semiconductor memory in the present invention.

  The flash memory 22 has a FOF area 221 (first area), which is a storage area for correction modules used in the firmware-on-flash technology, in addition to a user storage area 223 that can store user information. A register setting area 222 (second area), which is a parameter block storage area that allows setting changes, is formed. The contents of the parameter block can be changed using a predetermined command issued from the host computer 1 to the flash memory card 2. Such a parameter block includes address information for specifying a register, setting contents for the register, and identification information as to whether or not to set the contents in the register. At this time, the microprocessor 24 discriminates the identification information, and the corresponding register is set based on the discrimination result.

  Although not particularly limited, the controller 21 is used as a ROM (Read Only Memory) 25 as a program memory for storing firmware, a storage area for correction modules in the firmware on flash technology, and a work area for arithmetic processing in the processor 24. Data can be exchanged between a work RAM (random access memory) 26, a microprocessor 24 capable of processing firmware stored in the ROM 25, and a host computer 1 coupled via a pad (PAD) 29. Host interface 27, flash interface 28 for enabling data exchange with flash memory 22 coupled via pad (PAD) 30, and temporary storage of transfer data. Including data buffer 23.

  The host interface 27 includes various registers (REG) 271 relating to function setting and function expansion of the host interface 27. Although not particularly limited, the register 271 includes a host I / O drive register capable of setting a driving capability of a driver for transmitting various signals to the host computer 1 and a system component capable of setting a frequency of a system clock signal. A peripheral clock and a system clock register capable of setting the number of clocks for stopping clock transmission are included, and these can be set according to the setting information in the register setting area 222 in the flash memory 22 in the reset exception processing of the microprocessor 24.

  Further, the flash interface 28 includes various registers (REG) 281 relating to function setting and function expansion of the flash interface 28. Although not particularly limited, the register 281 includes a flash I / O drive register capable of setting a driving capability of a driver for transmitting various signals to the flash memory 22.

  Further, by using a part of the storage area of the RAM 26, a storage area for valid / invalid identification information for ECC (error correction code) impossible error data output, a storage area for wear leveling count information, a data block per bank A storage area for numerical information is formed. Such a storage area can also be regarded as a register, and such a register can also be set according to the setting information in the register setting area 222 in the flash memory 22.

  FIG. 2 shows an example of the internal configuration of the firmware stored in the ROM 25.

  As shown in FIG. 2, the firmware 201 stored in the ROM 25 includes a power-on processing module, an initial jump table, initial modules 1,. The power-on process module is a module that is executed during the power-on process. The initial jump table indicates the addresses of the initial modules 1,. The initial modules 1,..., And the initial module k are programs divided for each function.

  FIG. 3 shows a flowchart of the microprocessor for processing the reset exception processing program (power-on processing module) stored in the ROM 25.

  First, in step 301, initial setting for each part of the flash memory card 2 is performed. This initial setting includes initial setting of the registers 271 and 281 in the host interface 27 and the flash interface 28, the RAM 26, and further the internal registers of the microprocessor 24.

  Next, at step 302, the initial jump table stored in the ROM 25 is copied to the RAM 26.

  In step 303, the modified firmware management unit of the block address n storing the modified firmware of the flash memory 22 is transferred to the data buffer 23. Thereafter, the microprocessor 24 reads the correction firmware presence / absence flag of the correction firmware manager transferred to the data buffer 23, and checks whether the corrected module or jump table is stored in the block address n of the flash memory 22. (Step 304).

  When the corrected module or jump table is stored at the block address n of the flash memory 22, the processing of step 305 and step 306 is performed. In step 305, the modified firmware storage unit of the block address n in which the modified firmware of the flash memory 22 is stored is transferred to the data buffer 23. In step 306, the modified firmware storage unit transferred to the data buffer 23 is copied to the RAM 26.

  Here, the initial jump table copied from the ROM 25 in step 302 is rewritten to the modified jump table stored in the flash memory 22. In this way, the function can be changed by the conventional firmware on flash technology.

  Then, after the processing of step 306 is completed, the setting contents of the register are changed as necessary. In other words, when it is necessary to change the register settings initially set in step 301, the processing is executed as follows as a process separate from the change process (steps 304 to 306) by the firmware-on-flash technique. .

  The parameter block in the register setting area 222 is checked, and it is determined whether or not there is data setting for changing the area in the RAM 26 (step 307). If it is determined in this determination that data is set, the corresponding data is read from the register setting area 222 and set in the RAM 26.

  Next, the level of the power supply voltage (supply voltage) supplied from the host computer 1 to the flash memory card 2 is checked (step 309). When the supply voltage is 2.4 V or higher, the corresponding data is read from the register setting area 222 so that the 3V drive capability is exhibited, and the register 271 (host I / O drive register) or the register 281 ( Flash I / O drive register). If the supply voltage does not reach 2.4V, the corresponding data is read from the register setting area 222 and the register 271 (host I / O drive) so that 1.8V drive capability can be exhibited. Register) and register 281 (flash I / O drive register). Thereby, the drive capability suitable for the supply voltage at that time is set.

  Next, by checking the parameter block, it is determined whether or not data is set for register change (step 312). In this determination, if it is determined that data is set, the corresponding data is read from the register setting area 222 and set in the corresponding register. Then, the process proceeds to other processing. If it is determined in step 312 that there is no data setting, the process shifts to another process without changing the register setting.

  According to the above example, the following effects can be obtained.

  (1) The flash memory 22 is provided with a register setting area which is a parameter block storage area that allows register settings to be changed. In the reset exception process of the microprocessor 24, the register setting process is performed based on the parameter block. Therefore, the setting contents of the register can be easily changed simply by rewriting the parameter block via the host computer 1.

  (2) The function and effect of the above (1) makes it possible to change the function inside the storage device without using the conventional firmware-on-flash technique.

  (3) Due to the effect of the above (2), it is not necessary to press the free capacity of the RAM 26 and the flash memory 22 which are valuable resources in the conventional farm-on-flash technology.

  Although the invention made by the present inventor has been specifically described above, the present invention is not limited thereto, and it goes without saying that various changes can be made without departing from the scope of the invention.

  For example, an option register that can be set according to the setting information in the register setting area 222 in the flash memory 22 may be provided, and the firmware may be changed by changing the option register. For example, by default, the read operation is prohibited when the flash memory card 2 is locked by a password, but the read operation may be permitted by rewriting the option register. Further, by default, it is permitted to erase data along with the password (forcing erase) while the flash memory card 2 is locked by the password, but this may be prohibited by rewriting the option register. good.

  In the above description, the case where the invention made mainly by the present inventor is applied to the flash memory card, which is the field of use behind the present invention, has been described. However, the present invention is not limited to this and is widely applied to various storage devices. Can be applied.

  The present invention can be applied on the condition that a nonvolatile semiconductor memory in which data can be rewritten by a host computer is included.

1 is a block diagram illustrating a configuration example of a flash memory card which is an example of a storage device according to the present invention. It is explanatory drawing of the internal structure example of the firmware stored in ROM contained in the said flash memory card. It is a flowchart of the microprocessor which processes the power-on process module stored in the said ROM.

Explanation of symbols

1 Host computer 2 Flash memory card 21 Controller 22 Flash memory 23 Data buffer 24 Microprocessor 25 ROM
26 RAM
27 Host interface 28 Flash interface 29, 30 PAD
221 FOF area 222 Register setting area 223 User storage area 271 281 register

Claims (5)

Nonvolatile semiconductor memory capable of rewriting data by a host computer, non-rewritable program memory for storing firmware, a microprocessor for processing the firmware, and a register set by reset exception processing of the microprocessor And including
The nonvolatile semiconductor memory includes a parameter block storage area that allows the setting of the register to be changed,
A storage device in which the register setting process is performed based on the parameter block in the reset exception process of the microprocessor. Used as a work area for the microprocessor, a first interface capable of exchanging signals with the host computer, a second interface capable of exchanging signals with the nonvolatile semiconductor memory Work RAM,
The storage device according to claim 1, wherein the register includes various registers included in the first interface and the second interface, and a part of a storage area in the work RAM. The parameter block includes address information for specifying the register, setting contents for the register, and identification information as to whether or not to set the contents in the register. The microprocessor stores the identification information. The storage device according to claim 2, wherein the corresponding register is set according to the determination result. A storage device having a controller and a rewritable nonvolatile semiconductor memory,
The controller includes a host interface, a memory interface connected to the nonvolatile semiconductor memory, a processor for controlling the host interface and the memory interface, a non-rewritable program memory having a first program executable by the processor, and A work RAM for the processor;
The nonvolatile semiconductor memory has a first area for storing a second program that can be executed by the processor, and a second area for storing a function setting parameter inside the controller.
In the reset exception processing according to the first program, the processor transfers the second program from the first area to the work RAM, and sets function setting parameters from the second area to the controller. A storage device in which the function of the controller can be changed and expanded by the transfer. 5. The storage according to claim 4, wherein the function setting parameter transfer destination is a predetermined area selected from a control register area of the host interface, a control register area of the memory interface, and a storage area of the work RAM. apparatus.

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