JP2005229057A - High-frequency integrated circuit and its manufacturing method - Google Patents

High-frequency integrated circuit and its manufacturing method Download PDF

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JP2005229057A
JP2005229057A JP2004038659A JP2004038659A JP2005229057A JP 2005229057 A JP2005229057 A JP 2005229057A JP 2004038659 A JP2004038659 A JP 2004038659A JP 2004038659 A JP2004038659 A JP 2004038659A JP 2005229057 A JP2005229057 A JP 2005229057A
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film
switch
silicon substrate
capacitor
forming
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JP4541718B2 (en
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Tamotsu Nishino
有 西野
Yukihisa Yoshida
幸久 吉田
Shiyaku Ri
相錫 李
Sunao Takagi
直 高木
Kenichi Miyaguchi
賢一 宮口
Masaki Hanya
政毅 半谷
Kenji Kawakami
憲司 川上
Satoshi Hamano
聡 濱野
Masaomi Tsuru
正臣 津留
Moriyasu Miyazaki
守▲泰▼ 宮▲崎▼
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-frequency device, having simple structure and simple manufacturing processes, as compared with conventional technology and being capable of further reducing the transmission loss, and to provide a method for manufacturing the high-frequency device. <P>SOLUTION: A high frequency integrated circuit is constituted of forming two different elements out of a capacitor, an inductor, a line, and a switch on a silicon substrate by forming a plurality of depression parts which are mutually independent on one surface of the silicon substrate; forming a metal film, consisting of ground and a conductor pattern on the surface of the depression part side; forming a dielectric film on the surface of the metal film; and forming two different metallic patterns among the capacitor, the inductor, the line, or the switch on the dielectric film so as to correspond to the depression parts in the same process. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、マイクロ波、準ミリ波及びミリ波などの高周波信号を伝送し又は処理する、高周波伝送線路、高周波デバイスや高周波回路などの高周波集積回路に関する。   The present invention relates to a high-frequency integrated circuit such as a high-frequency transmission line, a high-frequency device, or a high-frequency circuit that transmits or processes high-frequency signals such as microwaves, quasi-millimeter waves, and millimeter waves.

近年、高周波伝送技術の向上への要望が高まるなか、マイクロ波、準ミリ波及びミリ波などの高周波信号を処理するための高周波受動回路では、挿入損失を小さくするために、ガリウム砒素基板などの半導体基板や、サファイア基板などの低誘電率の誘電体基板を用い、かつその基板の厚さを薄くしていた。しかしながら、低誘電率の誘電体基板は一般に高価であり、また、誘電体基板の薄板化はせいぜい100μm程度までで、高い周波数帯での電気的性能の向上には限界があった。一方、安価なシリコン基板などの半導体基板では誘電損失が大きいため、十分な電気的特性が得られなかった。   In recent years, with increasing demand for improvement of high-frequency transmission technology, high-frequency passive circuits for processing high-frequency signals such as microwaves, quasi-millimeter waves, and millimeter waves have been developed to reduce insertion loss, such as gallium arsenide substrates. A low dielectric constant dielectric substrate such as a semiconductor substrate or a sapphire substrate is used, and the thickness of the substrate is reduced. However, a dielectric substrate having a low dielectric constant is generally expensive, and the thickness of the dielectric substrate can be reduced to about 100 μm at most, and there is a limit to improving the electrical performance in a high frequency band. On the other hand, an inexpensive semiconductor substrate such as a silicon substrate has a large dielectric loss, so that sufficient electrical characteristics cannot be obtained.

近年、マイクロマシニング技術を用いた高周波デバイスである、いわゆるRF MEMS(Radio Frequency Micro-Electro-Mechanical-Systems)デバイスが注目されている。本技術では、高アスペクト構造やメンブレイン構造を作製できるため、安価なシリコン基板上に高周波回路を作製しても基板の影響を受けにくく、従って、低コストで高性能な高周波デバイスが期待できる。また、近年、高周波用のシリコンCMOS回路において、その使用可能な上限周波数がGHz帯まで伸びており、シリコンのCMOS能動回路とRF−MEMS受動回路をモノリシック化することによって、高周波用モジュールの高機能化と小型化が期待されている。   In recent years, so-called RF MEMS (Radio Frequency Micro-Electro-Mechanical-Systems) devices, which are high-frequency devices using micromachining technology, have attracted attention. In this technique, since a high aspect structure and a membrane structure can be manufactured, even if a high-frequency circuit is manufactured on an inexpensive silicon substrate, it is hardly affected by the substrate, and therefore a high-performance high-frequency device can be expected at a low cost. In recent years, in a high-frequency silicon CMOS circuit, the upper limit frequency that can be used has been extended to the GHz band. By making the silicon CMOS active circuit and the RF-MEMS passive circuit monolithic, the high-frequency module has high functionality. And miniaturization is expected.

これまで、RF MEMS技術を用いて基板の誘電損失を低減する代表的な構造として、誘電体メンブレイン支持膜上に配線導体を形成する構造(以下、メンブレイン構造という。)が例えば、非特許文献1において開示されている。この非特許文献1において開示された、シールドされたメンブレインマイクロストリップ線路においては、上面に接地導体膜を有する第1の半導体基板上に、上面にストリップ導体を有する誘電体メンブレイン支持膜が形成されかつ下面に空隙が形成された第2の半導体基板を重ね、さらに、当該第2の半導体基板上に、下面に凹部を有する半導体基板を重ねることにより、マイクロストリップ線路を構成している。   Up to now, as a typical structure for reducing the dielectric loss of a substrate using RF MEMS technology, a structure in which a wiring conductor is formed on a dielectric membrane support film (hereinafter referred to as a membrane structure) is, for example, non-patent. It is disclosed in Document 1. In the shielded membrane microstrip line disclosed in Non-Patent Document 1, a dielectric membrane support film having a strip conductor on the upper surface is formed on a first semiconductor substrate having a ground conductor film on the upper surface. A microstrip line is configured by superimposing a second semiconductor substrate having a void formed on the lower surface and further overlapping a semiconductor substrate having a recess on the lower surface on the second semiconductor substrate.

以上のように構成された従来技術に係るメンブレインマイクロストリップ線路において、高周波信号を伝送させたとき、当該高周波信号の電磁界は、ストリップ導体と接地導体膜との間の誘電体メンブレイン支持膜と空隙の空気層とに分布するが、これら半導体基板にはほとんど電磁界が発生しないために、伝送損失を低減できるという効果を有している。   In the membrane microstrip line according to the related art configured as described above, when a high frequency signal is transmitted, the electromagnetic field of the high frequency signal is generated by the dielectric membrane support film between the strip conductor and the ground conductor film. However, since almost no electromagnetic field is generated in these semiconductor substrates, the transmission loss can be reduced.

Stephen V. Robertson et al.,“A 10-60-GHz Micromachined Directional Coupler”,IEEE Transactions on Microwave Theory & Techniques, Vol.46, No.11, p.1845-1849, November 1998。Stephen V. Robertson et al., “A 10-60-GHz Micromachined Directional Coupler”, IEEE Transactions on Microwave Theory & Techniques, Vol.46, No.11, p.1845-1849, November 1998.

しかしながら、従来技術に係るメンブレインマイクロストリップ線路においては、2枚以上の半導体基板を用いるために、その構造が複雑であり、また、製造工程が複雑となり、製造コストが増大するという問題点があった。また、この従来技術において、いまだ伝送損失が比較的高いという問題点があった。   However, since the membrane microstrip line according to the prior art uses two or more semiconductor substrates, the structure is complicated, the manufacturing process is complicated, and the manufacturing cost increases. It was. Further, this conventional technique still has a problem that the transmission loss is relatively high.

本発明の目的は以上の問題点を解決し、従来技術に比較して、構造が簡単であって、製造工程が簡単であり、しかも伝送損失をさらに低減できる高周波集積回路とその製造方法を提供することにある。   The object of the present invention is to provide a high-frequency integrated circuit and a method for manufacturing the same, which solves the above-described problems and has a simple structure, a simple manufacturing process, and a further reduction in transmission loss compared to the prior art. There is to do.

本発明に係る高周波集積回路は、シリコン基板の一方の面に互いに独立した複数の窪み部を穿ち、この窪み部側の表面に導体パターンの金属膜を形成し、この金属膜の上に空気層を挟んでさらに誘電体の膜を形成し、この誘電体の膜上で且つ上記窪み部に対応する位置にコンデンサ、インダクタ、線路、スイッチの何れか異なる2つの金属パターンを同一の工程で形成してシリコン基板上にコンデンサ、インダクタ、線路、スイッチの何れか異なる2つの素子を形成してなる。   A high-frequency integrated circuit according to the present invention has a plurality of independent recesses formed on one surface of a silicon substrate, a metal film having a conductor pattern is formed on the surface of the recess, and an air layer is formed on the metal film. A dielectric film is further formed on both sides of the capacitor, and two different metal patterns of capacitors, inductors, lines, and switches are formed in the same process on the dielectric film and at positions corresponding to the recesses. Thus, two different elements such as capacitors, inductors, lines, and switches are formed on the silicon substrate.

また、本発明に係る高周波集積回路の製造方法は、シリコン基板の表面をエッチングして、所定の深さを有する窪み部を形成する工程と、シリコン基板の窪み部側全表面に、金属膜を形成する工程と、導体パターンを形成するため金属膜の不要な箇所を除去する工程と、シリコン基板の表面、その窪み部及び金属膜上に、レジスト犠牲層を塗布し、窪み部の内部をレジスト犠牲層のレジストにより充填する工程と、レジスト犠牲層のうち、窪み部より大きいパターン部分を残すようにエッチングし、それ以外のパターン部分を除去する工程と、レジスト犠牲層が形成されたシリコン基板上を、化学機械的研磨法を用いてレジスト犠牲層の表面をシリコン基板表面と同一平面上になるまで研磨し平坦化する工程と、この研磨した表面に誘電体膜を形成した後、誘電体膜上に、金属性配線導体膜を形成した後、写真製版法とイオンビームエッチング法を用いて、当該配線導体膜がインダクタ、コンデンサ、スイッチ、線路の何れか2以上の所定形状の導体となるように所定のパターンでエッチングすることによりインダクタ、コンデンサ、スイッチ、線路の何れか2以上のための配線導体膜を形成する工程と、レジスト犠牲層の直上部であって、配線導体膜が形成されていない誘電体支持膜の部分において、写真製版法及び反応性イオンエッチング法を用いて、誘電体支持膜をその厚さ方向で貫通する矩形形状の開口部を形成し、ウェットエッチング法を用いて開口部を介してレジスト犠牲層をエッチングすることにより、当該レジスト犠牲層を除去する工程とを備える。   The method for manufacturing a high-frequency integrated circuit according to the present invention includes a step of etching a surface of a silicon substrate to form a recess having a predetermined depth, and a metal film is formed on the entire surface of the recess of the silicon substrate. A step of forming, a step of removing an unnecessary portion of the metal film to form a conductor pattern, a resist sacrificial layer is applied on the surface of the silicon substrate, its depression and the metal film, and the inside of the depression is resisted. A step of filling the sacrificial layer with a resist, a step of etching the resist sacrificial layer so as to leave a pattern portion larger than the recessed portion, and removing the other pattern portion; and a silicon substrate on which the resist sacrificial layer is formed. The step of polishing and planarizing the surface of the resist sacrificial layer using a chemical mechanical polishing method until the surface of the resist sacrificial layer is flush with the surface of the silicon substrate, and a dielectric film on the polished surface After forming, a metal wiring conductor film is formed on the dielectric film, and then the wiring conductor film is formed of any two or more of an inductor, a capacitor, a switch, and a line by using a photoengraving method and an ion beam etching method. A step of forming a wiring conductor film for any two or more of an inductor, a capacitor, a switch, and a line by etching in a predetermined pattern so as to be a conductor of a predetermined shape, and immediately above the resist sacrificial layer, In the portion of the dielectric support film where the wiring conductor film is not formed, a rectangular opening that penetrates the dielectric support film in the thickness direction is formed using a photoengraving method and a reactive ion etching method, And etching the resist sacrificial layer through the opening using a wet etching method to remove the resist sacrificial layer.

本発明に係る高周波集積回路によれば、基板表面に窪み部を有する基板と、少なくとも上記窪み部を含む上記基板上に形成された第1の導体パターンと、上記基板の窪み部の直上に空隙を挟んで上記基板上に形成された誘電体膜と、上記誘電体膜の表面の一部に形成された第2の導体パターンとを備え、上記第1の導体パターンと第2の導体パターンはインダクタ、コンデンサ、スイッチ、線路の異なる2つの機能要素を同一の工程で形成する。従って、従来技術に比較して、構造が簡単であって、製造工程が簡単であり、しかも伝送損失をさらに低減できる高周波装置とその製造方法を提供することができる。   According to the high frequency integrated circuit of the present invention, the substrate having a depression on the substrate surface, the first conductor pattern formed on the substrate including at least the depression, and the gap directly above the depression of the substrate. A dielectric film formed on the substrate across the substrate, and a second conductor pattern formed on a part of the surface of the dielectric film, wherein the first conductor pattern and the second conductor pattern are Two functional elements having different inductors, capacitors, switches, and lines are formed in the same process. Therefore, it is possible to provide a high-frequency device and a method for manufacturing the same that have a simple structure, a simple manufacturing process, and can further reduce transmission loss as compared with the prior art.

以下、この発明の実施の一形態を説明する。
実施の形態1.
図1はこの発明の実施の形態による移相回路である。101,102は中空線路を用いた分岐線路,103,104,105,106は静電力により動作する微小なスイッチ,107,108はコの字を交互に複数組み合わせた形状の低域通過フィルタのコイル,109は低域通過フィルタのコンデンサ,110,111は高域通過フィルタのコンデンサ,112は渦巻状の高域通過フィルタのコイル,201は入力端子,202は出力端子,203はスイッチ103の制御端子,204はスイッチ104の制御端子,205はスイッチ105の制御端子,206はスイッチ106の制御端子である。
An embodiment of the present invention will be described below.
Embodiment 1 FIG.
FIG. 1 shows a phase shift circuit according to an embodiment of the present invention. 101, 102 are branch lines using hollow lines, 103, 104, 105, 106 are minute switches that operate by electrostatic force, 107, 108 are coils of a low-pass filter having a shape in which a plurality of U-shapes are alternately combined. , 109 are low-pass filter capacitors, 110 and 111 are high-pass filter capacitors, 112 is a spiral high-pass filter coil, 201 is an input terminal, 202 is an output terminal, and 203 is a control terminal for the switch 103. 204 are control terminals of the switch 104, 205 is a control terminal of the switch 105, and 206 is a control terminal of the switch.

次に作成方法について説明する。
図2はシリコン基板の加工を示す図である。300はシリコン基板,301は入力部の分岐中空線路のための窪み部,302は出力部の分岐中空線路のための窪み部,303はスイッチ103のための窪み部,304はスイッチ104のための窪み部,305はスイッチ105のための窪み部,306はスイッチ106のための窪み部,307はコイル107のための窪み部,308はコイル108のための窪み部,309はコンデンサ109のための窪み部,310は高域通過フィルタのコンデンサ110,111,コイル112のための窪み部,311はコイル112をグランドへ接続するため窪み310内に残された突起である。以上のシリコン基板上の窪み部はウェットエッチングあるいはドライエッチングにより作成される。
Next, a creation method will be described.
FIG. 2 is a diagram showing processing of the silicon substrate. 300 is a silicon substrate, 301 is a recess for the branched hollow line of the input section, 302 is a recess for the branch hollow line of the output section, 303 is a recess for the switch 103, and 304 is for the switch 104. Indentation, 305 is indentation for switch 105, 306 is indentation for switch 106, 307 is indentation for coil 107, 308 is indentation for coil 108, and 309 is for capacitor 109 A depression 310 is a depression for the capacitors 110 and 111 and the coil 112 of the high-pass filter, and 311 is a protrusion left in the depression 310 to connect the coil 112 to the ground. The depressions on the silicon substrate are created by wet etching or dry etching.

図3は図2のシリコン基板上の第1の導体パターン層を示す図である。400は共通のグランド,401aはスイッチ103の上部誘電体膜を引き付けるための電極,402aはスイッチ103の誘電体膜上の切り欠き線路との接点,403aは上記電極電圧をかけるための制御線,404aは上記制御線を外部と接続するための電極パッド,401bはスイッチ104の上部誘電体膜を引き付けるための電極,402bはスイッチ104の誘電体膜上の切り欠き線路との接点,403bは上記電極電圧をかけるための制御線,404bは上記制御線を外部と接続するための電極パッド,401cはスイッチ105の上部誘電体膜を引き付けるための電極,402cはスイッチ105の誘電体膜上の切り欠き線路との接点,403cは上記電極電圧をかけるための制御線,404cは上記制御線を外部と接続するための電極パッド,401dはスイッチ106の上部誘電体膜を引き付けるための電極,402dはスイッチ106の誘電体膜上の切り欠き線路との接点,403dは上記電極電圧をかけるための制御線,404dは上記制御線を外部と接続するための電極パッド,405は入力端子のためのグランド除去部,406は出力端子のためのグランド除去部である。
この導体パターンの形成はシリコン基板300の全面にスパッタリング法などを用いて共通のグランド400を形成し、その後写真製版法などにより、グランド400から上記各パターンを形成する。
FIG. 3 is a diagram showing a first conductor pattern layer on the silicon substrate of FIG. 400 is a common ground, 401a is an electrode for attracting the upper dielectric film of the switch 103, 402a is a contact point with a notch line on the dielectric film of the switch 103, 403a is a control line for applying the electrode voltage, 404a is an electrode pad for connecting the control line to the outside, 401b is an electrode for attracting the upper dielectric film of the switch 104, 402b is a contact with a notch line on the dielectric film of the switch 104, and 403b is the above-mentioned A control line for applying an electrode voltage, 404b is an electrode pad for connecting the control line to the outside, 401c is an electrode for attracting the upper dielectric film of the switch 105, and 402c is a cut on the dielectric film of the switch 105. 403c is a control line for applying the electrode voltage, 404c is for connecting the control line to the outside. 401d is an electrode for attracting the upper dielectric film of the switch 106, 402d is a contact point with a notch line on the dielectric film of the switch 106, 403d is a control line for applying the electrode voltage, 404d Is an electrode pad for connecting the control line to the outside, 405 is a ground removal unit for the input terminal, and 406 is a ground removal unit for the output terminal.
The conductor pattern is formed by forming a common ground 400 on the entire surface of the silicon substrate 300 using a sputtering method or the like, and then forming each pattern from the ground 400 by a photoengraving method or the like.

図4は図3の導体パターン形成後,レジスト剤を表面に塗布し,その後,窪みの中に充填されたレジスト剤以外のレジスト剤を平坦化プロセスにより取り除いた上に作成された第2の導体パターン層を示す図である。501は低域通過フィルタのコンデンサ109の下部電極,502は上記下部電極と共通グランド400を接続するためのパターン,503は高域通過フィルタのコンデンサ110の下部電極,504は後に作成する誘電体膜上の線路と上記下部電極を接続する為のパターン,505は高域通過フィルタのコンデンサ111の下部電極,506は後に作成する誘電体膜上の線路と上記下部電極を接続する為のパターンである。これらは窪み部に充填されたレジスト剤の上に形成される。この後,例えば窒化シリコンのような誘電体を1μmほどの厚みで積層することで誘電体膜を作成し,その上に第3の導体パターンを図1のように作成し,最後に窪み部の上部に作成された誘電体膜にあけた穴より,内部のレジスト剤をアセトンなどを利用して取り除く。   FIG. 4 shows the second conductor formed after applying the resist pattern on the surface after forming the conductor pattern of FIG. 3, and then removing the resist agent other than the resist agent filled in the recesses by the planarization process. It is a figure which shows a pattern layer. Reference numeral 501 denotes a lower electrode of the low-pass filter capacitor 109, 502 a pattern for connecting the lower electrode and the common ground 400, 503 a lower electrode of the high-pass filter capacitor 110, and 504 a dielectric film to be formed later. A pattern for connecting the upper line and the lower electrode, 505 is a lower electrode of the capacitor 111 of the high-pass filter, and 506 is a pattern for connecting the line on the dielectric film to be formed later and the lower electrode. . These are formed on the resist agent filled in the depressions. Thereafter, a dielectric film such as silicon nitride is laminated with a thickness of about 1 μm to form a dielectric film, and a third conductor pattern is formed thereon as shown in FIG. The internal resist agent is removed using acetone or the like from the hole formed in the dielectric film formed on the top.

次に動作について説明する。
図5は図1の移相回路の等価回路を示す図である。601は入力端子101,602は出力端子102,603はスイッチ103,604はスイッチ104,605はスイッチ105,606はスイッチ106,607はコイル107,608はコイル108,609はコンデンサ109,610はコンデンサ110,611はコンデンサ111,612はコイル112を等価的に表している。スイッチ603,604が接続状態,スイッチ605,606が開放状態のとき,入力端子601から入力された高周波信号はコイル607,608,およびコンデンサ609で構成された低域通過フィルタを通り,出力端子602へ出力される。コイル607,608は導体の下部が中空になっているためシリコン基板の影響を受けず,低損失である。
Next, the operation will be described.
FIG. 5 is a diagram showing an equivalent circuit of the phase shift circuit of FIG. Reference numeral 601 denotes an input terminal 101, 602 an output terminal 102, 603 a switch 103, 604 a switch 104, 605 a switch 105, 606 a switch 106, 607 a coil 107, 608 a coil 108, 609 a capacitor 109, and 610 a capacitor Reference numerals 110 and 611 denote capacitors 111 and 612 equivalently represent the coil 112. When the switches 603 and 604 are in the connected state and the switches 605 and 606 are in the open state, the high-frequency signal input from the input terminal 601 passes through the low-pass filter composed of the coils 607 and 608 and the capacitor 609 and passes through the output terminal 602. Is output. The coils 607 and 608 are low in loss without being affected by the silicon substrate because the lower part of the conductor is hollow.

スイッチ603,604が開放状態,スイッチ605,606が接続状態のとき,入力端子601から入力された高周波信号はコンデンサ610,611,およびコイル612で構成された高域通過フィルタを通り,出力端子602へ出力される。コイル612は導体の下部が中空になっているためシリコン基板の影響を受けず,低損失である。また,どちらの場合にも入力端子601からスイッチ603あるいは605までの線路は中空構造のためシリコン基板の影響を受けず,低損失である。また,どちらの場合にもスイッチ604あるいは606から出力端子602までの線路は中空構造のためシリコン基板の影響を受けず,低損失である。さらに,低域通過フィルタと高域通過フィルタの通過域での位相は大きな差があり,これらのフィルタを上記のように切り替えることで位相を変化させることができる。   When the switches 603 and 604 are in the open state and the switches 605 and 606 are in the connected state, the high-frequency signal input from the input terminal 601 passes through the high-pass filter formed by the capacitors 610 and 611 and the coil 612, and the output terminal 602. Is output. The coil 612 is low in loss without being affected by the silicon substrate because the lower portion of the conductor is hollow. In either case, since the line from the input terminal 601 to the switch 603 or 605 is hollow, it is not affected by the silicon substrate and has a low loss. In either case, since the line from the switch 604 or 606 to the output terminal 602 is hollow, it is not affected by the silicon substrate and has a low loss. Furthermore, there is a large difference in the phase in the pass band between the low-pass filter and the high-pass filter, and the phase can be changed by switching these filters as described above.

このようにして,高機能な高周波回路に低損失なコイルやコンデンサと同時に低損失な線路や低損失な切り替えスイッチを一つの基板の上に,共通したプロセスで,同時に作成することができるので,高周波回路を低価格に製造することができる。   In this way, it is possible to simultaneously create a low loss line and a low loss changeover switch on a single substrate in a common process simultaneously with a low loss coil and capacitor in a high-performance high-frequency circuit. A high-frequency circuit can be manufactured at a low price.

また,上記は移相回路の例であるが,半導体回路を含むシリコン基板上に回路を切り替えるための微小な機械スイッチや,発信器や増幅器の高性能化に有効な低損失コイルを作成して,低価格で高性能な携帯端末装置を得ることもできる。   Although the above is an example of a phase shift circuit, a small mechanical switch for switching a circuit on a silicon substrate including a semiconductor circuit and a low-loss coil effective for improving the performance of a transmitter and an amplifier are prepared. Therefore, it is possible to obtain a high-performance portable terminal device at a low price.

ここで微小なスイッチ(高周波スイッチ)の原理について説明する
図6はこの微小なスイッチ(高周波スイッチ)の原理を説明するための図である。図において、制御端子4a,4bに電圧を印加した場合、例えば正の電圧を印加した場合、第1の電極6a,6bの表面上に正電荷が発生すると共に、静電誘導により第2の電極8a,8bの下面に負電荷が現れ、両者間の吸引力により、第2の電極8a,8bは第1の電極6a,6b側に引き寄せられる。その際、誘電体膜7上に形成されている信号線9も同時に第1の電極6a,6b側に引き寄せられ、信号線9aと地導体3とが誘電体膜7aを介して接触することになる。
これら信号線9aおよび地導体3の接触時における誘電体膜7aは、容量とみなすことができ、この実施の形態2による高周波スイッチでは、電気的結合の強弱によってスイッチをオフ状態またはオン状態に切換えることができる。
Here, the principle of the minute switch (high frequency switch) will be described. FIG. 6 is a diagram for explaining the principle of the minute switch (high frequency switch). In the figure, when a voltage is applied to the control terminals 4a and 4b, for example, when a positive voltage is applied, positive charges are generated on the surfaces of the first electrodes 6a and 6b, and the second electrode is caused by electrostatic induction. Negative charges appear on the lower surfaces of 8a and 8b, and the second electrodes 8a and 8b are attracted toward the first electrodes 6a and 6b by the attractive force between them. At this time, the signal line 9 formed on the dielectric film 7 is simultaneously drawn toward the first electrodes 6a and 6b, and the signal line 9a and the ground conductor 3 are in contact with each other through the dielectric film 7a. Become.
The dielectric film 7a when the signal line 9a and the ground conductor 3 are in contact with each other can be regarded as a capacitor. In the high-frequency switch according to the second embodiment, the switch is turned off or on depending on the strength of electrical coupling. be able to.

この発明は、半導体回路を含むシリコン基板上に回路を切り替えるための微小な機械スイッチや,発信器や増幅器の高性能化に有効な低損失コイルを作成でき,低価格で高性能な携帯端末装置に適用できる。   The present invention can produce a small mechanical switch for switching a circuit on a silicon substrate including a semiconductor circuit, a low-loss coil effective for improving the performance of a transmitter and an amplifier, and is a low-cost and high-performance portable terminal device. Applicable to.

この発明の実施の形態1による移相回路の斜視図である。It is a perspective view of the phase shift circuit by Embodiment 1 of this invention. 図1のシリコン基板の加工を示す図である。It is a figure which shows the process of the silicon substrate of FIG. 図2のシリコン基板上の第1の導体パターン層を示す図である。FIG. 3 is a diagram showing a first conductor pattern layer on the silicon substrate of FIG. レジスト剤の平坦化プロセス後に作成された第2の導体パターン層を示す図である。It is a figure which shows the 2nd conductor pattern layer produced after the planarization process of a resist agent. 図1の移相回路の等価回路を示す図である。FIG. 2 is a diagram showing an equivalent circuit of the phase shift circuit of FIG. この発明の微小なスイッチの原理を説明するための図である。It is a figure for demonstrating the principle of the micro switch of this invention.

符号の説明Explanation of symbols

4a,4b;制御端子、6a,6b;第1の電極、8a,8b;第2の電極、7;誘電体膜、9;信号線、3;地導体、7a;誘電体膜、101,102;分岐線路、103,104,105,106;微小なスイッチ、107,108;低域通過フィルタのコイル、109;低域通過フィルタのコンデンサ、110,111;高域通過フィルタのコンデンサ、112;高域通過フィルタのコイル、201;入力端子、202;出力端子、203〜206;制御端子、300;シリコン基板、301〜310;窪み部、311;突起、400;共通のグランド、401a,401b,401c,401d;電極、402a,402b,402c,402d;接点、403a,403b,403c,403d;制御線、404a,404b,404c,404d;電極パッド、405;切り欠き、406;切り欠き、501;下部電極、502;パターン、503;下部電極、504;パターン、505;下部電極、506;パターン、601;入力端子、602;出力端子、603;スイッチ、604;スイッチ、605;スイッチ、606;スイッチ、607;コイル、608;コイル、609;コンデンサ、610;コンデンサ、611;コンデンサ、612;コイル。   4a, 4b; control terminal, 6a, 6b; first electrode, 8a, 8b; second electrode, 7; dielectric film, 9; signal line, 3; ground conductor, 7a; Branch line, 103, 104, 105, 106; minute switch, 107, 108; coil of low-pass filter, 109; capacitor of low-pass filter, 110, 111; capacitor of high-pass filter, 112; high Pass-pass filter coil, 201; input terminal, 202; output terminal, 203 to 206; control terminal, 300; silicon substrate, 301 to 310; recess, 311; projection, 400; common ground, 401a, 401b, 401c 401d; electrodes, 402a, 402b, 402c, 402d; contacts, 403a, 403b, 403c, 403d; control lines, 404a, 404b, 40 Electrode pad, 405; notch, 406; notch, 501; lower electrode, 502; pattern, 503; lower electrode, 504; pattern, 505; lower electrode, 506; pattern, 601; input terminal, 602 Output terminal 603; switch 604; switch 605; switch 606; switch 607; coil 608; coil 609; capacitor 610; capacitor 611; capacitor 612;

Claims (3)

シリコン基板の一方の面に互いに独立した複数の窪み部を穿ち、この窪み部側の表面に金属膜の導体パターンを形成し、この金属膜の上に空気層を挟んで誘電体の膜を形成し、この誘電体の膜上あるいは膜の両面で且つ上記窪み部に対応する位置にコンデンサ、インダクタ、線路、スイッチの何れか異なる2つの金属パターンを同一の工程で形成してシリコン基板上にコンデンサ、インダクタ、線路、スイッチの何れか異なる2つの素子を形成してなる高周波集積回路。   A plurality of independent recesses are drilled on one surface of the silicon substrate, a metal film conductor pattern is formed on the surface of the recess, and a dielectric film is formed on the metal film with an air layer in between. Then, two different metal patterns of capacitors, inductors, lines, and switches are formed in the same process on the dielectric film or on both surfaces of the film and corresponding to the depressions, and the capacitor is formed on the silicon substrate. , A high-frequency integrated circuit formed by forming two different elements of an inductor, a line, and a switch. シリコン基板の表面をエッチングして、所定の深さを有する窪み部を形成する工程と、シリコン基板の窪み部側全表面に、金属膜を形成する工程と、導体パターンを形成するため金属膜の不要な箇所を除去する工程と、シリコン基板の表面、その窪み部及び金属膜上に、レジスト犠牲層を塗布し、窪み部の内部をレジスト犠牲層のレジストにより充填する工程と、レジスト犠牲層のうち、窪み部より大きいパターン部分を残すようにエッチングし、それ以外のパターン部分を除去する工程と、レジスト犠牲層が形成されたシリコン基板上を、化学機械的研磨法を用いてレジスト犠牲層の表面をシリコン基板表面と同一平面上になるまで研磨し平坦化する工程と、この研磨した表面に誘電体膜を形成した後、誘電体膜上に、金属性配線導体膜を形成した後、写真製版法とイオンビームエッチング法を用いて、当該配線導体膜がインダクタ、コンデンサ、スイッチ、線路の何れか2以上の所定形状の導体となるように所定のパターンでエッチングすることによりインダクタ、コンデンサ、スイッチ、線路の何れか2以上のための配線導体膜を形成する工程と、レジスト犠牲層の直上部であって、配線導体膜が形成されていない誘電体支持膜の部分において、写真製版法及び反応性イオンエッチング法を用いて、誘電体支持膜をその厚さ方向で貫通する矩形形状の開口部を形成し、ウェットエッチング法を用いて開口部を介してレジスト犠牲層をエッチングすることにより、当該レジスト犠牲層を除去する工程とを備えた高周波集積回路の製造方法。   Etching the surface of the silicon substrate to form a recess having a predetermined depth; forming a metal film on the entire surface of the recess of the silicon substrate; and forming a metal film to form a conductor pattern A step of removing unnecessary portions, a step of applying a resist sacrificial layer on the surface of the silicon substrate, its depression and the metal film, and filling the inside of the depression with the resist of the resist sacrificial layer; and Of these, etching is performed so as to leave a pattern portion larger than the recess, and the other pattern portion is removed, and the silicon substrate on which the resist sacrificial layer is formed is formed on the resist sacrificial layer using a chemical mechanical polishing method. A step of polishing and planarizing the surface until it is flush with the surface of the silicon substrate, and forming a dielectric film on the polished surface, and then forming a metallic wiring conductor film on the dielectric film Then, using a photoengraving method and an ion beam etching method, the wiring conductor film is etched in a predetermined pattern so that it becomes a conductor having a predetermined shape of any two or more of an inductor, a capacitor, a switch, and a line. A step of forming a wiring conductor film for any two or more of an inductor, a capacitor, a switch, and a line; and a portion of the dielectric support film that is directly above the resist sacrificial layer and has no wiring conductor film formed thereon. A rectangular opening that penetrates the dielectric support film in the thickness direction is formed using photolithography and reactive ion etching, and the resist sacrificial layer is etched through the opening using wet etching. And a step of removing the resist sacrificial layer. 上記高周波集積回路は、スイッチと2個のコンデンサの直列回路の上記コンデンサとコンデンサの間に接地されたコイルが接続された高域通過フィルタ回路と、スイッチと2個のコイルの直列回路の上記コイルとコイルの間にコンデンサ接地されたが接続された低域通過フィルタ回路とが切り換え可能な移相回路であることを特徴とする請求項1記載の高周波集積回路。   The high-frequency integrated circuit includes a high-pass filter circuit in which a grounded coil is connected between the capacitor and the capacitor in a series circuit of a switch and two capacitors, and the coil in a series circuit of the switch and two coils. 2. The high-frequency integrated circuit according to claim 1, wherein the phase shift circuit is switchable between a low-pass filter circuit connected between a coil and a capacitor grounded but connected.
JP2004038659A 2004-02-16 2004-02-16 High frequency integrated circuit and manufacturing method thereof Expired - Fee Related JP4541718B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011040882A (en) * 2009-08-07 2011-02-24 Sony Corp High frequency device
JP2011044774A (en) * 2009-08-19 2011-03-03 Japan Aerospace Exploration Agency Analog/digital laminated variable phase shifter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213803A (en) * 1994-10-31 1996-08-20 Texas Instr Inc <Ti> Phase shifter containing switch for high-frequency signal
JP2004007424A (en) * 2002-04-25 2004-01-08 Mitsubishi Electric Corp High frequency apparatus and manufacturing method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213803A (en) * 1994-10-31 1996-08-20 Texas Instr Inc <Ti> Phase shifter containing switch for high-frequency signal
JP2004007424A (en) * 2002-04-25 2004-01-08 Mitsubishi Electric Corp High frequency apparatus and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011040882A (en) * 2009-08-07 2011-02-24 Sony Corp High frequency device
JP2011044774A (en) * 2009-08-19 2011-03-03 Japan Aerospace Exploration Agency Analog/digital laminated variable phase shifter

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