JP2005228863A - Semiconductor device, manufacturing method thereof and sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide manufacture technology of a semiconductor device, with which the inexpensive easily sealed semiconductor device can be obtained. <P>SOLUTION: A first substrate where a plurality of semiconductor elements are installed, and a second substrate where a plurality of recessed parts are formed in positions, corresponding to a plurality of the semiconductor elements on the first substrate are bonded, by making the first substrate and the second substrate face each other so that the recessed parts on the second substrate individually cover the semiconductor elements on the first substrate. Thus, problem is solved whereby by the manufacturing method of the semiconductor device, which includes a bonding process of forming a junction for the first substrate and the second substrate, and by a dividing process of obtaining the semiconductor device which is made into pieces by dividing the junction. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a manufacturing technique of a semiconductor device from which an inexpensive and easily sealed semiconductor device can be obtained.

  In recent years, due to the development of semiconductor microfabrication technology, a system (MEMS: Micro Electro Mechanical Systems) in which minute mechanical parts and electronic circuits are integrated has attracted attention. Examples of such MEMS devices include various sensors using silicon micromachining. In order to improve the sensing accuracy, such a sensor is hermetically sealed (hermetic sealing) using, for example, a hermetic package using ceramics or metal.

Non-Patent Document 1 discloses a vacuum package in which a cavity formed in a silicon chip is sealed by covering both surfaces of the silicon chip with flat glass substrates. Moreover, a vacuum package is disclosed in which a glass substrate on which a silicon rotor is formed is sealed by bonding it to another glass substrate with a silicon frame interposed.
Masayoshi Esashi, “Vacuum Package”, June 2000 issue of OPTRONICS Inc. InterLab, [Search February 12, 2004], Internet <URL: HYPERLINK "http://mems.mech.tohoku.ac.jp/esashilab/ intlab / spe1ess.pdf "http://mems.mech.tohoku.ac.jp/esashilab/intlab/spe1ess.pdf>

  However, conventional hermetic packages using ceramics or metal are expensive and unsuitable from the viewpoint of reducing product costs.

  In addition, the vacuum package described in Non-Patent Document 1 is sealed by utilizing the structure of the silicon chip, so that the design of the silicon chip is restricted. Further, the vacuum package has a three-layer structure of a glass substrate and a silicon chip or a silicon frame, so that the alignment work becomes complicated and a plurality of work steps are required.

  In order to solve such problems, an object of the present invention is to provide a manufacturing technique of a semiconductor device from which an inexpensive and easily sealed semiconductor device can be obtained.

  In order to solve the above-described problems, a first aspect of the present invention includes a first substrate provided with a plurality of semiconductor elements, and a plurality of positions at positions corresponding to the plurality of semiconductor elements on the first substrate. The first substrate and the second substrate such that the recess on the second substrate individually covers the semiconductor element on the first substrate. Are bonded to each other to form a joined body of the first substrate and the second substrate, and a separated semiconductor device is obtained by dividing the joined body. A semiconductor device manufacturing method including a dividing step.

  According to this, since the semiconductor elements provided on the first substrate are individually covered by the plurality of recesses provided on the second substrate, the semiconductor elements can be easily sealed. It becomes. Further, since the sealing is performed by the concave portion on the second substrate, the configuration of the semiconductor element is not affected by the sealing member, and the degree of freedom in designing the device is increased. Further, since it is possible to perform sealing in a batch in a wafer state, a sealing process after dividing the semiconductor device into individual pieces (chips) becomes unnecessary, so that the mass production is excellent and the manufacturing cost is reduced. It becomes possible. Further, since the work such as individual sealing after the separation is eliminated, the manufacturing time can be shortened. In addition, since the singulation is performed after the second substrate is joined, it is possible to protect the semiconductor element from contamination of the substrate such as chips generated during the singulation.

Preferably, the second substrate forms an etching protective film on the substrate and patterns the protective film forming step, and the concave portion forming step forms the plurality of concave portions by etching the substrate after forming the protective film. And a process including:
According to this, a plurality of concave portions can be formed collectively with high accuracy.

  Preferably, before the bonding step, a fine concave portion forming step for forming a fine concave portion on the element forming surface of the first substrate on which the semiconductor element is formed, and an embedding step for embedding the fine concave portion with a conductor And after the joining step, a grinding step of grinding the first substrate of the joined body until the conductor is exposed.

  According to this, it is possible to easily form an external connection terminal (conductor) for electrical connection with the outside. In particular, when the first substrate is a silicon substrate, it is possible to further miniaturize the recesses for forming the external connection terminals, narrow the pitch interval, etc., and form a fine semiconductor device with higher accuracy. Is possible.

  Preferably, before the bonding step, at least one of the plurality of fine recesses, and a fine recess formation step of forming a plurality of fine recesses on the element formation surface of the first substrate on which the semiconductor device is formed. And embedding the fine recesses with a conductor leaving one, and after the joining step, the conductor is exposed on the first substrate of the joined body, and the conductor is embedded. A grinding step of grinding until the recessed portion that has not been formed becomes a through hole, and before or after the dividing step, the gas interposed between the first substrate and the second substrate is removed from the through hole. A removal step.

  According to this, since the through hole for removing gas is provided in the first substrate, even after the first substrate and the second substrate are joined, the first substrate and the second substrate are interposed. It is possible to adjust the degree of vacuum in the cavity (cavity) that can be formed. In addition, for example, when gas is generated during bonding as in the case of anodic bonding, there is no need to provide a getter or the like for removing the gas, and the semiconductor device can be further miniaturized. . In addition, since the through hole for removing the gas is formed simultaneously with the external connection terminal (conductor) for electrical connection with the outside, the number of processes is not increased.

Preferably, the method includes a step of forming a through hole in the first substrate or the second substrate before the bonding step.
According to this, an external connection terminal for electrical connection with the outside is formed, and if necessary, the gas interposed between the first substrate and the second substrate is removed after bonding. It becomes possible to do.

Preferably, in the bonding step, the first substrate and the second substrate are bonded by anodic bonding.
According to this, the first substrate and the second substrate can be easily and airtightly bonded.

Preferably, the first substrate and the second substrate are made of silicon, and the peripheral region of the recess and / or the first substrate formed on the second substrate before the bonding step. Including a step of attaching glass to a region corresponding to the peripheral region, and the bonding step is a step of bonding the first substrate and the second substrate through the glass.
According to this, even when it is desired to use a silicon substrate as the first substrate and the second substrate, anodic bonding can be easily performed.

Preferably, the first substrate and the second substrate are made of glass, and the peripheral area of the recess and / or the first substrate formed on the second substrate before the bonding step. Including a step of attaching a metal to a region corresponding to the peripheral region, and the bonding step is a step of bonding the first substrate and the second substrate through the metal.
According to this, even when it is desired to use glass substrates as the first substrate and the second substrate, anodic bonding can be easily performed.

Preferably, after the grinding step, a bump forming step of forming a bump at a portion of the joined body where the conductor is exposed is included.
According to this, it becomes possible to achieve the connection with the outside more easily and reliably. In addition, when bumps are formed in a wafer state, the bumps can be formed in a lump, so that the manufacturing efficiency can be further improved.

  Preferably, the bump forming step applies a solder resist to the surface of the joined body on the first substrate side, and forms a solder resist layer having a through hole at a position corresponding to the portion where the conductor is exposed. A resist layer forming step and a step of forming a solder terminal in the through hole of the solder resist layer.

  According to this, by forming the solder resist layer, it is possible to improve the connection position accuracy of the solder terminals. In addition, it is preferable that the hole diameter of the through-hole provided in the soldering resist layer is smaller than the hole diameter of the conductor exposed to the 1st board | substrate. Thereby, it is possible to relieve stress applied to the semiconductor device when the semiconductor device is mounted on another member.

  According to a second aspect of the present invention, there is provided a first substrate on which a plurality of semiconductor elements are provided, and a second substrate in which a plurality of recesses are formed at positions corresponding to the plurality of semiconductor elements on the first substrate. The first substrate and the second substrate are joined so that the recesses on the second substrate individually cover the semiconductor elements on the first substrate. Wafer.

  According to this, since the first substrate is supported by the second substrate having a plurality of recesses and the strength is reinforced, there is no risk of breakage during singulation, and the first substrate can be easily divided (cut). Is possible. Moreover, since it has the simple structure which joined the 1st board | substrate and the 2nd board | substrate, manufacture is easy.

  Preferably, the first substrate has a through hole, and an external connection terminal is provided in the through hole. According to this, since the external connection terminal is provided on the first substrate side, it can be easily mounted on another member.

  Preferably, the thickness of the first substrate is 300 μm or less, more preferably 100 μm or less. According to this, it is possible to further reduce the size and weight of the semiconductor device obtained by dividing the wafer into pieces.

  According to a third aspect of the present invention, there is provided a semiconductor device comprising a substrate provided with a semiconductor element and sealing means for hollow-sealing the substrate, wherein the substrate has a thickness of 300 μm or less, more preferably 100 μm or less. It is. According to this, since the semiconductor device is reduced in size and weight, it is possible to further reduce the size and weight of the device using the semiconductor device.

  Preferably, the substrate on which the semiconductor element is provided has a through hole, and an external connection terminal is provided in the through hole. According to this, since the external connection terminal is provided on the substrate side on which the semiconductor element is provided, it can be easily mounted on another member.

  A fourth aspect of the present invention is a sensor using the above semiconductor device. According to this, since the semiconductor device is used, it is small and lightweight.

Hereinafter, the present invention will be described with reference to the drawings.
[First embodiment]
1 to 7 are views for explaining a method of manufacturing a semiconductor device according to this embodiment.

(Preparation of the first substrate)
First, as shown in FIG. 1A, a silicon substrate 101 having a semiconductor element formed on one side is prepared. In FIG. 1A, reference numeral 103 denotes an electrode pad of a semiconductor element made of, for example, Al. Although the space | interval of this electrode pad 103 is not limited, For example, it is 200 micrometers. A resist material is applied to the element formation surface (surface on which the electrode pad 103 is formed) of the substrate 101 on which the semiconductor element is formed to form a photoresist film 105 as an etching protective film. Note that in FIG. 1A, a region separated by a dotted line indicates a region (unit region) 102 of one semiconductor device. Although not shown, before forming the photoresist film 105, an insulating film (eg, SiO ₂ ) for protecting the semiconductor element or the like is formed as necessary.

  Next, as shown in FIG. 1B, a hole 107 is formed at a predetermined position in the region where the electrode pad 103 is formed by performing a patterning process using a photolithography technique on the photoresist film 105.

Next, as shown in FIG. 1C, fine etching for forming an external connection terminal for electrical connection with the outside by performing dry etching using an etching gas such as Cl ₂ and SF _6. A recess 109 (eg, depth 70 μm, hole diameter 50 μm) is formed.

Thereafter, a resist stripping process is performed to strip the photoresist film 105, and as shown in FIG. 2A, an insulating film 111 (eg, SiO ₂ ) is formed again by a TEOS-CVD method or the like. The insulating film 111 is patterned to form a contact portion 113 with the electrode pad 103 as shown in FIG. Next, as shown in FIG. 2C, a seed layer 115 is formed using a metal such as palladium by, for example, sputtering or CVD.

  As shown in FIG. 3A, a resist layer 117 is provided on the seed layer 115 by, for example, a dry film (photosensitive film for a printed wiring board), and a patterning process is performed using a photolithography technique. A hole 118 is formed at a corresponding position. At this time, the hole portion 118 is formed to have a size including a position where the contact portion 113 is formed in order to connect the electrode pad 103 to an external connection terminal to be formed later.

  Next, as shown in FIG. 3B, the seed layer 115 is used as a cathode (cathode), for example, a copper electrode is used as an anode (anode), and electrolytic plating is performed using an electrolytic solution containing copper sulfate or the like to be exposed. By depositing copper on the seed layer 115, the recess 109 and the hole 118 are filled with a conductor. The embedded conductor 119 later becomes an external connection terminal.

  Thereafter, as shown in FIG. 3C, the resist layer 117 is removed. At this time, the seed layer 115 other than the portion where the conductor 119 is formed may be removed or patterned as necessary.

  Next, as shown in FIG. 3D, an adhesive layer 121 made of a metal such as Au or Sn is provided on the periphery of the unit region 102 of the semiconductor device, for example, by sputtering or the like. This adhesive layer 121 serves as an adhesive for joining the second substrate in the subsequent joining step with the second substrate.

(Preparation of second substrate)
As shown in FIG. 4A, for example, Cr / Au (for example, film thickness: 0.03 / 0.07 μm) is formed on one surface side of a glass substrate 201 by sputtering or the like, and an etching protective film 203 is formed. Form. The etching protection film 203 is patterned using a photolithography technique so that a region for forming a recess is opened.

Next, as shown in FIG. 4B, a recess 205 (eg, depth: 4 μm) for sealing the semiconductor element formed on the first substrate is formed by wet etching using a hydrofluoric acid aqueous solution or the like. To do. Note that the etching protective film 203 may be left as it is as an adhesive layer for bonding to the first substrate. Further, after removing the etching protection film 203, an adhesive layer may be formed by newly forming a metal such as Au or Sn.
(Formation of semiconductor devices)
As shown in FIG. 5A, the first substrate 100 and the second substrate 200 prepared as described above are formed on the surface of the first substrate 100 on which the electrode pads 103 of the semiconductor element are formed ( The element formation surface) is bonded so as to cover the recess 205 provided in the second substrate 200, and a bonded body of the first substrate and the second substrate is obtained.

  FIG. 8 is a schematic view of a first substrate on which a plurality of semiconductor elements are formed. FIG. 9 is a schematic view of a second substrate having a plurality of recesses. As shown in FIG. 8, the first substrate 100 is formed with a plurality of unit regions 102 each including a semiconductor element, which will be a semiconductor device later. As shown in FIG. 9, the second substrate 200 is provided with a plurality of recesses 205 for individually sealing each semiconductor device at a position corresponding to the unit region 102 of the first substrate 100. ing. In FIG. 9, reference numeral 250 denotes an area corresponding to the unit area 102 of the first substrate 100.

  The first substrate 100 and the second substrate 200 are bonded to each other while being aligned so that each recess 205 individually covers an active portion including a semiconductor element formed in the unit region 102. As a result, as shown in FIG. 10, a wafer (bonded body) 500 having a structure in which each unit region 102 is sealed by each recess 205 is obtained.

Specifically, the bonding between the first substrate 100 and the second substrate is performed, for example, in an inert gas atmosphere such as Ar or N ₂ or in a vacuum (under reduced pressure), and each concave portion Bonding is performed while aligning so as to individually cover the unit regions 102 of the semiconductor device. At this time, the adhesive layer of the first substrate 100 and / or the second substrate 200 is heated and melted and bonded. Thereby, it becomes possible to improve the sealing performance between the first substrate 100 and the second substrate 200.

  Next, as shown in FIG. 5B, the back surface (first substrate 100) side of the obtained bonded body 500 is ground by mechanical polishing or the like. The grinding is performed until the conductor 119 is exposed from the back surface of the bonded body 500. A solder resist is applied to the back surface of the bonded body 500 to form a solder resist layer 123. Next, as shown in FIG. 5C, patterning is performed using a photolithography technique so that an opening 125 is provided at a position corresponding to the exposed portion of the conductor 119.

  Next, as shown in FIG. 6A, solder balls 127 as bumps are mounted in the openings 125, and the solder balls 127 are heated and melted at 200 to 300 ° C., for example. Thereafter, the bonded body 500 is cut into individual pieces for each unit region 102 of the semiconductor device, for example, by dicing, so that a semiconductor device as shown in FIG. 6B is obtained. Here, the thickness of the first substrate 100 is not particularly limited, but is about 100 μm, for example.

  According to this embodiment, since the semiconductor element provided on the first substrate is individually sealed by the second substrate having a plurality of recesses, the semiconductor element can be easily sealed. . In addition, since the sealing is performed by the recess, the configuration of the semiconductor element is not influenced by the sealing member, and the degree of freedom in designing the device increases. Also, by performing hermetic sealing collectively in the wafer state (the state before being singulated), the sealing process after the semiconductor device is singulated (chiped) becomes unnecessary, so that mass production is possible. Excellent manufacturing costs can be reduced. Further, since the individual work after the separation is eliminated, the manufacturing time can be shortened. Further, since the singulation is performed after the sealing, there is no possibility of cutting wastes or the like due to dicing or the like during the singulation, and the semiconductor element can be prevented from being contaminated. Further, since the second substrate as the sealing member is bonded to the first substrate on which the semiconductor element is formed in the wafer state, the strength of the first substrate is reinforced by the second substrate, and the grinding process Sometimes it is possible to make the first substrate thinner, and it is possible to avoid a decrease in yield due to breakage or the like during singulation.

  In the present embodiment, since a silicon substrate is used as the first substrate 100, fine processing is possible, an external connection terminal (conductor 119) having a small diameter can be provided, and further, between the external connection terminals. Since the pitch interval can be narrowed, the semiconductor device can be further integrated and miniaturized.

  In the above embodiment, the bump is formed by mounting the solder ball. However, the present invention is not limited to this. For example, the solder bump may be formed by using solder printing. Moreover, in order to improve solderability, you may apply | coat the flux as needed. Further, the solder resist layer 123 is not necessarily provided.

  Further, in the above example, the opening 125 of the solder resist layer 123 is formed to have substantially the same size as the exposed surface of the external connection terminal (conductor 119) exposed from the first substrate 100. However, the present invention is not limited to this. For example, as illustrated in FIG. 7, the size of the opening 125 may be smaller than the diameter of the exposed portion of the conductor 119. As a result, when the semiconductor device is mounted on another member, the stress applied to the semiconductor device can be relaxed.

  In the above example, the case where a silicon substrate and a glass substrate are used as the combination of the first substrate 100 and the second substrate 200 has been described as an example. However, the present invention is not limited to this. For example, both the first substrate 100 and the second substrate 200 may be a silicon substrate or a glass substrate.

  In the above description, a bonding method using a metal such as Au or Sn as an adhesive layer has been described as a bonding method between the first substrate 100 and the second substrate 200. However, the metal which comprises the contact bonding layer used for the joining method using such a metal is not specifically limited, You may use another metal. Examples of suitable combinations of metal layers as adhesive layers attached to the first substrate 100 and the second substrate 200 include Au—Sn and Au—Au. Moreover, you may use the combination of Si-Si using semimetals, such as Si, instead of a metal. Furthermore, the adhesive layer may be attached only to either the first substrate 100 or the second substrate 200. According to the bonding method using such a metal or metalloid as the adhesive layer, the substrate material used for the first substrate 100 and the second substrate 200 is not limited, and thus the degree of freedom in designing the semiconductor device. Will improve.

  In addition, the bumps are formed before the bonded body 500 between the first substrate 100 and the second substrate 200 is cut, but this does not prevent the bumps from being formed after the cutting.

[Second Embodiment]
In the first embodiment, as a bonding method between the first substrate 100 and the second substrate 200, a bonding method using a metal or a semimetal as an adhesive layer has been described. In contrast, in the second embodiment, a method using anodic bonding will be described as a method for bonding the first substrate 100 and the second substrate 200. In addition, about the process similar to 1st embodiment, description is abbreviate | omitted by referring 1st embodiment suitably, and a different point from 1st embodiment is explained in full detail.

  The first substrate 100 made of silicon and the second substrate 200 made of glass are prepared by the same process as in the first embodiment. Here, as the second substrate 200, in order to enable anodic bonding, for example, glass containing an alkali metal such as sodium (Na) is used. Specifically, for example, sodium borosilicate glass can be used as such glass, and more specifically, Pyrex (registered trademark) glass (trade name) manufactured by Corning Corporation can be used. In particular, Corning # 7740 (trade name) manufactured by Corning Co., Ltd. is optimal in consideration of the fact that the glass substrate is heated at the time of anodic bonding, so that the thermal expansion coefficient is substantially equal to that of the silicon substrate used as the first substrate.

Next, the first substrate 100 and the second substrate 200 are opposed to each other in a predetermined direction, and bonded together while being aligned. At this time, the glass-made second substrate 200 side is connected to the minus terminal of the DC power supply, and the silicon-made first substrate 100 side is connected to the plus terminal. Then, a voltage is applied while heating the second substrate 200. This heating facilitates movement of cations such as Na ⁺ in the glass constituting the second substrate 200. Due to the movement of the positive ions, the bonding surface of the second substrate 200 with the first substrate 100 is negatively charged, and the bonding surface of the first substrate 100 with the second substrate 200 is positively charged. As a result, the first substrate 100 and the second substrate 200 are firmly bonded.

  According to such anodic bonding, the first substrate 100 and the second substrate 200 can be directly bonded without using an adhesive layer of metal or the like. The anodic bonding can be easily bonded with good adhesion even when the bonding surfaces of the first substrate 100 and the second substrate 200 are rough surfaces with minute irregularities. Therefore, the manufacturing process can be simplified.

  In this example, the case where a silicon substrate is used as the first substrate 100 and a glass substrate is used as the second substrate 200 has been described. However, a glass substrate is used as the first substrate 100 and the second substrate 200 is used as the second substrate. A silicon substrate may be used.

Furthermore, the following method is mentioned as a modification using such anodic bonding.
First, a silicon substrate is used for both the first substrate 100 and the second substrate 200, and the first substrate 100 and the second substrate 200 are prepared by the same process as in the first embodiment.
Next, instead of the metal such as Au and Sn used in the first embodiment, a predetermined area of the bonding surface of either the first substrate 100 or the second substrate 200 is replaced with, for example, Pyrex ( Glass containing an alkali metal such as (registered trademark) glass is adhered by sputtering or the like to form an adhesive layer.

Next, the first substrate 100 and the second substrate 200 are bonded via an adhesive layer. At this time, a positive terminal of a DC power source is connected to the first substrate 100 and the second substrate 200 made of silicon, a positive terminal is connected to the adhesive layer, and a voltage is applied while overheating.
As a result, the first substrate 100 and the second substrate 200 can be joined. FIG. 11 shows an example of a hermetically sealed wafer manufactured by the manufacturing method of the present embodiment.

In this manner, bonding between the silicon substrates 100 is possible, so that the degree of freedom in designing the obtained wafer (bonded body 500) and the semiconductor device is improved.
In addition, in order to remove the gas generated at the time of anodic bonding, a removing means 210 for removing the gas may be provided in each semiconductor device. Examples of the removing means 210 for removing such gas include a getter material (member for chemically adsorbing gas) that adsorbs and removes gas.

[Third embodiment]
In the present embodiment, after bonding the first substrate 100 and the second substrate 200, the wafer having a through hole for removing the gas interposed between the first substrate 100 and the second substrate 200 is used. A manufacturing method will be described.

FIG. 12 is a view showing an example of a wafer provided with a through hole for removing gas.
In this embodiment, when forming the fine recessed part 109 for forming the conductor 119 as an external connection terminal in the first embodiment, a through-hole 161 for removing a gas later is formed. A recess is formed in the same manner as the recess 109. At this time, it is preferable that the depth of the through hole forming recess is equal to or greater than the depth of the external connection terminal forming recess 109. Thereby, when the conductor 119 as an external connection terminal is exposed on the back surface of the joined body 500 of the first substrate 100 and the second substrate 200 in the subsequent grinding step, the through-hole 161 is simultaneously formed. It becomes possible.

Subsequent processes can obtain a wafer and a semiconductor device having through holes 161 for gas removal by the same processes as in the first embodiment.
Next, a method for removing the gas contained in the joined body 500 with the first substrate 100 and the second substrate 200 in which the through holes 161 are formed or a method for adjusting the degree of vacuum will be described.

First, the bonded body 500 is placed in, for example, a vacuum chamber whose pressure is reduced to a desired degree of vacuum. The degree of vacuum in each formed cavity is adjusted.
When the degree of vacuum in the cavity reaches a desired degree of vacuum, the opening of the through hole 161 is closed with a plug member 163 such as high-temperature solder or adhesive.

  This makes it possible to remove the gas between the first substrate 100 and the second substrate 200 and adjust the degree of vacuum in the wafer state. In addition, for example, when gas is generated during bonding as in the case of anodic bonding, there is no need to provide a getter or the like for removing the gas, and the semiconductor device can be further miniaturized. .

Moreover, since each through-hole 161 can be closed by the plug member 163, the degree of vacuum can be adjusted for each cavity. Therefore, it is possible to obtain semiconductor devices sealed with different degrees of vacuum with one wafer.
The present invention does not exclude adjusting the degree of vacuum of each semiconductor device after separation.

[Application example]
The semiconductor device of the present invention can be suitably applied to, for example, a MEMS device such as a sensor, an optical modulator, and an optical scanner, in particular, where maintaining the airtightness of the device itself is important.

  FIG. 13 is a diagram for explaining an example of a sensor using the semiconductor device of the present invention. As shown in FIG. 13A, the sensor 600 includes, for example, a vibrator or a resonator (resonator) driven by a semiconductor element in a cavity 603 formed by the first substrate 100 and the second substrate 200. The functional unit 601 is further included.

In addition, as shown in FIG. 13B, the wiring can be rearranged by further providing a wiring layer 170 on the back surface of the semiconductor device (eg, sensor). Thereby, the freedom degree of design of the electronic device etc. which utilized the said apparatus improves.
The semiconductor device of the present invention is not limited to the above example, but can be suitably used for MEMS devices such as an optical switch and u-TAS (chip analysis element) other than the above.

It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure for demonstrating the semiconductor device which concerns on another aspect. FIG. 8 is a schematic view of a first substrate on which a plurality of semiconductor elements are formed. FIG. 9 is a schematic view of a second substrate having a plurality of recesses. FIG. 10 is a view showing an example of a wafer (bonded body) according to the present embodiment. FIG. 11 is a diagram illustrating an example of a hermetically sealed wafer manufactured by the manufacturing method of another embodiment. FIG. 12 is a view showing an example of a wafer provided with a through hole for removing gas. FIG. 13 is a diagram for explaining an example of a sensor using the semiconductor device of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... 1st board | substrate, 101 ... Board | substrate, 102 ... Unit area | region, 103 ... Electrode pad, 105 ... Photoresist film | membrane, 107 ... Hole part, 109 ... Recessed part, DESCRIPTION OF SYMBOLS 111 ... Insulating film, 113 ... Contact part, 115 ... Seed layer, 117 ... Resist layer, 118 ... Hole, 119 ... Conductor, 121 ... Adhesive layer, 123 ... Solder resist layer, 125 ... opening, 127 ... solder ball, 161 ... through hole, 163 ... plug member, 170 ... wiring layer, 200 ... second substrate , 201 ... substrate, 203 ... etching protective film, 205 ... recess, 210 ... removal means, 500 ... joined body, 600 ... sensor, 601 ... functional part, 603 ··cavity

Claims (16)

A first substrate provided with a plurality of semiconductor elements, and a second substrate formed with a plurality of recesses at positions corresponding to the plurality of semiconductor elements on the first substrate, respectively. By bonding the first substrate and the second substrate so that the concave portions on the substrate individually cover the semiconductor elements on the first substrate, the first substrate and the second substrate are bonded. A bonding step of forming a bonded body with the second substrate;
A dividing step of obtaining a separated semiconductor device by dividing the joined body;
A method for manufacturing a semiconductor device, comprising:   A protective film forming step of forming an etching protective film on the substrate and patterning the second substrate; and a concave portion forming step of etching the substrate after forming the protective film to form the plurality of concave portions. The method for manufacturing a semiconductor device according to claim 1, wherein the method is formed from a process including the steps. Before the bonding step, a fine concave portion forming step of forming a fine concave portion on the element forming surface of the first substrate on which the semiconductor element is formed, and a filling step of embedding the fine concave portion with a conductor. Including
The method for manufacturing a semiconductor device according to claim 1, further comprising a grinding step of grinding the first substrate of the joined body until the conductor is exposed after the joining step. Prior to the bonding step, at least one of a plurality of the fine recesses and a fine recess formation step of forming a plurality of fine recesses on the element formation surface of the first substrate on which the semiconductor device is formed. And embedding the fine recesses with a conductor.
Grinding after the bonding step, the first substrate of the bonded body is ground until the conductor is exposed and a recess in which the conductor is not embedded becomes a through hole, and
The semiconductor according to claim 1, further comprising: a removing step of removing a gas interposed between the first substrate and the second substrate from the through hole before or after the dividing step. Device manufacturing method.   The method for manufacturing a semiconductor device according to claim 1, further comprising a step of forming a through hole in the first substrate or the second substrate before the bonding step.   The method for manufacturing a semiconductor device according to claim 1, wherein in the bonding step, the first substrate and the second substrate are bonded by anodic bonding. The first substrate and the second substrate are made of silicon, and before the bonding step, the peripheral area of the recess formed in the second substrate and / or the peripheral edge on the first substrate Including attaching a glass to an area corresponding to the area;
The method for manufacturing a semiconductor device according to claim 1, wherein the bonding step is a step of bonding the first substrate and the second substrate through the glass. The first substrate and the second substrate are made of glass, and before the bonding step, the peripheral area of the recess formed in the second substrate and / or the peripheral edge on the first substrate Including attaching a metal to a region corresponding to the region;
The method for manufacturing a semiconductor device according to claim 1, wherein the bonding step is a step of bonding the first substrate and the second substrate through the metal.   The manufacturing method of the semiconductor device of Claim 4 including the bump formation process of forming a bump in the site | part which the said conductor of the said conjugate | zygote exposed after the said grinding process. Solder resist layer formation in which the bump forming step applies a solder resist to the surface of the bonded body on the first substrate side, and forms a solder resist layer having a through hole at a position corresponding to a portion where the conductor is exposed. Process,
Forming a solder terminal in the through hole of the solder resist layer. The method for manufacturing a semiconductor device according to claim 9. A first substrate provided with a plurality of semiconductor elements;
A plurality of recesses formed at positions corresponding to the plurality of semiconductor elements on the first substrate, respectively.
The wafer, wherein the first substrate and the second substrate are bonded so that the recesses on the second substrate individually cover the semiconductor elements on the first substrate. .   The wafer according to claim 11, wherein the first substrate has a through hole, and an external connection terminal is provided in the through hole.   The wafer according to claim 11 or 12, wherein the first substrate has a thickness of 300 µm or less.   A semiconductor device comprising a substrate provided with a semiconductor element and sealing means for hollow-sealing the substrate, wherein the thickness of the substrate is 300 μm or less.   The semiconductor device according to claim 14, wherein the substrate on which the semiconductor element is provided has a through hole, and an external connection terminal is provided in the through hole. A sensor using the semiconductor device according to claim 14.

Images