JP2005217896A - Image encoding device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To directly compress an image signal obtained from an image array having a color filter with three primary colors without making the image signal to be a luminance signal and a color-difference signal. <P>SOLUTION: The image signal obtained from the image array 5 is subjected to A/D conversion to be converted into a digital signal. A 4 × 4 pixel RGB component extracting circuit 9 converts the digital signal into a 4 × 4 pixel block for each block, a converting circuit 10 performs two-dimensional discrete cosine transform of each block and a quantizing circuit 11 subsequently performs quantization. After that, an Huffman encoding circuit 15 performs zero length compression of an AC (alternating current) coefficient, while an Huffman encoding circuit 18 performs variable length coding of an AC coefficient that is not zero and a DC (direct current) coefficient. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a compression technique for a two-dimensional color image signal.

In a single-plate color type image sensor, a color filter on a mosaic is formed on a pixel of an imaging unit, and color separation is performed thereby, thereby producing a color image. When red (hereinafter referred to as “R”), green (hereinafter referred to as “G”), and blue (hereinafter referred to as “B”) primary color filters are used, this is called a Bayer array, and as shown in FIG. The most commonly used filter is a two-dimensional arrangement of two pixels and R and B each having one pixel as a diagonal unit. When the output is image-encoded (image compression), an R, G, B component is generated for each pixel by interpolation, and a color image created through processing to convert it into a luminance component and a color difference component is performed. Perform image compression.
As described above, Patent Document 1 discloses a technique for compressing the luminance component and the color difference component.
However, if it is desired to reduce the size of an image transmitting apparatus as much as possible, the hardware can be reduced if image compression can be performed without undergoing such color signal processing. Furthermore, it is desirable that the image compression method can be a method with a small hardware scale.
JP 2001-258030 A

  The present invention directly compresses an image output of a single-plate color type image sensor without performing color signal processing, and provides an image coding apparatus with a small hardware scale as the image coding method. To do.

FIG. 2 shows a block diagram of an image sensor in which an image encoding circuit is integrated as an embodiment. Horizontal N _H pixels mosaic color filters are formed in a Bayer arrangement as shown in FIG. 1, the pixel selected by the vertical shift register for the signal read from the image array in the vertical direction N _V pixels (5) (21), The output is read via the noise cancellation circuit (6), and A / D conversion is performed by the n-bit A / D converter (7). The output is stored in an n × N _H × 8-bit memory (8). This, as the minimum capacity, it is necessary n × N _H × 8 bits, may be increased such as impart a twice volume for ease of control.

  Data of a block of 8 × 8 pixels is read from this memory, and image coding is performed for each color component. Specifically, as shown in the left side of FIG. 3, two 4 × 4 pixel blocks (1, 2) that collect only the G component on the right side of FIG. 3 with respect to the 8 × 8 pixel block of the Bayer array, In the 4 × 4 pixel RGB component extraction circuit (9), one 4 × 4 pixel block (3) that collects only the R component and one 4 × 4 pixel block (4) that collects only the B component. ,To divide. A two-dimensional discrete cosine transform (DCT) circuit (10) is subjected to two-dimensional discrete cosine transform for each of these. Specifically, this is the following calculation.

として、４×４点の２次元離散コサイン変換出力(２次元離散コサイン変換係数)を、

とする。４×４点の２次元離散コサイン変換の基底行列をＣとすると

と表わされる。ここで、ａ＝ｃｏｓ(π／４)，ｂ＝ｃｏｓ(π／８)，ｃ＝ｃｏｓ(３π／８)である。 Now, the value of 4x4 pixels as input is expressed in matrix.

4 × 4 2D discrete cosine transform output (2D discrete cosine transform coefficient)

And If the basis matrix of a 4 × 4 point two-dimensional discrete cosine transform is C,

It is expressed as Here, a = cos (π / 4), b = cos (π / 8), and c = cos (3π / 8).

ここで、Ｃ^tは、Ｃの転置行列である。式(１)の４×４点の入力マトリクスとして、図２のＲ，Ｇ，Ｂ各成分の４×４点の画素ブロックの値を、順次与えて式(４)により、２次元離散コサイン変換を順次行う。 At this time, the 4 × 4 point two-dimensional discrete cosine transform is expressed by the following equation.

Here, C ^t is a transposed matrix of C. As the 4 × 4 point input matrix of Equation (1), the values of the 4 × 4 point pixel blocks of the R, G, B components in FIG. 2 are sequentially given, and the two-dimensional discrete cosine transform is performed according to Equation (4). Are performed sequentially.

量子化後は、４ブロック分を記憶するバッファメモリ(１２)に格納する。ここから量子化された２次元ＤＣＴ係数を順次読み出して、交流(以下「ＡＣ」という)係数に対して、ジグザグ走査回路(１３)において、その読み出しの順序を、ゼロのラン長を長く取るため、４つの４×４点のブロックをまとめて、図４に示すように行う。 The output is quantized in the quantization circuit (11). Quantization is obtained by dividing the coefficient obtained as Equation (2) by the product of the quantization coefficient matrix Q (14) and the code amount control coefficient q, and rounding off the decimal part. As the quantization coefficient matrix, when a power value of 2 is selected, the hardware becomes simple. For example, a value such as the following equation is used.

After quantization, the data is stored in a buffer memory (12) that stores four blocks. To sequentially read the quantized two-dimensional DCT coefficients from this, and to make the run order of zero longer in the zigzag scanning circuit (13) with respect to the alternating current (hereinafter referred to as “AC”) coefficient. Four 4 × 4 point blocks are put together as shown in FIG.

  In zigzag scanning, four coefficients (A01, B01, C01, D01) having a lower spatial frequency as a result of the two-dimensional discrete cosine transform are selected, and then coefficients having a higher spatial frequency (... A02, B02, C02) are sequentially selected. , D02... C33, D33). If rearrangement is performed in this way, the possibility that a long run length of zero can be increased due to the correlation between adjacent images increases. This selection can also be made from the higher spatial frequency. A00, B00, C00, and D00 are direct current (DC) components.

  Four 4 × 4 point blocks are basically selected to group four adjacent blocks for each RGGB, but there are four RGGB blocks in one 4 × 4 point block. These blocks may be collected. Further, for these mixtures, that is, G, two adjacent blocks may be combined, and for RB, four adjacent blocks may be combined.

  For a direct current (hereinafter referred to as “DC”) coefficient, a difference from the previous block is obtained by a pre-difference circuit (16), and then a variable length code is obtained for the difference value by a one-dimensional Huffman code. To do. As for the AC coefficient, as a result of zigzag scanning, a non-zero AC coefficient (hereinafter referred to as “NZAC coefficient”) and a zero-run length (hereinafter referred to as “ZRL”) representing a length following zero are obtained. ZRL is encoded by the one-dimensional Huffman encoding circuit (15) in FIG. 2 using the encoding table (Table 1) shown in FIG. Since ZRL is 63 at the longest, the encoding table is simplified. For the differential DC coefficient and the NZAC coefficient, the encoding table shown in FIG. 6 is used. These are selected by the multiplexer (17), the differential DC coefficient or the NZAC coefficient, and encoded by the one-dimensional Huffman encoding circuit (18) of FIG. These outputs are sequentially selected by a multiplexer (19), and a FIFO (first in first out) memory (20) is stored as a buffer, and is output as a serial signal with a constant bit rate. If the amount of code stored in the FIFO memory is determined and the information is fed back to the quantization circuit as a code amount control signal and the memory may overflow, the quantization coefficient is increased and the memory buffer If the amount is small, the output bit rate is kept constant by reducing the quantization coefficient.

  In FIG. 5 and FIG. 6, “Additional bit” indicates the actual NZAC coefficient and the bit length to be added to ZRL when the code of each group number is selected. For example, if the NZAC coefficient is 4, the group number is 3. In this group, eight values from -7 to -4 and from 4 to 7 are taken and can be represented by 3 bits. Therefore, the additional bit in this case is 3 bits. For example, if -7 to 7 are assigned in order as 000, 001,..., 4 is 101 because it is the fifth. Since the group number code is 110, the final code when the NZAC coefficient is 4 is 110101.

  In the above description, zigzag scanning after quantization is performed, and zero run length compression is performed on the obtained sequence of coefficients. However, the DCT coefficient difference is calculated before zero run length compression, and the difference is calculated. Zero run length compression may be performed. It is also conceivable that the two processes are automatically selected depending on the nature of the image, that is, the degree of correlation of the DCT coefficient.

  Using the image encoding method as described above, the output of a CCD image sensor (640 × 480 pixels) having a Bayer array color filter was encoded, and its performance was confirmed. As a result of comparing the present method with the JPEG method (one of the standard image compression methods) in an example of an image, the PSNR (Peak Signal-to-Noise Ratio) was 44 dB in this method at a compression rate of 10. On the other hand, the JPEG method is as bad as 34 dB, and a great improvement is obtained.

Diagram showing Bayer array Block diagram of an image sensor with integrated image coding circuit Diagram showing conversion from an 8 × 8 pixel Bayer array pixel block to a 4 × 4 pixel block for every four color components Diagram showing zigzag scanning for four 4x4 point blocks Figure showing Zero Run Length (ZRL) coding table (Table 1) Diagram showing coding table (Table 2) of differential direct current (DC) coefficient and non-zero alternating current (NZAC) coefficient

Explanation of symbols

5 Image array 6 Noise cancellation circuit 7 n-bit A / D converter 8 n × N _H × 8-bit memory 9 4 × 4-pixel RGB component extraction circuit 10 2D discrete cosine transform (DCT) circuit 11 quantization circuit 12 buffer Memory 13 Zigzag scanning circuit 15 One-dimensional Huffman coding circuit (coding according to Table 1)
16 Pre-difference circuits 17, 19 Multiplexer (MUX)
18 One-dimensional Huffman coding circuit (coding according to Table 2)
20 FIFO (first in first out) memory 21 vertical shift register

Claims (6)

  In an image encoding device connected to a signal output of an image array using a color filter, a plurality of M × M (M <N) are divided from the block of N × N pixels of the image array for each color component by the color filter. An image encoding apparatus comprising: means for extracting a pixel block; and image encoding means for encoding each of the M × M pixel blocks.   The color filter is a two-dimensional arrangement of a unit consisting of a set of one pixel of red (R), two pixels of green (G), and one pixel of blue (B). N × N The pixel block is composed of (N / 2) × (N / 2) pixels composed of red (R) pixels and (N / 2) × (N / 2) pixels composed of green (G) pixels. 2. The image coding according to claim 1, wherein the image coding is performed for each of two pixel blocks and a pixel block composed of (N / 2) × (N / 2) pixels by blue (B) pixels. apparatus.   2. The image coding according to claim 1, wherein the image coding means performs two-dimensional discrete cosine transform, quantization for the output, and variable length coding for the quantized output. apparatus.   The image encoding apparatus according to claim 1, wherein N is eight.   In the case where N is 8, the image encoding means collects 4 blocks each consisting of 4 × 4 pixels quantized after two-dimensional discrete cosine transform for 4 × 4 pixels, and generates an alternating current (AC) component. The zero-run length is determined by performing a zigzag scan on the image, and variable length coding is performed using a one-dimensional Huffman table for each of the direct current (DC) component, the non-zero alternating current (AC) component, and the zero run length. The image coding apparatus according to claim 1.   6. An image encoding apparatus according to claim 1, wherein the image encoding means and the image array are integrated on a single silicon chip.

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