JP2005210303A - Digital quadrature detection demodulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital quadrature detection demodulator capable of accurate quadrature detection. <P>SOLUTION: A conversion means 12 takes out a complex signal having I and Q components. Furthermore, it can perform demapping for taking out a digital signal from the complex signal I+jQ. A sampling means 11 converts the received signal into a digital signal every sampling period through analog/digital conversion. A timing control means 13 controls the sampling clock such that sampling is carried out during a period where the I and Q components do not change. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a detection demodulator for demodulating a modulated wave signal that transmits information by phase, amplitude, or both, and particularly obtained by directly sampling an intermediate frequency signal composed of an n-phase phase modulated wave, an amplitude modulated wave, or the like. The present invention relates to a digital quadrature detection demodulator that obtains quadrature amplitude output or phase output by applying correction to the obtained data.

Conventionally, the configuration shown in FIG. 10 is generally used in digital communication systems and digital broadcasting systems. On the transmission side, digital information to be transmitted is input from the information source 101 to the transmitter 102 as digital information such as voice, image, and text information. The transmitter 102 includes an error correction coding unit 103, a quadrature modulator 104, a radio unit 105, and an antenna 106. The input digital information is error correction encoded by the error correction encoding unit 103. Digital information that has been subjected to error correction coding is subjected to quadrature phase shift keying (QPSK) or quadrature amplitude modulation (QAM) by a quadrature modulator 104.
The signal for transmission is subjected to quadrature modulation such as (Modulation). The orthogonally modulated signal is frequency up-converted to the RF band by the wireless unit 105 and transmitted as an electromagnetic wave from the antenna 106. Encryption may be performed as necessary from the viewpoint of security.

  The quadrature modulator 104 includes a mapping unit that converts a digital signal into a complex signal I + jQ, and a modulation unit that combines the I and Q components on waves that are orthogonal to each other at the same frequency. In the case of QPSK, the digital signal is mapped to four I and Q components having a constant absolute value and different phases. In the case of QAM, mapping is performed on I and Q components having different absolute values and phases. For example, 16QAM and 64QAM map 16 points and 64 points, respectively.

  In the receiver 110 on the receiving side, the received electromagnetic wave is frequency down-converted by the tuner unit 111, the quadrature detection demodulation unit 112 performs quadrature detection, and the error correction decoding unit 113 further converts the digital signal that has been error correction coded. Decrypt and retrieve the original digital information. In digital information communication, quadrature modulation in which a signal is modulated with two carriers having a phase difference of 90 degrees is often used. Therefore, on the receiving side, it is necessary to demodulate and detect a component modulated by two carriers having a phase difference of 90 degrees from one received wave. This demodulation / detection is called quadrature detection.

  The quadrature detection / demodulation unit 112 extracts I and Q components, which are complex signals, by extracting components riding on orthogonal waves from the reception signal of the tuner unit 111. Further, as a reverse of the mapping, by performing demapping for extracting the digital signal from the complex signal I + jQ, the digital signal can be extracted from the received signal.

In the case of transmitting information with a large capacity, code division multiplexing (CDMA) is further performed.
(Multiple Access) spread spectrum or orthogonal frequency division multiplexing (OFDM)
Orthogonal Frequency Division Multiplexing) is used to perform frequency multiplexing and use both. Such processing such as error correction coding / decoding, orthogonal modulation / demodulation, code division multiplexing / decoding, orthogonal frequency multiplexing / decoding is performed in a frequency band (called baseband) where the center frequency is zero. This is called baseband processing. The quadrature detection demodulation unit 112 on the receiver 110 side extracts I and Q components important in baseband processing from the reception signal frequency-converted to the intermediate frequency band by the tuner unit 111. It plays an important role in connecting a baseband signal processing unit such as the decoding unit 113.

  In the phase shift method, which is one of the typical signal generation systems based on quadrature modulation, a Hilbert transformer (HT) that performs a 90-degree phase shift over a wide band with respect to a baseband signal is used. The Hilbert transformer can be configured with either an analog filter or a digital filter. However, with the digitization of signals, Hilbert transformers are mainly based on digital filters. In this case, either an IIR (Infinite Impulse Response) filter or an FIR (Finite Impulese Response) filter can be realized. The IIR filter can be realized at a low order, but the phase characteristic is solved by an approximation problem, so that a phase error is likely to occur. Therefore, an FIR filter that does not cause a phase error is often used to show linear phase characteristics. However, since the FIR filter uses many multipliers and adders, there is a problem that the circuit scale becomes large when the order becomes higher.

  FIG. 11 shows a configuration of a quadrature detection demodulator proposed as a digital quadrature detection demodulator that does not use the Hilbert transform (see, for example, Patent Document 1). The quadrature detection demodulation unit 112 includes sampling means 121 and conversion means 122. The sampling unit 121 samples the quadrature modulation wave, and the conversion unit 122 converts the data sampled by the sampling unit 121 and outputs two orthogonal components I and Q.

  When demodulating a modulated wave transmitting information by changing the phase and / or amplitude of the carrier wave of frequency fc, the sampling means 121 uses the two sampling clocks fsa and fsb having the same period and different phases. Sample and output sample values Sa and Sb. The converter 122 outputs the two orthogonal components I and Q of the modulated wave from the sample values Sa and Sb. The conversion means 122 performs this conversion from the sample values Sa and Sb when the phases of the sampling clocks fsa and fsb have a deviation angle θ from the orthogonal relationship to I = Sb, Q = Sa / cos θ−Sb tan θ. The I and Q components of the modulated wave can be output, that is, quadrature detection can be performed.

In particular, the converting means 122 has a time difference Δt between the sampling clocks fsa and fsb, where n is a natural number with respect to the carrier frequency fc, When there is a relationship of × (1 + 4n) or Δt = (1/4) fc × (3 + 4n), a simple relationship of I = Sb, Q = Sa or I = −Sb, Q = Sa, I , Q components can be output.

JP-A-5-336185

  In the received signal to be subjected to quadrature detection demodulation, I and Q data to be carried by quadrature modulation are superimposed on two carrier waves having the same frequency but different phases. The I and Q data change at regular intervals and are transmitted sequentially. In FIG. 12, the I and Q data can be demodulated by oversampling at a frequency faster than the reciprocal of a certain period and obtaining the phase difference of the carrier at two sampling points. However, another assumption is required for the demodulation of I and Q data. This assumption is that two points to be oversampled exist within a period in which the same components I and Q are constant as shown in FIG.

  In FIG. 12, the period during which the components I and Q are constant is 1 μs, and the corresponding frequency is 1 MHz. If there are two points to be oversampled within this 1 μs period, the I and Q data can be demodulated accurately, and no problem will occur. However, if the data spans adjacent periods, a combination of different I and Q data This causes a problem.

  In FIG. 13, the period from time tm−1 to time tm is shown as a period 130 as one of the periods as shown in FIG. 12. When sampling is performed at the timing within the period 130 as in the case of the two-point combinations 131a to 131c, the I and Q data can be accurately demodulated. However, as shown in the two-point combination 131d, when two sampling points exist separately in different I and Q component periods 130 and 132, there is a problem that accurate quadrature detection is impossible. Arise.

  An object of the present invention is to provide a digital quadrature detection demodulator capable of accurate quadrature detection.

The present invention uses a modulated wave that is modulated so that the phase and / or amplitude of a carrier wave is changed to transmit digital information as a received signal, and the sampling means uses two sampling clocks fsa and fsb having the same period and different phases. In a digital quadrature detection demodulator that samples and converts the two sample values Sa and Sb into two orthogonal components I and Q of the modulated wave and outputs them,
A digital quadrature detection demodulator comprising timing control means for controlling the timing of a sampling clock of the sampling means.

The present invention further includes a frame synchronization unit for detecting a frame synchronization symbol sequence from the outputs of the orthogonal two components I and Q,
The timing control means monitors the frame synchronization unit,
The timing of the sampling clocks fsa and fsb of the sampling means is controlled based on the monitor information of the frame synchronization unit.

The present invention further includes an error correction code demodulator that demodulates an error correction code from the outputs of the orthogonal two components I and Q,
The timing control means monitors the error correction code demodulator,
The timing of the sampling clocks fsa and fsb of the sampling means is controlled based on monitor information of the error correction code demodulator.

In the present invention, the timing control means oversamples the received signal for a period in which the components I and Q are constant, and outputs oversampled values S0, S1,..., Snc;
Peak detection means for detecting peak values Sp0, Sp1, ..., Spm of absolute values from the oversampled values S0, S1, ..., Snc, and timing thereof;
Including peak comparison means for comparing all peak values Sp0, Sp1, ..., Spm values,
The timings of the sampling clocks fsa and fsb are controlled so that the comparison results of the peak values are the same.

In the present invention, the timing control means oversamples the received signal for a period in which the components I and Q are constant, and outputs oversampled values S0, S1,..., Snc;
The absolute value of the sum of the oversampled values S0, S1, ..., Snc

And an arithmetic processing means for calculating a sum Σ _m Sm of absolute values Sm for a plurality of periods in the same phase,
The timings of the sampling clocks fsa and fsb are controlled so that the sum Σ _m Sm of the absolute values for the plurality of periods is minimized.

  Further, in the present invention, the converting means is based on an oversampled value in the middle of a period in which the components I and Q are constant among the oversampled values S0, S1,..., Snc output from the oversampling means. Thus, it is characterized by being converted into two orthogonal components I and Q and output.

  According to the present invention, the timings of the sampling clocks fsa and fsb for sampling the received signal are controlled so that the sample values Sa and Sb can be obtained from the same I and Q data transfer period. Accurate quadrature detection can be performed. The quadrature detection can be configured with a small-scale circuit as compared with a large-scale circuit that requires a plurality of complex multipliers such as a Hilbert transformer. Although the Hilbert transformer has a problem that the frequency characteristic is not flat, this problem can be overcome at the same time. Therefore, quadrature detection can be performed with a low power consumption circuit. As a result, it is possible to perform quadrature detection stably and with low power consumption in a radio unit of a mobile device such as a mobile phone or a portable terminal where low power consumption is an important issue.

  Further, according to the present invention, the demodulated signal is input to the frame synchronization unit, and it is monitored whether or not the frame synchronization unit performs frame synchronization within a predetermined period, so that the sampling clock fsa can be obtained. , Fsb can be controlled to perform accurate quadrature detection.

  In addition, according to the present invention, the demodulated signal is input to the error correction code demodulator, and the bit error rate and the like are monitored. If sampling at two points is not performed within a period in which the same components I and Q are constant, error correction becomes impossible and the bit error rate and the like increase. When the bit error rate or the like is low, it can be seen that sampling is performed within the same transfer period, and a significant digital signal, that is, I and Q components can be extracted from the received signal, and accurate quadrature detection can be performed.

  According to the invention, the timing control means has a function of oversampling the received signal, a function of detecting a plurality of peak values from an oversampled value in a certain period, and a function of comparing a plurality of peak values. Since the quadrature modulation wave oscillates with a constant amplitude within a period in which the components I and Q are constant, if an even number of oversampling is performed in one period, the peak values are equal, and the different components I and Q are constant. When oversampled over a period of time, the peak value becomes different. Since the timings of the sampling clocks fsa and fsb are controlled so that the comparison results of all peak values are the same, accurate quadrature detection can be performed.

  Further, according to the present invention, the timing control means has a function of oversampling the received signal, a function of calculating the sum of oversampled values for a certain period, and a function of calculating the sum of absolute values of the sums. Absolute value of sum of oversampled values S0, S1, ..., Snc

If the sum Σ _m S m of the absolute values Sm for a plurality of periods in the same phase is minimized, the oversampled values are all received signals that exist within a period in which the same components I and Q are constant. Based on this, accurate quadrature detection can be performed.

  Further, according to the present invention, the oversampled values S0, S1,..., Snc are converted into orthogonal two components I and Q based on the oversampled value in the middle of the period in which the components I and Q are constant. Therefore, accurate quadrature detection can be performed by avoiding the part where the change of the I and Q components becomes gentle at both ends of the period due to the band limitation.

  FIG. 1 shows a basic electrical configuration of a digital quadrature detection demodulator 1 as an embodiment of the present invention. The digital quadrature detection demodulator 1 can be used as the quadrature detection demodulation unit 112 in FIG. The digital quadrature detection demodulator 1 includes a quadrature detection demodulator 14 including a sampling means 11, a conversion means 12, and a timing control means 13. As described above, in quadrature detection, I and Q components, which are complex signals, are extracted by extracting components riding on orthogonal waves from the received signal of the tuner unit. Further, by performing demapping for extracting a digital signal from the complex signal I + jQ which is the inverse of the mapping, the digital signal can be extracted from the received signal. The sampling means 11 converts the received signal into a digital signal at every sampling period by analog / digital conversion. The conversion means 12 calculates I and Q components by arithmetic processing.

The quadrature detection will be described below. In this description, a period in which the I and Q components are constant is important. The period is defined as τ _IQ and the corresponding frequency is defined as f _IQ = 1 / τ _IQ .

(Quadrature modulation and demodulation)
First, orthogonal modulation will be described. The digital signal is mapped by QPSK, QAM or the like to generate a complex signal I (t) + jQ (t). These I and Q components are modulated by being placed on mutually orthogonal waves cos [2πfc t + α] and sin [2πfct + α] that vibrate at the carrier frequency or the intermediate frequency fc. Therefore, the quadrature modulation output signal S (t) can be written as the following equation (1).

S (t) = I (t) cos [2πfc t + α] −Q (t) sin [2πfc t + α]
= R (t) cos [2πfc t + θ (t) + α] (1)
However, r (t) and θ (t) are defined as in the following equations (2) and (3).
r (t) = (I (t) ² + Q (t) ² ) ^1/2 (2)
tan θ (t) = Q (t) / I (t) (3)

That is, in each period τ _IQ , orthogonal modulation is a modulation method in which information such as I (t) and Q (t) is put on a cos wave by changing the amplitude r (t) and the initial phase θ (t). FIG. 12 described above is an example of quadrature modulation. In this example, a signal of f _IQ = 1 MHz is orthogonally modulated with a carrier of fc = 1 MHz or an intermediate frequency. In FIG. 12, the interval between the auxiliary axis and the auxiliary axis shown by a broken line that delimits the time axis that is the horizontal axis corresponds to the period τ _IQ . The quadrature modulation waves within τ _IQ = 1 μs are all cos waves, but it can be seen that the amplitude and phase are different in each period τ _IQ .

Here, a method of extracting I and Q information from the phase difference in the output S (t) from the analog / digital converter (ADC) at different times t = t _a and t = t _b (= t _a + δt) will be described. .

It is assumed that the received wave at time t = t _a and t = t _b (= t _a + δt) has components orthogonally modulated by the same I and Q components. That is, the following equation (4) is assumed.

I (t _b ) = I (t _a ) ⇔r (t _b ) = r (t _a ) (4)
_{Q (t b) = Q (} t a) θ (t b) = θ (t a)
If the output S (t) of the ADC at this time is S _a and S _b ,
_{S a = S (t a)} = r (t a) · cos [2πfc · (t a) + θ (t a) + α] ... (5)
S _b = S (t _b ) = r (t _b ) · cos [2πfc · (t _b ) + θ (t _b ) + α] (6)
_{= R (t a) · cos} [2πfc · (t a + δt) + θ (t a) + α] ... (7)
It becomes. Here, if Iq (t) and Qq (t) carrying the phase information of the intermediate frequency fc are introduced instead of I (t) and Q (t) itself,
Iq (t) + jQq (t) = (I (t) + jQ (t)) · exp [−j 2πfc t]
... (8)
It becomes. When comparing the real part and the imaginary part,
Iq (t) = r (t) cos [2πfc t + θ (t) + α] (9)
Qq (t) = r (t) sin [2πfc t + θ (t) + α] (10)
It becomes. From this and equations (5) and (6)
S _a = Iq (t _a ) (11)
_{S b = Iq (t a)} · cos [2πfc · δt] -Qq (t a) · sin [2πfc · δt]
... (12)
Iq (t _a ) = S _a (13)
Qq (t _a ) = S _a / tan [2πfc · δt] −S _b / sin [2πfc · δt] (14)
It becomes. That is, if the phase difference between the ADC sampling output at time t _a and t _b and the time is known, Iq (t) and Qq (t) can be obtained by calculation. In particular, when the time difference δt is 1/4 of the period of fc, the phase factor determined by the time difference δt and fc is 2π / 4.
Iq (t _a ) = S _a (15)
Qq (t _a ) = − S _b (16)
And processing becomes easy. Thus to sample sampling means 11 shown in FIG. 1 the time t _a, at t _b, the sample value S _a, and outputs a S _b, the conversion means 12 sample values S _a, from S _b (13) and equation It is possible to obtain the I and Q components by performing the calculation represented by the equation (14) or the equations (15) and (16).

The real I and Q components are I (t) and Q (t). However, if the sampling frequency is an integer multiple of fc,
t _a = t _a0 + n / fc (n: integer) (17)
Therefore, the phase factor exp [-j 2πfc ta] is always a constant value,
exp [-j2πfc ta] = exp [-j2πfc (t _a0 + n / fc)] = exp [−j2πfc t _a0 ]
… (18)
It becomes. Therefore,
_{Iq (t a) + jQq (} t a) = (I (t a) + jQ (t a)) · exp [-j2πfct a0]
… (19)
It becomes. Therefore, all Iq (t) and Qq (t) quadrature-detected by this method are different from I (t) and Q (t) to be originally obtained by the common phase factor exp [−j2πfct _a0 ]. . Therefore, if this phase factor is corrected by the conversion means 12 or the subsequent stage, the I and Q components that should be originally obtained can be extracted.

In order to perform quadrature modulation using this method, r (t) and θ (t) in the received wave S (t) are the same at times t _a and t _b as shown in equation (4). It is necessary. That is, the times t _a and t _b belong to the same period τ _IQ . If time t _a and t _b are within different periods τ _IQ , r (t) and θ (t) at time t _a are r (t) and θ (t) at time t _b. Therefore, quadrature detection by the above method is impossible.

In the example of the quadrature modulated wave in FIG. 12, the interval between adjacent broken auxiliary axes corresponds to the period τ _IQ . Therefore, if sampling is performed at two points between the adjacent auxiliary shafts, it is possible to obtain correct I and Q components by the calculations of the equations (13) and (14). However, when the auxiliary axis is sandwiched between two sampling points, the correct I and Q components cannot be obtained even if the calculations of the equations (13) and (14) are performed. Accordingly, the quality of the quadrature detection varies greatly depending on which two points are selected from the input data from the ADC to the quadrature detection demodulator, that is, how the sampling timing is selected.

As described above, the period τ _{IQ in} which I (t) and Q (t) are constant is important, but the period τ _IQ varies depending on the digital communication or digital broadcasting system.

When a digital signal is transmitted as it is after QPSK modulation or QAM modulation, the period τ _IQ coincides with the symbol period. Furthermore, even when a QPSK-modulated or QAM-modulated signal is further spread by CDMA and transmitted, the period τ _IQ is a symbol period. On the other hand, in the case of multiplexing by the OFDM method, one symbol of each carrier is used in the period of the inverse Fourier transform window (IFFT: Inverse Fast Fourier Transform) used for multiplexing. The inverse Fourier transform window is a collection of a plurality of sampling points. For example, a power of 2 such as 1024,8196 points is generally used. Since IFFT calculates and outputs the sum of a plurality of frequency components for each sampling point, the I and Q components are different at each IFFT sampling point. Therefore, in the case of multiplexing and transmitting by the OFDM method, the period τ _IQ coincides with the IFFT sampling period. As described above, the term τ _{IQ in which} the I and Q components to be orthogonally modulated are constant differs depending on the communication method. Regardless of the communication method and name, the present invention appropriately adjusts the timing of sampling from the received signal for quadrature detection and “period τ _IQ during which I and Q components before quadrature modulation are constant”. The quadrature detection is stably performed.

In the above description, it is assumed that the I and Q components are constant during the period τ _IQ , but in reality, there is no high frequency component due to the band limitation in the transmission path or the RF (high frequency) device. As shown in FIG. 2, the I and Q components at the both ends of the period τ _IQ change gently rather than steeply. As a result, the result of quadrature modulation of the I and Q components also changes gently at the boundary of the period τ _IQ as shown in FIG.

That is, FIG. 2 shows a comparison between the case of no band limitation, the case of 3 MHz band limitation, and the case of 1 MHz band limitation for the I component of the data before quadrature modulation. FIG. 3 shows data after quadrature modulation for the I component of FIG. When the band is limited at a low frequency, it can be seen that the I component is not steep but slowly changes at both ends of the period τ _IQ represented between the auxiliary axes.

As shown in FIG. 1, the digital quadrature detection demodulator 1 of this embodiment includes a sampling means 11, a conversion means 12, and a timing control means 13. Based on the two sampling clock signals fsa and fsb, which are control signals from the timing control means 13, the sampling means 11 gives a timing for sampling at two points, thereby enabling two-point sampling within the period τ _IQ . Become.

If the sampling means 11 samples two points within the period τ _IQ and the conversion means 12 performs the quadrature detection processing, the correct I and Q components can be detected. However, when the two-point sampling in the sampling means 11 belongs to two different periods τ _IQ , the correct I and Q components cannot be detected. Even if the I and Q components are demapped, a correct digital signal is not obtained, so that significant information cannot be obtained. Therefore, if the timing control means 13 detects that no significant information is obtained at the subsequent stage of the digital quadrature detection demodulator 1 and feeds back to the sampling means 11, sampling can be performed at the optimum sampling timing.

  FIG. 4 shows the configuration of a digital signal to be subjected to quadrature modulation. In the digital signal, a transmission unit in which several symbols are collected is called a frame 20. In the digital communication system and the digital broadcasting system, the frame side symbol sequence 21 is generally added to the frame body symbol sequence 22 for each frame 20 on the transmission side for frame synchronization on the receiving side. The receiving side performs processing such as error correction decoding from the data demodulated by the quadrature detection demodulator and detects the frame synchronization symbol sequence 21 from the data, thereby enabling frame synchronization.

  As an example of the frame synchronization symbol string 21, a data string having a sharp autocorrelation with a phase difference of 0 (zero) and a sufficiently small autocorrelation is often used when the phase difference is not zero. In the detection of the frame synchronization symbol sequence 21, the correlation between the stored frame synchronization symbol sequence 21 and the received signal is calculated. Since the correlation peaks only when the calculation window for calculating the correlation matches the frame synchronization symbol sequence 21 in the received signal, the output signal of the correlation calculation unit has a frame period. By taking into account the position of the symbol sequence 21 for frame synchronization and the like, the timing of the output signal of the correlation calculation unit is shifted to obtain a frame synchronization signal.

  FIG. 5 shows a schematic electrical configuration of a digital quadrature detection demodulator 31 using frame synchronization as the first embodiment of the present invention. In the present embodiment, the same reference numerals are given to portions corresponding to the digital quadrature detection demodulator 1 of the basic form shown in FIG. The digital quadrature detection demodulator 31 includes a quadrature detection demodulation unit 14 having a configuration similar to that of the digital quadrature detection demodulator 1 of FIG. 1, a tuner unit 33, a frame synchronization unit 34, and an error correction code decoding unit 35.

  If the frame synchronization is used, the sampling timing can be controlled. The timing control unit 13 always monitors whether or not frame synchronization can be achieved within a certain period from the frame synchronization unit 34. Note that this period is a time obtained by adding an appropriate margin to the longest time normally required from the start of quadrature detection until frame synchronization can be achieved.

When frame synchronization can be established, a significant digital signal, that is, I and Q components can be extracted from the received signal, and two points to be sampled exist within the same period τ _IQ . Therefore, the timing control means 13 does not do anything and just continues the quadrature detection.

On the other hand, when frame synchronization cannot be established, it means that a significant digital signal, that is, I and Q components cannot be extracted from the received signal, and therefore, two points to be sampled do not exist within the same period τ _IQ . In this case, the timing control means 13 sends a control signal to the sampling means 11. The sampling means 11 performs sampling by shifting the phase of the timing by the sampling clock within the period τ _IQ and performs quadrature detection.

  If the timing control means 13 repeats this process until the frame synchronization can be achieved, the sampling means 11 will eventually perform sampling at an appropriate sampling timing.

  In digital communication systems and digital broadcasting systems, it is common to use one or a combination of error correction codes such as Reed-Solomon codes (RS codes), convolutional codes, and turbo codes in order to increase tolerance against errors. is there.

  FIG. 6 shows a configuration example of the error correction code decoding unit 35 of FIG. 5 as Embodiment 2 of the present invention. The error correction code decoding unit 35 includes a Viterbi decoder 40, a first-in first-out (FIFO) register 41, a convolutional encoder 42, EX-OR gates 43 and 44, and a counter 45. The convolutional code is generally decoded by the Viterbi decoder 40. By comparing the output signal when the decoded signal by the Viterbi decoder 40 is input to the convolutional encoder 42 defined in the standard and the input signal of the Viterbi decoder 40, an error correction rate (BER) is obtained. ) Can be calculated.

  As an example of the decoding of the RS code, an error polynomial σ (z) is constructed from the received code by the Burrekamp-Massie method, and then the root α of the error polynomial satisfying σ (α) = 0 is found by a chain search. There is a method of finding the position and finally finding the syndrome from the root α by the Forney algorithm. The degree of this error polynomial σ (z) is the number of errors found during decoding. However, in the case of the RS encoding method, the maximum number of correctable errors is determined by the generator polynomial G (z) used at the time of encoding. Therefore, if the error in the received code is larger than the maximum value, the error polynomial σ (z) cannot be constructed. In the RS code of the Balecamp Massi method, it can be determined from an internal signal whether or not the degree of the polynomial is within the maximum number of correctable errors.

  As described above, it is possible to extract information “how much error is included in the received signal” from the error correction code decoding unit 35. By monitoring this information by the timing control means 13, it is possible to control the sampling timing.

The quadrature detection demodulator 14 cannot demodulate significant I and Q components and digital signals unless two sampling points exist within the same period τ _IQ . Therefore, even if such a digital signal is input to the error correction code decoding unit 35, the information at the time of encoding is lost, and error correction is impossible. That is, in the case of a convolutional code, for example, a high BER of 20% or more is output, and in the case of an RS code, the error polynomial σ (z) cannot be configured.

As shown in FIG. 5, the timing control means 13 always monitors the error correction code decoding unit 35, so that the two sampling timings can be within the same period τ _IQ . The timing control means 1 uses the BER when the error correction code decoded by the error correction code decoding unit 35 is a convolutional code, and the error polynomial when the error correction code decoded by the error correction code decoding unit 35 is an RS code. Always monitor whether the order of is greater than or equal to ability. If error correction can be performed without any problem, a significant digital signal can be extracted by quadrature detection, so that quadrature detection is continued as it is. On the other hand, if it is detected that an error exceeding the high BER or the error correction capability always exists within a certain period, it is determined that a significant digital signal cannot be extracted by the quadrature detection, and the timing control means 13 performs the sampling means. 11 sends a control signal. The sampling means 11 performs sampling by shifting the phase of the sampling timing within the period τ _IQ and performs quadrature detection. By repeating this process until the order of the BER or error polynomial reaches a value that can be considered in normal communication, the sampling timing can be set to an appropriate position.

  In the first and second embodiments, since the electromagnetic wave environment is poor, frame synchronization and error correction may not be possible. Therefore, if the sampling timing cannot be adjusted properly even after a certain number of repetitions, reception is not possible. It judges that it is possible electromagnetic wave environment, and stops each said flow.

  In the first and second embodiments, the sampling control unit 13 controls the timing of the sampling clock for sampling while monitoring the processing after the timing control unit 13 performs quadrature detection. However, the sampling timing can also be controlled using the signal itself entering the quadrature detection demodulator 14.

FIG. 12 described above shows an output signal when the I and Q signals having a constant I and Q component τ _IQ = 1 μs (f _IQ = 1 / τ _IQ = 1 MHz) are orthogonally modulated at fc = 1 MHz. The waveform is shown. This corresponds to the output signal down-converted to fc = 1 MHz by the tuner 33 on the receiving side. As described in the principle of quadrature modulation and demodulation, quadrature modulated wave is vibrated at a constant amplitude within tau _IQ period is the same cos wave and the amplitude r and phase θ varies for each tau _IQ period It can be said. Therefore, when over-sampled at even multiples of f _IQ, if fc> f _IQ, absolute value of the sample value has a peak (maximum value) at a plurality of sampling points, the values are equal, the peak The interval of is τ _IQ / 2.

  FIG. 7 shows a schematic electrical configuration of a digital quadrature detection demodulator 51 as a third embodiment of the present invention. In this embodiment, parts corresponding to the digital quadrature detection demodulator 1 of the basic form shown in FIG. 1 or the digital quadrature detection demodulator 31 shown in FIG. The digital quadrature detection demodulator 51 includes a timing control unit 54 including an oversampling unit 52 and an arithmetic processing unit 53, and includes a quadrature detection demodulation unit 55 further including a sampling unit 11 and a conversion unit 12, and a tuner unit 33.

FIG. 8 shows a value obtained by calculating an absolute value of the quadrature modulated wave of FIG. The output signal of the tuner unit 33 is oversampled at a frequency 16 times that of f _IQ . However, the number 16 times is an example, and any number that is an even number may be used, and is not limited. FIG. 7 shows a case where the output signal of the tuner unit 33 is oversampled at a frequency 16 times f _IQ . Sixteen pieces of oversampled data are stored, the absolute value of each sampled data is calculated, two peak values are obtained, and it is checked whether the two peak values are equal. For example, when 16 stored data correspond to the period (a) shown in FIG. 7, the two peak values are the same. On the other hand, when the stored 16 data points correspond to the period (b) in FIG. 7, it can be seen that the two peak values are different. By examining whether or not the two peak values are the same as described above, it can be determined whether 16 data points to be sampled are composed of one period τ _IQ or two periods τ _IQ .

  Since the peak position varies depending on the phase θ in the equation (1), even if the sampling point sequence has the same phase, the peak position differs if the I and Q components are different. Therefore, it is only necessary to check whether or not the peak value is the same in each process by performing the same process an appropriate number of times.

Accordingly, by repeating the above-described processing flow while changing the phase for storing 16 points, it is possible to detect without problems if two sampling points t _a and t _b in quadrature detection are taken. If they are not equal, there are timings at which the I and Q components change in the 16-point window. Therefore, the same process is performed by changing the phase of 16 points to be sampled. By continuing this, the sampling unit 11 can sample the sampling points t _a and t _b within the same period τ _IQ .

When the quadrature modulated wave is band-limited by a transmission line or an RF device, the I and Q components gradually change at both ends of the period τ _IQ . Therefore, when the peak exists near both ends of the period τ _IQ , it is not detected. However, if the center of the peak is near the center of the period τ _IQ , the I and Q components can be regarded as constant, so the peak values match. Therefore, according to this method, the sampling points t _a and t _b can be selected at _a timing that is not affected by the band limitation.

In the fourth embodiment of the present invention, the digital quadrature detection demodulator 51 shown in FIG. 7 oversamples the output signal of the tuner unit 33 at a frequency 16 times the frequency f _IQ . Sixteen sampling data are periodically extracted at a certain phase, the sum of the 16 sampling data is calculated, and the absolute value is obtained. This absolute value, for example, 100 sums is obtained. Next, 16 pieces of sampling data are periodically taken out at different phases and the same is repeated.

Consider the case where all 16 sampling points are within the period τ _IQ . The 16 sampling data in this case is data obtained by sampling an even number of cosine waves of the same amplitude r and phase θ at even intervals. In this case, although it can be understood that a cos graph is drawn, the sample values always include values having the same absolute value but different signs. Therefore, the sum of all sample values within one period is always zero.

However, if data within a different period τ _IQ enters 16 sampling points,

And not zero. In particular, when 16 sampling data belong to different periods τ _IQ by half, r ₁ and r ₂ , θ ₁ and θ ₂ are different values, and the sum of sample values within one period is a large value. .

  Therefore, the absolute value of the 16 sums of the oversampling data S (t) is calculated, and the sum,

Calculate The parentheses in S represent the sampling timing.

When all 16 points exist within the period τ _IQ , the value of the equation (22) becomes 0 from the equation (20). On the other hand, when different periods τ _IQ are mixed with 16 points, the value of the equation (22) moves away from 0. Therefore, sampling data is acquired by changing the phase n (0 ≦ n <16),

Calculate When the value of the equation (23) is minimized, all 16 points from the phase n exist within the same period τ _IQ . On the other hand, when this value is the maximum, 16 sampling points from phase n have almost half of sampling points belonging to cos waves having different amplitudes and phases.

FIG. 9 shows the result of calculating equation (23) for the orthogonal modulation wave actually shown in FIG. This graph is a timing horizontal axis takes the first sampling point t _a, the vertical axis (23) is a calculation result of the equation. Since the phase within the period τ _IQ is important, the graph is drawn only within this period. When t _a = 0 μs, all the sampling data belong to the same period τ _IQ, and when t _a = 0.5 μs, the sampling data belongs to _a different period τ _IQ by half. Note that t _a = 1.0 μs = τ _IQ is equivalent to t _a = 0 μs. From this graph, it can be seen that the expression (23) takes the minimum value 0 when t _a = 0 μs and reaches the maximum value when t _{a to} 0.4 μs. The position where the maximum value is obtained depends on the values of the I and Q components subjected to orthogonal modulation.

Therefore, if the phase n of the sampling timing that minimizes the expression (23) is found, then all 16 sampling points belong to the same period τ _IQ . If there is no particular limitation, any two points from these 16 points may be selected as sampling points ta and tb.

In practice, however, as described above, since I at both ends of period tau _IQ at the band, the change in the Q component becomes gradual, time tau _IQ is better near both ends is the removal of. Therefore, if two points close to the middle of the period of 16 points from the phase n are selected and sampled as sampling points t _a and t _b , the quadrature modulation wave having the same I and Q components not affected by the band limitation is obtained. Can be orthogonally detected.

  The first to fourth embodiments may be used alone, but the timing control accuracy can be further improved by controlling the sampling timing by combining a plurality of the first to fourth embodiments.

1 is a block diagram showing a basic electrical configuration of a digital quadrature detection demodulator 1 as an embodiment of the present invention. FIG. It is a graph which compares and shows the case where there is no band restriction | limiting, the case of 3 MHz band restriction | limiting, and the case of 1 MHz band restriction | limiting about the I component of the data before orthogonal modulation. It is a graph which shows the data after quadrature modulation about the I component of FIG. It is a time chart which shows the structure of the digital signal used as the object of quadrature modulation. FIG. 3 is a block diagram showing a schematic electrical configuration of a digital quadrature detection demodulator 31 using frame synchronization as Embodiment 1 of the present invention. FIG. 6 is a block diagram illustrating a configuration example of an error correction code decoding unit 35 in FIG. 5 as Embodiment 2 of the present invention. It is a block diagram which shows schematic electrical structure of the digital quadrature detection demodulator 51 as Example 3 of this invention. It is a graph which shows the value which calculated the absolute value of the orthogonal modulation wave of FIG. It is a graph which shows the result of having calculated (23) Formula about the orthogonal modulation wave shown in FIG. It is a block diagram which shows the schematic electrical structure for transmission / reception of the orthogonal modulation wave generally used by the digital communication system and the digital broadcasting system conventionally. It is a block diagram which shows the electrical structure of the orthogonal detection demodulation part proposed as a digital orthogonal detection demodulation part which does not use a Hilbert transform in a prior art. It is a graph which shows the state which oversamples a quadrature modulation wave. It is a time chart which shows the state which transmits components I and Q with a quadrature modulation wave.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,31,51 Digital quadrature detection demodulator 11 Sampling means 12 Conversion means 13,54 Timing control means 14,55 Quadrature detection demodulation part 20 Frame 21 Frame synchronization symbol string 22 Frame main body symbol string 33 Tuner part 34 Frame synchronization part 35 Error correction code decoding unit 52 Oversampling means 53 Operation processing unit 101 Information source 102 Transmitter 103 Error correction coding unit 104 Orthogonal modulator 105 Radio unit 106 Antenna 110 Receiver 111 Tuner unit 112 Quadrature detection demodulation unit 113 Error correction decoding Part

Claims (6)

A modulated wave that modulates the phase and / or amplitude of the carrier wave to change and transmits digital information is used as a received signal, and the sampling means samples by two sampling clocks fsa and fsb having the same period and different phases, In the digital quadrature detection demodulator in which the conversion means converts the two sample values Sa and Sb into two orthogonal components I and Q of the modulated wave and outputs them,
A digital quadrature detection demodulator comprising timing control means for controlling the timing of a sampling clock of the sampling means. A frame synchronization unit for detecting a frame synchronization symbol sequence from the outputs of the orthogonal two components I and Q;
The timing control means monitors the frame synchronization unit,
2. The digital quadrature detection demodulator according to claim 1, wherein the timing of sampling clocks fsa and fsb of the sampling means is controlled based on monitor information of the frame synchronization unit. An error correction code demodulating unit for demodulating an error correction code from the outputs of the orthogonal two components I and Q;
The timing control means monitors the error correction code demodulator,
2. A digital quadrature detection demodulator according to claim 1, wherein the timing of sampling clocks fsa and fsb of said sampling means is controlled based on monitor information of said error correction code demodulator. The timing control means oversamples the received signal for a period during which the components I and Q are constant, and outputs oversampled values S0, S1,..., Snc;
Peak detection means for detecting peak values Sp0, Sp1, ..., Spm of absolute values from the oversampled values S0, S1, ..., Snc, and timing thereof;
Including peak comparison means for comparing all peak values Sp0, Sp1, ..., Spm values,
2. The digital quadrature detection demodulator according to claim 1, wherein the timings of the sampling clocks fsa and fsb are controlled so that the comparison results of the peak values are the same. The timing control means oversamples the received signal for a period during which the components I and Q are constant, and outputs oversampled values S0, S1,..., Snc;
The absolute value of the sum of the oversampled values S0, S1, ..., Snc

And an arithmetic processing means for calculating a sum Σ _m Sm of absolute values Sm for a plurality of periods in the same phase,
2. The digital quadrature detection demodulator according to claim 1, wherein the timings of the sampling clocks fsa and fsb are controlled so that the sum Σ _m Sm of the absolute values for the plurality of periods is minimized.   The converting means is orthogonal to two of the oversampled values S0, S1,..., Snc output from the oversampling means based on an oversampled value in the middle of a period in which the components I and Q are constant. 6. The digital quadrature detection demodulator according to claim 4, wherein the digital quadrature detection demodulator is converted into components I and Q and output.

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