JP2005191238A - Semiconductor device and ignition device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which has such a construction that a body layer consisting of a current detection cell and a main cell composed of a power element is continuous, wherein the occurrence of an element destruction by turning ON parasitic transistors is prevented. <P>SOLUTION: With this construction, an n<SP>+</SP>-type emitter layer 4a in the main cell is mutually away from an n<SP>+</SP>-type emitter layer 4b in the current detection cell, and with this construction, the n<SP>+</SP>-type emitter layer is not arranged between the main cell and the current detection cell. Thus, the parasitic npn transistors are not formed between the main cell and the current detection cell, and even if a current caused by an external surge flows in an internal resistor, a large current does not flow between a collector and an emitter in the IGBT 11 of the main cell by an operation of the parasitic pnp transistors. Accordingly, it is possible to prevent the IGBT 11 of the main cell from being broken. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device in which a body layer of a current detection cell and a main cell composed of a power element is continuous, and an ignition device using the semiconductor device.

  2. Description of the Related Art Conventionally, a semiconductor device is known in which a current detection cell including a current detection element is formed together with a main cell in order to detect the amount of current flowing through the main cell including a power element. In this semiconductor device, the current detection cell and the main cell are formed by continuous impurity diffusion. FIG. 5A shows a layout of the boundary portion between the current detection cell and the main cell in this semiconductor device, and FIG. 5B shows a DD sectional view and an EE sectional view of FIG. (C). Although FIG. 5A is not a cross-sectional view, hatching is partially shown for easy understanding of the layout configuration.

A region I shown in FIG. 5A is a region showing a terminal portion of a main cell in which an IGBT is formed as a power element, and a region II is an I having the same configuration as the power element as a current detection element.
This is a region showing a terminal portion of the current detection cell in which the GBT is formed.

As shown in FIG. 5B, the IGBT in the main cell includes an N ⁻ type drift layer 2 formed on a P ⁺ type substrate 1, and a P type body layer 3 on the surface layer portion of the N type drift layer 2. In addition, an N ⁺ -type emitter layer 4 is formed on the surface layer portion of the P-type body layer 3. Further, a surface layer portion of the P-type body layer 3 located between the N ⁺ -type emitter layer 4 and the N-type drift layer 2 is used as a channel region, and a gate electrode 6 is formed on the surface thereof via a gate oxide film 5. ing. Further, an interlayer insulating film 7 is formed so as to cover the gate electrode 6, an emitter electrode 8 a is formed so as to cover the interlayer insulating film 7, and the emitter electrode is passed through the contact hole 7 a formed in the interlayer insulating film 7. 8 a is electrically connected to the N ⁺ -type emitter layer 4 and the P-type body layer 3. A collector electrode 9 is formed on the back side of the P ⁺ type substrate 1.

On the other hand, the current detection element in the current detection cell is also configured by an IGBT, and has the same configuration as the IGBT in the main cell. The IGBT constituting the current detection element is formed in the same process as the IGBT of the main cell, and includes a current detection emitter electrode 8b electrically separated from the emitter electrode 8a in the IGBT of the main cell, It is configured to be electrically connected to the N ⁺ -type emitter layer 4 and the P-type body layer 3 through a contact hole 7b (see FIGS. 5A and 5C) formed in the insulating film 7. Since the IGBT of the main cell and the IGBT of the current detection cell have the same configuration, a current proportional to the amount of current flowing through the IGBT of the main cell flows through the IGBT of the current detection cell. For this reason, it is possible to measure the current flowing through the main cell by detecting the current flowing through the IGBT in the current detection cell.

In the semiconductor device configured in this way, as shown in FIG. 5A, the IGBT in the current detection cell and the N ⁺ -type emitter layer 4 of the IGBT in the main cell are connected to each other. Contact holes 7 a and 7 b for electrically connecting the emitter electrode 8 a and the current detection electrode 8 b to the N ⁺ -type emitter layer 4 and the P-type body layer 3 are terminated in the N ⁺ -type emitter layer 4. It has a configuration.

  An equivalent circuit diagram of the conventional semiconductor device is shown in FIG. In the conventional semiconductor device, the P-type body layers 3 of the IGBT 10 serving as the current detection cell and the IGBT 11 serving as the main cell are in a continuous state. Therefore, as shown in FIG. The configuration is similar to that of the internal resistance 12 of the body layer 3 being connected.

  On the other hand, although not shown in FIG. 6, a load that is ON / OFF driven by the IGBT 11 is connected to the emitter electrode 8a of the IGBT 11 in the main cell, and a current flowing through the IGBT 10 is connected to the emitter electrode 8b of the IGBT 10 in the current detection cell. A current detection resistor for detection is connected. For this reason, a potential difference is generated between the emitter electrodes 8 a and 8 b, that is, between both ends of the internal resistor 12, and a larger or smaller current flows through the internal resistor 12.

In such a configuration, when a large external surge is applied, as shown in FIG. 5C, the N ⁺ -type emitter layer 4 and the P-type body layer connected between the current detection cell and the main cell. A large base current is supplied to the parasitic NPN transistor 13 formed by the N-type drift layer 2 and the N-type drift layer 2. Therefore, the parasitic NPN transistor 13 is turned on, and a large current flows from the N-type drift layer 3 through the P-type body layer 4 and the N ⁺ -type emitter layer 4 to, for example, the emitter electrode 8a on the main cell side. There is a problem of destroying it.

  Such a problem can be solved by isolating the current detection cell and the main cell with an insulating film or the like. However, since the effect of connecting the P-type body layer 3 between the current detection cell and the main cell, for example, the bias of the hole current flowing in the P-type body layer 3 can be reduced, it can be turned off like an inductance. Even when a back electromotive force is generated, the effect of suppressing the deviation of the cutoff current between the main cell and the current detection cell cannot be obtained.

  In view of the above points, the present invention prevents element breakdown from occurring when a parasitic transistor is turned on in a semiconductor device in which a body layer of a current detection cell and a main cell including a power element is continuous. The purpose is to do.

  In order to achieve the above object, according to the first aspect of the present invention, the main cell and the current detection cell are arranged in the same column, and both the main cell and the current detection cell have a semiconductor substrate ( 1) a second conductivity type drift layer (2) formed thereon, a first conductivity type body layer (3) formed on a surface layer portion of the drift layer (2), and a surface layer of the body layer (3) Part of the emitter layer (4a, 4b) of the second conductivity type disposed so as to be separated from the drift layer (2), and a body layer sandwiched between the emitter layer (4a, 4b) and the drift layer (2) ( 3) Using the surface layer portion of 3) as a channel region, an insulating film (5) formed on the surface of the channel region, a gate electrode (6) formed on the surface of the insulating film (5), and a gate electrode (6) Formed on the interlayer insulating film (7) formed thereon and the interlayer insulating film (7). Contact holes (7a, 7b) through the emitter layer and the emitter electrode (8a, 8b) which are electrically contacted to the body layer and a.

In such a configuration, the body layer (3) has a configuration in which the direction in which the main cell and the current detection cell are arranged is continuous in the longitudinal direction, and the emitter layer (4a, 4b) Is formed so as to extend in the longitudinal direction of the body layer (3) so that the main cell (4a) and the current detection cell (4b) are separated from each other.
Of the contact holes (7a, 7b), those formed in the main cell (7a) are those whose end position is located closest to the current detection cell among the emitter layers (4a) formed in the main cell. The one that protrudes further toward the current detection cell than the end position and is formed on the current detection cell (7b) is the main cell in the emitter layer (4b) whose end position is formed on the current detection cell. It is characterized in that it protrudes further to the main cell side than the terminal position of what is located on the side.

  Since the emitter layer (4a) in the main cell and the emitter layer (4b) in the current detection cell are thus separated from each other, the emitter layer is between the main cell and the current detection cell. The configuration is not arranged. For this reason, a parasitic NPN transistor is not formed between the main cell and the current detection cell, and a parasitic PNP transistor is connected between the collector and the emitter in the power element (11) of the main cell even if a current due to an external surge flows to the internal resistance. A large current does not flow due to the operation. Therefore, it is possible to prevent the power element (11) of the main cell from being destroyed.

  In the invention according to claim 2, the body layer (3) has a configuration in which the main cell and the current detection cell are arranged in the longitudinal direction, and the emitter layer (4a) 4b), a plurality of rows extending in the direction perpendicular to the longitudinal direction of the body layer (3) are extended from each other, and formed in the main cell (4a) and formed in the current detection cell (4b) Are separated from each other.

  In such a configuration, in the main cell, the contact hole (7a) overlaps the emitter layer (4a) and the body layer (3) extending in a plurality of rows, and the emitter electrode (8a) is used as the emitter layer (4a). ) And the body layer (3) are alternately contacted, and the terminal position of the emitter layer (4a) protrudes further to the current detection cell side than the one located closest to the current detection cell side. The contact area (S1) between the emitter electrode (8a) and the body layer (3) at the protruding portion is configured to be larger than the contact area (S2) between the emitter layers (4a) in a plurality of rows.

  In the current detection cell, the contact hole (7b) overlaps the emitter layer (4b) and the body layer (3) extending in a plurality of rows, and the emitter electrode (8b) is connected to the emitter layer (4b) and the body. It is configured to contact with the layer (3) alternately, and its end position protrudes further to the main cell side than the end position of the emitter layer (4b) located closest to the main cell side, The contact area (S3) between the emitter electrode (8b) and the body layer (3) in the protruding portion is configured to be larger than the contact area (S4) between the emitter layers (4b) in a plurality of rows. Yes.

  With such a configuration, in the current detection cell, the current density of the contact portion located further on the main cell side than the emitter layer (4b) on the most main cell side is higher than that of the other contact portions. Further, in the main cell, the current density of the contact portion located on the current detection cell side is higher than that of the other contact portions than the emitter layer (4a) on the most current detection cell side.

  Therefore, the current density flowing under each emitter layer (4a, 4b) becomes small, and even if a current due to an external surge flows to the internal resistance, the drift layer (2), the body layer (3), and the emitter layer (4a 4b), even if a parasitic transistor is configured, it is possible to prevent the parasitic transistor from operating. Therefore, it is possible to prevent the power element (10) of the main cell from being destroyed.

  In the invention according to claim 3 or 4, in the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is set longer than the interval (L2) between the emitter layers (4a), The current detection cell is characterized in that the protruding amount (L3) of the protruding portion of the contact hole (7b) is set longer than the interval (L4) between the emitter layers (4b).

  Thus, in the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is set longer than the interval (L2) between the emitter layers (4a). If the protrusion amount (L3) of the protrusion of (7b) is set to be longer than the distance (L4) between the emitter layers (4b), the effect shown in claim 2 can be obtained. Can do.

  In this case, for example, as shown in claim 5, in the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is set to 1. of the interval (L2) between the emitter layers (4a). In the current detection cell, the protruding amount (L3) of the protruding portion of the contact hole (7b) is 1.2 to 6 times the interval (L4) between the emitter layers (4b). Is set. Preferably, as shown in claim 6, in the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is set to 1.8 to the interval (L2) between the emitter layers (4a). In the current detection cell, the protruding amount (L3) of the protruding portion of the contact hole (7b) is 1.8 to 3 times the interval (L4) between the emitter layers (4b) so as to be three times. It is good to be set as follows.

  According to the first to sixth aspects of the present invention, for example, as shown in the seventh aspect, the voltage applied to the power element of the main cell and the gate electrode (6) of the element of the current detection cell in the semiconductor device is controlled. Drive circuit (20) and a current detection circuit (21) for detecting a current flowing between the emitter and the collector in the current detection cell, and energizing the ignition coil (26) by the power element of the main cell in the semiconductor device. And is applicable to an ignition device configured to control the discharge of the spark plug (27).

  In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.

(First embodiment)
A first embodiment of the present invention will be described with reference to FIG. FIG. 1A is a diagram showing a layout configuration of a semiconductor device S to which an embodiment of the present invention is applied, and FIG. 1B is a cross-sectional view taken along line AA in FIG. Hereinafter, the configuration of the semiconductor device S will be described with reference to these drawings. Since the configuration of the semiconductor device S is substantially the same as the conventional semiconductor device described in the background section above, the same configuration is used. Only different parts with the same reference numerals will be described.

As shown in FIG. 1A, in the semiconductor device S of the present embodiment, the P-type body layer 3 has a continuous configuration with respect to the IGBT 11 in the main cell and the IGBT 10 in the current detection cell. ^{The +} type emitter layer 4a and the N ⁺ type emitter layer 4b are separated from each other and are electrically separated from each other.

As for the IGBT 11 in the main cell, the termination position of the contact hole 7a formed in the interlayer insulating film 7 for electrically connecting the emitter electrode 8a to the N ⁺ -type emitter layer 4a and the P-type body layer 3 is N It is configured to protrude from the terminal position of the ⁺ -type emitter layer 4a to the current detection cell side. Further, with respect to the IGBT 10 in the current detection cell, the termination of the contact hole 7b formed in the interlayer insulating film 7 in order to electrically connect the current detection emitter electrode 8b to the N ⁺ -type emitter layer 4b and the P-type body layer 3. The position protrudes from the terminal position of the N ⁺ -type emitter layer 4b to the main cell side.

Specifically, the main cell is composed of a plurality of columns, for example, and has a striped layout configuration in which each column is arranged in parallel. The current detection cells are formed so as to be connected to at least one of them. . The N ⁺ -type emitter layers 4a and 4b and the contact holes 7a and 7b are extended so as to coincide with the longitudinal direction of the column. Therefore, the contact hole 7b in the IGBT 10 of the current detection cell is configured to protrude from the N ⁺ -type emitter layer 4b on the main cell side of the column in which the current detection cell is formed, that is, on the adjacent main cell side. ing. The contact hole 7a in the IGBT 11 of the main cell is configured to protrude from the N ⁺ -type emitter layer 4a on the current detection cell side.

In such a configuration, the semiconductor device S has the same equivalent circuit configuration as the circuit shown in FIG. However, since where the N ⁺ -type emitter layer 4b is a spaced configuration from one another in the N ⁺ -type emitter layer 4a and the current sensing cell in the main cell, the main cell and current as shown in FIG. 1 (b) No N ⁺ -type emitter layer is arranged between the detection cells.

  Therefore, the following effects can be obtained. That is, although not shown, a load that is ON / OFF driven by the IGBT 11 is connected to the emitter electrode 8a of the IGBT 11 in the main cell, and a current detection resistor is connected to the emitter electrode 8b of the IGBT 10 in the current detection cell. In this case, a potential difference is generated between the emitter electrodes 8a and 8b, that is, between both ends of the internal resistor 12, and a larger or smaller current flows through the internal resistor 12 as shown in FIG. .

However, as described above, since the N ⁺ -type emitter layer is not disposed between the main cell and the current detection cell, a parasitic NPN transistor is formed between the main cell and the current detection cell. Even when a current due to an external surge flows through the internal resistor 12, a large current due to the operation of the parasitic PNP transistor does not flow between the collector and emitter of the IGBT 11 of the main cell. Therefore, it is possible to prevent the IGBT 11 of the main cell from being destroyed.

(Second Embodiment)
A second embodiment of the present invention will be described. 2A is a layout diagram of the semiconductor device according to the present embodiment, FIG. 2B is a cross-sectional view taken along line BB in FIG. 2A, and FIG. 2C is a cross-sectional view of FIG. CC sectional drawing is shown. Hereinafter, the semiconductor device S of the present embodiment will be described with reference to FIG. 2, but the main elements constituting the semiconductor device S are the same as those of the first embodiment, so only the different parts will be described and the same parts will be described. Are denoted by the same reference numerals as in FIG.

As shown in FIGS. 2A to 2C, in this embodiment, the layout configuration of each element of the semiconductor device S is different from that of the first embodiment. Specifically, a plurality of N ⁺ -type emitter layers 4 a and 4 b are extended perpendicularly to the longitudinal direction of the P-type body layer 3, and these are arranged in a stripe shape. Further, contact holes 7a and 7b of the interlayer insulating film 7 are extended in the vertical direction (longitudinal direction of the P-type body layer 3) of each N ⁺ -type emitter layer 4a and 4b, and the N ⁺ -type emitter layer 4a, 4b and the P-type body layer 3 are overlapped.

Therefore, the emitter electrode 8a of the IGBT 11 of the main cell is connected to the N ⁺ -type emitter layer 4a and the P-type body layer 3 through the contact hole 7a, and the current detection emitter electrode 8b of the IGBT 10 of the current detection cell is connected to the contact hole 7b. The N ⁺ -type emitter layer 4b and the P-type body layer 3 are alternately electrically connected to each other.

The termination position of the contact hole 7a is projected from the termination position of the N ⁺ -type emitter layer 4a located closest to the current detection cell in the IGBT 11. The protruding amount L1 is set to be larger than the interval L2 between the N ⁺ -type emitter layers 4a arranged in a stripe shape, and the contact area S1 between the emitter electrode 8a and the P-type body layer 3 in the protruding portion is The contact area S2 between the emitter electrode 8a and the P-type body layer 3 between each N ⁺ -type emitter layer 4a is made larger.

On the other hand, the termination position of the contact hole 7b protrudes from the termination position of the N ⁺ -type emitter layer 4b located closest to the main cell in the IGBT 10. The protruding amount L3 is set to be larger than the interval L4 between the N ⁺ -type emitter layers 4b arranged in stripes, and the contact area S3 between the emitter electrode 8b and the P-type body layer 3 in the protruding portion is The contact area S4 between the emitter electrode 8b and the P-type body layer 3 between each N ⁺ -type emitter layer 4b is made larger. For example, the contact area S1 is approximately equal to the contact area S3, and the contact area S2 is approximately equal to the contact area S4.

  More specifically, the protrusion amount L1 is about 1.2 to 6 times (1.2 to 6 × L2 = L1), preferably about 1.8 to 3 times (1.8 to 3 × L2) with respect to the interval L2. = L1). Further, the protrusion amount L3 is about 1.2 to 6 times (1.2 to 6 × L4 = L3), preferably about 1.8 to 3 times (1.8 to 3 × L4 = L3) with respect to the distance L4. ) Is set.

  According to the semiconductor device S having such a configuration, the following effects can be obtained. That is, although not shown, a load that is ON / OFF driven by the IGBT 11 is connected to the emitter electrode 8a of the IGBT 11 in the main cell, and a current detection resistor is connected to the emitter electrode 8b of the IGBT 10 in the current detection cell. In this case, a potential difference is generated between the emitter electrodes 8a and 8b, that is, between both ends of the internal resistor 12, and a larger or smaller current flows through the internal resistor 12 as shown in FIG. .

However, in the semiconductor device S of the present embodiment, as described above, the widths of the contact portions between the emitter electrodes 8a and 8b and the P-type body layer 3, that is, the protrusion amounts L1 and L3 are the N ⁺ -type emitter layers 4a and 4b. Are set longer than the intervals L2 and L4. Therefore, primarily, each emitter electrode 8a, a current flowing between 8b, the portion located on the main cell side than the N ⁺ -type emitter layer 4b of IGBT10 in current sensing cell, and, N ⁺ -type IGBT11 in the main cell It passes through a portion located closer to the current detection cell than the emitter layer 4a. The current flowing from the emitter electrode 8b through the N ⁺ -type emitter layers 4b or the current flowing through the emitter electrodes 8a through the N ⁺ -type emitter layers 4a is very small.

In other words, the N ⁺ -type emitter layer 4b located closest to the main cell is called the main cell vicinity emitter layer. Of the contact portions between the emitter electrode 8b and the P-type body layer 3, the main cell vicinity emitter. The density of current through the portion closer to the main cell than the layer is higher than the density of current through the portion further away from the main cell. Further, when the N ⁺ -type emitter layer a located closest to the current detection cell is called a current detection cell vicinity emitter layer, the contact portion between the emitter electrode 8a and the P-type body layer 3 has a current detection cell vicinity. The current density through the portion on the current detection cell side further than the emitter layer is larger than the current density through the portion on the side farther from the current detection cell.

Therefore, the current density flowing under each N ⁺ -type emitter layer 4a, 4b is small, and even if a current due to an external surge flows through the internal resistor 12, the N-type drift layer 2, the P-type body layer 3 and the N ⁺ Even if a parasitic transistor is constituted by the type emitter layers 4a and 4b, it becomes possible to prevent the parasitic transistor from operating. Therefore, it is possible to prevent the IGBT 11 of the main cell from being destroyed.

(Third embodiment)
A third embodiment of the present invention will be described. In this embodiment, a circuit configuration for driving an actuator by combining the semiconductor device shown in the first and second embodiments with a control element will be described. FIG. 3 shows a circuit configuration in the present embodiment. Hereinafter, the circuit configuration of the present embodiment will be described with reference to FIG. 3, but the semiconductor device S is the same as that of the first and second embodiments, so that the same reference numerals as those in FIGS. 1 and 2 are given. Is omitted.

  As shown in FIG. 3, the circuit configuration of this embodiment includes a drive circuit 20 and a current detection circuit 21 that receive a control signal output from an ECU (not shown) in addition to the semiconductor device S shown in the first embodiment. It is the structure provided with control IC22 provided with. The control IC 22 and the semiconductor device S are electrically connected by bonding wires 22a and 22b.

  In the control IC 22, a terminal connected to the power source is provided, the drive circuit 20 is connected to the gate terminals of the IGBTs 10 and 11 of the main cell and the current detection cell in the semiconductor device S, and the current detection circuit 21 is the current detection cell. It is configured to be connected to the emitter of the IGBT 10 in FIG. The semiconductor device S has a configuration in which the actuator 30 driven by the control IC 22 is connected to terminals connected to the collectors of the main cell and the current detection cell.

  The drive circuit 20 outputs a control signal for ON / OFF control of the IGBT 11, that is, a high level voltage and a low level voltage, based on voltage application from the power source.

  The current detection circuit 21 includes, for example, a resistor connected in series to the IGBT 10 and an operational amplifier that uses the potentials at both ends of the resistor as input potentials of the inverting input terminal and the non-inverting input terminal. The output of the operational amplifier is input to the drive circuit 20.

  According to such a configuration, when the IGBT 11 is turned on based on the control signal from the drive circuit 20, a current flows through the actuator 30. Thereby, the actuator 30 is driven.

  At this time, a current proportional to the current flowing between the emitter and collector of the IGBT 11 flows between the emitter and collector of the IGBT 10 of the current detection cell, and flows to the current detection circuit 21. Then, the current detection circuit 21 detects the amount of current. For example, when the current detection circuit 21 is composed of a resistor and an operational amplifier as described above, since the potential at both ends of the resistor changes according to the current flowing through the IGBT 10 of the current detection cell, the potential difference is driven via the operational amplifier. Feedback is provided to the circuit 20. Thereby, the ON / OFF of the IGBT 11 of the main cell by the drive circuit 20 is feedback controlled.

  As described above, the semiconductor device shown in the first embodiment can be used for the circuit configuration of this embodiment. In such a circuit configuration, as shown in the first and second embodiments, a parasitic transistor in a semiconductor device is not formed or a parasitic transistor is not turned on even when external noise is applied. Therefore, the semiconductor device S can be prevented from being destroyed. Since the semiconductor device S can be prevented from being destroyed, a large current can be prevented from flowing to the control IC 22 side, and the control IC 22 can also be prevented from being destroyed.

(Fourth embodiment)
A fourth embodiment of the present invention will be described. In the present embodiment, the semiconductor device shown in the first and second embodiments is combined with a control element as a specific example of the circuit configuration, and the semiconductor device S of each of the above embodiments is applied to a vehicle ignition device IG. explain. FIG. 4 shows a circuit configuration of the ignition device IG in the present embodiment. Hereinafter, the ignition device IG of the present embodiment will be described based on FIG. 4, but the semiconductor device S is the same as that of the first embodiment, and therefore, the same reference numerals as those in FIG.

  As shown in FIG. 4, the ignition device IG includes a control IC 22 having a drive circuit 20 and a current detection circuit 21 that receive an ignition signal output from an engine ECU (not shown), and the semiconductor device shown in the first embodiment. S is provided. A battery 25 serving as a power source is connected to the ignition device IG, and a primary winding 26a of the ignition coil 26 is connected to a terminal connected to the collectors of the IGBTs 10 and 11 of the main cell and the current detection cell in the semiconductor device S. It becomes the composition.

  The drive circuit 20 outputs a control signal for ON / OFF control of the IGBT 11, that is, a high level voltage and a low level voltage, based on voltage application from the battery 25.

  The current detection circuit 21 includes, for example, a resistor connected in series to the IGBT 10 and an operational amplifier that uses the potentials at both ends of the resistor as input potentials of the inverting input terminal and the non-inverting input terminal. The output of the operational amplifier is input to the drive circuit 20.

  According to such a configuration, when the IGBT 11 is changed from ON to OFF based on the control signal from the drive circuit 20, the current is interrupted in the primary winding 26 a of the ignition coil 26. As a result, a high voltage is generated on the secondary winding 26b side, and the spark plug 27 is discharged by the high voltage.

  At this time, a current proportional to the current flowing between the emitter and collector of the IGBT 11 flows between the emitter and collector of the IGBT 10 of the current detection cell, and flows to the current detection circuit 21. Then, the current detection circuit 21 detects the amount of current. For example, when the current detection circuit 21 is composed of a resistor and an operational amplifier as described above, since the potential at both ends of the resistor changes according to the current flowing through the IGBT 10 of the current detection cell, the potential difference is driven via the operational amplifier. Feedback is provided to the circuit 20. Thereby, the ON / OFF of the IGBT 11 of the main cell by the drive circuit 20 is feedback controlled.

  As described above, when the semiconductor device shown in the first embodiment is used in the ignition device IG as in the present embodiment, the current detection cell of the current detection cell can be cut off by the inductance by the primary winding 26a of the ignition coil 26. It is difficult to shut off the IGBT 10 without any bias. However, as described above, the P-type body layer 3 provided in the semiconductor device S has a configuration in which the main cell and the current detection cell are continuous. For this reason, it becomes possible to interrupt | block each IGBT10 and 11 without bias.

(Other embodiments)
In each of the above embodiments, the N-type semiconductor device has been described as the first conductivity type and the P-type semiconductor device has been described as the second conductivity type. However, the present invention can be applied to a semiconductor device having these opposite conductivity types. It is possible to apply. In the above embodiment, the IGBT has been described as an example. However, the present invention is also applied to another semiconductor device, for example, a power MOSFET in which the conductivity type of the P ⁺ type substrate 1 as the semiconductor substrate in FIG. The invention can be applied.

  Further, in each of the above embodiments, the power element of the main cell and the element of the current detection cell are configured by the IGBTs 10 and 11 having exactly the same cross-sectional configuration. However, the same structure in the present invention means the same element structure. For example, the element structure is the same even when the channel length and channel width of the elements included in each cell are different. The cross-sectional structures are not necessarily the same.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the semiconductor device in 1st Embodiment of this invention, (a) is a layout figure, (b) is AA sectional drawing of (a). It is a figure which shows the semiconductor device in 2nd Embodiment of this invention, (a) is a layout figure, (b) is BB sectional drawing of (a), (c) is CC sectional drawing. . FIG. 9 is a diagram showing a circuit configuration when the semiconductor device shown in the first and second embodiments is combined with a control element according to the third embodiment of the present invention. FIG. 9 is a diagram showing a circuit configuration when the semiconductor device shown in the first and second embodiments is applied to a vehicle ignition device according to a fourth embodiment of the present invention. It is a figure which shows the conventional semiconductor device, (a) is a layout figure, (b) is DD sectional drawing of (a), (c) is EE sectional drawing. FIG. 6 is a diagram illustrating a circuit configuration of the semiconductor device illustrated in FIG. 5.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... P ⁺ type substrate, 2 ... N type drift layer, 3 ... P type body layer, 4a, 4b ... N + type emitter layer, 6 ... Gate electrode, 7 ... Interlayer insulating film, 7a, 7b ... Contact hole, 8a, 8b ... emitter electrode, 10, 11 ... IGBT, 12 ... internal resistance.

Claims (7)

A semiconductor device in which a main cell made of a power element and a current detection cell made of an element having the same configuration as the power element are formed on a first or second conductivity type semiconductor substrate (1),
The main cell and the current detection cell are arranged in the same column,
In both the main cell and the current detection cell,
A second conductivity type drift layer (2) formed on the semiconductor substrate (1);
A body layer (3) of a first conductivity type formed on a surface layer portion of the drift layer (2);
A second conductivity type emitter layer (4a, 4b) disposed so as to be separated from the drift layer (2) in a surface layer portion of the body layer (3);
With the surface layer portion of the body layer (3) sandwiched between the emitter layers (4a, 4b) and the drift layer (2) as a channel region, an insulating film (5) formed on the surface of the channel region;
A gate electrode (6) formed on the surface of the insulating film (5);
An interlayer insulating film (7) formed on the gate electrode (6);
An emitter electrode (8a, 8b) that is in electrical contact with the emitter layer and the body layer through contact holes (7a, 7b) formed in the interlayer insulating film (7);
The body layer (3) has a configuration in which the main cell and the current detection cell are arranged in the longitudinal direction, and is continuous between these cells.
The emitter layers (4a, 4b) extend in the longitudinal direction of the body layer (3), and are formed in the main cell (4a) and formed in the current detection cell (4b). It is configured to be separated from each other,
Of the contact holes (7a, 7b), those formed in the main cell (7a) are located at the end of the emitter layer (4a) formed in the main cell closest to the current detection cell. And the emitter layer (4b) whose end position is formed in the current detection cell is protruded further toward the current detection cell than the end position of the current detection cell. ) That is located closest to the main cell, protrudes further toward the main cell than the end position. A semiconductor device in which a main cell made of a power element and a current detection cell made of an element having the same configuration as the power element are formed on a first or second conductivity type semiconductor substrate (1),
The main cell and the current detection cell are arranged in the same column,
In both the main cell and the current detection cell,
A second conductivity type drift layer (2) formed on the semiconductor substrate (1);
A body layer (3) of a first conductivity type formed in a surface layer portion of the drift layer (2);
A second conductivity type emitter layer (4a, 4b) disposed so as to be separated from the drift layer (2) in a surface layer portion of the body layer (3);
With the surface layer portion of the body layer (3) sandwiched between the emitter layers (4a, 4b) and the drift layer (2) as a channel region, an insulating film (5) formed on the surface of the channel region;
A gate electrode (6) formed on the surface of the insulating film (5);
An interlayer insulating film (7) formed on the gate electrode (6);
An emitter electrode (8a, 8b) that is in electrical contact with the emitter layer and the body layer through contact holes (7a, 7b) formed in the interlayer insulating film (7);
The body layer (3) has a configuration in which the main cell and the current detection cell are arranged in the longitudinal direction, and is continuous between these cells.
The emitter layer (4a, 4b) includes a plurality of columns extending in the direction perpendicular to the longitudinal direction of the body layer (3) and extending to the main cell (4a) and the current detection cell. And (4b) formed in the structure are separated from each other,
In the main cell, the contact hole (7a) overlaps the emitter layer (4a) and the body layer (3) extending in the plurality of rows, and the emitter electrode (8a) is connected to the emitter layer ( 4a) and the body layer (3) are alternately contacted with each other, and the termination position of the current detection cell further than that of the emitter layer (4a) located closest to the current detection cell. Projecting toward the cell side, the contact area (S1) between the emitter electrode (8a) and the body layer (3) at the projecting portion is larger than the contact area (S2) between the emitter layers (4a) in the plurality of rows. Is also made up of
In the current detection cell, the contact hole (7b) overlaps the emitter layer (4b) and the body layer (3) extending in the plurality of rows, and the emitter electrode (8b) is connected to the emitter layer. (4b) and the body layer (3) are alternately contacted, and the termination position is further more than the termination position of the emitter layer (4b) located closest to the main cell. Projecting to the main cell side, the contact area (S3) between the emitter electrode (8b) and the body layer (3) at the projecting portion is the contact area (S4) between the emitter layers (4b) in the plurality of rows. A semiconductor device characterized in that it is configured to be larger. In the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is longer than the interval (L2) between the emitter layers (4a),
The protruding amount (L3) of the protruding portion of the contact hole (7b) in the current detection cell is longer than the interval (L4) between the emitter layers (4b). 2. The semiconductor device according to 2. A semiconductor device in which a main cell made of a power element and a current detection cell made of an element having the same configuration as the power element are formed on a first or second conductivity type semiconductor substrate (1),
The main cell and the current detection cell are arranged in the same column,
In both the main cell and the current detection cell,
A second conductivity type drift layer (2) formed on the semiconductor substrate (1);
A body layer (3) of a first conductivity type formed on a surface layer portion of the drift layer (2);
A second conductivity type emitter layer (4a, 4b) disposed so as to be separated from the drift layer (2) in a surface layer portion of the body layer (3);
With the surface layer portion of the body layer (3) sandwiched between the emitter layers (4a, 4b) and the drift layer (2) as a channel region, an insulating film (5) formed on the surface of the channel region;
A gate electrode (6) formed on the surface of the insulating film (5);
An interlayer insulating film (7) formed on the gate electrode (6);
An emitter electrode (8a, 8b) that is in electrical contact with the emitter layer and the body layer through contact holes (7a, 7b) formed in the interlayer insulating film (7);
The body layer (3) has a configuration in which the main cell and the current detection cell are arranged in the longitudinal direction, and is continuous between these cells.
The emitter layer (4a, 4b) includes a plurality of columns extending in the direction perpendicular to the longitudinal direction of the body layer (3) and extending to the main cell (4a) and the current detection cell. And (4b) formed in the structure are separated from each other,
In the main cell, the contact hole (7a) overlaps the emitter layer (4a) and the body layer (3) extending in the plurality of rows, and the emitter electrode (8a) is connected to the emitter layer ( 4a) and the body layer (3) are alternately contacted with each other, and the termination position of the current detection cell further than that of the emitter layer (4a) located closest to the current detection cell. Projecting to the cell side, the projecting amount (L1) is configured to be larger than the interval (L2) between the emitter layers (4a) of the plurality of rows,
In the current detection cell, the contact hole (7b) overlaps the emitter layer (4b) and the body layer (3) extending in the plurality of rows, and the emitter electrode (8b) is connected to the emitter layer. (4b) and the body layer (3) are alternately contacted, and the termination position is further more than the termination position of the emitter layer (4b) located closest to the main cell. A semiconductor device characterized by projecting toward the main cell and having a projecting amount (L3) larger than an interval (L4) between the emitter layers (4b) in the plurality of rows. In the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is 1.2 to 6 times the interval (L2) between the emitter layers (4a).
In the current detection cell, the protruding amount (L3) of the protruding portion of the contact hole (7b) is 1.2 to 6 times the interval (L4) between the emitter layers (4b). The semiconductor device according to claim 3, wherein the semiconductor device is characterized. In the main cell, the protruding amount (L1) of the protruding portion of the contact hole (7a) is 1.8 to 3 times the interval (L2) between the emitter layers (4a).
In the current detection cell, the protruding amount (L3) of the protruding portion of the contact hole (7b) is 1.8 to 3 times the interval (L4) between the emitter layers (4b). The semiconductor device according to claim 3, wherein the semiconductor device is characterized. A semiconductor device according to claim 1;
A drive circuit (20) for controlling a voltage applied to the power element of the main cell and the gate electrode (6) of the element of the current detection cell in the semiconductor device;
A current detection circuit (21) for detecting a current flowing between an emitter and a collector in the current detection cell;
An ignition device configured to control energization to the ignition coil (26) and control discharge of the ignition plug (27) by the power element of the main cell in the semiconductor device.

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