JP2005183807A - Printing mask for semiconductor sealing, sealing method of semiconductor element, and semiconductor device - Google Patents

Printing mask for semiconductor sealing, sealing method of semiconductor element, and semiconductor device Download PDF

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Publication number
JP2005183807A
JP2005183807A JP2003425044A JP2003425044A JP2005183807A JP 2005183807 A JP2005183807 A JP 2005183807A JP 2003425044 A JP2003425044 A JP 2003425044A JP 2003425044 A JP2003425044 A JP 2003425044A JP 2005183807 A JP2005183807 A JP 2005183807A
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Prior art keywords
opening
mask
sealing material
sealing
semiconductor element
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Japanese (ja)
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Toshiyuki Makita
俊幸 牧田
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Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Priority to JP2003425044A priority Critical patent/JP2005183807A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printing mask for semiconductor sealing wherein the upper surface of a sealing material can be flattened and sealed in a uniform thickness, and further processing is easy. <P>SOLUTION: The mask is formed by arranging an aperture 3 which corresponds to a semiconductor element 2 mounted on a wiring board 1 when the semiconductor element 2 is sealed with the sealing material 4. The semiconductor element 2 is positioned in the aperture 3 and arranged on the wiring board 1, the sealing material 4 is scrubbed with a squeegee 5, the inside of the aperture 3 is filled with the sealing material, and the mask is constituted. The thickness of a periphery portion of the opening 3 of the mask 7 is formed uniformly from a leader of the opening 3 in the direction of movement of the squeegee 5 which moves crossing the opening 3 at the upper part of the mask 7 as far as near the termination of the opening 3. A recess 6 is formed on the upper surface of the periphery of the termination of the opening 3, and the periphery is formed more thinly than other parts. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、スクリーン印刷の手法で半導体素子を封止材料で封止するために用いられる半導体封止用印刷マスクに関するものであり、またこの半導体封止用印刷マスクを用いて行なう半導体素子の封止方法、及びこの封止方法で得られる半導体装置に関するものである。   The present invention relates to a semiconductor sealing print mask used for sealing a semiconductor element with a sealing material by a screen printing technique, and to seal a semiconductor element using the semiconductor sealing print mask. The present invention relates to a stopping method and a semiconductor device obtained by this sealing method.

半導体装置の製造方法として、配線基板の表面にＩＣなどの半導体素子を多数個搭載し、この各半導体素子を封止材料で封止した後、配線基板を切断して各半導体素子を個片に分離させる方法が増えてきている。このように配線基板に搭載した多数個の半導体素子に同時に封止材料を封止する場合には、封止材料の封止面積が大幅に拡大し、また半導体装置の薄型化に応じて薄い厚みで封止を行なう方向にあることから、スクリーン印刷の手法を用いて半導体素子を液状の封止材料で封止する方法が増えてきている。   As a method of manufacturing a semiconductor device, a large number of semiconductor elements such as ICs are mounted on the surface of a wiring board, and each semiconductor element is sealed with a sealing material, and then the wiring board is cut into individual semiconductor elements. There are an increasing number of methods of separation. When sealing the sealing material simultaneously on a large number of semiconductor elements mounted on the wiring board in this way, the sealing area of the sealing material is greatly increased, and the thickness is reduced as the semiconductor device becomes thinner. Therefore, the number of methods for sealing a semiconductor element with a liquid sealing material using a screen printing method is increasing.

この方法は、配線基板１に搭載された半導体素子２に対応して開口部３を設けたマスク７を用い、そして図５（ａ）のように、半導体素子２を開口部３内に位置させて配線基板１の上にこのマスク７を重ねるように配置し、マスク７の上に液状の封止材料４を供給すると共に、マスク７の上面に圧接させながら一方向に移動させるスキージ５でこの封止材料４を擦って、開口部３内に封止材料４を充填することによって、封止材料４で半導体素子２を封止するようにしたものである（例えば特許文献１等参照）
しかしこのように液状封止材料４をマスク７を通してスクリーン印刷して、半導体素子２を封止する場合、マスク７の上面に圧接させたスキージ５の移動に伴って封止材料４を開口部３内に押し込んで充填することによって、封止が行なわれるが、移動するスキージ５が開口部３の上を通過する際に、開口部３に充填された封止材料４がスキージ５によって引張られ、スキージ５の移動方向での、スキージ５が開口部３に最初に到達する始端部内と、スキージ５が最後に到達する終端部内とを比較すると、開口部３の終端部内において封止材料４が過剰に供給されることになる。従って図５（ｂ）のように、封止材料４の厚みが開口部３の始端部よりも終端部付近で厚くなるおそれがあり、半導体素子２を封止した封止材料４の上面の平坦性を得ることができない。封止材料４が低粘度・低チクソトロピー性を示すものでは、スクリーン印刷後の封止材料４の流れで上面が水平に近くなるが、高フィラー系などの封止材料４では高粘度・高チクソトロピー性になる傾向があり、スクリーン印刷後も封止材料４は流れ難く封止材料４の上面の形状は保持され易くなる。 This method uses a mask 7 provided with an opening 3 corresponding to the semiconductor element 2 mounted on the wiring board 1, and places the semiconductor element 2 in the opening 3 as shown in FIG. The squeegee 5 is arranged so that the mask 7 is overlaid on the wiring board 1, and the liquid sealing material 4 is supplied onto the mask 7 and moved in one direction while being pressed against the upper surface of the mask 7. The semiconductor element 2 is sealed with the sealing material 4 by rubbing the sealing material 4 and filling the opening 3 with the sealing material 4 (see, for example, Patent Document 1).
However, when the liquid sealing material 4 is screen-printed through the mask 7 and the semiconductor element 2 is sealed in this way, the sealing material 4 is moved to the opening 3 as the squeegee 5 is brought into pressure contact with the upper surface of the mask 7. The sealing is performed by pushing in and filling, but when the moving squeegee 5 passes over the opening 3, the sealing material 4 filled in the opening 3 is pulled by the squeegee 5, In the moving direction of the squeegee 5, when the inside of the starting end where the squeegee 5 first reaches the opening 3 is compared with the inside of the terminal end where the squeegee 5 finally reaches, the sealing material 4 is excessive in the terminal end of the opening 3. Will be supplied. Therefore, as shown in FIG. 5B, the thickness of the sealing material 4 may be thicker in the vicinity of the terminal end than the starting end of the opening 3, and the upper surface of the sealing material 4 sealing the semiconductor element 2 is flat. I can't get sex. In the case where the sealing material 4 exhibits low viscosity and low thixotropy, the top surface becomes nearly horizontal due to the flow of the sealing material 4 after screen printing. However, in the sealing material 4 such as a high filler type, the high viscosity and high thixotropy. The sealing material 4 hardly flows even after screen printing, and the shape of the upper surface of the sealing material 4 is easily maintained.

そしてこのように、半導体素子２を封止した封止材料４の上面が平坦でないと、製造した半導体装置をボードに実装する場合などに吸引して取り扱う際の吸着性が悪くなって、組み立て性が低下するという問題や、半導体装置に印刷する場合に印刷がし難くなるという問題など、製品化の場面での問題が種々発生するものであった。   Thus, if the upper surface of the sealing material 4 encapsulating the semiconductor element 2 is not flat, the adsorptivity at the time of sucking and handling the manufactured semiconductor device when mounted on a board is deteriorated, and assemblability is reduced. Various problems have been encountered in commercialization, such as a problem that the image quality decreases and a problem that printing becomes difficult when printing on a semiconductor device.

そこで上記のように封止材料４の厚みが開口部３の始端部よりも終端部付近で厚くならないように、マスク７の厚みを調整する試みがなされている。図６（ａ）（ｂ）はその一例を示すものであり、マスク７の開口部３の部分の厚みを、スキージ５の移動方向の始端部から終端部に至るまで厚みが次第に薄くなるように形成してある（例えば、特許文献２等参照）。   Therefore, as described above, an attempt is made to adjust the thickness of the mask 7 so that the thickness of the sealing material 4 does not become thicker in the vicinity of the end portion than the start end portion of the opening 3. FIGS. 6A and 6B show an example, and the thickness of the opening 3 portion of the mask 7 is gradually reduced from the start end to the end in the moving direction of the squeegee 5. (For example, refer patent document 2 etc.).

このようにマスク７の開口部３の部分の厚みをスキージ５の移動方向の始端部から終端部へと厚みが次第に薄くなるように形成することによって、開口部３の終端部の部分に充填される封止材料４の量が過剰にならないようにすることができるものであり、封止材料４の厚みが開口部３の始端部よりも終端部付近で厚くならないようにして、半導体素子２を封止した封止材料４の上面の平坦性を得ることができるのである。
特開平１１−０４０５８９号公報 特開２０００−２２３５１１号公報 In this way, by forming the thickness of the opening 3 portion of the mask 7 so that the thickness gradually decreases from the start end portion in the moving direction of the squeegee 5 to the end portion, the end portion portion of the opening 3 is filled. The amount of the sealing material 4 to be increased can be prevented, and the thickness of the sealing material 4 does not become thicker near the terminal end than the starting end of the opening 3. The flatness of the upper surface of the sealed sealing material 4 can be obtained.
JP 11-040589 A JP 2000-223511 A

上記のように特許文献２の発明では、マスク７の開口部３の部分の厚みをスキージ５の移動方向の始端部から終端部へと厚みが次第に薄くなるように形成しているが、開口部３の部分の厚みをこのように形成するためには、図６に示すように、マスク７の開口部３の周縁部の上面をスキージ５の移動方向に下り傾斜する傾斜面に形成する必要がある。   As described above, in the invention of Patent Document 2, the thickness of the opening 3 of the mask 7 is formed so that the thickness gradually decreases from the start end to the end in the moving direction of the squeegee 5. In order to form the thickness of the portion 3 in this manner, as shown in FIG. 6, it is necessary to form the upper surface of the peripheral portion of the opening 3 of the mask 7 on an inclined surface that is inclined downward in the moving direction of the squeegee 5. is there.

そして半導体封止用のマスク７は数ｍｍ以下（通常３ｍｍ以下）の薄い厚みの金属板で形成されるものであり、マスク７に開口部３を形成する加工はエッチング加工で行なわれるのが一般的であるが、上記のようにマスク７の上面を下り傾斜する傾斜面に形成することは、エッチング加工では行なうことができない。従って研磨加工などの物理的加工でマスク７の表面を研削して傾斜面を形成する必要があり、マスク７の加工が非常に困難であるという問題を有するものであった。   The semiconductor sealing mask 7 is formed of a thin metal plate of several mm or less (usually 3 mm or less), and the process of forming the opening 3 in the mask 7 is generally performed by etching. However, as described above, the formation of the upper surface of the mask 7 on the inclined surface that is inclined downward cannot be performed by etching. Therefore, it is necessary to form the inclined surface by grinding the surface of the mask 7 by physical processing such as polishing, and the processing of the mask 7 is very difficult.

本発明は上記の点に鑑みてなされたものであり、半導体素子を封止材料で封止するにあたって、封止材料の上面を平坦化して均一な厚みで封止することができ、しかも加工が容易な半導体封止用印刷マスクを提供することを目的とするものであり、またこの半導体封止用印刷マスクを用いて、封止材料の上面を平坦化して均一な厚みで半導体素子の封止をすることができる半導体素子の封止方法を提供することを目的とするものであり、さらにこの半導体素子の封止方法を用いて、上面が平坦で均一な厚みの封止材料で半導体素子を封止した半導体装置を提供することを目的とするものである。   The present invention has been made in view of the above points, and when sealing a semiconductor element with a sealing material, the upper surface of the sealing material can be flattened and sealed with a uniform thickness, and the processing can be performed. An object of the present invention is to provide an easy-to-semiconductor sealing print mask. Also, using this semiconductor sealing print mask, the upper surface of a sealing material is flattened to seal a semiconductor element with a uniform thickness. It is an object of the present invention to provide a method for sealing a semiconductor element, and further, by using this method for sealing a semiconductor element, a semiconductor element can be formed with a sealing material having a flat upper surface and a uniform thickness. An object of the present invention is to provide a sealed semiconductor device.

本発明の請求項１に係る半導体封止用マスクは、配線基板１に搭載された半導体素子２に対応する開口部３を設けて形成され、開口部３内に半導体素子２を位置させて配線基板１の上に配置すると共に封止材料４をスキージ５で擦って開口部３内に充填することによって、封止材料４で半導体素子２を封止するために使用される半導体封止用マスクであって、マスク７の開口部３の周縁部の厚みを、マスク７の上を開口部３を横切って移動するスキージ５の移動方向での開口部３の始端部から終端部付近まで等厚に形成すると共に開口部３の終端部の周縁部の上面に凹部６を設けて他の部分より薄く形成して成ることを特徴とするものである。   The mask for semiconductor encapsulation according to claim 1 of the present invention is formed by providing an opening 3 corresponding to the semiconductor element 2 mounted on the wiring substrate 1, and the semiconductor element 2 is positioned in the opening 3 to perform wiring. A semiconductor sealing mask used for sealing the semiconductor element 2 with the sealing material 4 by being placed on the substrate 1 and rubbing the sealing material 4 with the squeegee 5 to fill the openings 3. The thickness of the peripheral portion of the opening 3 of the mask 7 is equal to the thickness from the start end of the opening 3 to the vicinity of the end in the moving direction of the squeegee 5 that moves across the opening 3 over the mask 7. The concave portion 6 is provided on the upper surface of the peripheral edge of the terminal portion of the opening 3 so as to be thinner than other portions.

マスク７の開口部３の周縁部の厚みを、スキージ５の移動方向での終端部が他の部分より薄くなるように形成することによって、開口部３の終端部の部分に充填される封止材料４の量が過剰にならないようにすることができ、封止材料４の厚みが開口部３の始端部よりも終端部付近で厚くならないようにして、半導体素子２を封止した封止材料４の上面の平坦性を得ることができる。またマスク７の開口部３の周縁部の厚みは、開口部３の始端部から終端部付近まで等厚であり、開口部３の終端部の周縁部の上面に凹部６を設けて他の部分より薄くなるようになっており、マスク７の上面を傾斜面に形成する必要がないと共に、エッチングやルーターによる切削加工などで凹部６を加工することによって、開口部３の終端部の周縁部の厚みを薄く形成することができる。   Sealing that fills the end portion of the opening 3 by forming the thickness of the peripheral portion of the opening 3 of the mask 7 so that the end in the moving direction of the squeegee 5 is thinner than the other portions. The amount of the material 4 can be prevented from becoming excessive, and the sealing material 4 is sealed so that the thickness of the sealing material 4 does not become thicker in the vicinity of the end portion than the start end portion of the opening 3. The flatness of the upper surface of 4 can be obtained. Further, the thickness of the peripheral edge of the opening 3 of the mask 7 is equal from the start end of the opening 3 to the vicinity of the terminal end, and the recess 6 is provided on the upper surface of the peripheral edge of the terminal end of the opening 3 to provide another part. It is thinner, and it is not necessary to form the upper surface of the mask 7 as an inclined surface. By processing the recess 6 by etching or cutting with a router, the peripheral portion of the end portion of the opening 3 is formed. The thickness can be reduced.

また請求項２の発明は、請求項１において、開口部の周縁部の終端部の凹部を設けた部分の厚みと、開口部の周縁部の他の部分の厚みとの差が、５０〜２００μｍであることを特徴とするものである。   According to a second aspect of the present invention, in the first aspect, the difference between the thickness of the end portion of the peripheral portion of the opening and the thickness of the other portion of the peripheral portion of the opening is 50 to 200 μm. It is characterized by being.

この発明によれば、開口部３の終端部の部分に充填される封止材料４の量を適量に設定することができ、半導体素子２を封止した封止材料４の上面の平坦性を精度高く得ることができる。   According to this invention, the amount of the sealing material 4 filled in the terminal portion of the opening 3 can be set to an appropriate amount, and the flatness of the upper surface of the sealing material 4 sealing the semiconductor element 2 can be improved. High accuracy can be obtained.

本発明の請求項３に係る半導体素子の封止方法は、請求項１又は２に記載の半導体封止用マスク７を用い、配線基板１に搭載された半導体素子２を開口部３内に位置させて配線基板１の上に該マスク７を配置し、マスク７上に供給された封止材料４をスキージ５で擦って開口部３内に封止材料を充填することによって、封止材料４で半導体素子を封止するにあたって、封止材料４として、粘度が５０〜４００Ｐａ・ｓの液状封止材料を用いることを特徴とするものである。   According to a third aspect of the present invention, there is provided a semiconductor element sealing method using the semiconductor sealing mask 7 according to the first or second aspect, and positioning the semiconductor element 2 mounted on the wiring board 1 in the opening 3. Then, the mask 7 is disposed on the wiring board 1, and the sealing material 4 supplied onto the mask 7 is rubbed with the squeegee 5 to fill the opening 3 with the sealing material 4. In sealing the semiconductor element, a liquid sealing material having a viscosity of 50 to 400 Pa · s is used as the sealing material 4.

この発明によれば、封止材料４の適度な流れで、封止材料４の上面を平坦化して、より均一な厚みの封止材料４で半導体素子２の封止をすることができる。   According to the present invention, the upper surface of the sealing material 4 can be flattened with an appropriate flow of the sealing material 4, and the semiconductor element 2 can be sealed with the sealing material 4 having a more uniform thickness.

また請求項４の発明は、請求項３において、半導体素子２の封止を０．０１ＭＰａ以下の減圧雰囲気で行なうことを特徴とするものである。   The invention of claim 4 is characterized in that, in claim 3, the semiconductor element 2 is sealed in a reduced pressure atmosphere of 0.01 MPa or less.

この発明によれば、封止材料４をスキージ５で擦って半導体素子２を封止する際に、空気が封止材料４に巻き込まれることがなくなり、封止材料４中にボイド等が発生するようなことなく封止を行なうことができる。   According to this invention, when sealing the semiconductor element 2 by rubbing the sealing material 4 with the squeegee 5, air is not caught in the sealing material 4, and voids or the like are generated in the sealing material 4. Sealing can be performed without such a situation.

本発明の請求項５に係る半導体装置は、配線基板１に搭載された半導体素子２が、請求項３又は４に記載の方法で封止材料４によって封止されて成ることを特徴とするものである。   The semiconductor device according to claim 5 of the present invention is characterized in that the semiconductor element 2 mounted on the wiring board 1 is sealed with the sealing material 4 by the method according to claim 3 or 4. It is.

この発明によれば、上面が平坦で均一な厚みの封止材料４で半導体素子２を封止した半導体装置を得ることができる。   According to the present invention, a semiconductor device in which the semiconductor element 2 is sealed with the sealing material 4 having a flat upper surface and a uniform thickness can be obtained.

本発明によれば、半導体封止用印刷マスクはエッチングなどの容易な加工で作製することができるものである。そしてこの半導体封止用印刷マスクを用いて、封止材料の上面の平坦性が高く均一な厚みの封止材料で半導体素子の封止をすることができるものである。   According to the present invention, the semiconductor encapsulation printing mask can be produced by an easy process such as etching. By using this semiconductor sealing print mask, the semiconductor element can be sealed with a sealing material having a high flatness on the upper surface of the sealing material and a uniform thickness.

以下、本発明を実施するための最良の形態を説明する。   Hereinafter, the best mode for carrying out the present invention will be described.

本発明で用いる半導体封止用の印刷マスク７は数ｍｍ以下（通常３ｍｍ以下）の薄い厚みのステンレス板など金属板で形成されるものであり、マスク７には開口部３が上下両面に開口して設けてある。一方、配線基板１の上面にはワイヤー１０等で配線基板１の回路に電気的に接続した状態で半導体素子２が搭載してあり、マスク７の開口部３はこの配線基板１に搭載された半導体素子２に対応する位置において、半導体素子２の寸法より大きな開口として形成してある。   The semiconductor sealing print mask 7 used in the present invention is formed of a metal plate such as a thin stainless steel plate of several mm or less (usually 3 mm or less). The mask 7 has openings 3 on both upper and lower sides. It is provided. On the other hand, the semiconductor element 2 is mounted on the upper surface of the wiring board 1 in a state of being electrically connected to the circuit of the wiring board 1 with a wire 10 or the like, and the opening 3 of the mask 7 is mounted on the wiring board 1. An opening larger than the size of the semiconductor element 2 is formed at a position corresponding to the semiconductor element 2.

そしてこのマスク７の上面にはスキージ５がその下端を圧接させた状態で、開口部３の上を横切って移動するようになっているが、スキージ５の移動方向での開口部３の終端部の位置においてマスク７の上面に凹部６が凹設してある。この凹部６は図２に示すように、開口部３の終端部から開口部３の端縁にかけた位置において、スキージ５が移動する方向と直交する方向の全長に亘って、マスク７の上面に溝状に形成してある。凹部６の断面形状は図１のように円弧状であっても、図３のように角型であってもいずれでもよい。このように開口部３の終端部の位置においてマスク７の上面に凹部６を設けることによって、開口部３の終端部の周縁部のマスク７の厚みが、スキージ５の移動方向での開口部３の始端部から凹部６の手前の終端部付近までの周縁部のマスク７の厚みより薄く形成されるものであり、マスク７の開口部３の周縁部のうち、スキージ５の移動方向での開口部３の始端部から凹部６の手前の終端部付近までは等厚に形成されるものである。   The squeegee 5 is moved across the opening 3 while the lower end of the squeegee 5 is in pressure contact with the upper surface of the mask 7, but the terminal portion of the opening 3 in the moving direction of the squeegee 5. The recess 6 is formed in the upper surface of the mask 7 at the position. As shown in FIG. 2, the recess 6 is formed on the upper surface of the mask 7 over the entire length in the direction perpendicular to the direction in which the squeegee 5 moves at the position from the terminal end of the opening 3 to the edge of the opening 3. It is formed in a groove shape. The cross-sectional shape of the recess 6 may be either an arc shape as shown in FIG. 1 or a square shape as shown in FIG. Thus, by providing the concave portion 6 on the upper surface of the mask 7 at the position of the terminal portion of the opening portion 3, the thickness of the mask 7 at the peripheral edge portion of the terminal portion of the opening portion 3 is set to the opening portion 3 in the moving direction of the squeegee 5. Is formed thinner than the thickness of the peripheral portion of the mask 7 from the start end portion of the mask 7 to the vicinity of the end portion in front of the concave portion 6. From the start end of the portion 3 to the vicinity of the end portion in front of the recess 6, the same thickness is formed.

上記のようにマスク７に開口部３と凹部６を設けるにあたっては、マスク７を表裏両面からエッチング（ハードエッチング）加工して開口部３を形成し、次いでマスク７の片面の表層部をハーフエッチング（ソフトエッチング）加工して凹部６を形成することによって、金属の腐食という化学的処理で容易に行なうことができる。例えばマスク７がステンレス板である場合、第二酸化鉄を主成分とするエッチング液を用い、マスク７の表面の開口部３を形成する箇所以外の部分をドライフィルムなどのエッチングレジストで被覆して、このエッチング液をマスク７に作用させることによって、マスク７の内部までハードエッチングして開口部３を形成することができるものであり、次に、マスク７の表面の凹部６を形成する箇所以外の部分をドライフィルムなどのエッチングレジストで被覆し、同じエッチング液を用い、ライン速度を２倍にするなどしてマスク７にエッチング液が作用する時間を半減させるなどして、エッチングレイトを半分にすることによって、マスク７の表層のみをハーフエッチングして凹部６を形成することができるものである。尚、これら開口部３や凹部６の加工は、上記のようなエッチングの他に、ドリルやルーターなどの機械的加工手段を用いて行なうこともできるものであり、特に凹部６はルーターなどによる溝切り加工で容易に形成することができるものである。   When the opening 3 and the recess 6 are provided in the mask 7 as described above, the opening 7 is formed by etching (hard etching) the mask 7 from both front and back surfaces, and then the surface layer portion on one side of the mask 7 is half-etched. By forming the recesses 6 by (soft etching) processing, it can be easily performed by a chemical treatment called metal corrosion. For example, when the mask 7 is a stainless steel plate, an etching liquid mainly composed of ferric oxide is used, and a portion other than the portion where the opening 3 on the surface of the mask 7 is formed is covered with an etching resist such as a dry film, By making this etching solution act on the mask 7, the opening 3 can be formed by hard etching to the inside of the mask 7. Next, the portion other than the portion where the concave portion 6 is formed on the surface of the mask 7. The portion is covered with an etching resist such as a dry film, and the etching rate is halved by halving the time that the etching solution acts on the mask 7 by doubling the line speed using the same etching solution. Accordingly, only the surface layer of the mask 7 can be half-etched to form the recess 6. The opening 3 and the recess 6 can be processed by using a mechanical processing means such as a drill or a router in addition to the etching as described above. It can be easily formed by cutting.

ここで、凹部６の深さ寸法Ｄ２を５０〜２００μｍの範囲に設定して、開口部３の周縁部の凹部６を設けた部分の厚みと、開口部３の周縁部の他の部分の厚みＤ１との差（Ｄ２）が５０〜２００μｍになるようにするのが好ましい。また開口部３のスキージ５の移動方向での幅寸法Ｗ１に対する、凹部６の開口部３内の同方向での幅寸法Ｗ２の比（Ｗ２／Ｗ１）は、１／４〜１／１０の範囲に設定するのが好ましい。 Here, by setting the depth D 2 of the recess 6 in the range of 50 to 200 [mu] m, and the thickness of the portion of the recess 6 provided in the peripheral edge of the opening 3, the other part of the peripheral edge of the opening 3 The difference (D 2 ) from the thickness D 1 is preferably 50 to 200 μm. The ratio (W 2 / W 1 ) of the width dimension W 2 in the same direction in the opening 3 of the recess 6 to the width dimension W 1 in the moving direction of the squeegee 5 in the opening 3 is ¼ to 1. It is preferable to set it within a range of / 10.

尚、図２及び図３の実施の形態では、一つの開口部３を設けたマスク７を図示しているが、実際には、配線基板１に多数個の半導体素子２を縦横に配列して搭載してあり、マスク７にはこれらの各半導体素子２と対応する位置に多数の開口部３が図４に示すように設けてある。そして凹部６は、スキージ５が移動する方向と直交する方向に並ぶ各開口部３の終端部を結ぶ線に沿って、マスク７の幅全長に亘るように設けてある。   In the embodiment of FIGS. 2 and 3, the mask 7 having one opening 3 is shown. However, in practice, a large number of semiconductor elements 2 are arranged on the wiring board 1 vertically and horizontally. The mask 7 is provided with a large number of openings 3 at positions corresponding to the semiconductor elements 2 as shown in FIG. The recess 6 is provided so as to extend over the entire width of the mask 7 along a line connecting the end portions of the openings 3 arranged in a direction orthogonal to the direction in which the squeegee 5 moves.

しかして、上記のように形成されるマスク７を用いて、配線基板１に搭載された半導体素子２を封止成形するにあたっては、図１（ａ）のように、半導体素子２を開口部３内に位置させるようにして配線基板１の上にマスク７を重ねて水平に配置し、マスク７の上に液状の封止材料４を供給する。封止材料４としては特に限定されるものではないが、例えば液状エポキシ樹脂組成物などを用いることができる。そして、ゴムやウレタン等の弾性体で形成されるスキージ５をその下端をマスク７の上面に圧接させた状態で、図１（ａ）の矢印のように、開口部３の上を横切らせて移動させることによって、スキージ５で擦って封止材料４を開口部３内に押し込んで充填することができるものであり、このように開口部３内に封止材料４を充填することによって、半導体素子２を封止材料４で被覆して封止することができるものである。   Thus, when the semiconductor element 2 mounted on the wiring board 1 is encapsulated using the mask 7 formed as described above, the semiconductor element 2 is formed in the opening 3 as shown in FIG. A mask 7 is overlapped on the wiring substrate 1 so as to be positioned inside and horizontally disposed, and a liquid sealing material 4 is supplied onto the mask 7. Although it does not specifically limit as the sealing material 4, For example, a liquid epoxy resin composition etc. can be used. Then, the squeegee 5 formed of an elastic body such as rubber or urethane is moved across the opening 3 as shown by the arrow in FIG. 1A with the lower end pressed against the upper surface of the mask 7. By moving, the sealing material 4 can be rubbed with the squeegee 5 to be pushed into the opening 3 to be filled, and thus the opening 3 is filled with the sealing material 4 so that the semiconductor The element 2 can be covered with the sealing material 4 and sealed.

ここで、上記のようにスキージ５で擦って封止材料４を開口部３内に押し込み充填する際に、スキージ５が開口部３の上を移動するときに開口部３に充填された封止材料４がスキージ５で引張られ、開口部３の終端部内において封止材料４が過剰に供給されることになる。しかし、開口部３の終端部には凹部６が形成してあって、開口部３の終端部の厚みは他の部分よりも薄くなっており、開口部３の終端部の容積は他の部分よりも小さくなっている。従って、開口部３の終端部内への封止材料４の充填量は、封止材料４が過剰に供給されることと容積が小さいこととが打ち消し合って、開口部３内の終端部以外の部分とほぼ同等になるものであり、開口部３の終端部付近での封止材料４の厚みが厚くならないようにすることができ、図１（ｂ）のように半導体素子２を封止した封止材料４の上面の平坦性を得ることができるものであって、封止材料４の厚みを均一にすることができるものである。   Here, when the sealing material 4 is rubbed with the squeegee 5 as described above and the sealing material 4 is pushed and filled into the opening 3, the sealing filled in the opening 3 when the squeegee 5 moves over the opening 3. The material 4 is pulled by the squeegee 5, and the sealing material 4 is excessively supplied in the terminal portion of the opening 3. However, the recess 6 is formed at the end of the opening 3, and the thickness of the end of the opening 3 is thinner than the other parts, and the volume of the end of the opening 3 is the other part. Is smaller than Therefore, the filling amount of the sealing material 4 into the terminal portion of the opening 3 cancels the excessive supply of the sealing material 4 and the small volume, and other than the terminal portion in the opening 3. The thickness of the sealing material 4 in the vicinity of the terminal portion of the opening 3 can be prevented from becoming thick, and the semiconductor element 2 is sealed as shown in FIG. The flatness of the upper surface of the sealing material 4 can be obtained, and the thickness of the sealing material 4 can be made uniform.

このとき、既述のように、開口部３の周縁部の凹部６を設けた部分の厚みと、開口部３の周縁部の他の部分の厚みとの差が５０〜２００μｍになるようにするのが好ましい。厚みの差が５０μｍ未満であると、開口部３の終端部付近での封止材料４の厚みが厚くならないようにする効果が不十分であり、半導体素子２を封止した封止材料４の上面の平坦性を精度高く得ることが難しい。また厚みの差が２００μｍを超えると、逆に開口部３の終端部付近での封止材料４の厚みが薄くなって、半導体素子２を封止した封止材料４の上面の平坦性が得られなくなるおそれがある。   At this time, as described above, the difference between the thickness of the portion provided with the recess 6 in the peripheral portion of the opening 3 and the thickness of the other portion of the peripheral portion of the opening 3 is set to 50 to 200 μm. Is preferred. If the difference in thickness is less than 50 μm, the effect of preventing the thickness of the sealing material 4 in the vicinity of the terminal portion of the opening 3 from becoming thick is insufficient, and the sealing material 4 sealing the semiconductor element 2 It is difficult to obtain the flatness of the upper surface with high accuracy. On the other hand, when the difference in thickness exceeds 200 μm, the thickness of the sealing material 4 in the vicinity of the terminal portion of the opening 3 is reduced, and the flatness of the upper surface of the sealing material 4 sealing the semiconductor element 2 is obtained. There is a risk of being lost.

そして上記のようにスクリーン印刷の手法で半導体素子２を封止材料４で封止した後、配線基板１上からマスク７を外し、封止材料４を硬化させることによって、図１（ｂ）のようなＣＯＢ形状などの半導体装置を得ることができるものである。配線基板１に多数個の半導体素子２を縦横に配列して搭載してある場合には、図４のように多数の開口部３を設けたマスク７を用い、マスク７の各開口部３にそれぞれ半導体素子２を位置させるようにして配線基板１の上にマスク７を配置し、各半導体素子２を封止材料４で一括封止すると共に封止材料４を硬化させた後、配線基板１を切断して各半導体素子２を個別に分離させることによって、図１（ｂ）のような半導体装置を得ることができるものである。   Then, after the semiconductor element 2 is sealed with the sealing material 4 by the screen printing method as described above, the mask 7 is removed from the wiring substrate 1 and the sealing material 4 is cured, whereby FIG. Such a COB-shaped semiconductor device can be obtained. When a large number of semiconductor elements 2 are arranged vertically and horizontally on the wiring substrate 1, a mask 7 having a large number of openings 3 as shown in FIG. A mask 7 is disposed on the wiring board 1 so that the semiconductor elements 2 are positioned, and the semiconductor elements 2 are collectively sealed with the sealing material 4 and the sealing material 4 is cured. The semiconductor device shown in FIG. 1B can be obtained by cutting the semiconductor element 2 and separating each semiconductor element 2 individually.

このようにして、封止材料４の粘度やチクソトロピー性に影響されることなく、封止材料４の上面の平坦性（水平性）を良好に保ちながら半導体素子２を封止成形して、表面が水平で平坦な半導体装置を得ることができるものであり、半導体装置をボードに実装する場合などに吸引して取り扱う際の吸着性の悪化を防ぐことができ、組み立て性の低下を防止できると共に、半導体装置の表面への印刷性が良好になるものである。   In this way, the semiconductor element 2 is encapsulated and molded while maintaining the flatness (horizontality) of the upper surface of the encapsulating material 4 without being affected by the viscosity and thixotropy of the encapsulating material 4. Can obtain a horizontal and flat semiconductor device, and can prevent deterioration of the adsorptivity when sucking and handling the semiconductor device when mounted on a board, etc. The printability on the surface of the semiconductor device is improved.

ここで、封止材料４としては液状であれば特に制限されることなく使用することができるが、なかでも粘度（スクリーン印刷を行なう雰囲気での温度、例えば２５℃での粘度）が５０〜４００Ｐａ・ｓの範囲のものが好ましい。封止材料４の粘度が５０Ｐａ・ｓ未満であると、マスク７の開口部３に封止材料４を充填して半導体素子２を封止した後にマスク７を外すと、封止材料４が流れて半導体素子２の一部やワイヤー１０が露出するおそれがある。また封止材料４の粘度が４００Ｐａ・ｓを超えると、封止材料４の流動性が不足してマスク７の開口部３への充填性が悪くなり、充填不良による欠けや、ボイドの混入などの問題が生じるおそれがある。   Here, the sealing material 4 can be used without particular limitation as long as it is liquid, but the viscosity (temperature in an atmosphere in which screen printing is performed, for example, viscosity at 25 ° C.) is 50 to 400 Pa. -The thing of the range of s is preferable. When the sealing material 4 has a viscosity of less than 50 Pa · s, the sealing material 4 flows when the opening 7 of the mask 7 is filled with the sealing material 4 to seal the semiconductor element 2 and then the mask 7 is removed. Therefore, part of the semiconductor element 2 and the wire 10 may be exposed. On the other hand, when the viscosity of the sealing material 4 exceeds 400 Pa · s, the fluidity of the sealing material 4 is insufficient and the filling property to the opening 3 of the mask 7 is deteriorated. May cause problems.

また、マスク７の開口部３に封止材料４を充填して半導体素子２を封止する図１（ａ）の工程を、０．０１ＭＰａ（１００Ｔｏｒｒ）以下の減圧雰囲気で行なうのが好ましい。このように減圧雰囲気下で成形材料４を開口部３に充填することによって、この際に空気が封止材料４に巻き込まれることがなくなり、封止材料４中にボイド等が発生するようなことなく封止を行なうことができるものである。減圧度は低いほど好ましいが、７０Ｐａ（０．５Ｔｏｒｒ）程度が実用上の下限である。   Moreover, it is preferable to perform the process of Fig.1 (a) which seals the semiconductor element 2 by filling the opening part 3 of the mask 7 with the sealing material 4 in a pressure-reduced atmosphere below 0.01 MPa (100 Torr). Thus, by filling the opening 3 with the molding material 4 in a reduced pressure atmosphere, air is not caught in the sealing material 4 at this time, and voids or the like are generated in the sealing material 4. It is possible to perform sealing without any problems. The lower the degree of vacuum, the better, but about 70 Pa (0.5 Torr) is the practical lower limit.

本発明の実施の形態の一例を示すものであり、（ａ），（ｂ）はそれぞれ断面図である。An example of embodiment of this invention is shown, (a), (b) is sectional drawing, respectively. 同上のマスクの一例を示すものであり、（ａ）は斜視図、（ｂ）は断面図である。An example of a mask same as the above is shown, (a) is a perspective view, (b) is a sectional view. 同上のマスクの他の一例を示すものであり、（ａ）は斜視図、（ｂ）は断面図である。It shows another example of the same mask, (a) is a perspective view, (b) is a sectional view. 同上のマスクの他の一例を示す斜視図である。It is a perspective view which shows another example of a mask same as the above. 従来例を示すものであり、（ａ），（ｂ）は断面図である。A conventional example is shown, and (a) and (b) are sectional views. 他の従来例を示すものであり、（ａ）は斜視図、（ｂ）は断面図である。It shows another conventional example, (a) is a perspective view, (b) is a sectional view.

符号の説明Explanation of symbols

１ 配線基板
２ 半導体素子
３ 開口部
４ 封止材料
５ スキージ
６ 凹部
７ マスク DESCRIPTION OF SYMBOLS 1 Wiring board 2 Semiconductor element 3 Opening part 4 Sealing material 5 Squeegee 6 Recessed part 7 Mask

Claims (5)

配線基板に搭載された半導体素子に対応する開口部を設けて形成され、開口部内に半導体素子を位置させて配線基板の上に配置すると共に封止材料をスキージで擦って開口部内に充填することによって、封止材料で半導体素子を封止するために使用される半導体封止用マスクにおいて、マスクの開口部の周縁部の厚みを、マスクの上を開口部を横切って移動するスキージの移動方向での開口部の始端部から終端部付近まで等厚に形成すると共に開口部の終端部の周縁部の上面に凹部を設けて他の部分より薄く形成して成ることを特徴とする半導体封止用マスク。   An opening corresponding to the semiconductor element mounted on the wiring board is provided, the semiconductor element is positioned in the opening and disposed on the wiring board, and a sealing material is rubbed with a squeegee to fill the opening. In the semiconductor sealing mask used for sealing the semiconductor element with the sealing material, the thickness of the peripheral portion of the opening of the mask is changed in the moving direction of the squeegee that moves across the opening over the mask. A semiconductor encapsulation characterized in that it is formed to have a uniform thickness from the start end of the opening to the vicinity of the end, and a recess is provided on the upper surface of the peripheral edge of the end of the opening to make it thinner than the other portions. Mask. 開口部の周縁部の終端部の凹部を設けた部分の厚みと、開口部の周縁部の他の部分の厚みとの差が、５０〜２００μｍであることを特徴とする請求項１に記載の半導体封止用マスク。   The difference between the thickness of the portion provided with the concave portion at the end portion of the peripheral portion of the opening portion and the thickness of the other portion of the peripheral portion of the opening portion is 50 to 200 µm. Mask for semiconductor encapsulation. 請求項１又は２に記載の半導体封止用マスクを用い、配線基板に搭載された半導体素子を開口部内に位置させて配線基板の上に該マスクを配置し、マスク上に供給された封止材料をスキージで擦って開口部内に封止材料を充填することによって、封止材料で半導体素子を封止するにあたって、封止材料として、粘度が５０〜４００Ｐａ・ｓの液状封止材料を用いることを特徴とする半導体素子の封止方法。   The semiconductor sealing mask according to claim 1, wherein the semiconductor element mounted on the wiring board is positioned in the opening, the mask is arranged on the wiring board, and the sealing supplied onto the mask When the semiconductor element is sealed with the sealing material by rubbing the material with a squeegee and filling the sealing material in the opening, a liquid sealing material having a viscosity of 50 to 400 Pa · s is used as the sealing material. A method for sealing a semiconductor element. 半導体素子の封止を０．０１ＭＰａ以下の減圧雰囲気で行なうことを特徴とする請求項３に記載の半導体素子の封止方法。   4. The semiconductor element sealing method according to claim 3, wherein the semiconductor element is sealed in a reduced pressure atmosphere of 0.01 MPa or less. 配線基板に搭載された半導体素子が、請求項３又は４に記載の方法で封止材料によって封止されて成ることを特徴とする半導体装置。   A semiconductor device, wherein a semiconductor element mounted on a wiring board is sealed with a sealing material by the method according to claim 3 or 4.
JP2003425044A 2003-12-22 2003-12-22 Printing mask for semiconductor sealing, sealing method of semiconductor element, and semiconductor device Pending JP2005183807A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009147249A (en) * 2007-12-18 2009-07-02 Minami Kk Method of mounting electronic component on printed wiring board
JP2017502521A (en) * 2013-12-27 2017-01-19 ヘンケル アイピー アンド ホールディング ゲゼルシャフト ミット ベシュレンクテル ハフツング Die bonding process in electronic products

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009147249A (en) * 2007-12-18 2009-07-02 Minami Kk Method of mounting electronic component on printed wiring board
JP2017502521A (en) * 2013-12-27 2017-01-19 ヘンケル アイピー アンド ホールディング ゲゼルシャフト ミット ベシュレンクテル ハフツング Die bonding process in electronic products
CN106463479A (en) * 2013-12-27 2017-02-22 汉高知识产权控股有限责任公司 A process for die bonding in electronic products

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