JP2005176156A - Antenna integrated element and its producing method - Google Patents

Antenna integrated element and its producing method Download PDF

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JP2005176156A
JP2005176156A JP2003415907A JP2003415907A JP2005176156A JP 2005176156 A JP2005176156 A JP 2005176156A JP 2003415907 A JP2003415907 A JP 2003415907A JP 2003415907 A JP2003415907 A JP 2003415907A JP 2005176156 A JP2005176156 A JP 2005176156A
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light receiving
receiving element
antenna
planar antenna
substrate
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Fumito Nakajima
史人 中島
Tomoshi Furuta
知史 古田
Hiroshi Ito
弘 伊藤
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Nippon Telegraph and Telephone Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To produce an antenna integrated element using a semiconductor process technology with high reproducibility or controllability, the antenna integrated element being adopted to suppress a loss of incident light and to make a surface where light is made incident, different from a surface where an electromagnetic wave is radiated. <P>SOLUTION: A photo-detector 2, a plane antenna 4, wiring 6 are formed on a semiconductor substrate 1, a high dielectric film 7 is formed and flattened thereon, an insulator substrate 8 is adhered, and the semiconductor substrate 1 is finally removed. Thus, the antenna integrated element can be produced using the semiconductor process technology. In this formed antenna integrated element, light is made incident from a lower surface side, and electromagnetic waves are radiated from an upper surface side. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、受光素子と平面アンテナを絶縁体基板の平面上に集積化したアンテナ集積素子及びその作製方法に関する。   The present invention relates to an antenna integrated element in which a light receiving element and a planar antenna are integrated on a plane of an insulating substrate, and a method for manufacturing the same.

近年、無線通信や高速信号計測、あるいは電波天文などにおける基準信号源として、広帯域なミリ波・サブミリ波源が求められている。このなかで、高周波信号を長距離伝送できることから、ビート光を利用したミリ波・サブミリ波発生方法が注目されている。この方法では、ミリ波・サブミリ波の発生は、光・電気変換を担う受光素子と、変換された電気信号を空間に放射するアンテナとを集積化したアンテナ集積素子によって実現される。   In recent years, a broadband millimeter wave / submillimeter wave source has been demanded as a reference signal source in wireless communication, high-speed signal measurement, or radio astronomy. Among these, since a high-frequency signal can be transmitted over a long distance, a millimeter-wave / sub-millimeter wave generation method using beat light has attracted attention. In this method, generation of millimeter waves and submillimeter waves is realized by an antenna integrated element in which a light receiving element responsible for optical / electrical conversion and an antenna that radiates the converted electric signal to space are integrated.

アンテナ集積素子の構成例としては、受光素子であるフォトダイオードと、平面アンテナとの組み合わせが、広く確立された半導体プロセス技術の適用による量産に向いていることから好適である。   As a configuration example of the antenna integrated element, a combination of a photodiode as a light receiving element and a planar antenna is suitable because it is suitable for mass production by application of a widely established semiconductor process technology.

図3は従来例1のアンテナ集積素子を示す図である(例えば、H. Ito et al., Electron. Lett., Vol. 38, No. 17, pp. 989-990, 2001等参照)。
即ち、図3(a)は、アンテナ集積素子の中心部分を直上から見た図であり、図3(b),図3(c)はそれぞれ図3(a)図におけるA−A′およびB−B′で示された部位の断面図である。
FIG. 3 is a diagram showing an antenna integrated element of Conventional Example 1 (see, for example, H. Ito et al., Electron. Lett., Vol. 38, No. 17, pp. 989-990, 2001).
3A is a view of the central portion of the antenna integrated element as viewed from directly above, and FIGS. 3B and 3C are AA ′ and B in FIG. 3A, respectively. It is sectional drawing of the site | part shown by -B '.

作製方法は、まずエピタキシャル成長によって、半導体基板11に受光素子13のエピタキシャル層を形成する。フォトレジストをマスクに用いたエッチングによりメサ構造を形成した後、p型およびn型層へそれぞれオーミックコンタクト電極を形成する。次に平面アンテナ12を形成する。さらに絶縁膜15を形成した後、配線14を平面アンテナ12と受光素子13を繋ぐように形成する。最後に基板裏面に反射膜16を形成することで、アンテナ集積素子が完成する。   First, an epitaxial layer of the light receiving element 13 is formed on the semiconductor substrate 11 by epitaxial growth. After forming a mesa structure by etching using a photoresist as a mask, ohmic contact electrodes are formed on the p-type and n-type layers, respectively. Next, the planar antenna 12 is formed. Further, after forming the insulating film 15, the wiring 14 is formed so as to connect the planar antenna 12 and the light receiving element 13. Finally, the reflective film 16 is formed on the back surface of the substrate, thereby completing the antenna integrated element.

こうして作製されたアンテナ集積素子において、光は図3(a)の紙面手前方向(図3(b),(c)の上方)から入射する。図3(b),(c)に示すように、入射光の一部は配線14および平面アンテナ12の表面で反射され、その残りが基板11へ侵入する。半導体基板11に侵入した光は、裏面に形成してある反射膜16で反射され、受光素子13の吸収層で焦点を結んで受光する。受光素子13で光から電気に変換された信号は配線14によって平面アンテナ12に伝送される。図3(c)で示すように、この構成の場合、平面アンテナ12の直上が空間(空気)であるため、電磁波はより高い誘電率を有する半導体基板11側(図3(c)下側)へ主に放射される。   In the antenna integrated element manufactured in this way, light enters from the front side of the paper in FIG. 3A (above FIGS. 3B and 3C). As shown in FIGS. 3B and 3C, a part of the incident light is reflected on the surfaces of the wiring 14 and the planar antenna 12, and the rest enters the substrate 11. The light that has entered the semiconductor substrate 11 is reflected by the reflective film 16 formed on the back surface, and received by focusing on the absorption layer of the light receiving element 13. A signal converted from light to electricity by the light receiving element 13 is transmitted to the planar antenna 12 via the wiring 14. As shown in FIG. 3C, in this configuration, since the space (air) is directly above the planar antenna 12, the electromagnetic wave has a higher dielectric constant on the semiconductor substrate 11 side (the lower side in FIG. 3C). Mainly radiated to.

図3(a)紙面手前方向から光を入射した場合、配線14および平面アンテナ12で覆われている部分で光の反射が起こり、入射光の一部しか半導体基板11の中に侵入できない。例えば前記従来例1で示したように平面アンテナに広帯域用のログペリオディックアンテナを採用した場合、半導体基板11はその表面積の約半分をアンテナによって覆われているため、この部分で少なくとも50%程度の損失があり、問題となっていた。   When light is incident from the front side of FIG. 3A, light is reflected at a portion covered with the wiring 14 and the planar antenna 12, and only a part of the incident light can enter the semiconductor substrate 11. For example, when a wideband log periodic antenna is employed as the planar antenna as shown in the prior art 1, the semiconductor substrate 11 is covered with the antenna about half of its surface area, so at least about 50% in this portion. There was a loss and was a problem.

この入射光の損失を解決するため、配線14および平面アンテナ12に覆われていない半導体基板11の裏面から光を入射する方法も考えられるが、上述したように電磁波は誘電率の高い半導体基板11の裏面側に主に放射され光の入射と同一方向となってしまう。   In order to solve this loss of incident light, a method in which light is incident from the back surface of the semiconductor substrate 11 that is not covered by the wiring 14 and the planar antenna 12 is also conceivable. However, as described above, the electromagnetic wave is a semiconductor substrate 11 having a high dielectric constant. It is mainly emitted to the back side of the light and is in the same direction as the incidence of light.

このとき、光入射のためのレンズあるいはファイバ等が電磁波放射面に位置し、電磁波の放射にとって障害となるという問題もあった。   At this time, there is a problem that a lens or a fiber for incident light is positioned on the electromagnetic wave radiation surface, which becomes an obstacle to the radiation of the electromagnetic wave.

一方、基板と受光素子の間に配線が形成されていれば、入射光の損失を低く抑え、かつ、光入射と電磁波放射方向を従来通り互いに逆方向にでき、これらの問題は解決する。   On the other hand, if a wiring is formed between the substrate and the light receiving element, the loss of incident light can be kept low, and the light incidence and electromagnetic wave radiation directions can be reversed in the conventional manner, which solves these problems.

従来例2ではフリップチップ接続を用いてこのような構造の素子を作製している(特開2002−43839)。図4(a)は、この素子を直上から見た図であり、図4(b)は図4(a)におけるC−C′で示された部位の断面図である。   In Conventional Example 2, an element having such a structure is manufactured using flip-chip connection (Japanese Patent Laid-Open No. 2002-43839). FIG. 4A is a view of this element as viewed from directly above, and FIG. 4B is a cross-sectional view of a portion indicated by CC ′ in FIG.

チップ表面26に形成された受光素子20と受光素子チップ上伝送路22を具えた裏面入射型の受光素子チップ21と、平面アンテナチップ上伝送路25と平面アンテナ24を具えた平面アンテナチップ23を用意し、受光素子チップ21と平面アンテナチップ23上のそれぞれの伝送路が向かい合ってパッド28で接続するようにフリップチップ接続する構成となっている。この構成では、光は受光素子チップ裏面27から入射され、光・電気変換された信号は伝送路を伝わり平面アンテナ24から平面アンテナチップ23下方へ主に放射される。ここでは、平面アンテナとしてスロットアンテナが例示されている。   A light receiving element chip 21 having a light receiving element 20 formed on a chip surface 26 and a transmission path 22 on the light receiving element chip, and a planar antenna chip 23 having a planar antenna chip transmission path 25 and a planar antenna 24 are provided. The transmission path on the light receiving element chip 21 and the planar antenna chip 23 is prepared and flip-chip connected so that the pads 28 are connected to each other. In this configuration, light is incident from the light receiving element chip back surface 27, and the light / electrically converted signal is transmitted through the transmission path and is mainly emitted from the planar antenna 24 to the lower side of the planar antenna chip 23. Here, a slot antenna is illustrated as a planar antenna.

しかし、前記従来例1で使用しているようなサブミリ波帯の広帯域用のログペリオディックアンテナの場合、図3(a)に示すようにアンテナ全体の中心位置から、ある周波数の電磁波に対応する歯の中心部分までの距離をアンテナ半径とすると、このアンテナ半径は電磁波の実効波長の1/4に対応しているので、周波数が高くなるとアンテナ構造が小さくなる。例えばアンテナを形成する基板がSiで1THzの電磁波を扱う場合には、アンテナ半径は30μm程度になる。上述したように、従来例2の素子構造において発生した電磁波を効率良く基板方向に放射させるには、フリップチップ接続する受光素子のチップサイズをアンテナ半径よりも小さくする必要があるが、現在の技術ではせいぜい数百μm程度が限界である。このため、発生させる電磁波の帯域の上限が受光素子のチップサイズで決まってしまう。   However, in the case of the sub-millimeter wave band logperiodic antenna as used in the conventional example 1, as shown in FIG. 3 (a), it corresponds to an electromagnetic wave having a certain frequency from the center position of the whole antenna. If the distance to the center of the tooth is the antenna radius, this antenna radius corresponds to ¼ of the effective wavelength of the electromagnetic wave, so that the antenna structure becomes smaller as the frequency increases. For example, when the substrate on which the antenna is formed is Si and handles an electromagnetic wave of 1 THz, the radius of the antenna is about 30 μm. As described above, in order to efficiently radiate electromagnetic waves generated in the element structure of Conventional Example 2 toward the substrate, it is necessary to make the chip size of the light receiving element to be flip-chip connected smaller than the antenna radius. Then, the limit is about several hundred μm at most. For this reason, the upper limit of the band of the generated electromagnetic wave is determined by the chip size of the light receiving element.

また、サブミリ波帯の超高周波を扱う際には、受光素子と平面アンテナ間のフリップチップ接続部の伝送損失が大きくなり、同一平面上で形成したアンテナ集積素子に及ばない。また、フリップチップ接続方法は、民生用の安定した技術として定着しているものの、半導体プロセスと比較した場合量産向きであるとはいえない。さらに、フリップチップ接続の際に、平面アンテナを形成した基板と受光素子の間に僅かに隙間が残り、放射効率が悪くなって定格にも問題がある。   Further, when handling the super-high frequency in the submillimeter wave band, the transmission loss of the flip chip connecting portion between the light receiving element and the planar antenna increases, and it does not reach the antenna integrated element formed on the same plane. In addition, although the flip chip connection method has been established as a stable technology for consumer use, it cannot be said that it is suitable for mass production when compared with a semiconductor process. Furthermore, when flip chip connection is performed, a slight gap remains between the substrate on which the planar antenna is formed and the light receiving element, so that radiation efficiency is deteriorated and there is a problem with the rating.

特開2002−43839JP2002-43839 H. Ito et al., Electron. Lett., Vol. 38, No. 17, pp. 989-990, 2001H. Ito et al., Electron. Lett., Vol. 38, No. 17, pp. 989-990, 2001

本発明の課題は、上述の光入射効率および電磁波放射方向の問題点を解決したサブミリ波帯域にも対応可能なアンテナ集積素子を、量産向きである広く確立された半導体プロセス技術を利用して、再現性,制御性良く作製できるアンテナ集積素子及びその作製方法を提供することである。   An object of the present invention is to use an antenna integrated element that can cope with a submillimeter wave band that solves the problems of the light incident efficiency and the electromagnetic wave radiation direction, using a widely established semiconductor process technology suitable for mass production. An antenna integrated element that can be manufactured with good reproducibility and controllability, and a manufacturing method thereof.

上記の課題を解決するため、本発明で提案するアンテナ集積素子の作製方法は、絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子の作製方法において、半導体基板上に受光素子,平面アンテナ,配線を形成する工程と、前記半導体基板表面に高誘電体膜を形成する工程と、前記高誘電体膜表面の凹凸を平坦化する工程と、前記高誘電体膜上に絶縁体基板を接着する工程と、前記半導体基板を除去する工程とを含んでいることを特徴とする。
このような工程により、入射光の損失を低く抑えたアンテナ集積素子を、再現性,制御性良く作製できる。
In order to solve the above problems, a method for manufacturing an antenna integrated element proposed in the present invention includes a light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring. And a method of manufacturing an antenna integrated element configured to cause an optical signal to be incident on the light receiving element from a side of the substrate on which the planar antenna is formed. Forming, a step of forming a high dielectric film on the surface of the semiconductor substrate, a step of flattening irregularities on the surface of the high dielectric film, and a step of adhering an insulator substrate on the high dielectric film; And a step of removing the semiconductor substrate.
Through such a process, an antenna integrated element with a low loss of incident light can be manufactured with good reproducibility and controllability.

また本発明のアンテナ集積素子は、絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子であって、半導体基板上に受光素子,平面アンテナ,配線を形成し、前記半導体基板表面に高誘電体膜を形成し、前記高誘電体膜表面の凹凸を平坦化し、前記高誘電体膜上に絶縁体基板を接着し、前記半導体基板を除去することにより構成されていることを特徴とする。   The antenna integrated element of the present invention includes at least a light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring, An antenna integrated element configured to allow an optical signal to be incident on the light receiving element from a side where the planar antenna is formed, wherein a light receiving element, a planar antenna, and a wiring are formed on a semiconductor substrate, and a high dielectric is formed on the surface of the semiconductor substrate A film is formed, the unevenness on the surface of the high dielectric film is flattened, an insulating substrate is bonded onto the high dielectric film, and the semiconductor substrate is removed.

また本発明のアンテナ集積素子は、光入射面側が空間に露出した受光素子と、一面が空間に露出した平面アンテナと、前記空間とは反対側において前記受光素子と前記平面アンテナとを電気的に接続する配線と、前記空間とは反対側において前記受光素子,平面アンテナ及び配線を覆う状態で形成された高誘電体膜と、前記高誘電体膜を覆う状態で形成された絶縁体基板とで構成されていることを特徴とする。   The antenna integrated element of the present invention electrically connects the light receiving element whose light incident surface side is exposed to the space, the planar antenna whose one surface is exposed to the space, and the light receiving element and the planar antenna on the opposite side of the space. A wiring to be connected, a high dielectric film formed so as to cover the light receiving element, the planar antenna and the wiring on the opposite side of the space, and an insulator substrate formed so as to cover the high dielectric film It is configured.

また本発明のアンテナ集積素子の作製方法は、絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子の作製方法において、半導体基板上に受光素子,平面アンテナ,配線を形成する工程と、前記半導体基板表面に半導体用絶縁性接着剤を塗布する工程と、前記半導体基板上に絶縁体基板を接着する工程と、前記半導体基板を除去する工程とを含んでいることを特徴とする。
このような工程により、入射光の損失を低く抑えたアンテナ集積素子を、再現性,制御性良く作製できる。
The method for manufacturing an antenna integrated element of the present invention includes at least a light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring, and the substrate. Forming a light receiving element, a planar antenna, and a wiring on a semiconductor substrate, and a surface of the semiconductor substrate, wherein the optical signal is incident on the light receiving element from the side where the planar antenna is formed. A step of applying an insulating adhesive for a semiconductor, a step of bonding an insulator substrate on the semiconductor substrate, and a step of removing the semiconductor substrate.
Through such a process, an antenna integrated element with a low loss of incident light can be manufactured with good reproducibility and controllability.

また本発明のアンテナ集積素子は、絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子であって、半導体基板上に受光素子,平面アンテナ,配線を形成し、前記半導体基板表面に半導体用絶縁性接着剤を塗布し、前記半導体基板上に絶縁体基板を接着し、前記半導体基板を除去することにより構成されていることを特徴とする。   The antenna integrated element of the present invention includes at least a light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring, An antenna integrated element configured to allow an optical signal to be incident on the light receiving element from a side on which the planar antenna is formed, wherein a light receiving element, a planar antenna, and a wiring are formed on a semiconductor substrate, and semiconductor insulation is formed on the surface of the semiconductor substrate It is characterized by applying a conductive adhesive, adhering an insulator substrate onto the semiconductor substrate, and removing the semiconductor substrate.

また本発明のアンテナ集積素子は、光入射面側が空間に露出した受光素子と、一面が空間に露出した平面アンテナと、前記空間とは反対側において前記受光素子と前記平面アンテナとを電気的に接続する配線と、前記空間とは反対側において前記受光素子,平面アンテナ及び配線を覆う状態で形成された半導体用絶縁性接着材と、前記半導体用絶縁性接着剤を覆う状態で形成された絶縁体基板とで構成されていることを特徴とする。   The antenna integrated element of the present invention electrically connects the light receiving element whose light incident surface side is exposed to the space, the planar antenna whose one surface is exposed to the space, and the light receiving element and the planar antenna on the opposite side of the space. A wiring to be connected, an insulating adhesive for a semiconductor formed in a state of covering the light receiving element, the planar antenna and the wiring on the side opposite to the space, and an insulation formed in a state of covering the insulating adhesive for the semiconductor It is characterized by comprising a body substrate.

本発明のアンテナ集積素子及びその作製方法によれば、光入射の損失を低く抑えたサブミリ波帯域にも対応可能なアンテナ集積素子を、量産向きである広く確立された半導体プロセス技術を利用して、再現性,制御性良く作製できる。
また、本発明では、受光素子をチップ化する必要がないため、アンテナの帯域上限は素子サイズのみを考慮すればよい。
According to the antenna integrated element and the manufacturing method thereof of the present invention, an antenna integrated element capable of supporting a submillimeter wave band with a low loss of light incidence is utilized by utilizing a widely established semiconductor process technology suitable for mass production. Can be manufactured with good reproducibility and controllability.
Further, in the present invention, since it is not necessary to make the light receiving element into a chip, the upper limit of the band of the antenna needs to consider only the element size.

以下、図面を参照して、本発明の実施の形態を詳細に説明する。なお、以下で説明する図面で同一機能を有する物は同一記号を付けその繰返しの説明を省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the thing which has the same function in drawing demonstrated below attaches | subjects the same symbol, and the repeated description is abbreviate | omitted.

[実施の形態1]
図1(a)〜(h)は、本発明の実施の形態1の断面図である。
断面方向は従来例の図3(a)のB−B′に相当する。
[Embodiment 1]
1A to 1H are sectional views of Embodiment 1 of the present invention.
The cross-sectional direction corresponds to BB ′ in FIG.

まず、図1(a)で示すように、InPからなる半導体基板1にエピタキシャル成長によって、InP基板に格子整合させたInGaAsP層をエッチングストッパ層3として形成する。その後、エピタキシャル成長によって、受光素子2のエピタキシャル層を形成する。受光素子としては、例えば、特開平9−275224号公報に記載された高出力フォトダイオードが好適である。主としてn型InP層,ノンドープInP層,p型InGaAs層からなる。InP,InGaAs層はそれぞれ塩酸系エッチング液,クエン酸系エッチング液によってエッチングされ、受光素子2のメサ構造を形成する。その後、P型およびn型層にそれぞれオーミックコンタクト電極を形成する。   First, as shown in FIG. 1A, an InGaAsP layer lattice-matched to an InP substrate is formed as an etching stopper layer 3 by epitaxial growth on a semiconductor substrate 1 made of InP. Thereafter, an epitaxial layer of the light receiving element 2 is formed by epitaxial growth. As the light receiving element, for example, a high output photodiode described in JP-A-9-275224 is suitable. It consists mainly of an n-type InP layer, a non-doped InP layer, and a p-type InGaAs layer. The InP and InGaAs layers are etched by a hydrochloric acid etching solution and a citric acid etching solution, respectively, to form a mesa structure of the light receiving element 2. Thereafter, ohmic contact electrodes are formed on the P-type and n-type layers, respectively.

次に、フォトレジストを用いたリフトオフ法によりTi/Auからなる平面アンテナ4を図1(b)のように形成する。   Next, the planar antenna 4 made of Ti / Au is formed as shown in FIG. 1B by a lift-off method using a photoresist.

さらに、図1(c)に示すように、絶縁膜5を形成した後、Ti/Auからなる配線6をフォトレジストを用いたリフトオフ法により形成する。   Further, as shown in FIG. 1C, after the insulating film 5 is formed, a wiring 6 made of Ti / Au is formed by a lift-off method using a photoresist.

次に、図1(d)に示すように、半導体基板1表面側に高誘電体膜7を形成する。
形成方法には、スパッタ法,CVD法を用いることができる。
Next, as shown in FIG. 1D, a high dielectric film 7 is formed on the surface side of the semiconductor substrate 1.
As a formation method, a sputtering method or a CVD method can be used.

高誘電体膜7にはなるべく誘電率の高い材料が好ましい。例えば、酸化チタン(80),チタン酸ストロンチウム(300),タンタル酸ビスマスストロンチウム(250),チタン酸バリウムストロンチウム(500),チタン酸ジルコン鉛(1000)等が、高誘電体膜として好適である。括弧内は比誘電率を示す。   The high dielectric film 7 is preferably made of a material having a dielectric constant as high as possible. For example, titanium oxide (80), strontium titanate (300), bismuth strontium tantalate (250), barium strontium titanate (500), lead zirconate titanate (1000), etc. are suitable as the high dielectric film. The relative dielectric constant is shown in parentheses.

また、アンテナに接する部位の誘電率を大きくすると、電磁波の実効波長は短くなる。従って、平面アンテナのサイズが小さくなる。これによって基板上の素子密度を上げることができ量産性が上がるが、その一方でアンテナサイズが小さくなりすぎるとアンテナ加工精度が問題となってくる。発生させる電磁波の最大周波数,高誘電体膜の誘電率,加工限界寸法の中で最適な設計を行う必要がある。   Further, when the dielectric constant of the portion in contact with the antenna is increased, the effective wavelength of the electromagnetic wave is shortened. Accordingly, the size of the planar antenna is reduced. This can increase the element density on the substrate and increase the mass productivity. On the other hand, if the antenna size becomes too small, the antenna processing accuracy becomes a problem. It is necessary to design optimally among the maximum frequency of the electromagnetic wave to be generated, the dielectric constant of the high dielectric film, and the processing critical dimension.

その後、図1(e)に示すように、表面研磨を行うことにより、高誘電体膜7表面の凹凸を平坦化する。   After that, as shown in FIG. 1E, the surface of the high dielectric film 7 is planarized by performing surface polishing.

次に図1(f)に示すように、高誘電体膜7の表面側に絶縁体基板8を接着する。
接着には、絶縁性の半導体用接着剤等を用いるのが好適であるが、他の接着方法であっても良い。
Next, as shown in FIG. 1F, an insulator substrate 8 is bonded to the surface side of the high dielectric film 7.
It is preferable to use an insulating semiconductor adhesive or the like for bonding, but other bonding methods may be used.

絶縁体基板8には放射される電磁波の吸収を防ぐために、例えば石英やサファイア等の高い絶縁性を有する材料が好ましい。あるいは、電磁波を効率良く空間に放出する際に良く用いられることの多いシリコン超半球レンズとの親和性を考えて高絶縁性のSi基板でも良い。さらに効率良く電磁波を放射させるために誘電率の高い絶縁体材料である酸化チタン,チタン酸ストロンチウム,タンタル酸ビスマスストロンチウム,チタン酸バリウムストロンチウム,チタン酸ジルコン鉛等からなる基板を用いることができる。このとき、絶縁基板8の材料が高誘電体膜7の材料と一致していれば、更に損失が少なくなることは言うまでもない。
また、高誘電体膜7と絶縁体基板8との間には隙間が存在しないため放熱の問題を回避できる。
Insulator substrate 8 is preferably made of a highly insulating material such as quartz or sapphire in order to prevent absorption of radiated electromagnetic waves. Alternatively, a highly insulating Si substrate may be used in consideration of the affinity with a silicon super-hemisphere lens that is often used for efficiently releasing electromagnetic waves into the space. In order to radiate electromagnetic waves more efficiently, a substrate made of an insulating material having a high dielectric constant, such as titanium oxide, strontium titanate, bismuth strontium tantalate, barium strontium titanate, lead zirconate titanate, or the like can be used. At this time, it goes without saying that the loss is further reduced if the material of the insulating substrate 8 matches the material of the high dielectric film 7.
Further, since there is no gap between the high dielectric film 7 and the insulating substrate 8, the problem of heat dissipation can be avoided.

次に図1(g)に示すように、半導体基板1を除去する。
まず、半導体基板1を研磨プロセスにより、厚さを200μmまで薄くする。次に、塩酸系エッチング液でエッチングして残りの部分を除去する。
このとき、InGaAsPからなるエッチングストッパ層3でエッチングの進行が止まる。
Next, as shown in FIG. 1G, the semiconductor substrate 1 is removed.
First, the thickness of the semiconductor substrate 1 is reduced to 200 μm by a polishing process. Next, the remaining portion is removed by etching with a hydrochloric acid-based etching solution.
At this time, the progress of etching stops at the etching stopper layer 3 made of InGaAsP.

最後に図1(h)に示すように、エッチングストッパ層3のInGaAsPを硫酸系エッチング液でエッチングする。このとき上記のエッチャントはInPに対して大きな選択性を持つことから受光素子2がエッチングによって損傷を受けることをほぼ防ぐことができる。損傷が問題となる場合には、受光素子2のn−InP層を厚く積めばよい。   Finally, as shown in FIG. 1H, the InGaAsP in the etching stopper layer 3 is etched with a sulfuric acid-based etchant. At this time, since the above etchant has a large selectivity with respect to InP, it is possible to substantially prevent the light receiving element 2 from being damaged by etching. If damage becomes a problem, the n-InP layer of the light receiving element 2 may be stacked thickly.

このような作製工程により実施の形態1のアンテナ集積素子が作製される。実施の形態1のアンテナ集積素子は、光入射面側(光吸収層側)が空間に露出した受光素子2と、一面(下側面)が空間に露出した平面アンテナ4と、前記空間とは反対側において受光素子2と平面アンテナ4とを電気的に接続する配線6と、前記空間とは反対側において受光素子2,平面アンテナ4及び配線6を覆う状態で形成された高誘電体膜7と、この高誘電体膜7を覆う状態で形成された絶縁体基板8とで構成されている。   Through such a manufacturing process, the antenna integrated element of Embodiment 1 is manufactured. The antenna integrated element according to the first embodiment is opposite to the light receiving element 2 in which the light incident surface side (light absorption layer side) is exposed to the space, the planar antenna 4 in which one surface (lower surface) is exposed to the space, and the space. A wiring 6 for electrically connecting the light receiving element 2 and the planar antenna 4 on the side, and a high dielectric film 7 formed so as to cover the light receiving element 2, the planar antenna 4 and the wiring 6 on the side opposite to the space The insulating substrate 8 is formed so as to cover the high dielectric film 7.

これによって光を図1(h)の下側から入射させると、配線6および平面アンテナ4に遮られることなく受光素子2の光吸収層に到達し損失が少ない。   Accordingly, when light is incident from the lower side of FIG. 1H, the light reaches the light absorption layer of the light receiving element 2 without being blocked by the wiring 6 and the planar antenna 4, and the loss is small.

また、平面アンテナ4の下側(光の入射方向)が空間(普通は空気)に露出し、アンテナから放射される電磁波は誘電率の高い上側(絶縁体基板8側)に主に放射される。放射電力は誘電率の1/2乗に比例するため、高い誘電率を有する材料を選択することで電磁波放射の効率を改善できる。従来例では比誘電率12.5のInP基板を用いていたが、本発明の作製方法においてこれより高い比誘電率を持つ材料、たとえば、比誘電率が1000のチタン酸ジルコン鉛材料を高誘電体膜7および絶縁体基板8に用いれば、基板が電磁波の波長より充分大きいと仮定するとInPのときの効率78%から97%に改善する。   Further, the lower side (light incident direction) of the planar antenna 4 is exposed to a space (usually air), and electromagnetic waves radiated from the antenna are mainly radiated to the upper side (insulator substrate 8 side) having a high dielectric constant. . Since the radiation power is proportional to the 1/2 power of the dielectric constant, the efficiency of electromagnetic wave radiation can be improved by selecting a material having a high dielectric constant. In the conventional example, an InP substrate having a relative dielectric constant of 12.5 was used. However, in the manufacturing method of the present invention, a material having a higher relative dielectric constant, for example, a lead zirconate titanate material having a relative dielectric constant of 1000 is a high dielectric constant. When used for the body film 7 and the insulator substrate 8, the efficiency is improved from 78% for InP to 97% assuming that the substrate is sufficiently larger than the wavelength of the electromagnetic wave.

このようなことから、入射光の損失を低く抑え、かつ、光入射と電磁波放射の方向が互いに逆方向であるアンテナ集積素子を、半導体プロセス技術を使って再現性,制御性良く作製できる。   For this reason, an antenna integrated element in which the loss of incident light is kept low and the directions of light incidence and electromagnetic wave radiation are opposite to each other can be manufactured with good reproducibility and controllability using semiconductor process technology.

また、平面アンテナ4と受光素子2を同一基板上に形成するため、前記従来例1と同様に受光素子2,平面アンテナ4,配線6の位置合わせがリソグラフィーの精度で可能であり、サブミリ波帯の超高周波信号でも伝送損失を小さくできる。したがって本発明による作製方法は、超高周波の電磁波を扱うアンテナ集積素子の作製に好適である。
また、受光素子をチップ化する必要がないため、アンテナの帯域上限は素子サイズのみを考慮すればよい。
Further, since the planar antenna 4 and the light receiving element 2 are formed on the same substrate, the light receiving element 2, the planar antenna 4 and the wiring 6 can be aligned with the accuracy of lithography as in the conventional example 1, and the submillimeter wave band. Transmission loss can be reduced even with ultra-high frequency signals. Therefore, the manufacturing method according to the present invention is suitable for manufacturing an antenna integrated element that handles ultra-high frequency electromagnetic waves.
In addition, since it is not necessary to make the light receiving element into a chip, the upper limit of the band of the antenna needs to consider only the element size.

[実施の形態2]
図2(a)〜(f)は、本発明の実施の形態2の断面図である。
まず、図2(a)で示すように、実施の形態1で記した方法で受光素子2をInP基板上に形成する。
[Embodiment 2]
2A to 2F are cross-sectional views of Embodiment 2 of the present invention.
First, as shown in FIG. 2A, the light receiving element 2 is formed on the InP substrate by the method described in the first embodiment.

次に、フォトレジストを用いたリフトオフ法によりTi/Auからなる平面アンテナ4を図2(b)のように形成する。   Next, the planar antenna 4 made of Ti / Au is formed as shown in FIG. 2B by a lift-off method using a photoresist.

さらに、図2(c)に示すように、絶縁膜5を形成した後、Ti/Auからなる配線6をフォトレジストを用いたリフトオフ法により形成する。   Further, as shown in FIG. 2C, after forming the insulating film 5, the wiring 6 made of Ti / Au is formed by a lift-off method using a photoresist.

次に図2(d)に示すように、半導体基板1の表面側と絶縁体基板8を絶縁性の半導体用絶縁性接着剤9により接着する。   Next, as shown in FIG. 2D, the surface side of the semiconductor substrate 1 and the insulator substrate 8 are bonded with an insulating insulating adhesive 9 for semiconductor.

このとき、半導体基板1表面の平面アンテナ4および受光素子2による凹凸を完全に埋め込むことが出来るように十分な接着剤の厚さを確保する。絶縁体基板8に関しては前記実施の形態1で述べたとおりである。   At this time, a sufficient thickness of the adhesive is ensured so that the unevenness due to the planar antenna 4 and the light receiving element 2 on the surface of the semiconductor substrate 1 can be completely embedded. The insulator substrate 8 is as described in the first embodiment.

次に図2(e)に示すように、半導体基板1を除去する。
まず、半導体基板1を研磨プロセスにより、厚さを200μmまで薄くする。次に、塩酸系エッチング液でエッチングして残りの部分を除去する。
このとき、InGaAsPからなるエッチングストッパ層3でエッチングの進行が止まる。
Next, as shown in FIG. 2E, the semiconductor substrate 1 is removed.
First, the thickness of the semiconductor substrate 1 is reduced to 200 μm by a polishing process. Next, the remaining portion is removed by etching with a hydrochloric acid-based etching solution.
At this time, the progress of etching stops at the etching stopper layer 3 made of InGaAsP.

最後に図2(f)に示すように、エッチングストッパ層3のInGaAsPを硫酸系エッチング液でエッチングする。このとき上記のエッチャントはInPに対して大きな選択性を持つことから受光素子2がエッチングによって損傷を受けることをほぼ防ぐことができる。   Finally, as shown in FIG. 2F, the InGaAsP in the etching stopper layer 3 is etched with a sulfuric acid-based etchant. At this time, since the above etchant has a large selectivity with respect to InP, it is possible to substantially prevent the light receiving element 2 from being damaged by etching.

このような作製工程により実施の形態2のアンテナ集積素子が作製される。実施の形態2のアンテナ集積素子は、光入射面側(光吸収層側)が空間に露出した受光素子2と、一面(下側面)が空間に露出した平面アンテナ4と、前記空間とは反対側において受光素子2と平面アンテナ4とを電気的に接続する配線6と、前記空間とは反対側において受光素子2,平面アンテナ4及び配線6を覆う状態で形成された半導体用絶縁性接着剤9と、この半導体用絶縁性接着剤9を覆う状態で形成された絶縁体基板8とで構成されている。   Through such a manufacturing process, the antenna integrated element of Embodiment 2 is manufactured. The antenna integrated element according to the second embodiment is opposite to the light receiving element 2 whose light incident surface side (light absorption layer side) is exposed to the space, the planar antenna 4 whose one surface (lower surface) is exposed to the space, and the space. A wiring 6 that electrically connects the light receiving element 2 and the planar antenna 4 on the side, and an insulating adhesive for semiconductor formed so as to cover the light receiving element 2, the planar antenna 4 and the wiring 6 on the side opposite to the space 9 and an insulating substrate 8 formed so as to cover the insulating adhesive 9 for semiconductor.

実施の形態2では、入射光の損失を低く抑え、かつ、光入射と電磁波放射の方向が互いに逆方向であるアンテナ集積素子を、半導体プロセス技術を使って再現性,制御性良く作製できることは、実施の形態1と同様である。   In the second embodiment, it is possible to manufacture an antenna integrated element in which the loss of incident light is kept low and the directions of light incidence and electromagnetic wave radiation are opposite to each other with good reproducibility and controllability using semiconductor process technology. The same as in the first embodiment.

さらに実施の形態2では、平面アンテナ直上の高誘電膜形成のプロセスを省くことによって、電磁波放射効率の低減が起こる欠点はある一方、製造工程数が減り、より短時間,低コストでアンテナ集積素子を作製できる利点がある。
また、受光素子をチップ化する必要がないため、アンテナの帯域上限は素子サイズのみを考慮すればよい。
Further, in the second embodiment, there is a disadvantage that the electromagnetic radiation efficiency is reduced by omitting the process of forming a high dielectric film directly above the planar antenna, but the number of manufacturing steps is reduced, and the antenna integrated element can be reduced in a shorter time and at a lower cost. There is an advantage that can be produced.
In addition, since it is not necessary to make the light receiving element into a chip, the upper limit of the band of the antenna needs to consider only the element size.

以上本発明を実施の形態に基づいて具体的に説明したが、本発明は前記実施の形態に限定される物ではなく、その要旨を逸脱しない範囲において種々変更可能であることは勿論である。   Although the present invention has been specifically described above based on the embodiment, the present invention is not limited to the above-described embodiment, and it is needless to say that various changes can be made without departing from the scope of the invention.

例えば、上記実施の形態では、受光素子としてフォトダイオードの例について述べたが、他の受光素子例えばフォトトランジスタなどを用いても良い。   For example, in the above embodiment, an example of a photodiode as a light receiving element has been described, but another light receiving element such as a phototransistor may be used.

また、基板1についてはInP,GaAs等受光素子を形成できる材料である限り、
様々な半導体基板を用いても良い。
Moreover, as long as the substrate 1 is a material capable of forming a light receiving element such as InP or GaAs,
Various semiconductor substrates may be used.

また、エッチング液に関しても公知の他の溶液を用いることができる。
さらに、平面アンテナ4を構成する膜としては、金属膜以外にグラファイトなどの導電膜を用いても良い。
Also, other known solutions can be used for the etching solution.
Furthermore, as a film constituting the planar antenna 4, a conductive film such as graphite may be used in addition to the metal film.

本発明の実施の形態1のアンテナ集積素子の作製方法の工程を示す断面図である。It is sectional drawing which shows the process of the manufacturing method of the antenna integrated element of Embodiment 1 of this invention. 本発明の実施の形態2のアンテナ集積素子の作製方法の工程を示す断面図である。It is sectional drawing which shows the process of the manufacturing method of the antenna integrated element of Embodiment 2 of this invention. 従来例1のアンテナ集積素子の構成を示す構成図である。It is a block diagram which shows the structure of the antenna integrated element of the prior art example 1. FIG. 従来例2のアンテナ集積素子の構成を示す構成図である。It is a block diagram which shows the structure of the antenna integrated element of the prior art example 2.

符号の説明Explanation of symbols

1 半導体基板
2 受光素子
3 エッチングストッパ層
4 平面アンテナ
5 絶縁膜
6 配線
7 高誘電体膜
8 絶縁体基板
9 半導体用絶縁性接着剤
11 半導体基板
12 平面アンテナ
13 受光素子
14 配線
15 絶縁膜
16 反射膜
20 受光素子
21 受光素子チップ
22 受光素子チップ上伝送路
23 平面アンテナチップ
24 平面アンテナ
25 平面アンテナチップ上伝送路
26 チップ表面
27 チップ裏面
28 パッド
DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Light receiving element 3 Etching stopper layer 4 Planar antenna 5 Insulating film 6 Wiring 7 High dielectric film 8 Insulating substrate 9 Insulating adhesive for semiconductor 11 Semiconductor substrate 12 Planar antenna 13 Light receiving element 14 Wiring 15 Insulating film 16 Reflection Film 20 Light-receiving element 21 Light-receiving element chip 22 Transmission path on light-receiving element chip 23 Planar antenna chip 24 Planar antenna 25 Transmission path on planar antenna chip 26 Chip surface 27 Chip back surface 28 Pad

Claims (6)

絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子の作製方法において、
半導体基板上に受光素子,平面アンテナ,配線を形成する工程と、
前記半導体基板表面に高誘電体膜を形成する工程と、
前記高誘電体膜表面の凹凸を平坦化する工程と、
前記高誘電体膜上に絶縁体基板を接着する工程と、
前記半導体基板を除去する工程とを含んでいることを特徴とするアンテナ集積素子の作製方法。
A light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring; and from the side of the insulator substrate on which the planar antenna is formed In a method for manufacturing an antenna integrated element configured to cause an optical signal to enter the light receiving element,
Forming a light receiving element, a planar antenna, and wiring on a semiconductor substrate;
Forming a high dielectric film on the surface of the semiconductor substrate;
Flattening irregularities on the surface of the high dielectric film;
Bonding an insulating substrate on the high dielectric film;
And a step of removing the semiconductor substrate. A method for manufacturing an antenna integrated element.
絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子であって、
半導体基板上に受光素子,平面アンテナ,配線を形成し、
前記半導体基板表面に高誘電体膜を形成し、
前記高誘電体膜表面の凹凸を平坦化し、
前記高誘電体膜上に絶縁体基板を接着し、
前記半導体基板を除去することにより構成されていることを特徴とするアンテナ集積素子。
A light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring; and from the side of the insulator substrate on which the planar antenna is formed An antenna integrated element configured to cause an optical signal to enter the light receiving element,
A light receiving element, a planar antenna, and wiring are formed on a semiconductor substrate.
Forming a high dielectric film on the surface of the semiconductor substrate;
Flattening irregularities on the surface of the high dielectric film,
Adhering an insulating substrate on the high dielectric film,
An antenna integrated element, comprising: removing the semiconductor substrate.
光入射面側が空間に露出した受光素子と、
一面が空間に露出した平面アンテナと、
前記空間とは反対側において前記受光素子と前記平面アンテナとを電気的に接続する配線と、
前記空間とは反対側において前記受光素子,平面アンテナ及び配線を覆う状態で形成された高誘電体膜と、
前記高誘電体膜を覆う状態で形成された絶縁体基板とで構成されていることを特徴とするアンテナ集積素子。
A light receiving element whose light incident surface side is exposed to the space;
A planar antenna with one surface exposed to the space;
Wiring for electrically connecting the light receiving element and the planar antenna on the opposite side of the space;
A high dielectric film formed in a state of covering the light receiving element, the planar antenna and the wiring on the side opposite to the space;
An antenna integrated element comprising: an insulating substrate formed so as to cover the high dielectric film.
絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子の作製方法において、
半導体基板上に受光素子,平面アンテナ,配線を形成する工程と、
前記半導体基板表面に半導体用絶縁性接着剤を塗布する工程と、
前記半導体基板上に絶縁体基板を接着する工程と、
前記半導体基板を除去する工程とを含んでいることを特徴とするアンテナ集積素子の作製方法。
A light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring; and from the side of the insulator substrate on which the planar antenna is formed In a method for manufacturing an antenna integrated element configured to cause an optical signal to enter the light receiving element,
Forming a light receiving element, a planar antenna, and wiring on a semiconductor substrate;
Applying a semiconductor insulating adhesive to the semiconductor substrate surface;
Bonding an insulator substrate on the semiconductor substrate;
And a step of removing the semiconductor substrate. A method for manufacturing an antenna integrated element.
絶縁体基板上に形成された半導体からなる受光素子、および前記受光素子と配線により電気的に接続された平面アンテナとを少なくとも含み、かつ、前記絶縁体基板の前記平面アンテナが形成された側から前記受光素子へ光信号を入射させる構成のアンテナ集積素子であって、
半導体基板上に受光素子,平面アンテナ,配線を形成し、
前記半導体基板表面に半導体用絶縁性接着剤を塗布し、
前記半導体基板上に絶縁体基板を接着し、
前記半導体基板を除去することにより構成されていることを特徴とするアンテナ集積素子。
A light receiving element made of a semiconductor formed on an insulator substrate, and a planar antenna electrically connected to the light receiving element by wiring; and from the side of the insulator substrate on which the planar antenna is formed An antenna integrated element configured to cause an optical signal to enter the light receiving element,
A light receiving element, a planar antenna, and wiring are formed on a semiconductor substrate.
Applying a semiconductor insulating adhesive to the semiconductor substrate surface,
Bonding an insulator substrate on the semiconductor substrate;
An antenna integrated element, comprising: removing the semiconductor substrate.
光入射面側が空間に露出した受光素子と、
一面が空間に露出した平面アンテナと、
前記空間とは反対側において前記受光素子と前記平面アンテナとを電気的に接続する配線と、
前記空間とは反対側において前記受光素子,平面アンテナ及び配線を覆う状態で形成された半導体用絶縁性接着材と、
前記半導体用絶縁性接着剤を覆う状態で形成された絶縁体基板とで構成されていることを特徴とするアンテナ集積素子。
A light receiving element whose light incident surface side is exposed to the space;
A planar antenna with one surface exposed to the space;
Wiring for electrically connecting the light receiving element and the planar antenna on the opposite side of the space;
An insulating adhesive for semiconductor formed in a state of covering the light receiving element, the planar antenna and the wiring on the opposite side of the space;
An antenna integrated element comprising: an insulating substrate formed so as to cover the semiconductor insulating adhesive.
JP2003415907A 2003-12-15 2003-12-15 Antenna integrated element and its producing method Withdrawn JP2005176156A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016219668A (en) * 2015-05-22 2016-12-22 日本電信電話株式会社 Photodiode device and photo mixer module
EP3907764A1 (en) * 2020-05-07 2021-11-10 FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung e.V. Arrangement for an antenna for generating or receiving terahertz radiation, antenna, terahertz system, and method for producing an arrangement for an antenna

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016219668A (en) * 2015-05-22 2016-12-22 日本電信電話株式会社 Photodiode device and photo mixer module
EP3907764A1 (en) * 2020-05-07 2021-11-10 FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung e.V. Arrangement for an antenna for generating or receiving terahertz radiation, antenna, terahertz system, and method for producing an arrangement for an antenna
WO2021224336A1 (en) * 2020-05-07 2021-11-11 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Assembly for an antenna for generating or receiving terahertz radiation, antenna, terahertz system, and method for producing an assembly for an antenna

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