JP2005165511A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2005165511A
JP2005165511A JP2003401327A JP2003401327A JP2005165511A JP 2005165511 A JP2005165511 A JP 2005165511A JP 2003401327 A JP2003401327 A JP 2003401327A JP 2003401327 A JP2003401327 A JP 2003401327A JP 2005165511 A JP2005165511 A JP 2005165511A
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voltage
semiconductor device
output
comparator
circuit
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Noriaki Matsuno
則昭 松野
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To detect an illicit action to a device with a simple configuration. <P>SOLUTION: A semiconductor device 3 including a rectifier 4 which rectifies received power and a regulator 6 which stabilizes rectified power output to supply to inner circuits, is equipped with voltage divider circuits 5 and 7 which divide the output of the rectifier 4 and the regulator 6 respectively, and a comparator 8 which compares the output of the voltage divider circuits 5 and 7 mutually. Further, it has a mode control means to control an operation mode based on the output of the comparator 8. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、装置内部の機密情報を改竄・コピーを目的とした不正行為から保護する半導体装置に関する。   The present invention relates to a semiconductor device that protects confidential information inside the device from fraudulent acts for the purpose of falsification and copying.

近年、キヤッシュカードやクレジットカードなどのICカードの分野においては、半導体装置内部の機密情報の秘匿性が非常に重要になってきた。この秘匿性を守るために、半導体装置内に様々なセンサー回路を設け、正常動作とは異なる入力や条件を検出したときは、機密情報の改ざんや読み出しを阻止する技術が重要となってきている。その1つに電圧検知回路をカード本体内に搭載し、動作保証以外の電圧をかけられたときに半導体装置の誤動作を誘発し、情報を推定解析されることを防ぐ技術がある。   In recent years, in the field of IC cards such as cash cards and credit cards, confidentiality of confidential information inside semiconductor devices has become very important. In order to protect this confidentiality, various sensor circuits are provided in the semiconductor device, and when an input or condition that is different from normal operation is detected, technology that prevents tampering and reading of confidential information has become important. . One of them is a technology in which a voltage detection circuit is mounted in a card body, and when a voltage other than the operation guarantee is applied, a malfunction of the semiconductor device is induced to prevent information from being estimated and analyzed.

図2は半導体装置に搭載される電圧検知回路の構成を示す図である。図2において、電圧検出回路は、監視する電源電圧を分圧して比較電圧を発生する分圧回路20と、比較用の基準電圧発生回路21と、比較器22とからなる。この電圧検出回路では、分圧回路20により電源電圧を分圧した電圧と、基準電圧発生回路21で発生した電圧とを比較器22で比較し、比較結果に応じて不正検出信号Cを出力する(例えば、特許文献1参照)。また、不正検出信号Cを用いることで、例えば半導体装置の誤動作を誘起して、情報が盗用、推定解析されるのを防止することができる。
特開平10−117138号公報
FIG. 2 is a diagram showing a configuration of a voltage detection circuit mounted on the semiconductor device. In FIG. 2, the voltage detection circuit includes a voltage dividing circuit 20 that divides a power supply voltage to be monitored to generate a comparison voltage, a reference voltage generation circuit 21 for comparison, and a comparator 22. In this voltage detection circuit, the voltage obtained by dividing the power supply voltage by the voltage dividing circuit 20 and the voltage generated by the reference voltage generating circuit 21 are compared by the comparator 22, and the fraud detection signal C is output according to the comparison result. (For example, refer to Patent Document 1). Further, by using the fraud detection signal C, it is possible to prevent the information from being plagiarized and analyzed by inducing a malfunction of the semiconductor device, for example.
JP-A-10-117138

しかしながら、従来の不正検出技術においては、カード本体に基準電圧発生回路21を含む複雑な電圧検知回路が必要であり、また急峻な環境変化による一時的な電圧変化と不正行為に伴う電圧変化との区別が困難である。一方、デバイスの特性変動や環境変化の影響を受けない回路を採用しようとすると、さらに複雑な補償回路やトリミング回路が必要となり、設計の難度が上がるとともにこれらの回路のレイアウト面積が必要となる。   However, the conventional fraud detection technique requires a complicated voltage detection circuit including the reference voltage generation circuit 21 in the card body, and a temporary voltage change due to a steep environmental change and a voltage change due to fraudulent behavior. Difficult to distinguish. On the other hand, if it is attempted to employ a circuit that is not affected by variations in device characteristics and environmental changes, more complicated compensation circuits and trimming circuits are required, which increases design difficulty and requires a layout area for these circuits.

一方、簡単な電圧検知回路にすると、ある程度許容範囲を検知器に課す必要があり、その許容範囲を利用して不正行為が行われる可能性がある。また、デバイスの特性変動や環境変化の影響を受けない回路にすると、さらに複雑な補償回路やトリミング回路が必要となり、不経済になる。本発明は、装置に対する不正行為を簡易な構成で検出することができる半導体装置を提供することを目的とする。   On the other hand, when a simple voltage detection circuit is used, it is necessary to impose a certain allowable range on the detector, and there is a possibility that an illegal act is performed using the allowable range. Further, if the circuit is not affected by device characteristic fluctuations or environmental changes, more complicated compensation circuits and trimming circuits are required, which is uneconomical. An object of the present invention is to provide a semiconductor device capable of detecting an illegal act against the device with a simple configuration.

本発明の半導体装置は、受信電力を整流する整流手段と、整流出力を安定化して内部回路へ供給する安定化手段とを含む半導体装置であって、前記整流手段及び前記安定化手段の出力をそれぞれ分圧する分圧手段と、前記分圧手段の出力を互いに比較する比較手段とを備える。この構成によれば、整流手段及び安定化手段の分圧出力を互いに比較する比較手段を備えることで、通常動作に対して変化する不正行為時の電位変化を検出することができ、この電位変化を捕捉することで不正行為を検出することができる。   The semiconductor device of the present invention is a semiconductor device including a rectifying unit that rectifies received power and a stabilizing unit that stabilizes a rectified output and supplies the rectified output to an internal circuit, and outputs the rectifying unit and the stabilizing unit. Each of the voltage dividing means for dividing the pressure and a comparing means for comparing the outputs of the voltage dividing means. According to this configuration, by providing the comparison unit that compares the divided voltage outputs of the rectification unit and the stabilization unit with each other, it is possible to detect a potential change at the time of fraud that changes with respect to normal operation. It is possible to detect fraud by capturing.

上記構成の半導体装置は、整流手段により半導体装置において使用可能な電力に変換し、この電力を安定化手段により安定化して内部回路に供給する。通常動作時は、整流手段の出力電位は安定化手段の出力電位よりも大きい。しかし、安定化手段の出力に対して直接外部パッド等を利用して電圧を印加するような不正行為が行われると、整流手段を使用しないため安定化手段の出力電位が整流手段の出力電位よりも大きくなる。比較手段でこのような電位変化を検知することで、簡易構成で不正行為を検出することができる。   The semiconductor device having the above configuration converts the power that can be used in the semiconductor device by the rectifying means, stabilizes the power by the stabilizing means, and supplies the power to the internal circuit. During normal operation, the output potential of the rectifying means is greater than the output potential of the stabilizing means. However, if a fraudulent act of applying a voltage directly to the output of the stabilization means using an external pad or the like is performed, the output potential of the stabilization means is less than the output potential of the rectification means because the rectification means is not used. Also grows. By detecting such a potential change by the comparison means, it is possible to detect an illegal act with a simple configuration.

本発明の半導体装置は、さらに、前記比較手段の出力に基づいて動作モードを制御するモード制御手段を備える。この構成によれば、比較手段の出力に基づいて動作モードを制御するモード制御手段を備えることで、不正行為時に電源を切断しないと復帰しない固定モードや、機密情報を消去するような安全モード等に移行させる制御が可能になり、不正行為時に内部の機密情報が漏洩することを防ぐことができる。   The semiconductor device of the present invention further includes mode control means for controlling an operation mode based on the output of the comparison means. According to this configuration, by including mode control means for controlling the operation mode based on the output of the comparison means, a fixed mode that does not return unless the power is turned off at the time of fraud, a safety mode that erases confidential information, etc. It is possible to control to shift to, and to prevent leakage of confidential information inside at the time of fraud.

本発明によれば、通常動作に対して変化する不正行為時の電位変化を簡易な構成で検出することができ、この電位変化を捕捉することで不正行為を検出することができる。また、不正行為を検出したときに動作モードを制御することで、内部の機密情報の漏洩を防ぐことができ、耐タンパー性を高めることができる。   According to the present invention, it is possible to detect a change in potential during a fraud that changes with respect to normal operation with a simple configuration, and it is possible to detect a fraud by capturing this potential change. Further, by controlling the operation mode when an illegal act is detected, leakage of confidential information inside can be prevented and tamper resistance can be improved.

図1は、本発明の一実施形態に係る半導体装置の構成を示す図である。図1に示す半導体装置はICカード等に搭載され、受信アンテナ2、整流器4、第1の分圧回路5、レギュレータ6、第2の分圧回路7、比較器8、内部回路負荷9、ウェハ検査用パッド10および制御回路11を備える。   FIG. 1 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention. The semiconductor device shown in FIG. 1 is mounted on an IC card or the like, and includes a receiving antenna 2, a rectifier 4, a first voltage dividing circuit 5, a regulator 6, a second voltage dividing circuit 7, a comparator 8, an internal circuit load 9, and a wafer. A test pad 10 and a control circuit 11 are provided.

受信アンテナ2は、外部のリーダ/ライタの送信アンテナ1を通じて送信されるキャリヤを受信する。整流器4は、受信アンテナ2で受信されたキャリヤを整流して直流の電圧を取り出す。レギュレータ6は整流器2から得られた電圧の変動を抑え、安定化した電圧を内部回路負荷等9に供給する。分圧回路5、7は、それぞれレギュレータ6の入力側および出力側に接続されて、入力側の電圧および出力側の電圧を抵抗素子R1、R2とR3、R4とにより、レギュレータ6からの安定化した電圧より充分に低い電圧に分圧する。   The reception antenna 2 receives a carrier transmitted through the transmission antenna 1 of an external reader / writer. The rectifier 4 rectifies the carrier received by the receiving antenna 2 and extracts a DC voltage. The regulator 6 suppresses fluctuations in the voltage obtained from the rectifier 2 and supplies a stabilized voltage to the internal circuit load 9 and the like. The voltage dividing circuits 5 and 7 are respectively connected to the input side and the output side of the regulator 6, and the input side voltage and the output side voltage are stabilized from the regulator 6 by the resistance elements R1, R2, R3, and R4. Divide the voltage to a voltage sufficiently lower than the applied voltage.

比較器8は、2つの分圧回路5、7で分圧された電圧を入力として、これらの大きさを比較し、後述の不正検出信号などを出力するものである。比較器8が出力する不正検出信号によって、半導体装置3を、電源を切断しないと復帰しない固定モードや、機密情報を消去するような安全モードに移行制御するように機能する。検査用パッド10は、検査対象回路であるメモリやメモリを管理するCPUを持つ内部回路負荷9にテスト信号を入力するのに用いられる。制御回路11は、内部回路負荷9のテストモード時のみ比較器8による比較動作を無効にする制御信号を供給する。   The comparator 8 receives the voltages divided by the two voltage dividing circuits 5 and 7, compares their magnitudes, and outputs a fraud detection signal described later. The fraud detection signal output from the comparator 8 functions to control the semiconductor device 3 to shift to a fixed mode that does not return unless the power is turned off, or to a safe mode that erases confidential information. The test pad 10 is used to input a test signal to an internal circuit load 9 having a memory that is a circuit to be tested and a CPU that manages the memory. The control circuit 11 supplies a control signal for invalidating the comparison operation by the comparator 8 only when the internal circuit load 9 is in the test mode.

上記構成において、半導体装置3の検査時には、半導体装置はモード選択信号Dによりテストモードとされる。モード選択信号Dを受けて制御回路11は制御信号を出力し、比較器8による比較動作を無効にし、不正検出信号Cに代えて正常検出信号を出力する。また、半導体装置3の内部回路負荷9等へ検査用PAD10から電力を供給して検査を行う。テストモード以外のモードでは、制御回路11からの制御信号により比較器8の比較動作を常時有効にしておく。   In the above configuration, when the semiconductor device 3 is inspected, the semiconductor device is set to the test mode by the mode selection signal D. Upon receiving the mode selection signal D, the control circuit 11 outputs a control signal, invalidates the comparison operation by the comparator 8, and outputs a normal detection signal instead of the fraud detection signal C. Further, inspection is performed by supplying power from the inspection PAD 10 to the internal circuit load 9 and the like of the semiconductor device 3. In modes other than the test mode, the comparison operation of the comparator 8 is always enabled by a control signal from the control circuit 11.

一方、リーダ/ライタの送信アンテナ1よりキャリヤが送信されると、ICカード内の受信アンテナ2がそのキャリヤを受信し、半導体装置3に伝播させる。整流器3は伝播したキャリヤを整流し、以降の回路に適するレベルの直流の電力を取り出す。しかし、この時点での電力は不安定で、キャリヤの通信距離により電圧が上下に変動する。レギュレータ6はその不安定な電圧から半導体装置の仕様に応じた安定電圧を作成し、半導体装置3の内部回路負荷9に供給する。   On the other hand, when a carrier is transmitted from the transmitting antenna 1 of the reader / writer, the receiving antenna 2 in the IC card receives the carrier and propagates it to the semiconductor device 3. The rectifier 3 rectifies the propagated carrier and takes out DC power at a level suitable for the subsequent circuits. However, the power at this point is unstable and the voltage fluctuates up and down depending on the communication distance of the carrier. The regulator 6 creates a stable voltage according to the specifications of the semiconductor device from the unstable voltage and supplies it to the internal circuit load 9 of the semiconductor device 3.

通常、整流器4の出力電圧(レギュレータ6の入力電圧)とレギュレータ6の出力電圧にはレベル差があり、整流器4の出力電圧の方が電位は高い。比較器8はレギュレータ6より駆動電圧を得ているので、比較するには、第1の分圧回路5と第2の分圧回路7を使用して同比率でレギュレータ6の電圧より低い電圧に降圧した比較電圧AとBを発生させて、比較器8に入力した方が、動作上都合がよい。これにより比較器8は比較電圧Aが比較電圧Bより電位が高い関係を監視する。   Usually, there is a level difference between the output voltage of the rectifier 4 (input voltage of the regulator 6) and the output voltage of the regulator 6, and the potential of the output voltage of the rectifier 4 is higher. Since the comparator 8 obtains the drive voltage from the regulator 6, for comparison, the first voltage dividing circuit 5 and the second voltage dividing circuit 7 are used to make the voltage lower than the voltage of the regulator 6 at the same ratio. It is more convenient in terms of operation to generate the reduced comparison voltages A and B and input them to the comparator 8. Thereby, the comparator 8 monitors the relationship that the comparison voltage A is higher in potential than the comparison voltage B.

これに対して、不正行為者は、ICカードを分解し、半導体装置そのものに、検査用パッド10を利用して様々な電圧を外部から加えて攻撃し、半導体装置内部から機密情報の改竄や情報の推定を試みる。このため正しい通信によるキャリヤが整流器3を介して入力されず、これらの比較電圧AとBの大小関係が逆になる。従って、比較器8からは不正検出信号Cが出力され、この不正検出信号に基づいて固定モードや動作のリセット、または機密情報を消去するように動作モードを移行させる手段を備えることで、機密情報を保護することができる。さらに、モード選択信号Dを電気的ではなく、物理的に切り替える機能があれば、より耐タンパー性が向上する。   On the other hand, the fraudster disassembles the IC card and attacks the semiconductor device itself by applying various voltages from the outside using the inspection pad 10 to alter the confidential information or information from the inside of the semiconductor device. Try to estimate. For this reason, the carrier by the correct communication is not input via the rectifier 3, and the magnitude relationship between the comparison voltages A and B is reversed. Accordingly, the fraud detection signal C is output from the comparator 8, and based on the fraud detection signal, the fixed mode, the operation reset, or the means for shifting the operation mode so as to erase the confidential information is provided. Can be protected. Furthermore, if there is a function of switching the mode selection signal D physically rather than electrically, the tamper resistance is further improved.

本発明の半導体装置は、通常動作に対して変化する不正行為時の電位変化を簡易な構成で検出することができ、この電位変化を捕捉することで不正行為を検出することができるという効果を有し、装置内部の機密情報を改竄・コピーを目的とした不正行為から保護する半導体装置等として有用である。   The semiconductor device of the present invention can detect a potential change at the time of fraud that changes with respect to normal operation with a simple configuration, and can detect the fraud by capturing this potential change. It is useful as a semiconductor device or the like that protects confidential information inside the device from unauthorized acts for the purpose of falsification and copying.

本発明の一実施形態に係る半導体装置の構成を示す図である。It is a figure showing composition of a semiconductor device concerning one embodiment of the present invention. 従来の電圧検出回路の構成を示す図である。It is a figure which shows the structure of the conventional voltage detection circuit.

符号の説明Explanation of symbols

1 送信アンテナ
2 受信アンテナ
3 半導体装置
4 整流器
5 第1の分圧回路
6 レギュレータ
7 第2の分圧回路
8 比較器
9 内部回路負荷
10 検査用パッド
11 制御回路
20 分圧回路
21 基準電圧発生回路
22 比較器
A、B 比較電圧
C 不正検出信号
D モード選択信号
DESCRIPTION OF SYMBOLS 1 Transmission antenna 2 Reception antenna 3 Semiconductor device 4 Rectifier 5 1st voltage dividing circuit 6 Regulator 7 2nd voltage dividing circuit 8 Comparator 9 Internal circuit load 10 Test pad 11 Control circuit 20 Voltage dividing circuit 21 Reference voltage generation circuit 22 Comparator A, B Comparison voltage C Fraud detection signal D Mode selection signal

Claims (2)

受信電力を整流する整流手段と、整流出力を安定化して内部回路へ供給する安定化手段とを含む半導体装置であって、
前記整流手段及び前記安定化手段の出力をそれぞれ分圧する分圧手段と、
前記分圧手段の出力を互いに比較する比較手段とを備える半導体装置。
A semiconductor device including rectifying means for rectifying received power and stabilizing means for stabilizing a rectified output and supplying the rectified output to an internal circuit,
Voltage dividing means for dividing the output of the rectifying means and the stabilizing means, respectively;
A semiconductor device comprising comparison means for comparing outputs of the voltage dividing means with each other.
前記比較手段の出力に基づいて動作モードを制御するモード制御手段を備える請求項1記載の半導体装置。   2. The semiconductor device according to claim 1, further comprising mode control means for controlling an operation mode based on an output of the comparison means.
JP2003401327A 2003-12-01 2003-12-01 Semiconductor device Pending JP2005165511A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100956377B1 (en) 2008-03-03 2010-05-07 삼성전기주식회사 Low power communication system and communication method thereof
JP2011010299A (en) * 2009-06-25 2011-01-13 St Microelectronics (Rousset) Sas Authentication of terminal by electromagnetic transponder
JP2011010298A (en) * 2009-06-25 2011-01-13 St Microelectronics (Rousset) Sas Authentication of terminal-transponder couple by transponder

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100956377B1 (en) 2008-03-03 2010-05-07 삼성전기주식회사 Low power communication system and communication method thereof
JP2011010299A (en) * 2009-06-25 2011-01-13 St Microelectronics (Rousset) Sas Authentication of terminal by electromagnetic transponder
JP2011010298A (en) * 2009-06-25 2011-01-13 St Microelectronics (Rousset) Sas Authentication of terminal-transponder couple by transponder

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