JP2005151046A - Imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent discontinuity from taking place in joints between divided pictures in a photographed picture by a system for automatically correcting an unbalance between a plurality of regions (a plurality of outputs) by an imaging element of a type for dividing a picture into a plurality of regions and reading the regions. <P>SOLUTION: Calibration photographing is periodically executed in a timing different from that of main photographing, a prescribed arithmetic operation is applied to a photographed image at that time to decide a timing when the imaging element samples a signal to correct the unbalance between a plurality of channels. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  In an image sensor used in a digital camera or the like, the present invention automatically determines the output level between a plurality of outputs when the data is read from a plurality of outputs at the same time. The present invention relates to a method of correcting so as to remove.

  Conventionally, this type of digital still camera has a configuration as shown in FIG. In the case of the configuration in this figure, the overall control circuit 100 detects a change in the state of the camera operation switch 101 (configured by the camera main switch and release switch) by the photographer himself and starts supplying power to the other circuit blocks. To do.

  The subject image within the photographing screen range is formed on the image sensor 104 through the main photographing optical systems 102 and 103, and the electric signal from the image sensor 104 is sequentially applied to each pixel via the CDS / AGC circuit. The A / D conversion means 106 converts it into a predetermined digital signal.

  Here, the image sensor 104 is driven in a predetermined manner by the output of the driver circuit 107 for horizontal driving and vertical driving for each pixel based on a signal from the timing generator 108 that determines the overall driving timing, thereby obtaining an image. Generate signal output.

  Similarly, the CDS / AGC circuit 105 and the A / D conversion circuit 106 that perform analog processing on the output from the image sensor 104 and convert it to a predetermined signal level operate based on the timing from the timing generator 108. .

  The output from the A / D conversion circuit 106 is input to the memory controller 115 via the selector 109 that selects a signal based on the signal from the overall control CPU 100, and all signal outputs are transferred to the frame memory 116 here. . Therefore, in this case, all the pixel data for each photographing frame is temporarily stored in the frame memory 116, so that in the case of continuous shooting, all the writing operations are performed in the frame memory 116.

  After the shooting operation is completed, the contents of the frame memory 116 storing the shooting data are transferred to the camera DSP 110 via the selector 109 under the control of the memory controller 115. In the camera DSP 110, RGB color signals are generated based on the pixel data of the shooting data stored in the frame memory.

  In a state before normal shooting, this result is transferred to the video memory 111 periodically (for each frame), so that a finder display or the like is performed via the monitor display unit 112.

  On the other hand, when the photographer himself performs a photographing operation by operating the camera operation switch 101, each pixel data for one frame is read from the frame memory 116 by the control signal from the overall control CPU 100, and an image is captured by the camera DSP 110. After processing, the work memory 113 is temporarily stored.

  Subsequently, the data in the work memory 113 is compressed by the compression / expansion means 114 based on a predetermined compression format, and the result is stored in the external nonvolatile memory 117 (usually using a nonvolatile memory such as a flash memory).

  Conversely, when observing image data that has already been photographed, the data compressed and stored in the external memory is decompressed into data for each photographing pixel through the compression / expansion means 114, and the result is stored in the video memory 111. This can be done through the monitor display means 112.

  As described above, in a normal digital camera, the output from the image sensor 104 is converted into actual image data through a process processing circuit in almost real time, and the result is output to a memory or a monitor circuit.

  On the other hand, in the digital camera system as described above, in order to improve the ability for continuous shooting or the like (for example, to obtain an ability close to 10 frames / second), the reading speed from the image sensor or the frame memory is increased. It is necessary to improve the system including the image pickup device such as increasing the writing speed of the image pickup device data.

  FIG. 4 simply shows a two-output type device structure in which a horizontal CCD is divided into two with an imaging device such as a CCD as one of the improvement methods.

  In the CCD shown in FIG. 4, charges for each pixel generated in the photodiode sections 90 and 91 are transferred to the vertical CCD section at a predetermined timing all at once, and the vertical CCD charges are transferred to the horizontal CCD 92 for each line at the next timing. And 93.

  Here, the horizontal CCD 92 transfers the charge toward the left amplifier 94 every transfer clock, and the horizontal CCD 93 transfers the charge toward the right amplifier 95 every transfer clock. The photographed image data is read out divided into two right and left with the center of the screen as the boundary.

  Usually, the amplifier is built in the CCD device, but the relative accuracy of the two amplifiers does not always coincide completely because the amplifiers are located far away in terms of layout. For this reason, the output after the amplifier is passed through separate CDS / AGC / AD circuits 4 and 5 on the left and right sides, and then adjusted using some external adjustment means to ensure matching of the left and right outputs.

  In addition, as a method of improving the image resolving power while enhancing the continuous shooting capability of the camera, after shooting the shooting screen with a separate imaging device for each area, combining each imaging device output, There is a method for generating a captured image (see, for example, Patent Document 1).

In the case of this method, the image itself is arranged so that the image captured by each image sensor has some overlap with the image of the adjacent image sensor, and by performing image processing so that the overlapping part matches, It is devised so that the joint is not conspicuous when connecting multiple screens.
JP-A-6-141246

  As described above, as an image sensor that can realize high-speed readout, a method of simultaneously reading out signals from two or more outputs can be applied to a future digital camera using a more silver salt camera (already with a single-lens reflex type silver salt camera, 8 frames / It is an indispensable technology to bring it closer to a product with a spec of seconds.

  However, having a plurality of outputs is advantageous in terms of speed, but it is clearly disadvantageous from the viewpoint of matching of output levels as compared with one having only one output.

  A simple manual adjustment method, such as analog adjustment in the conventional CDS / AGC circuit section and digital adjustment that combines both channels with the output after A / D conversion, has been considerably adjusted in the manufacturing process. Even so, for example, the value of the VR resistance itself changes due to the change in the environment, and the tendency of the temperature characteristics of the CDS / AGC circuit to completely match is very low.

  Normally, when such a reading method of the image sensor is performed, if the relative accuracy of the left and right outputs exceeds ± 1%, the imbalance of the boundary is clearly understood on the screen.

  In the case of the method disclosed in Patent Document 1, the uniformity of the entire image can be easily overcome as long as the correlation between the portions can be determined because of the overlap between the images. As shown in FIG. 4 described above, in the case of shooting using an image sensor that performs simultaneous readout from a plurality of outputs, in principle, image data obtained by shooting the same shooting area between a plurality of outputs is not included. It seems difficult to adopt such an image processing method.

  Therefore, in the present application, when a camera or the like using such an image sensor having a plurality of outputs is configured, attention is paid to a specific method for automatically removing imbalance between a plurality of channels in a camera shooting sequence.

  As a method to solve the above problems, pre-photographing (with no incident light from the subject) using internal lighting such as LED before photographing, and the unbalanced amount between multiple channels from the imaging data at that time A method is proposed in which an offset and a gain value for correcting the discontinuity of an image generated between channels are set in advance from the unbalanced amount, and a subsequent correction for main exposure photography is executed. However, with this method alone, imperfection of the image sensor itself (for example, the characteristics of the analog circuit system including the characteristics of the output amplifier of the CCD, etc.) There is a problem that the nonlinearity cannot be completely removed.

  An object of the invention according to the present application is to accurately detect an unbalance amount generated between a plurality of output terminals of an image sensor, and to automatically perform alignment between a plurality of outputs based on the detection result. Is to make up.

  In order to achieve the above object, a first invention according to the present application forms a subject image, converts the image data into an electrical signal for each pixel, and outputs a plurality of output terminals for outputting the signal to the outside. An image pickup means, a processing circuit means for individually processing a plurality of outputs from the image pickup means, and a determination for determining a correlation between data in a predetermined image area with respect to an output from the processing circuit means Means, illumination means arranged in the vicinity of the imaging means and illuminating the imaging means with a predetermined amount of light, and supplying the timing pulse which can be changed from the outside to the processing circuit means, the imaging Sampling means for sampling the image output signal from the means at an appropriate timing, and depending on the result of shooting under pre-shooting conditions using internal illumination by the lighting means, And changing the timing of the serial sampling pulses.

  In other words, artificial illumination that is different from the photographic light is incorporated into the device, the image sensor is illuminated, multiple outputs from the image sensor at that time are processed separately, and the correlation for each output is determined to determine the correlation between multiple outputs. And the sampling timing in the CDS / AGC / AD circuit unit that converts the imaged analog data from the image sensor into digital data is optimized based on the unbalanced amount.

  For example, with respect to an image sensor having two outputs, the illumination incorporated in the device is turned on in a state where photographing light is not incident, and a signal obtained from one output at that time is A, and the other signal is B. In this case, the signal of only the pixel portion located near the boundary on the image sensor screen is taken out for A and B, and the correlation between the two outputs is performed in a plurality of stages for each signal level. The sampling phase is shifted by a predetermined level based on the result.

  Subsequently, the same operation is performed, the illumination incorporated in the apparatus is turned on in a state where the photographing light is not incident again, and the correlation calculation of the signals A and B obtained at that time is performed again for each signal level. Based on the above, the sampling phase is again shifted by a predetermined level.

  After determining the sampling timing after repeating the above operation, an offset and a gain for correcting an imbalance among a plurality of outputs are set based on the correlation calculation result.

  According to a second aspect of the present application, there is provided an imaging unit having a plurality of output terminals for forming a subject image and converting the image data into an electric signal for each pixel and outputting the signal to the outside. A processing circuit means for individually processing a plurality of outputs from the processing circuit, a determination means for determining a correlation between data in a predetermined image area with respect to the output from the processing circuit means, and a proximity of the imaging means Pre-photographing using illumination means that is disposed and illuminates the imaging means with a predetermined amount of light and a changing means that changes a power supply voltage for driving the imaging means, and uses internal illumination by the illumination means The drive voltage of the image sensor is changed according to the result of photographing under conditions.

  In other words, artificial illumination that is different from the photographic light is incorporated into the device, the image sensor is illuminated, multiple outputs from the image sensor at that time are processed separately, and the correlation for each output is determined to determine the correlation between multiple outputs. Is calculated, and the drive voltage level for driving the image sensor is optimized based on the unbalance amount.

  For example, with respect to an image sensor having two outputs, the illumination incorporated in the device is turned on in a state where photographing light is not incident, and a signal obtained from one output at that time is A, and the other signal is B. In this case, the signal of only the pixel portion located near the boundary on the image sensor screen is taken out for A and B, and the correlation between the two outputs is performed in a plurality of stages for each signal level. The drive voltage of the image sensor is changed based on the result.

  Subsequently, the same operation is performed, the illumination incorporated in the apparatus is turned on in a state where the photographing light is not incident again, and the correlation calculation of the signals A and B obtained at that time is performed again for each signal level. Then, the drive voltage of the image sensor is changed again to a predetermined level.

  After determining the drive voltage of the image sensor after repeating the above operation, an offset and a gain for correcting an imbalance among a plurality of outputs are set based on the correlation calculation result.

  As described above, according to the first invention of the present application, the unbalance amount between the plurality of outputs is obtained from the image data itself output simultaneously from the plurality of output terminals of the image sensor in the preliminary photographing state before the main photographing. After calculating and changing the timing of sampling the output from the image sensor so as to suppress the unbalance between the multiple outputs as much as possible, the amount of unbalance between the multiple outputs is determined from the captured image data itself during actual shooting. By configuring a system that calculates and corrects left and right imbalances, it is possible to eliminate the appearance of image imbalances that appear on the shooting screen when using an image sensor that reads images simultaneously through multiple outputs. It becomes.

  According to the second invention of the present application, an unbalance amount between a plurality of outputs is calculated from image data itself simultaneously output from a plurality of output terminals of the image sensor in a preliminary shooting state before the main shooting, and from the result Change the drive voltage level of the image sensor to minimize the unbalance between the multiple outputs, and correct the left and right imbalances by calculating the unbalance amount between the multiple outputs from the captured image data itself during actual shooting. By configuring such a system, it is possible to apparently eliminate the image imbalance that appears on the shooting screen when using an image sensor that reads images simultaneously through a plurality of outputs.

  Examples of the present invention will be described below.

  FIG. 1 is a block diagram showing the overall hardware configuration of the present invention. In FIG. 1, an image sensor 1 having two outputs (CH1 and CH2) is constituted by a driver circuit 2 (configured by 2a and 2b, respectively). By being driven, it operates at a predetermined frequency, and is configured to output the captured image data separately on the left and right in the form of dividing the entire screen vertically into two. TG / SSG3 is a timing generation circuit that outputs a vertical synchronization signal VD and a horizontal synchronization signal HD. A driver circuit is driven based on a predetermined clock of the timing generation circuit and at the same time a timing signal ( RD, WR, SPL1, SPL2).

  The image output of the right half of the image sensor 1 is input to the CDS / AGC / AD circuit 5 via the CH1 output, and is included in the output of the CCD or the like by performing a method such as a known correlated double sampling. The AGC circuit for amplifying the output up to a predetermined signal level is operated while removing reset noise and the like.

  This image output has a waveform like CH1 shown in FIG. 5, and based on the timing shown in the sampling signals SPL1a and SPL1b from the TG / SSG3, the reset noise level and the signal level are sampled to each other. By subtracting, it is converted into a signal from which a desired noise is removed.

  After this, the above signal is amplified to a predetermined magnification (changes in conjunction with the ISO sensitivity of the normal camera) by an internal AGC circuit, and then converted into a digital signal by inputting to the internal A / D converter. An output of AD-CH1 is obtained.

  Similarly, the image output of the left half of the image sensor is input to the CDS / AGC / AD circuit 4 via the CH2 output, and is included in the output of the CCD or the like by performing the same method of correlated double sampling or the like here. The AGC circuit for amplifying the output to a predetermined signal level is activated while removing the reset noise and the like.

  This image output also has a waveform like CH2 shown in FIG. 5, and based on the timing shown in the sampling signals SPL2a and SPL2b from the TG / SSG3, the reset noise level and the signal level are sampled to each other. By subtracting, it is converted into a signal from which a desired noise is removed.

  After this, the above signal is amplified to a predetermined magnification (changes in conjunction with the ISO sensitivity of the normal camera) by an internal AGC circuit, and then converted into a digital signal by inputting to the internal A / D converter. An output of AD-CH2 is obtained.

After the left and right outputs from the image sensor 1 are separately converted into digital data in this way, both images are sequentially stored in the memory 9 via the memory controller 8.
Further, the outputs of AD-CH1 and AD-CH2 are simultaneously input to the unbalance amount calculation circuit 18, where the unbalance amount of both outputs is calculated by a method described later, and the unbalance between the two outputs is corrected. The optimum correction amount is determined.

  Since the memory controller 8 can continuously execute reading and writing to the memory 9 in normal time division, the data written in the memory at different timings is written in the order in which the data from the image sensor is written to the memory in the order of writing. It is possible to read.

  When all the images for one frame are written in the memory 9, and when the unbalance amount calculation for the photographic image of the frame is completed by the unbalance amount calculation circuit 18 and the parameter correction coefficient calculation by a predetermined calculation described later is completed, The image temporarily stored in the memory 9 is read out and image processing for actual picture creation is started.

  First, the image on the CH2 side on the left side of the screen of the image sensor 1 is continuously read from the memory 9 under the control of the memory controller 8 and input to the offset adjustment circuit 12. Here, a predetermined offset output OF2 calculated and set by the unbalance amount calculation circuit 18 is connected to the other input of the offset adjustment circuit 12, and both signals are added inside the offset adjustment circuit 12.

  Next, the output of the offset adjustment circuit 12 is input to the gain adjustment circuit 14, where the other input of the gain adjustment circuit 14 is a predetermined gain output GN2 calculated and set by the unbalance amount calculation circuit 18. Are connected, and both signals are multiplied inside the gain adjustment circuit 14.

  The output of the gain adjustment circuit 14 is input to the color processing circuit 17 via the image composition circuit 16 and a final image is obtained by executing normal color interpolation processing, matrix calculation processing, γ processing, and the like.

  At the same time that the image on the left side of the screen is read out for one line, the image on the CH1 side on the right side of the image sensor 1 is read out continuously from the memory 9 under the control of the memory controller 8 and input to the offset adjustment circuit 13. . Here, a predetermined offset output OF1 calculated and set by the unbalance amount calculation circuit 18 is connected to the other input of the offset adjustment circuit 13, and both signals are added inside the offset adjustment circuit 13.

  Next, the output of the offset adjustment circuit 13 is input to the gain adjustment circuit 15. Here, the other input of the gain adjustment circuit 15 is a predetermined gain output GN1 calculated and set by the unbalance amount calculation circuit 18. Are connected, and both signals are multiplied inside the gain adjustment circuit 15.

  The output of the gain adjustment circuit 14 is input to the image composition circuit 16. Here, after the data after correction processing for the image on the left side of the screen is input to the color processing circuit 17, the image is inverted (1 The pixel data read from the memory is input to the color processing circuit first, and the pixel data read from the memory is input to the color processing circuit first). The processed data is input to the color processing circuit 17, where normal color interpolation processing, matrix calculation processing, γ processing, and the like are executed to form a final image.

  Similarly, for the next line, the data on the left side of the screen is first input to the color processing circuit, and then the data on the right side of the screen is input to the color processing circuit to complete an image for one frame.

  In this way, the image data output after the unbalance amount generated between the two outputs is corrected by the unbalance amount calculation circuit is converted into one image data by the image composition circuit 16 (the left and right outputs are converted into one output). Then, it is assumed that predetermined color processing (color interpolation processing, γ conversion, etc.) is performed by the color processing circuit 17 in the next stage.

  The memory controller circuit 8 to the color processing circuit 17 (except for the memory 9) surrounded by a dotted line portion A in FIG. 1 are usually composed of a one-chip IC.

  Next, the overall control will be described. When the photographing operation SW 22 is operated by the photographer, the overall control CPU 19 detects this and first turns on the LED 11 via the driver circuit 10. This LED 11 is arranged in the camera body as shown by 11a or 11b in FIG. 2, and as shown by a dotted line in FIG. 2, a light shielding member 27 (see FIG. 2) that shields light from the subject from entering the image sensor. Usually, even if a mechanical shutter, a mirror, etc.) are in a light-shielded state, they are arranged at a position where a certain amount of light can be incident on the image sensor.

  9 and 10 show the layout configuration of the electronic camera of the present invention. FIG. 9 shows the configuration of the entire camera, and FIG. 10 is an enlarged view of a shutter device 44 portion to be described later of the camera in FIG. In the figure, 31 is an electronic still camera body, and 32 is a photographic lens for forming a subject image on an imaging surface, which is detachably attached to the electronic still camera body 31. The photographing lens 32 includes an imaging lens 33 for forming an object image on an imaging surface, and a lens driving device 34 for driving the imaging lens 33, and a diaphragm for performing exposure control. A blade group 35 and a diaphragm driving device 36 for driving the diaphragm blade group 35 are configured. Although the imaging lens 32 is simplified in the drawing, it is composed of one or a plurality of lenses, and may be a single focal length (fixed focal point) lens, zoom lens or step. A focal length variable like a zoom lens may be used.

  Reference numeral 37 denotes a main mirror for guiding a subject image formed by the photographing lens 32 to the focusing screen 38 and transmitting a part thereof to the focus detection device 43 through a sub-mirror 42 described later. The main mirror 37 is configured to be movable by a mirror driving device (not shown) to a position where a subject image can be observed with a viewfinder and a retreat position where the subject mirror retracts from the optical path of the subject light beam during photographing.

  Reference numeral 38 denotes a focusing screen on which a subject light beam guided by the photographing lens 32 is reflected by the main mirror 37 and is imaged. A subject image is formed on the focusing screen 38 during viewfinder observation.

  Reference numeral 39 denotes an optical member that converts and reflects an object image formed on the focusing screen 38 into an erect image. In this embodiment, a penta roof prism is used. Reference numeral 40 denotes an eyepiece device that causes the subject image converted and reflected into an erect image by the penta roof prism 39 to reach the eyes of the photographer.

  Reference numeral 41 denotes a photometric device that measures the luminance of a subject image formed on the focusing screen 38 during viewfinder observation via the penta roof prism 39. The electronic still camera 31 of the present embodiment is an output signal of the photometric device. Based on the above, exposure control at the time of exposure is performed.

Reference numeral 42 denotes a sub mirror for reflecting subject light transmitted through a part of the main mirror 37 and guiding the subject light to a focus detection device 43 disposed on the lower surface of a mirror box (not shown).
The sub-mirror 42 is interlocked with the main mirror 37 and a mirror driving mechanism (not shown) of the main mirror 37, and when the main mirror 37 is at a position where a subject image can be observed with a finder, a precursor focus detection device It is configured to be movable to a position where the subject light is guided to 43 and to a retreat position where the subject light is retracted from the optical path of the subject luminous flux during photographing.

  Reference numeral 43 denotes a focus detection device, which controls the lens driving device of the photographing lens 32 based on an output signal of the focus detection device 43 and performs focus adjustment with the imaging lens.

  Reference numeral 44 denotes a shutter device that mechanically controls the incidence of the subject luminous flux on the imaging surface. The shutter device 44 blocks the subject luminous flux during finder observation, and retracts from the optical path of the subject luminous flux in response to the release signal during imaging, and retracts from the optical path of the subject luminous flux during finder observation. And a focal plane shutter having a rear blade group 44b that shields the subject luminous flux at a predetermined timing after the start of traveling of the front blade group 44a. In the vicinity of the aperture opening of the shutter device 44, a notch or a through hole for projecting light emitted from the LED elements 23a and 23b described later to the leading blade group 44a is formed.

  Reference numeral 45 denotes an image pickup device (corresponding to the image pickup device 1 in FIG. 1) that picks up a subject image formed by the photographing lens 32 and converts it into an electrical signal. A known two-dimensional image pickup device is used for the image pickup element 45. There are various types of imaging devices such as a CCD type, a MOS type, and a CID type, and any type of imaging device may be employed. However, in this embodiment, there are two photoelectric conversion elements (photosensors). An interline CCD image sensor that is arranged in a dimension and outputs signal charges accumulated in each sensor through a vertical transfer path and a horizontal transfer path is employed. The image sensor 45 has a so-called electronic shutter function for controlling the accumulation time (in shutter seconds) of charges accumulated in each sensor.

  In the present invention, as shown in FIG. 11, the image sensor 45 is protected by a cover glass 45b, which is an optical protection member for protecting the image area 45a of the entire screen, and is vertically arranged on the right half face 45c and the left half face 45d. The image data is divided into two so that each captured image data can be output simultaneously.

Reference numeral 46 denotes an electric board that electrically and mechanically couples the image pickup element 45 and LEDs 23a and 23b (corresponding to LEDs 11a and 11b in FIG. 2) described later to hold them.
Reference numerals 23a and 23b denote light projecting means for projecting illumination light onto the imaging region 45a of the image sensor 45 according to the present invention. In the present invention, LED elements are used. As shown in FIGS. 10 and 11, the LED elements 23a and 23b are extensions of a dividing line 45e that divides the imaging region 45a into a right half face 45c and a left half face 45d in the vicinity of the upper and lower side surfaces of the image pickup element 45. The LED elements 23 a and 23 b are arranged so as to project light toward the shutter device 44.

  The luminous fluxes of the LED elements 23 a and 23 b are projected onto the imaging region 45 a of the imaging element 45 with the imaging element 45 side of the leading blade group 44 a of the shutter device 44 as a reflecting surface.

  Usually, a front blade group of a shutter device of a camera using a silver salt film as a recording medium is subjected to antireflection coating to prevent fogging of the film due to stray light. However, the electronic still camera according to the present invention is configured to control the exposure time by controlling the accumulation time (shutter time) of charges accumulated in each sensor by the electronic shutter function of the image sensor 45. Therefore, when the accumulation by the image sensor 45 is started, the leading blade group 44a is in an open state, so that anti-reflection coating on the leading blade group 44a is unnecessary in order to prevent the stray light from being fogged into the imaging region.

  Accordingly, in order to efficiently project the luminous flux of the LED elements 23a and 23b to the imaging region 45a of the image sensor 45, the leading blade group 44a of the shutter device 44 of the electronic still camera of the present invention is high It is desirable to use a material having reflectivity, or to perform surface treatment such as painting or plating with high reflectivity. Further, in order to illuminate the imaging region 45a of the image sensor 45 as widely as possible, it is desirable that the leading blade group 44a of the shutter device 44 has a diffusion characteristic. In the present invention, in order to achieve the above two conditions, the surface on the image sensor 45 side of the leading blade group 44a is semi-glossy white-tone paint or semi-glossy gray-tone paint. Even if one of these conditions is achieved, a sufficient lighting effect can be obtained.

  In the present embodiment, the luminous flux of the LED elements 23a and 23b is directly projected and illuminated. However, a mask member having a specific pattern is provided near the light emitting portion of the LED elements 23a and 23b. An optical member that forms an image of this pattern on the imaging region may be disposed, and a specific pattern may be projected instead of the illumination light.

  As shown in FIG. 10, in the present invention, the LED elements 23 a and 23 b are held by the electric board 46 that is a holding member of the image pickup element 45 and are electrically connected, but the LED elements 23 a and 23 b are connected. The holding member is held by the shutter device 44, a camera body (not shown), etc., and the electrical connection is made by connecting to the electric board 46 or other circuit board (not shown) by a flexible printed circuit board or lead wire. May be.

  Reference numeral 48 denotes a filter member that removes high-frequency components of photographing light that cause noise, and is integrally held on the cover glass 45 b of the image sensor 45. The filter member 48 is made of a material having birefringence characteristics such as quartz and lithium niobate.

  Next, a specific concept of the unbalance amount calculation circuit 18 will be described using the pixel arrangement shown in FIG.

  FIG. 3 shows a so-called Bayer array of color filters, each composed of Gr (G of R line), R, B, and Gb (G of B line). The readout left screen is arranged symmetrically with the center of the image sensor as the boundary.

  When the Gr, R, B, and Gb pixels surrounded by the diagonal lines in FIG. 3 are used as one unit and they are simply added to generate a simple luminance signal (Y = Gr + R + B + Gb), The sum of the simple luminance signals located near the left and right screen boundaries (assuming that the number of units is m) is represented by YLi and YRi on the left screen and the right screen, respectively.

  The simple luminance signal calculated by the above method is sequentially read out along the j direction in FIG. 3, and the result is expressed by the relationship between the j direction and the simple luminance signal. The solid line and the dotted line in FIG. The result is as shown.

  In this way, the two methods described above are the average value of data in a predetermined range existing in the left half and the average value of data in a predetermined range existing in the right half of the pixel data output from the image sensor until now. Is to determine the correlation and correct the imbalance between the two outputs of the image sensor accordingly.

  Next, before performing the actual photographing operation on the actual subject, an unbalance amount between the two outputs of the image sensor is detected in the automatic calibration photographing operation using the LED 11 incorporated in the camera device. As a result, as described above, the analog sampling signal from the image sensor is sampled and converted into digital data to determine the optimum sampling point in CDS / AGC / AD and the data captured in actual actual photographing. The operation sequence for the left / right imbalance correction will be described with reference to the flowcharts of FIGS.

  FIG. 6 shows a main photographing sequence. First, in step 150, signals for sampling in the CDS / AGC / AD 4 and 5 with respect to the signals from the respective CH1 and CH2 of the image sensor shown in FIG. Timings Δt1a, Δt1b, Δt2a, and Δt2b for SPL1a, SPL1b, SPL2a, and SPL2b are set to an initial value 0 (a value that TG / SSG3 has as an initial value).

Next, in step 150, it is determined whether or not SW1 which is one of the operation switches 22 of the camera is in the ON state. If it is still OFF, the state of this SW1 is continuously detected. When it is detected that SW1 is turned on, the process proceeds to the next step 152.
In step 152, the above-described LED 11 is turned on, and the imaging element 1 is directly illuminated with a predetermined illuminance from the vertical direction of the imaging surface.

  Next, in step 153, a predetermined trigger signal is given to TG / SSG3 to start the accumulation operation by the image pickup device 1, and in step 154, the operation waits until the accumulation operation (in this case, accumulation for a predetermined time) is completed. .

  When it is detected in step 154 that the accumulation operation has been completed, the LED is immediately turned off in step 155. Subsequently, in step 156, the data accumulated in the actual image sensor 1 is read out, and the memory controller 8 in FIG. The data is stored in the buffer memory 9 and at the same time, as described above, the image data in a predetermined area near the left and right screen boundaries is also taken into the unbalance amount calculation circuit 18 from the outputs of AD-CH1 and AD-CH2.

  In this case, as a matter of course, since the light incident on the image sensor is only the component from the LED 11, the amount of incident light near the screen boundary is almost equal between the left screen and the right screen, and the difference in output between the two channels is as follows. It simply represents the amount of imbalance between channels.

  In subsequent step 157, when it is detected that the reading of the accumulated data is completed, next, in step 158, the actual unbalance amount calculation circuit 18 starts an unbalance amount calculation operation.

  This unbalance amount calculation operation will be described using the flowchart shown in FIG.

  In step 200, each register YLH, YLM, YLL, YRH, YRM, YRL for use in internal calculation is initialized to zero.

Next, in step 201, the value of the counter j used for the internal repetitive operation is reset to 0, and in step 202, the value of the counter i used for the internal repetitive operation is similarly reset to 0, and the internal registers YLi and YRi is similarly initialized to 0.
In step 203, as described in FIG. 3, Grij, Rij, Bij, and Gbij in the positions of the predetermined i-th column (initially 0th column) and j-th row (initially 0th row) on the left screen are added to YLi. Then, the integrated value in the i direction of the left screen simple luminance signal near the center boundary is calculated.

  Similarly, in step 204, as described with reference to FIG. 3, Grij, Rij, Bij, and Gbij in the predetermined i-th column (initially 0th column) and j-th row (initially 0th row) position on the right screen are converted into YRi. In addition, the integrated value in the i direction of the right screen simple luminance signal near the center boundary is calculated.

  After the internal counter i is incremented by 1 in step 205, it is determined in step 206 whether or not the counter value has reached the predetermined value m. If it has not yet reached, the process returns to step 203 again, and the next Grij, The operation of adding Rij, Bij, Gbij to YLi and YRi is repeated.

  Thus, a total of m simple luminance integration values from 0 to m−1 in the i direction are calculated for each of the left screen and the right screen.

  Subsequently, at step 207, it is determined whether or not the left screen simple luminance integrated value YLi is greater than or equal to a predetermined level α (a value that is somewhat large). The screen simple luminance integrated value YLi is integrated, and the right screen simple luminance integrated value YRi is integrated into the internal register YRH.

  On the other hand, if YLi is smaller than the predetermined level α in step 207, the process proceeds to step 208, where it is determined whether or not it is equal to or greater than a predetermined value β (a value smaller than α), and if it is greater than β, the process proceeds to step 209. The left screen simple luminance integrated value YLi is integrated with the internal register YLM, and the right screen simple luminance integrated value YRi is integrated with the internal register YRM.

  If YLi is smaller than the predetermined level β in step 208, the process proceeds to step 210, where the left screen simple luminance integrated value YLi is integrated with the internal register YLL, and this right screen simple with respect to the internal register YRL. The luminance integrated value YRi is integrated.

  As described above, when the value of YLi is YLi ≧ α, when α> YLi ≧ β, and when β> YLi, the respective values are integrated as separate integrated values.

  After the internal counter j is incremented by 1 in step 212, it is determined in step 213 whether or not the value of j has reached n. If it has not yet reached, the process returns to step 202 and returns to steps 202 to 212 described above. Repeat the above operations.

  The above operation is repeated until the value of j becomes equal to n in step 213, and 3 according to the value of the simple luminance YLi in each row up to n-1 rows (the last read line of the image sensor) in the j direction shown in FIG. The respective integrated values are counted in types of internal registers (large luminance levels are YLH and YRH, intermediate luminance levels are YLM and YRM, and small luminance levels are YLL and YRL).

  Next, in step 214, for each luminance level, the ratio of the right screen to the left screen YRH / YLH is set to GH, YRM / YLM is set to GM, and YRL / YLL is set to GL. Is calculated separately for each luminance level.

  In step 215, it is determined whether or not the values of GH, GM, and GL representing the left and right unbalance amounts for each luminance level are all equal (actually determined to be approximately equal), and all the values are substantially equal. In this case, the linearity of the left / right gain ratio (corresponding to the unbalance amount) is sufficient (that is, the right / left gain ratio is equal at any luminance level) .In this case, nothing is done with this unbalance amount. Terminate the process.

  On the other hand, if the values of GH, GM, and GL are different in step 215, the process proceeds to step 216 to determine whether or not GH> GM> GL. If this relationship is satisfied, the process proceeds to step 218. The signal SPL1b for sampling the output signal on the CH1 side (the image signal on the right screen) by the CDS / AGC / AD5 is shifted from the current position by a predetermined level ts (minus side in FIG. 5).

  If the relationship GH> GM> GL is not satisfied in step 216, it is next determined in step 217 whether the relationship GH <GM <GL is satisfied.

  If this relationship holds, in step 219, the signal SPL1b for sampling the output signal on the CH1 side (the image signal on the right screen) by the CDS / AGC / AD5 is delayed from the current position by a predetermined level ts (FIG. 5). To the plus side).

  If the relationship of GH <GM <GL does not hold in step 217, the processing with this unbalance amount is terminated without doing anything as in the case where the relationship of GH = GM = GL holds in step 215. .

  The above is the operation explanation regarding the calculation of the unbalance amount and the change of the sampling timing based on the calculation result. Instead of changing the timing of SPL1b in step 218, the output signal on the CH2 side (the image signal of the left screen) is Instead of shifting the signal SPL2b sampled by the CDS / AGC / AD4 by a predetermined level ts from the current position (plus side in FIG. 5), the output signal on the CH2 side (instead of changing the timing of SPL1b in step 219) There is also a method of shifting the signal SPL2b for sampling the image signal of the left screen) by CDS / AGC / AD4 to advance by a predetermined level ts from the current position (minus side in FIG. 5).

  In addition, a method of changing the timing of SPL1a and SPL2a from the relationship with GH, GM, and GL can be considered. However, the details are substantially the same as described above, and the description thereof is omitted here.

  Returning to the flowchart of FIG. 6 again, in step 159, it is determined whether or not the release switch operation for performing the actual photographing is actually performed by the photographer (in this case, expressed as SW2). If it is determined that it has not been done, the process returns to step 151 and the above-described operation is repeated.

  On the other hand, if it is determined in step 159 that the release switch has been operated, the process proceeds to step 160 where the mechanical shutter is opened via a shutter drive circuit (not shown) and a predetermined trigger is applied to TG / SSG3. The accumulation operation by the image sensor 1 is started by giving a signal.

  When it is detected in step 161 that the accumulation operation has been completed, the mechanical shutter is immediately closed in step 162. Subsequently, in step 163, the data accumulated in the actual image sensor 1 is read, and the memory controller 8 in FIG. At the same time, the data is stored in the buffer memory 9 and, at the same time, the image data in the predetermined region near the left and right screen boundaries is also taken into the unbalance amount calculation circuit 18 from the outputs of AD-CH1 and AD-CH2. .

  In this case, as a matter of course, the light incident on the imaging device is based on the incident light from the subject, but the images near the center boundary of the imaging region shown in FIG. .

  Next, in step 164, correction is actually performed by the adjustment (correction) circuit indicated by the dotted line portion A in FIG. 1 from the image data in the predetermined area captured by the unbalance amount calculation circuit 18 at the time of photographing the main image. The amount is calculated and set. This specific method will be described with reference to the flowchart of FIG.

  In step 250, first, the registers YLG, YLO, YRG, and YRO for use in internal operations are initialized to zero.

  Next, in step 251, the value of the counter j used for the internal repetitive operation is reset to 0. Subsequently, in step 252, the value of the counter i used for the internal repetitive operation is similarly reset to 0, and the internal registers YLi and YRi is similarly initialized to 0.

  In step 253, as described with reference to FIG. 3, Grij, Rij, Bij, and Gbij in the positions of the predetermined i-th column (initially 0th column) and j-th row (initially 0th row) on the left screen are added to YLi. Then, the integrated value in the i direction of the left screen simple luminance signal near the center boundary is calculated.

  Similarly, in step 254, as described with reference to FIG. 3, Grij, Rij, Bij, and Gbij at predetermined i-th column (initially 0th column) and j-th row (initially 0th row) positions on the right screen are converted to YRi. In addition, the integrated value in the i direction of the right screen simple luminance signal near the center boundary is calculated.

  After incrementing the internal counter i by 1 in step 255, it is determined in step 256 whether or not the counter value has reached a predetermined value p (<m). If it has not yet reached, the process returns to step 253 again. The operation of adding the next Grij, Rij, Bij, Gbij to YLi and YRi is repeated.

  In this way, a total of p simple luminance integrated values from 0 to p-1 in the i direction are calculated for each of the left screen and the right screen. This p is set to a number considerably smaller than m, Only the vicinity of the boundary is taken out for calculation.

  Subsequently, in step 257, it is determined whether or not the left screen simple luminance integrated value YLi is greater than or equal to a predetermined level γ (a value that is somewhat large). If it is greater than or equal to γ, the process proceeds to step 258 to the left of the internal register YLG. The screen simple luminance integrated value YLi is integrated, and the right screen simple luminance integrated value YRi is integrated into the internal register YRG.

  On the other hand, if YLi is smaller than the predetermined level γ in step 257, the process proceeds to step 259, where it is determined whether or not it is equal to or smaller than a predetermined value δ (a value smaller than γ). The left screen simple luminance integrated value YLi is integrated with the internal register YLO, and the right screen simple luminance integrated value YRi is integrated with the internal register YRO.

  If YLi is greater than the predetermined level δ in step 259, the process proceeds to step 261 without doing anything.

  As described above, when the value of YLi is YLi ≧ γ, each value is integrated as a separate integrated value separately for YLi ≦ δ.

  After the internal counter j is incremented by 1 in step 261, it is determined whether or not the value of j has reached n in step 262. If it has not yet reached, the process returns to step 252 again and steps 252 to 261 described above are performed. Repeat the above operations.

  The above operation is repeated until the value of j becomes equal to n in step 262, and 2 according to the value of the simple luminance YLi in each row up to n-1 rows (the last read line of the image sensor) in the j direction shown in FIG. The respective integrated values are counted in types of internal registers (large luminance levels are YLG and YRG, and small luminance levels are YLO and YRO).

  Next, at step 263, the result of subtracting the value of YRG from the value of the internal register YLG is divided by 4ij to calculate the unbalance amount of the left and right images as the average value of the left and right differences. 1 is set as the offset value OF1 for the offset adjustment circuit 13.

  Next, at step 264, 0 is set as the offset value OF2 for the offset adjustment circuit 12 of FIG.

  Subsequently, in step 265, the result of dividing the value of the internal register YLG by the value of YRG is set as the gain value GN1 for the gain adjustment circuit 15 in FIG. 1, and in step 266, the gain value GN22 for the gain adjustment circuit 14 in FIG. 1 is set.

  In this way, in this correction amount calculation operation, the gain is calculated and set as the left / right unbalance amount from the portion with the high luminance level using the correlation between the right and left boundary data of the actual photographed image, and the left and right unbalance from the portion with the low luminance level The offset is calculated and set as the balance amount.

  After performing the above correction operation, the process proceeds again to step 165 in the main photographing sequence of FIG. 6, where each adjustment circuit, image composition circuit 16 and color processing circuit 17 surrounded by the dotted line A of FIG. The image processing operation passed through is started.

  Next, a second embodiment of the present invention will be described using the circuit configuration of FIG.

  In FIG. 12, the power supply voltage (that is, the drive voltage of the image sensor) of the driver circuit 2 (configured by 2a and 2b) that actually drives the image sensor 1 is basically shown in FIG. A voltage variable means for control is added.

  In this figure, the D / A converter 24 generates a predetermined voltage based on data from the overall control CPU 19, and the variable voltage power supply circuit 23 supplies the predetermined power supply voltage to the driver circuit 2b based on the generated voltage. Similarly, the D / A converter 26 generates a predetermined voltage based on data from the overall control CPU 19, and the variable voltage power supply circuit 25 supplies the predetermined power supply voltage based on the generated voltage to the driver circuit. It is the structure supplied to 2a.

  Next, an actual photographing operation will be described using the flowcharts of FIGS.

  In FIG. 13, in order to first output a predetermined initial voltage to the D / A converters 26 and 24, V1 is set for DA1 and V2 is set for DA2.

  Next, the operation after step 301 is performed. Since the operation after this is exactly the same as the operation after step 151 in FIG.

  Next, the flowchart of FIG. 14 will be described. In this case as well, the operation of steps 350 to 367 is exactly the same as the operation of steps 200 to 217 of FIG.

  If the relationship of GH> GM> GL is established in step 366, the process proceeds to step 368, where the setting value DA1 for the D / A converter 26 is increased by a predetermined voltage ΔV with respect to the base setting value. Set a correct value.

  On the other hand, if the relationship of GH <GM <GL is established in step 367, the process proceeds to step 369 where the value of the set value DA1 for the D / A converter 26 is lowered by a predetermined voltage ΔV with respect to the base set value. Set a value like this.

  The above describes the operation related to the change of the drive voltage of the image sensor based on the unbalance amount calculated in the calibration operation before the main photographing. In addition to the above method, the setting value DA2 for the D / A converter 24 is described. The method of changing the value of the value relative to the base setting value or the method of changing the setting values of both the D / A converters 24 and 26 can be considered, but since the basic idea is the same as above, detailed explanation here Is omitted.

1 is an overall system configuration diagram according to a first embodiment of the present invention. It is a figure showing the concept of the calibration concerning the whole this invention. It is a figure showing the pixel arrangement | sequence of the image pick-up element based on the whole this invention. It is the figure which showed the structure which samples the output from the image pick-up element based on the whole this invention. FIG. 6 is a diagram for explaining a concept of changing timing for sampling an output from an image sensor according to a second embodiment of the present invention. It is a flowchart for demonstrating the operation | movement which concerns on 1st Example of this invention. It is a flowchart for demonstrating the operation | movement which concerns on 1st Example of this invention. It is a flowchart for demonstrating the operation | movement which concerns on 1st Example of this invention. It is a schematic block diagram of the camera of this invention. It is the elements on larger scale of the camera of FIG. It is a perspective view of an image sensor. FIG. 6 is an overall system configuration diagram according to a second embodiment of the present invention. 6 is a flowchart for explaining an operation according to the second embodiment of the present invention. It is a flowchart for demonstrating the operation | movement which concerns on 2nd Example of this invention. It is a whole system block diagram of a prior art example.

Explanation of symbols

1: Image sensor 4, 5: CDS / AGC / AD circuit 11: LED
16: Image composition circuit 18: Unbalance amount calculation circuit 19: CPU

Claims (4)

Imaging means having a plurality of output terminals for forming a subject image and converting the image data into an electrical signal for each pixel and outputting the signal to the outside;
Processing circuit means for individually processing a plurality of outputs from the imaging means;
Discriminating means for discriminating a correlation between data in a predetermined image area with respect to an output from the processing circuit means;
An illuminating means disposed in the vicinity of the imaging means and illuminating the imaging means with a predetermined amount of light;
Sampling means for sampling an image output signal from the imaging means at an appropriate timing by supplying a timing pulse that can be changed from the outside to the processing circuit means;
An imaging apparatus characterized in that the timing of the sampling pulse is changed according to a result of imaging under pre-imaging conditions using internal illumination by the illumination means.   After pre-shooting conditions using the internal illumination by the lighting means, the main shooting is started by the photographer's release operation, and correction is made so as to remove the imbalance between the multiple outputs of the imaging means using the shot image. The imaging apparatus according to claim 1. Imaging means having a plurality of output terminals for forming a subject image and converting the image data into an electrical signal for each pixel and outputting the signal to the outside;
Processing circuit means for individually processing a plurality of outputs from the imaging means;
Discriminating means for discriminating a correlation between data in a predetermined image area with respect to an output from the processing circuit means;
An illuminating means disposed in the vicinity of the imaging means and illuminating the imaging means with a predetermined amount of light;
Changing means for changing the power supply voltage for driving the imaging means,
An image pickup apparatus, wherein a drive voltage of the image pickup device is changed according to a result of photographing under a pre-photographing condition using internal illumination by the illumination unit.   After pre-shooting conditions using the internal illumination by the lighting means, the main shooting is started by the photographer's release operation, and correction is made so as to remove the imbalance between the multiple outputs of the imaging means using the shot image. The imaging apparatus according to claim 3.

Images