JP2005149519A - Information processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an information processor capable of processing a control code requiring an urgent process by a processing means even before a series of DMA transfer is completed. <P>SOLUTION: This information processor 2 has: a reception means 15 for receiving a transmission code from a host device 6; a storage means 7 for storing the transmission code; a DMA control means 15 for executing DMA transfer from the reception means to the storage means; a processing means 18 for executing a process based on the control code included in the transmission code. The information processor is characterized by that the DMA control means compares the transmission code received by the reception means during the DMA transfer with the control code previously stored in the control code storage means; and the processing means executes a process based on the received transmission code when the comparison result of the DMA control means is coincident. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an information processing apparatus used for computers, printers, copiers, facsimiles, and the like, and more specifically, receiving means for receiving a transmission code from a host device, storage means for storing the transmission code, and the receiving The present invention relates to an information processing apparatus having DMA control means for executing DMA transfer from a means to the storage means, and processing means for executing processing based on a control code included in the transmission code.

  Conventionally, a transmission code from a host device is received by a receiving unit such as a printer controller, and the received transmission code is stored in a storage unit such as a RAM under the control of a DMA (direct memory access) control unit. An information processing apparatus for transferring is known. The DMA transfer is to transfer and store the transmission code received directly from the receiving means to the storage means without going through the processing means in the information processing apparatus.

  However, in such a conventional information processing apparatus, after the DMA transfer from the transmission code receiving means to the storage means is completed, the processing means in the information processing apparatus analyzes what code the transmission code is. It was. Therefore, in the conventional apparatus, when the control code to be subjected to the emergency processing by the processing means in preference to the DMA transfer is included in the series of transmission codes to be subjected to the DMA transfer. However, the processing means cannot recognize that the control code has been transmitted until the DMA transfer to the storage means has been completed, and can also execute the processing of the control code. There wasn't. Accordingly, there is a problem that the processing is delayed although the control code requires emergency processing.

  The present invention has been made in view of the above problems, and an object of the present invention is to enable processing of control codes that require emergency processing by the processing means even before a series of DMA transfers are completed. It is to provide a processing device.

  In order to solve the above problem, an information processing apparatus according to claim 1 includes a receiving unit that receives a transmission code from a host device, a storage unit that stores the transmission code, and a storage unit that stores the transmission code. In an information processing apparatus having DMA control means for executing DMA transfer and processing means for executing processing based on a control code included in the transmission code, the DMA control means performs the DMA transfer during the DMA transfer by the receiving means. The received transmission code is compared with a control code stored in advance in the control code storage means, and the processing means adds the received transmission code to the received transmission code when the comparison result of the DMA control means matches. The process based on this is performed.

  The information processing apparatus according to claim 2 is the information processing apparatus according to claim 1, wherein the DMA control means matches the result of comparison between the received transmission code and a control code stored in advance in the control code storage means. In this case, an interrupt signal is transmitted to the processing means.

  The information processing apparatus according to claim 3 is characterized in that, in the information processing apparatus according to claim 2, the DMA control means stops DMA transfer together with transmission of an interrupt signal to the processing means.

  An information processing apparatus according to a fourth aspect is the information processing apparatus according to the first, second, or third aspect, wherein the control code storage means is capable of storing a plurality of control codes.

In the information processing apparatus according to the first aspect, the DMA control means compares the transmission code received by the receiving means during the DMA transfer with the control code stored in advance in the control code storage means. If they match as a result of the comparison, the processing means executes processing of the received transmission code.
The control code storage means stores a control code that requires emergency processing, such as a cancel code that instructs the processing means to delete the transmission code stored in the storage means.

  3. The information processing apparatus according to claim 2, wherein the comparison result between the received transmission code and the control code stored in the control code storage means coincides, that is, control that requires emergency processing during DMA transfer. When the code is received, the DMA control means transmits an interrupt signal to the processing means.

  According to another aspect of the present invention, when a control code requiring emergency processing is received during DMA transfer, an interrupt signal is transmitted to the processing means, and the DMA transfer that has been executed is stopped. As a result, the state of the information processing apparatus is changed to a state in which the control code can be processed by the processing means.

  Here, a plurality of control codes may be stored in the control code storage means as described in claim 4.

  According to the information processing apparatus according to any one of claims 1 to 4, the received transmission code is compared with a control code stored in advance in the control code storage unit. Since the code processing is executed, the control code that requires emergency processing is stored in the control code storage means, so that the transmission code that requires emergency processing by the processing means even before a series of DMA transfers is completed. It has an excellent effect that it can be processed.

  In particular, according to the information processing apparatus of the second aspect, when a control code requiring emergency processing is received during DMA transfer, the DMA control means transmits an interrupt signal to the processing means. Compared with the case of recognizing that a control code requiring emergency processing has been received, the processing means has an excellent effect of reducing the burden for recognizing reception of a control code requiring emergency processing.

  In particular, according to the information processing apparatus of claim 3, since the DMA transfer that has been executed is stopped, the state of the information processing apparatus does not cause any trouble in the processing of the control code that requires emergency processing by the processing means. It has the outstanding effect that it can be in a state.

  In particular, according to the information processing apparatus of the fourth aspect, since a plurality of control codes can be stored in the control code storage means, there are a plurality of control codes that require emergency processing to be processed during DMA transfer. Moreover, it has the outstanding effect that the process by the process means is attained.

Embodiments to which the present invention is applied will be described below.
FIG. 1 is a configuration block diagram of a laser printer (hereinafter simply referred to as “printer”) as an image forming apparatus according to the present embodiment.

  A printer 1 in this embodiment includes a printer controller (hereinafter abbreviated as controller) 2 that is an information processing apparatus that controls the entire printer, and a printer engine 3 (hereinafter referred to as image forming means) that actually forms an image on recording paper. And a panel device 4 for giving various instructions from the user to the controller 2 and displaying various states of the printer 1.

  The controller 2 includes a CPU (central processing unit) 18 as a processing means, a RAM 7, a font ROM 8, a program ROM 9, a nonvolatile RAM 10, an IC card 11, an engine interface 12, a panel interface 13, a disk interface 14, a host interface 15, and the like. These are connected by a system bus 19.

The CPU 18 executes various controls performed in the controller 2 by executing a predetermined program based on a signal from the panel device 4 and a control code in a transmission code transmitted from the host device 6.
A program used for control by the CPU 18 is stored in a program ROM 9 which is a read-only memory.

  As described above, the controller 2 includes memories such as the font ROM 8, the RAM 7, and the nonvolatile RAM 10 in addition to the program ROM 9. Like the program ROM 9, the font ROM 8 is a read-only memory, and stores pattern data of various fonts such as characters used for image formation. On the other hand, the RAM 7 and the non-volatile RAM 10 are random access memories, and can both write and read data.

  The RAM 7 is used as a working memory when the CPU 20 executes various controls. The RAM 7 is an input buffer for temporarily storing control codes sent from the host device 6 via the host interface 15 and image data as data codes, and a bitmap based on the image data. When image data of a format is created, it is used as a frame buffer for storing it. Accordingly, the RAM 7 functions as a storage unit that stores transmission codes such as image data transmitted from the host device 6.

  The nonvolatile RAM 10 is a battery backup memory that can retain stored data even when the power is turned off. The nonvolatile RAM 10 stores the mode instruction content from the panel device 4 and environment setting data of the printer 1.

  An interface is required for the controller 2 to communicate with a device provided outside the controller 2. For this purpose, the engine interface 12, the panel interface 13, the disk interface 14, and the host interface 15 are provided in the controller 2.

The engine interface 12 is an interface for communicating commands, statuses, image data, and the like between the controller 2 and the engine 3.
The panel interface 13 is an interface for communicating commands and statuses between the controller 6 and the operation panel 17. The disk interface 14 is an interface for performing communication between the controller 6 and the disk device 18.
The host interface 15 is an interface for the controller 6 to communicate with the host device 6. This will be described in detail later.

  An optional board 16 can be attached to the controller 2. The option board 16 is provided with various interfaces such as Centronics, RS232C, Apple talk, and network. By attaching the option board 16 to the controller 2, the controller 2 can be connected to a computer or the like corresponding to each interface. It becomes possible to communicate with the external device 17.

  In the printer 1 having the above-described configuration, general operations until image data as a data code or a command as a control code is sent from the host device 6 and an image forming operation based on the image data or the like is performed. Is as follows.

  Image data and commands received by the host interface 15 are temporarily stored in an input buffer formed on the RAM 7 by DMA transfer as will be described later. The CPU 18 extracts the command and the like from the input buffer and analyzes them according to the emulation program stored in the program ROM 9. As a result of this analysis, each command is converted into an intermediate code called a display list.

The intermediate code is stored in a page buffer formed on the RAM 7. When the intermediate code for one page is thus stored in the page buffer, the CPU 18 executes the system program stored in the program ROM 9 and bitmaps the intermediate code into the frame buffer formed on the RAM 7. Expand as formatted image data. When the development is completed, the controller 2 sends a paper feed means selection command and an image formation command to the engine 3 via the engine interface 12 and sends the image data developed in the frame buffer.
Upon receiving the paper feed means selection command and the image formation command, the engine 3 executes the paper feed instructed by the paper feed selection command and forms an image based on the image data.

An image forming operation in the engine 3 will be described with reference to FIG. FIG. 2 is an explanatory diagram for explaining the operation of the engine 3.
Image data from the controller 2 is input to the optical writing unit 22. The optical writing unit 22 is provided with a laser diode (not shown) that blinks based on the image data and generates a light beam.

  The light beam from the laser diode is deflected by a polygon mirror 22a that rotates at high speed, and is uniformly charged by a charging device 27 via an optical system 22b such as an fθ lens and a mirror 22c, and clockwise in the figure. Guided to the rotating photoreceptor 23. The light beam forms a latent image corresponding to the image data on the surface of the photoconductor 23. This latent image is visualized by toner development by the developing device 24 and becomes a toner image.

  On the other hand, recording is performed from either the first paper feed unit 20 or the second paper feed unit 21 instructed by the paper feed selection command from the controller 2 while taking the timing of the formation of the latent image and the toner image. Paper is fed. The recording sheet is temporarily stopped by abutting the leading end of the recording roller pair 26 against the registration roller pair 26, and then transported again in time with the toner image on the surface of the photoconductor 23.

  A transfer device 25 is provided on the downstream side of the registration roller pair 26 in the conveying direction and facing the photoconductor 23. The transfer device 25 causes the toner image on the photoconductor 23 to be transferred to the recording paper. Is transcribed. The recording sheet on which the transfer has been completed is conveyed by a conveying belt 29 to a fixing device 30 including a heating roller and a pressure roller, and a toner image on the recording sheet is fixed on the recording sheet. The recording sheet on which fixing has been completed is transported by the transport roller pair 31 and discharged onto the paper discharge tray 32. After the transfer by the transfer device 25 is completed, the surface of the photoconductor 23 is cleaned by collecting residual toner by the cleaning device 28. Thus, image formation for one page on the recording paper is completed.

Next, in the present embodiment, the operation of the controller 2 when receiving a transmission code sent from the host device 6 and performing DMA transfer to the RAM 7 as the storage means will be described.
The transmission code from the host device 6 is received by the host interface 15. Therefore, the host interface 15 functions as a receiving unit for receiving the transmission code. In the present embodiment, a Centronics interface that is a parallel interface is used for the host interface 15. The host device 6 and the controller 2 can communicate with each other in a compatible mode of the Centronics interface.

  The compatible mode is a concept that is opposed to the ECP (Extended Capabilities Port: hereinafter referred to as ECP) mode in the Centronics interface standardized by IEEE, which is an international standard, and is unidirectional from the host device 6 to the controller 2. Communication can be performed.

  The host interface 15 is composed of an ASIC (Aplication Specific Integrated Circuit). It functions as a DMA control means for controlling the DMA transfer. A schematic configuration of the host interface 15 is shown in FIG.

  As shown in FIG. 3, the host interface 15 serves as a reception buffer 40 for receiving a transmission code from the host device 6 and a control code storage means for storing a plurality of special codes in order to achieve a function as a DMA control means. A special code register group 44, a determination unit 41 that compares the transmission code received in the reception buffer 40 with the special code stored in the special code register group 44, and determines whether or not the two codes match. Address storage register 42 for storing the transfer start address of RAM 7 as a transfer destination by DMA transfer, and address for sequentially issuing the address of RAM 7 as the DMA transfer destination by sequentially incrementing the address stored in the address storage register 42 It is configured by a counter 43 and the like.

The DMA transfer operation according to this embodiment controlled by the host interface 15 having such a configuration will be described with reference to the flowchart of FIG.
First, a predetermined special code is stored in the special code register group 44 including a plurality of registers under the control of the CPU 18 (step 101).

  In the present embodiment, the special code stored in the special code register group 45 is a control code that needs to be urgently processed by the CPU 18 as processing means even during DMA transfer. One of the control codes that require such emergency processing is a “cancel command”. This is a control code for causing the CPU 18 to execute processing for deleting the transmission code stored in the RAM 7. This cancel command is listed as one of special codes that require emergency processing for the following reason.

  That is, when the cancel code is included in a series of transmission codes that are targets of DMA transfer, the transferred transmission code should be erased by executing the cancel command. Therefore, even if such a cancel command is transmitted, there is no significance of continuing the DMA transfer, and if it is intentionally continued, the time until the DMA transfer is completed is wasted.

  Next, the CPU 18 sets the transmission code from the host device 6 to DMA transfer to the RAM 7 and stores the DMA transfer start address of the RAM 7 in the address storage register 42 (step 102). In this state, when transmission of a transmission code is started from the host device 6 (step 103), the transmission code is sequentially stored and received in the reception buffer (step 104). When the transmission code is stored in the reception buffer, the determination unit 41 compares the received transmission code with the special code stored in each register of the special code register group, and the transmission code is It is determined whether or not it matches the special code stored in the special code register (step 105).

  If the result of determination in step 105 is that the received transmission code does not match any special code in the special code register group, the received transmission code is DMA transferred to the RAM 7 and stored (step 106). The address of the RAM 7 which is a transfer destination in such DMA transfer is issued by the address counter 43 by sequentially incrementing the DMA transfer start address stored in the address storage register 42 every time the transmission code is transferred. .

  On the other hand, if the result of determination in step 105 is that the received transmission code matches any special code in the special code register group, the DMA transfer being executed is stopped (step 107).

  By stopping the DMA transfer, the right to use the system bus 19 shared by the host interface 15, RAM 7, CPU 18, etc. is released from the host interface 15 which is a DMA control means. As a result, the host interface and the CPU 18 are prevented from competing for bus access, and the control code processing by the CPU 18 is prevented from being troubled, so that the controller 2 can be processed by the CPU 18. To do.

  When the DMA is stopped in this way, the host interface 15 serving as the DMA control means transmits an interrupt signal to the CPU 18 to notify that the received transmission code is a special code (step 108). Thus, the CPU 18 can detect that the received transmission code is a control code that requires emergency processing.

  In the present embodiment, the case where the communication between the host device 6 and the controller 2 is performed in the compatible mode of the Centronics interface has been described as an example. However, the present invention is not limited to this, and for example, a SCSI (Small Computer System Interface) ), RS232C interface, Centronics interface EPC mode, and the like.

1 is a schematic block diagram of a printer. Explanatory drawing for demonstrating the image formation operation | movement in an engine. The schematic block diagram of a host interface. 6 is a flowchart showing an operation of DMA transfer according to the embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Printer 2 Printer controller 3 Printer engine 4 Panel apparatus 5 Disk apparatus 6 Host apparatus 7 RAM
8 Font ROM
9 Program ROM
10 Nonvolatile RAM
11 IC card 12 Engine interface 13 Panel interface 14 Disk interface 15 Host interface 16 Option board 17 External device 18 CPU
19 System bus 20 First paper feeding unit 21 Second paper feeding unit 22 Optical writing unit 23 Photoconductor 24 Developing device 25 Transfer device 26 Registration roller pair 27 Charging device 28 Cleaning device 29 Conveying belt 30 Fixing device 31 Conveying roller pair 40 Reception Buffer 41 Determination unit 42 Address storage register 43 Address counter 44 Special code register group

Claims (4)

Receiving means for receiving a transmission code from the host device;
Storage means for storing the transmission code;
DMA control means for performing DMA transfer from the receiving means to the storage means;
Processing means for executing processing based on a control code included in the transmission code;
In an information processing apparatus having
The DMA control means compares the transmission code received during the DMA transfer by the receiving means with the control code stored in advance in the control code storage means,
The information processing apparatus, wherein the processing means executes processing based on the received transmission code when the comparison result of the DMA control means matches. The information processing apparatus according to claim 1,
The DMA control means includes:
An information processing apparatus, wherein an interrupt signal is transmitted to the processing means when a result of comparison between the received transmission code and a control code stored in advance in the control code storage means matches. The information processing apparatus according to claim 2.
The information processing apparatus, wherein the DMA control means stops DMA transfer together with transmission of an interrupt signal to the processing means. The information processing apparatus according to claim 1, 2, or 3,
The information processing apparatus, wherein the control code storage means is capable of storing a plurality of control codes.

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