JP2005149069A - Electronic device and method for controlling input/output - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make a setting function of a general-purpose input/output port switchable, and to enable the input/output port to be used flexibly and effectively. <P>SOLUTION: The inputting/outputting direction or the control timing (inputting/outputting timing) of each input/output port is set by a control signal. Based on the setting, the input and the output of a signal using each input/output port is executed, thereby enabling the input/output port to be used flexibly and effectively even after a CPU, a DSP or the like using an input/output port is mounted to an electronic device (after firmware is stored in a ROM). <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an electronic device having an input / output port and an input / output control method using the input / output port.

Japanese Patent No. 2866659

For example, in various electronic devices such as AV (Audio-Visual) devices such as video cameras, home appliances, computers and other information devices, general-purpose input / output ports (I / O ports) are used by internal CPUs and DSPs. Signal input / output.
For example, in the above-mentioned Patent Document 1, in a remote control device related to a VTR or a television receiver, a receiving circuit unit generates, for example, a channel control signal based on a signal received from a remote control transmitter and outputs it from an output port to the VTR or TV. The structure which transmits to the main body of is shown.

By the way, in the conventional port control system, for example, functions assigned to a plurality of ports prepared as a general-purpose I / O port for a CPU, a DSP, etc. are determined in a unified manner according to specifications determined at the design stage. For example, each port is fixedly set in the input / output direction and what kind of signal input / output is used. Then, when the firmware is introduced into the CPU or the like and converted into the ROM, the function of each port determined in the design stage is fixed.
Under such circumstances, the function of the I / O port cannot be switched as necessary on an actual electronic device. This is a factor that limits the effective use of the I / O port.

  Therefore, an object of the present invention is to make it possible to change a setting function for a general-purpose input / output port and to use the input / output port flexibly and effectively.

The electronic apparatus according to the present invention includes an input / output unit having one or more input / output ports for inputting / outputting a signal, and an input / output direction of the signal at least in each of the input / output ports based on an input control signal. Or setting means for setting the input / output timing of the signal at each of the input / output ports, and port input / output control means for executing the input / output of the signal at the input / output port based on the setting by the setting means. With.
The control signal selectively designates one of a plurality of preset patterns as at least an input / output direction in all input / output ports or an input / output timing pattern in all input / output ports. Signal.
The input / output timing pattern of all the input / output ports is a pattern for specifying the port for inputting / outputting the signal for each specific period.

The input / output control method of the present invention is an input / output control method using one or more input / output ports for inputting / outputting signals, and based on a control signal for the input / output port, at least the input / output port A setting step for setting an input / output direction of the signal at each or an input / output timing of the signal at each of the input / output ports, and input / output of the signal at the input / output port based on the setting. A port input / output control step.
The control signal is a signal that selectively designates one of a plurality of preset patterns as the input / output direction in all input / output ports or the input / output timing pattern in all input / output ports. To do.

  In the present invention, functions realized by using the input / output ports, that is, different settings of signal input / output and input / output timing settings for each port can be flexibly performed.

According to the present invention, the input / output direction of each input / output port or the input / output timing of each input / output port is set by the control signal, and the input / output of the signal using each input / output port is executed based on the setting. Therefore, even after a CPU, DSP, or the like that uses the input / output port is mounted on an electronic device (after the firmware is converted to ROM), the input / output port can be used flexibly and effectively used. it can.
For example, it is assumed that the functions required for the input / output ports differ between the normal operation of the electronic device and the adjustment (for example, the adjustment of the internal circuit system or the measurement of the signal for firmware processing). For example, the setting of the input / output direction is switched, and a certain port can be used as an input port during normal operation and as an output port during adjustment.
Further, for example, if the control timing (input / output timing) for the input / output processing of each port can be changed in response to a request related to the operation of the electronic device, it is possible to realize the matching of the operation of the entire device and the reduction of the processing load. By these things, the utilization efficiency of each port can be improved. Depending on this, it is possible to reduce the number of ports required for designing, diversify the processing using the ports, increase the efficiency of control of the entire device, reduce the processing load, and the like.
In particular, to expand port usability by switching port function settings, for example, a general-purpose port is used without requiring a dedicated environment (measurement system) for firmware processing measurement (timing and processing time measurement, etc.) Thus, a useful example is assumed, such as enabling simple measurement.

  The control signal is a signal that selectively designates one of a plurality of preset patterns as the input / output direction and the input / output timing pattern of the port. This means that the control signal only needs to be input as a signal for designating the pattern, and this simplifies the method of generating the control signal or simplifies the pattern switching control. This is preferable in that the processing load of the firmware using the input / output port is not increased.

Hereinafter, a video camera apparatus will be exemplified as an embodiment of the electronic apparatus of the present invention, and an I / O port control method by the firmware control unit will be described in the following order.
1. 1. Configuration of main part of video camera apparatus 2. Configuration example for variable setting of port function 3. Input / output pattern of port 4. Port control timing pattern Control action

1. Configuration of main parts of video camera device

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention when a video camera device is taken as an example.
The lens system 1 indicates a mechanism for introducing incident light of a subject to be imaged into the CCD sensor unit 1 and includes a condenser lens, a zoom lens, an iris adjustment shutter mechanism, and the like.
Incident light is guided to the CCD sensor unit 1 through the lens system 1. The CCD sensor unit 1 is composed of pixel sensors formed by a CCD image pickup device arranged in an array, and outputs an image pickup signal for each pixel corresponding to incident light.
An imaging signal from the CCD sensor unit 1 is supplied to the CDS / AGC unit 3. The CDS / AGC unit 3 executes CDS (correlated double sampling) processing and AGC (auto gain control) processing. That is, the imaging signal from the CCD sensor unit 1 performs sampling of the black level and the data level in the imaging signal as CDS processing, and uses the difference value as a data level signal based on the black level. The gain of the signal is adjusted by AGC processing. The gain adjustment is performed not only for the purpose of adjusting to a predetermined level as an imaging signal to be provided to the A / D converter 4 in the subsequent stage, but also for the purpose of level adjustment for exposure adjustment in accordance with subject brightness.
The imaging signal processed by the CDS / AGC unit 3 is converted into digital image data by the A / D converter 4 and supplied to a signal processing unit formed by, for example, a DSP (Digital Signal Processor). The signal processing unit 5 performs auto white balance processing (AWB processing), clamp processing, γ correction processing, and the like on the image signal.
The imaging data processed by the signal processing unit 5 is subjected to necessary processing according to the output mode by the image output processing unit 6 and output. For example, if video is output to a display unit provided in a video camera device or a connected external display device, signal conversion processing for image display, RGB processing, display drive processing, and the like are performed. For example, when outputting to a recording unit that performs recording on a recording medium, compression processing, encoding processing to a recording format, and the like are performed.

  The timing generator 7 generates a transfer clock for the CCD sensor unit 1 and a sample timing signal for the CDS / AGC unit 3. Signal transfer in the CCD sensor unit 1 and processing in the CDS / AGC unit 3 are executed in accordance with signals from the timing generator 3.

The firmware control unit 20 executes control of the signal processing system in the video camera device, control of the I / O port unit 8 as a general-purpose input / output port, and the like. Specifically, a program as firmware designed for the video camera device is written in the CPU or DSP, and a control operation corresponding to the program is executed.
In this example, as a control function by firmware, an additional function control unit 30 and a camera control unit 40 are provided in the firmware control unit 20 as shown in the figure.
The camera control unit 40 performs control related to imaging signal processing in the video camera device, for example, gain adjustment processing for automatic exposure adjustment for the CDS / AGC unit 3, auto white balance processing in the signal processing unit 5, clamping processing, Control about γ correction processing and the like is performed.
The additional function control unit 30 performs control related to additionally prepared functions with respect to the control function of the camera control unit 40. For example, control of the I / O port 8 and external communication control.

The I / O port unit 8 is assumed to be provided with 16 general-purpose ports P1 to P16 in this example. Of course, the number of ports is just an example.
Each port P1 to P16 of the I / O port 8 is subjected to input / output processing of the given function by the additional function control unit 30, and the function can be switched as will be described later.

The controller 10 is configured by, for example, a microcomputer as a control unit that controls the entire video camera device. The controller 7 transmits and receives control signals and data to other circuit systems via the external interface 9. For example, an instruction is issued to the firmware control unit 20 via the external interface 9 to execute a control function by the firmware. Further, operation control of each unit (not shown) such as an image display system and an image recording / reproducing system is performed.
The operation unit 11 is shown as a part where the user performs various operations. Various operations executed by the operation unit 11 are supplied to the controller 10 as operation information, and the controller 10 performs necessary control according to the operation information.

2. Configuration example for port function variable setting

In the configuration of such a video camera device, depending on the additional function control unit 30 in the firmware control unit 20 of this example, the functions of the ports P1 to P16 of the I / O port unit 8 can be variably changed as described above. It can be set. 2 to 4 show three examples of configuration examples for making the input / output port function variable.

In FIG. 2, in the additional function control unit 30, as a functional configuration for setting and controlling the I / O port unit 8, which is realized by, for example, a software module and hardware, An output direction setting register 37, a port control timing setting unit 34, and a port input / output control unit 38 are shown.
The port input / output control unit 38 performs input / output control of predetermined signals to the ports P1 to P16 of the I / O port unit 8. That is, it is a function for causing the I / O port unit 8 to execute input / output of signals based on functions actually defined by the firmware.

On the other hand, in order to flexibly realize the functions of the ports P1 to P16, a port input / output direction setting unit 31 and a port control timing setting unit 34 are provided to set the input / output direction and control timing. Note that the “control timing” means the timing for performing input or output execution control for the ports P1 to P16, that is, the “input / output timing” of the port.
The port input / output direction setting unit 31 includes a port control parameter determination unit 32 and an input / output pattern setting unit 33. The port control parameter determination unit 32 determines the value of the input port control parameter PP and determines whether or not an input / output pattern change is instructed. When an instruction to change the input / output pattern of the port is given, the information is supplied to the input / output pattern setting unit 33. The input / output pattern setting unit 33 sets an input / output pattern according to the value of the port control parameter PP determined by the port control parameter determination unit 32 and stores the information in the input / output direction setting register 37.

The port input / output pattern is determined in advance as one pattern for each of the ports P1 to P16 to be used as an input port or an output port. Various examples of input / output patterns will be described later with reference to FIG. 5, but will be described briefly here. For example, FIG. 5A shows an example in which patterns A and B are preset as input / output patterns. In the figure, the upward arrow indicates input, and the downward arrow indicates output, but the input / output pattern A uses all ports P1 to P16 as input ports, and the input / output pattern B indicates all ports P1 to P16. The pattern is used as an output port.
For example, such input / output patterns are determined in advance by the input / output pattern setting unit 33 as several types of patterns (two types in the case of FIG. 5A). Then, depending on the port control parameter PP, one of the patterns A and B is instructed. If the instruction is the input / output pattern A, the input / output pattern setting unit 33 performs the input / output pattern shown in FIG. The pattern A, that is, information on all ports as input ports is stored in the input / output direction setting register 37. If the instruction by the port control parameter PP is the input / output pattern B, the input / output pattern setting unit 33 uses the input / output direction setting register as the input / output pattern B in FIG. 37 is stored.

  The port input / output control unit 38 that actually controls the I / O port unit 8 controls each of the ports P1 to P16 in accordance with the input / output setting stored in the input / output direction setting register 37. That is, when the information of the input / output pattern A in FIG. 5A is stored in the input / output direction setting register 37, the port input / output control unit 38 determines that all the ports are input ports, and assigns them to the ports P1 to P16. On the other hand, sampling control of the input signal Si is performed. When the information of the input / output pattern B in FIG. 5B is stored in the input / output direction setting register 37, the port input / output control unit 38 determines that all the ports are output ports, and assigns them to the ports P1 to P16. On the other hand, output control of a required signal So is performed according to the firmware program.

On the other hand, the port control timing setting unit 34 includes a port control parameter determination unit 35 and a control timing pattern setting unit 36. The port control parameter determination unit 35 determines the value of the input port control parameter PP, and determines whether or not an instruction to change the control timing pattern has been issued. When a certain control timing pattern is instructed, the information is supplied to the control timing pattern setting unit 36. The control timing pattern setting unit 36 sets a control timing pattern according to the value of the port control parameter PP determined by the port control parameter determination unit 35, gives the information to the port input / output control unit 38, and performs port input / output control. The control timing (input / output timing) of processing by the unit 38 is set.
An example of the port control timing pattern will be described later with reference to FIGS. 7 to 10. To put it briefly, control (that is, input control or output control) for each of the ports P 1 to P 16 is performed at any timing. It is a pattern to execute.

The additional function control unit 30 is provided with a function related to port control as shown in FIG. 2, whereby the input / output direction and control timing of the ports P1 to P16 can be variably set, and each port P1 to P1 can be set. Control for P16 can be executed.
In the case of the example of FIG. 2, signals indicating the input / output directions and control timing of the ports P1 to P16 are given as the port control parameter PP.
In this case, the controller 10 is configured to generate a port control switching command CM when necessary based on, for example, a user operation from the operation unit 11 or an internal operation program. For example, when the function of each port of the I / O port unit 8 is changed during normal camera operation and adjustment operation, the controller 10 changes the port during normal operation when the normal operation mode is set. A port control switching command CM for switching to a function is generated, and when the adjustment mode is set, a port control switching command CM for switching to a port function during the adjustment operation is generated.

The port control switching command CM is analyzed by the external interface 9 and converted into a port control parameter PP corresponding to the command content. That is, it is converted into a value that designates an input / output pattern or a control timing pattern. Then, it is input to the additional function control unit 30 and is taken in and processed by the port control parameter determination units 32 and 35 as described above.
That is, the configuration of FIG. 2 is a configuration example in which the function of each port of the I / O port unit 8 is switched by a port control switching command CM from the controller 10 in the video camera device.

On the other hand, FIG. 3 shows an example in which the port control parameter PP is input without going through the controller 10 and the external interface 9. In FIG. 3, the configuration in the additional function control unit 30 is the same as that in FIG.
In this case, the port P1 is fixed to the operation information input port from the switch 12 as a specific port in the I / O port unit 8.
The port control parameter determination units 32 and 35 monitor the input value of the port P1 detected by the port input / output control unit 38, that is, the value corresponding to the operation of the switch 12, and the detected value is used as the port control. It is the structure processed as parameter PP.
For example, the port control parameter determination unit 32 determines whether the input / output patterns A and B are instructed according to the input value of the port P 1 and transmits the instruction (that is, the operation of the switch 12) to the input / output pattern setting unit 33. It will be a thing. In this case, since the port P1 is fixed as an input port for the port control parameter PP, a pattern in the input / output direction for the ports P2 to P16 is set.
Similarly, the port control parameter determination unit 35 determines whether the control timing patterns A and B are instructed according to the input value of the port P1, and transmits the instruction to the control timing pattern setting unit 36, thereby controlling the control. Timing pattern change processing is performed.

  According to such a configuration, since the port control can be completed only by the firmware control unit 20, the processing load on the controller 10 and the external interface 9 can be reduced.

In this example, only the port P1 is used to input the port control parameter PP, and this is performed in common for the input / output pattern and control timing pattern change processing. When the input / output pattern is pattern B, the control timing pattern is also pattern B.
When it is desired to variably control the input / output pattern and the control timing pattern, for example, two ports P1 and P2 are used as fixed input ports, and the port control parameter determination unit 32 detects the input value of the port P1, and the port The control parameter determination unit 34 detects the input value of the port P2. That is, the port control parameter PP for switching the input / output pattern is input by the port P1, and the port control parameter PP for switching the control timing pattern is input by the port P2, or two ports P1 and P2 are input. The parameter content may be determined based on the input value.

FIG. 4 is a configuration example in which the methods of FIGS. 2 and 3 are used in combination. That is, in this case, the port P1 is fixed to the input port of the operation information from the switch 12 as a specific port in the I / O port unit 8, and the port control parameter determination unit 32 determines the input value of the port P1, that is, the operation of the switch 12. Monitor the value according to. The port control parameter determination unit 32 determines whether the input / output patterns A and B are instructed according to the input value of the port P 1, and transmits the instruction (that is, the operation of the switch 12) to the input / output pattern setting unit 33. Thus, the pattern in the input / output direction for the ports P2 to P16 is set.
The port control parameter determination unit 35 detects the port control parameter PP supplied from the external interface 9 based on the port control switching command CM from the controller 10. Then, the control timing pattern instructed by the value of the port control parameter PP is determined, and the determination result is transmitted to the control timing pattern setting unit 36, whereby the control timing pattern is changed.

Thus, the setting of the input / output pattern and the setting of the control timing pattern may be instructed by different systems. Of course, contrary to the example of FIG. 4, the input / output pattern may be instructed from the controller 10 side, and the control timing pattern may be instructed by the input value of the port P1.

3. Port input / output pattern

An example of the port input / output pattern to be variably set will be described with reference to FIG.
The input / output pattern is set as an input / output for each of the ports P1 to P16 as described above. For example, as shown in FIGS. An input / output pattern A in which all of P1 to P16 are input and an input / output pattern B in which all of the ports P1 to P16 are output are predetermined. Information on such input / output patterns A and B is determined and set in advance by the input / output pattern setting unit 33. In other words, a necessary input / output pattern may be determined and set according to a request at the time of firmware design.

FIG. 5B illustrates the input / output patterns A and B when the port P1 is fixed to the input as shown in FIG. 3 or FIG. In this case, the input / output pattern A is a pattern in which all ports P2 to P16 are input, and the input / output pattern B is a pattern in which all ports P2 to P16 are output.
FIG. 5C shows a pattern setting example in which input / output switching is performed in some ports. That is, in any of the input / output patterns A and B, the ports P1, P2 and P3 are set as input, and the ports P4 and P5 are set as output, but the ports P6 to P16 are input in the case of the input / output pattern A. In the case of the input / output pattern B, the output is an example.
FIG. 5D shows an example in which three input / output patterns A, B, and C are set to be switchable. Input / output pattern A inputs all ports P1 to P16, input / output pattern B inputs ports P1 to P4 and outputs ports P5 to P16, and input / output pattern C outputs ports P1 to P7 and outputs ports P8 to P8. In this example, P16 is set as an input.

  What functions are given to each port and how the port input / output is switched according to the operation mode is determined at the firmware design stage. Therefore, by determining the input / output directions required for each port according to the firmware design, including switching, and patterning as in the above examples, the actual port input / output switching This can be done simply by specifying.

An example in which the ports P1 to P16 are used by switching input / output patterns is shown in FIG. The setting of the input / output patterns A and B in FIG.
For example, the input / output pattern A is used during normal video camera operation. That is, all ports P1 to P16 are used as input ports. In this case, as shown in FIG. 6A, each of the ports P1 to P16 is used as a switch input (a signal based on a user operation or a signal input from another circuit system). The firmware is designed to detect the input of each signal from the ports P1 to P16 in the normal operation mode. For this reason, the port input / output control unit 38 performs input as control for each port P1 to P16. Signal sampling is performed.
On the other hand, during the adjustment operation, the input / output pattern B is used, and all ports P1 to P16 are used as output ports. In this case, the firmware is designed to output a predetermined signal from each port. Therefore, the port input / output control unit 38 performs port control to output a predetermined signal from a predetermined port according to the firmware program. Will do.

4). Port control timing pattern

Next, a control timing pattern for the ports P1 to P16 will be described. The control timing patterns A, B, and C are exemplified by the patterns of FIGS.

In the camera system, there are processes that must be executed during the vertical synchronization signal period, and the control differs depending on the system. For example, in the case of the video camera apparatus of this example of FIG. 1, the CDS / AGC unit 3 and the signal processing Control for the unit 5, such as arithmetic processing such as AGC control, AE (Auto Exposure), and AWB (Auto White Balance), corresponds to this.
For this reason, in the firmware control unit 20, the camera control unit 40 forms an interface with the CDS / AGC unit 3 and the signal processing unit 5 to constitute a part of the camera system.
Further, the firmware control unit 20 mainly controls external interface control such as external communication control and port control and various additional functions in each camera system by the additional function control unit 30.

Here, if the control by the firmware control unit 20, especially the camera control unit 40, cannot be synchronized with the vertical synchronization signal VD, the camera control of the firmware cannot be synchronized with other control blocks, and the camera control will fail. You must be careful.
For example, the calculation result of camera control such as AE (automatic exposure control) / AWB (auto white balance) needs to be reflected in the AGC processing and the processing in the signal processing unit 5 in the next frame, so one frame (vertical cycle) ) Must complete all processing.

FIG. 7 shows the firmware control timing in such a vertical cycle.
The illustrated camera control indicates control processing that must be executed by the firmware control unit 20 at the vertical synchronization signal timing, such as AWB control and gain control by the camera control unit 40.
On the other hand, the additional function indicates processing executed by the firmware control unit 20 by the additional function control unit 30 and is not necessarily executed within the vertical period, and is based on the type of additional function and firmware design. In this example, port control is performed as additional function control.

In the case of FIG. 7, in the vertical cycle, the firmware control unit 20 first performs camera control by the function of the camera control unit 40, and then performs port control by the additional function control unit 30.
Here, as port control (port input sampling or signal output from the port), the ports P1 to P16 are sequentially executed as shown in the figure. The camera control and the additional function processing for controlling the ports P1 to P16 are executed within one vertical cycle.
In this way, the control timing for sequentially controlling all the ports P1 to P16 as the additional function processing within one vertical cycle is referred to as a control timing pattern A.

By the way, in the case of the control timing pattern A in FIG. 8, the firmware processing is accommodated in the vertical cycle, and the camera control can be executed in synchronization with the vertical synchronization signal VD, so that system failure does not occur. No problem.
However, for example, when processing is newly added as camera control content, or when the processing load of the firmware is maximized due to circumstances such as the operation mode, the processing time is required for port control with such a control timing pattern A. It may also occur when there is not enough.
For example, FIG. 8 shows a case where the processing load of camera control is increased. Then, the processing time as the additional function is compressed, and when the ports P1 to P16 are controlled as the control timing pattern A as shown in the figure, it may be impossible to complete the camera control and the control of the additional function within one vertical cycle. In the case of FIG. 8, the control of the ports P11 to P16 is difficult for the next vertical cycle, and the camera control cannot be started in synchronization with the vertical synchronization signal VD. This will cause the system to break.

Therefore, in this example, a control timing pattern B for ports P1 to P16 is prepared as shown in FIG.
In this case, as the timing for controlling the ports P1 to P16 as additional functions, the control of the ports P1 to P8 and the control of the ports P9 to P16 are sequentially executed for each vertical period. When operating as this control timing pattern B, the port control period in the additional function within one vertical cycle can be shortened. For example, even when the burden of camera control (processing time) is increased, the camera control is performed every time vertical synchronization is performed. It can be started in synchronization with the signal VD.

In this example, a control timing pattern C as shown in FIG. 10 is further prepared.
In the case of the control timing pattern B in FIG. 9, each port is controlled every other vertical period. However, depending on the function given to the port, there may be a port that is preferably input or output controlled every vertical period. For example, in the case of this example, it is assumed that the ports P1 to P4 are to be controlled every vertical period.
Therefore, as shown in FIG. 10, the control of the ports P1 to P4 is executed every time in the additional function within the vertical period. Ports P5 to P16 are assigned to each of the four vertical periods for each of the four ports. That is, in a certain vertical cycle, the ports P1 to P8 are controlled, in the next vertical cycle, the ports P1 to P4 and P9 to 12 are controlled, and in the next vertical cycle, the ports P1 to P4 and P13 to P16 are controlled. I do. Such control is repeated.
This control timing pattern C is a control timing suitable for the case where there is a port to be processed for each vertical cycle, while preventing system breakage as shown in FIG. 8, for example.

In addition, although the example was shown as control timing pattern A, B, and C as mentioned above, this is only an example on description, the number of actual control timing patterns and the setting content of each control timing pattern are port P1. Needless to say, it depends on the function and firmware design given to .about.P16.

5). Control action

As described above, in this example, the input / output pattern for setting the input / output direction and the control timing pattern for setting the control timing are set for the ports P1 to P16 of the I / O port unit 8. For example, FIG. In the configuration shown in FIG. 4, the input / output pattern and the control timing pattern can be selectively switched and set to perform port control.
An example of camera system control by firmware including selection of the input / output pattern and control timing pattern will be described.

FIG. 11 shows a flowchart of camera system control by the firmware control unit 20.
When the process is started, a system initialization process is performed as step F101, and thereafter, the process proceeds from step F102 to the process after F103 every time the vertical synchronization signal VD is detected. That is, as shown in FIGS. 7, 9, and 10, camera control for each vertical period and processing as an additional function are performed.

When the vertical synchronization signal VD is detected, camera control is first performed by the camera control unit 40 in step F103. As described above with reference to FIGS. 7, 9, and 10, the processes for AGC, AWB, AE, and the like are executed in synchronization with the vertical synchronizing signal VD.
In the camera control in step F103, the process is changed according to the input / output pattern set at that time, and a predetermined port may be controlled. However, the process in step F103 is included. Details of this will be described later with reference to FIG.

Subsequent to the camera control, processing of an additional function by the additional function control unit 30 is performed.
In step F104, communication processing with the controller 10 via the external interface 9 is performed. In step F105, as described with reference to FIGS. 2 to 4, it is determined whether or not the port control parameter PP for instructing the change of the control timing pattern has been input by communication from the controller 10.
If there is no instruction to switch the control timing pattern, the process proceeds to step F107, and the process is executed by the port input / output control unit 38 shown in FIG. 2 with the control timing pattern set at that time. For example, if the control timing pattern is A, the process proceeds from step F107 to F108, and the ports P1 to P16 are controlled as shown in FIG.
If the control timing pattern B is set at the time of step F107, the process proceeds from step F107 to F109, and the ports P1 to P16 are controlled in the control timing pattern B as shown in FIG.
Further, if the control timing pattern C is set at the time of step F107, the process proceeds from step F107 to F110, and the ports P1 to P16 are controlled with the control timing pattern C as shown in FIG.
When the port processing with the predetermined control timing pattern is completed, the process returns to step F102 to wait for the next vertical synchronization signal VD.

FIG. 12 shows the processing in the case of the control timing pattern A in step F108. As described with reference to FIG. 7, in this case, the ports P1 to P16 are sequentially controlled. Therefore, as shown in step F108a in FIG. 12, the input or output is sequentially controlled for all the ports P1 to P16.
Assuming that the input / output patterns A and B in FIG. 5A are selected as the input / output patterns, if the input / output pattern A is set at the time of step F108a, the ports P1 to P1 are set in step F108a. Assuming that input control for P16, that is, sampling of the input signal is performed sequentially, and that the input / output pattern B is set at the time of step F108a, output control for each port P1 to P16 is sequentially performed in step F108a. It will be.

FIG. 13 shows the processing in the case of the control timing pattern B in step F109. As described with reference to FIG. 9, in this case, the control of the ports P1 to P8 and the control of the ports P9 to P16 are switched and executed every vertical period. For this reason, as shown in FIG. 13, the process of step F109 first determines the port control sequence in step F109a. The port control sequence is a variable for determining whether the current vertical period is a period for controlling the ports P1 to P8 or a period for controlling the ports P9 to P16.
If the port control sequence is “0”, the process proceeds to step F109b to control the ports P1 to P8. Of course, if the input / output pattern A is at this point, the input control of the ports P1 to P8 is performed, and if the input / output pattern B, the output control of the ports P1 to P8 is performed.
When the port control is finished in step F109b, the port control sequence is set to “1” in step F109c, and the process is finished.

In this case, returning to step F102 in FIG. 11, when step F109 is reached again in the period related to the next vertical synchronization signal VD, the port control sequence is “1” at that time, so that from step F109a in FIG. Proceed to F109d.
In step F109d, the ports P9 to P16 are controlled. Also in this case, the input control of the ports P9 to P16 is performed if the input / output pattern is A at this time, and the output control of the ports P9 to P16 is performed if the input / output pattern is B.
When the port control is finished in step F109d, the port control sequence is set to “0” in step F109e, and the process is finished.
Accordingly, when the process proceeds to step F109 in the next vertical cycle, the process proceeds to step F109b by the determination of the port control sequence in step F109a in FIG.

  The processing of the control timing pattern B in step F109 in FIG. 11 is performed as shown in FIG. 13 above, and as described in FIG. 9, the control of the ports P1 to P8 and the control of the ports P9 to P16 are performed for each vertical period. Are executed in order.

FIG. 14 shows the processing in the case of the control timing pattern C in step F110 in FIG. As described with reference to FIG. 10, in this case, the control of the ports P1 to P8, the control of the ports P1 to P4 and P9 to P12, and the control of the ports P1 to P4 and P13 to P16 are switched every vertical period. Execute.
For this reason, as shown in FIG. 14, in step F110, the port control sequence is first determined in step F110a. The port control sequence in this case is whether the current vertical period is a period for controlling ports P1 to P8, a period for controlling ports P1 to P4 and P9 to P12, or ports P1 to P4. And P13 to P16 are variables for determining whether it is a period for controlling.
If the port control sequence is “0”, the process proceeds to step F110b to control the ports P1 to P8. At this time, if the input / output pattern is A, the input control of the ports P1 to P8 is performed, while if the input / output pattern B, the output control of the ports P1 to P8 is performed.
When the port control is finished in step F110b, the port control sequence is set to “1” in step F110c, and the process is finished.

In this case, returning to step F102 in FIG. 11, when step F110 is reached again during the period of the next vertical synchronizing signal VD, the port control sequence is “1” at that time, so that from step F110a in FIG. Proceed to F110d.
In Step F110d, the ports P1 to P4 and P9 to P12 are controlled. Also in this case, if it is the input / output pattern A at this time, input control of the ports P1 to P4 and P9 to P12 is performed, and if it is the input / output pattern B, output control of the ports P1 to P4 and P9 to P12 is performed.
When the port control is finished in step F110d, the port control sequence is set to “2” in step F110e, and the process is finished.

Then, returning to step F102 in FIG. 11, when step F110 is reached again in the period related to the next vertical synchronizing signal VD, the port control sequence is “2” at that time, and therefore, from step F110a to F110f in FIG. Will go on.
In step F110f, the ports P1 to P4 and P13 to P16 are controlled. Also in this case, if it is the input / output pattern A at this time, input control of the ports P1 to P4 and P13 to P16 is performed, and if it is the input / output pattern B, output control of the ports P1 to P4 and P13 to P16 is performed.
When the port control is finished in step F110f, the port control sequence is set to “2” in step F110g, and the process is finished.
Accordingly, when the process proceeds to step F110 in the next vertical cycle, the process proceeds to step F110b by the determination of the port control sequence in step F110a of FIG.

  The processing of the control timing pattern C in step F110 in FIG. 11 is performed as shown in FIG. 14 above, and as described in FIG. 10, the control for the ports P1 to P4 is performed for each vertical cycle, while the port The control of P5 to P16 is performed by being allocated at a rate of once every three vertical periods.

In the process of FIG. 11, the communication process in step F104 corresponds to an instruction to switch the control timing pattern for the ports P1 to P16.
When the port control parameter PP instructing switching of the control timing pattern is input through the communication in step F104, a new control timing pattern is input to the port input / output by the function of the port control timing setting unit 34 as described in FIG. It is set in the control unit 38.
In this case, the process of FIG. 11 proceeds from step F105 to F106, and the port control sequence is initialized. Here, the port control sequence is initialized in response to the possibility that one of the above-described steps F109 and F110 is executed and the port control sequence is used as the additional function processing at that time. is there.
In this case, in step F107, the process branches according to the new control timing pattern set according to the port control parameter PP, and the process is performed as a process of the control timing pattern newly designated by the port input / output control unit 38. Any one of F108, F109, and F110 is executed.

  Therefore, according to the processing of FIG. 11, the controller 10 sets the control timing patterns for the ports P1 to P16 according to the operation mode as a video camera device, the processing state, the execution state of various functions, the user's operation, and the like. It is possible to perform variable port control and execute appropriate port control by the firmware control unit 20.

In the description of the processing in FIG. 11 so far, the input / output pattern switching instruction has not been described, but in the case of the configuration example in FIG. 2, for example, the communication processing in step F104 in FIG. The port control parameter PP may instruct switching of input / output patterns. 3 and 4, the input value of the port P1 is used as the port control parameter PP, and the input / output pattern is switched. In this case, for example, switching of the input / output pattern is instructed by a value detected by the input check of the port P1 in any of steps F108, F109, and F110.
The processing relating to the switching of the port input / output pattern including these cases is as shown in FIG. Step F201 represents the communication with the external controller 10 or the check of the port P1 performed in the above step of FIG. 11, and when the port control parameter PP of the input / output pattern switching instruction is detected at these timings. The process proceeds from step F202 to F203. In step F203, the input / output pattern for the ports P1 to P16 is selected based on the port control parameter PP and set in the input / output direction setting register 37 by the function of the port input / output direction setting unit 31 described in FIG. Is done. The port input / output control unit 38 that executes the port control in steps F108, F109, and F110 processes each port based on the input / output setting of the input / output direction setting register 37. The control operation for each port is selected according to the output pattern.

By the way, it was previously described that the camera control process may be changed in accordance with the input / output pattern of the port in step F103. This example will be described with reference to FIG.
Here, a function for measuring the processing time of AWB control is given to the firmware.
During normal operation, the input / output pattern A is set by the above processing. That is, the ports P1 to P16 are input ports, and necessary signal inputs are performed respectively. In that case, the process of step F103 of FIG. 11 is performed as follows as the process of FIG.
First, since the input / output pattern A is set, the process advances from step F103a to F103c, and the camera control unit 40 performs arithmetic processing for AWB control on the signal processing unit 5. When the AWB process is completed, the process proceeds to step F103f to execute other necessary processes such as AE control and AGC control. Then, the camera control in step F103 is completed.

  On the other hand, when the mode for adjusting the AWB processing time (adjustment mode) is set, the person who performs the adjustment work or the controller 10 sets the input / output pattern B for the ports P1 to P16. At this time, the firmware of the camera control unit 40 provides a function of, for example, the port P2 as a signal output port for measuring the AWB processing time. The operator who performs the adjustment mode connects the measuring instrument 100 to the port P2 as shown in FIG. Note that the output of the port P2 in the initial state is set to “H”.

16 is performed in step F103 of FIG. 11. By the input / output pattern B, the process proceeds from step F103a to F103b. At this time, an AWB control start trigger (H → L) is output from the port P2. To do.
When the AWB control start trigger is output, calculation processing for AWB control is performed in step F103c. When the arithmetic processing is completed, the process proceeds from step F103d to F103e, and an AWB control end trigger (L → H) is output from the port P2.
Then, the process of step F103f is performed, and one camera control is completed.

In this case, the AWB control start trigger and the AWB control end trigger output from the port P2 in steps F103b and F103e are as shown on the right side of FIG. That is, the time required for AWB control by the camera control unit 40 can be measured by monitoring the signal waveform from the port P2 by the measuring instrument 100 and measuring the time difference between the start / end triggers.
That is, if a program including steps F103a to F103e in FIG. 16 is designed as firmware for AWB control, the time required for AWB control by the firmware can be easily measured by switching input / output patterns. It will be possible.
Conventionally, for various measurements of firmware functions, a dedicated measurement system must be prepared, and the same firmware installed on a video camera device or the like must be installed in the system to perform various measurements and evaluations. However, the above-described processing is performed according to the switching of the input / output pattern, so that the firmware evaluation can be easily performed at the mounting level without using a special system.

In this example, the time required for the AWB control can be measured. However, in other AE control, AGC control, etc., a predetermined signal is output from a predetermined port in advance according to input / output pattern switching. If the firmware is designed in such a way, various measurements and output of evaluation signals can be easily performed.
Also, for example, in the case of trigger output for measuring the time required for control as described above, it is necessary to perform port control exceptionally during camera control in step F103, but in other cases, Signals and parameters for various evaluations related to camera control may be output at the timing of additional function control, that is, at the time of steps F108, F109, and F110 in FIG.

Although the embodiment has been described above, in this example, the input / output pattern and the control timing pattern of each port P1 to P16 in the I / O port unit 8 can be switched, and the port function can be used flexibly and variously. Efficient processing is realized.
For example, when measuring the timing and processing time of firmware, there is no need for a dedicated environment or the like, and the processing time of firmware can be easily measured using a general-purpose port.
In addition, it is possible to construct a port control method that is compatible with the various camera systems that are designed. If external controller communication is used, even if the firmware is stored in ROM, it can be switched to each other if the port control has a predetermined pattern. It is.
Further, in a camera system that executes firmware in synchronization with a vertical drive signal (VD), the processing timing of the firmware can be reduced by varying the control timing pattern according to the situation.

In this example, a variable method of selecting a predetermined pattern as the input / output pattern and the control timing pattern is adopted. However, the input / output direction and the control timing can be individually switched for each port. Is also a matter assumed from the present invention.
Further, as described in the example of the video camera apparatus, it is understood that the present invention can be applied to various AV devices, information devices, home appliances, and other various electronic devices.

1 is a block diagram of a video camera device according to an embodiment of the present invention. It is a block diagram of the structural example of the additional function control part of embodiment. It is a block diagram of the structural example of the additional function control part of embodiment. It is a block diagram of the structural example of the additional function control part of embodiment. It is explanatory drawing of the example of the input-output pattern of embodiment. It is explanatory drawing of the function by switching of the input-output pattern of embodiment. It is explanatory drawing of the control timing pattern A of embodiment. It is explanatory drawing of an example in case a system operation | movement breaks. It is explanatory drawing of the control timing pattern B of embodiment. It is explanatory drawing of the control timing pattern C of embodiment. It is a flowchart of camera system control of an embodiment. It is a flowchart of the process of the control timing pattern A of an embodiment. It is a flowchart of the process of the control timing pattern B of embodiment. It is a flowchart of the process of the control timing pattern C of embodiment. It is a flowchart of the input / output pattern switching process of the embodiment. It is a flowchart of the camera process of embodiment.

Explanation of symbols

  2 CCD sensor unit, 3 CDS / AGC unit, 4 A / D converter, 5 signal processing unit, 8 I / O port unit, 9 external interface, 10 controller, 20 firmware control unit, 30 additional function control unit, 31 Port I / O direction setting unit, 32, 35 Port control parameter determination unit, 33 I / O pattern setting unit, 34 Port control timing setting unit, 36 Control timing pattern setting unit, 37 I / O direction setting register, 38 Port I / O control unit

Claims (5)

Input / output means having one or more input / output ports for inputting / outputting signals;
Based on the input control signal, at least setting means for setting the input / output direction of the signal in each of the input / output ports, or the input / output timing of the signal in each of the input / output ports;
Port input / output control means for executing input / output of the signal at the input / output port based on the setting by the setting means;
An electronic device characterized by comprising:   The control signal is a signal that selectively designates one of a plurality of preset patterns as an input / output direction at all input / output ports or an input / output timing pattern at all input / output ports. The electronic apparatus according to claim 1, wherein:   3. The electronic apparatus according to claim 2, wherein the input / output timing pattern of all the input / output ports is a pattern for specifying a port for inputting / outputting the signal every specific period. An input / output control method using one or more input / output ports for inputting / outputting signals,
Based on a control signal for the input / output port, at least a setting step for setting an input / output direction of the signal in each of the input / output ports or an input / output timing of the signal in each of the input / output ports;
A port input / output control step for performing input / output of the signal at the input / output port based on the setting;
An input / output control method characterized by comprising: The control signal is a signal that selectively designates one of a plurality of preset patterns as the input / output direction in all input / output ports or the input / output timing pattern in all input / output ports. The input / output control method according to claim 4.

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