JP2005102140A - Frequency converter and radio communication device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a frequency converter for performing two times of frequency conversion which is capable of signal transmission having good linearity by suppressing the generation of noises. <P>SOLUTION: The frequency converter 10 applies two times of frequency conversion to a first signal by second and third signals, and two times of frequency conversion to the first signal by third and fourth signals. This frequency converter 10 suppresses deterioration in NF by using a balun 12 and using an amplification circuit 11 of a single input/output configuration. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention generally relates to a frequency converter that performs frequency conversion twice, and more specifically, down-converts an RF (radio frequency) signal to a baseband frequency, and an I signal and a Q that are 90 degrees out of phase. The present invention relates to a frequency converter that outputs a signal. The present invention also relates to a wireless communication device using such a frequency converter.

  FIG. 11 is a block diagram of a terminal device such as a conventional wireless LAN transceiver. Referring to FIG. 11, the wireless LAN transceiver performs frequency conversion on a signal received from an antenna to obtain an intermediate frequency signal, further amplifies the intermediate frequency signal, then demodulates it, and extracts a digital signal. It is. The present invention relates to a frequency converter that performs this frequency conversion.

  Now, as such a frequency converter, a receiving circuit that performs frequency conversion twice is used (for example, see Patent Document 1). FIG. 12 is a circuit diagram of the frequency converter described in Patent Document 1. In FIG.

  As shown in FIG. 12, the frequency converter 100 includes an amplifier circuit 50 that amplifies a first signal (RF (+), RF (−)), and includes a second signal (LO1 (LO1 ( +), A switch circuit 51 that performs the first frequency conversion using LO1 (-)) and a switch that performs the second frequency conversion using the third signals (LO2 (+), LO2 (-)). The circuit 52 and the switch circuit 53 that performs the second frequency conversion using the fourth signal (LO3 (+), LO3 (-)). The first switch circuit 51 performs the first frequency conversion and divides and supplies the current signals to the switch circuits 52 and 53 that perform the second frequency conversion. The switch circuits 52 and 53 perform the second frequency conversion, and output baseband frequency signals on the I side and the Q side. The output signal is converted into a voltage signal by the output load 54 and output.

US Pat. No. 5,448,772

  However, the configuration described in Patent Document 1 has the following problems. That is, in the configuration of Patent Document 1, since the amplifier circuit 50 is configured in a differential manner, the amount of noise generation is doubled compared to a single amplifier circuit. For this reason, suppressing the overall noise figure (NF) using an amplifier circuit that requires a high gain leads to an increase in the current flowing through the frequency converter.

  In addition, since the output signal frequency is in the baseband frequency band, if an optimal amount of current is caused to flow through the switch circuit due to an increase in 1 / f noise, the amount of current flowing through the transistor that is an amplifier circuit is insufficient and the gain is insufficient. , The overall NF increases.

  In addition, in the switch circuits 51 to 53 and the amplifier circuit 50, there are optimum values for obtaining the gain, NF, and linearity performance in the currents to be respectively passed. FIG. 13A is a graph showing the relationship between the current (Isw) flowing through the switch circuits 51 to 53 and NF, and the relationship between the current (Isw) and the input third-order intercept (IIP3) serving as a linearity index. . FIG. 13B is a graph showing the relationship between the current (Igm) flowing through the amplifier circuit 50 and NF, and the relationship between the current (Igm) and the input third-order intercept (IIP3) serving as a linearity index. As shown in FIG. 13, the optimum current value in the amplifier circuit 50 and the optimum current value in the switch circuits 51 to 53 are different. In the configuration of Patent Document 1 described above, since the sum of the currents flowing through the switch circuits 52 and 53 flows through the switch circuit 51, an optimal current value does not flow through the switch circuit 51.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an improved frequency converter that can suppress generation of noise.

  Another object of the present invention is to provide a frequency converter that enables signal transmission with good linearity.

  Still another object of the present invention is to provide an improved frequency converter that can reduce current consumption.

  Still another object of the present invention is to provide a wireless communication device using such a frequency converter.

  In order to solve the above-described problem, the frequency converter according to the present invention performs frequency conversion twice on the first signal by the second and third signals, and converts the first signal to the second signal. A frequency converter that performs frequency conversion twice using the fourth two signals, and the first switch circuit that performs the first frequency conversion by mixing the first signal and the second signal. A second switch circuit that performs a second frequency conversion by mixing the output signal of the first switch circuit and the third signal, the output signal of the first switch circuit, and the fourth signal And a third switch circuit for performing second frequency conversion, and a balun (a balanced-to-unbalanced (balun) transformer) having an input terminal and an output terminal. The output terminal of the balun is connected to an input terminal of the first switch circuit, and the first signal is introduced from the input terminal of the balun.

  It is preferable that the first signal is transmitted as a current signal to the first switch circuit. The balun is preferably composed of two inductors alternately formed on a semiconductor substrate, one of which constitutes an input-side inductor and the other inductor constitutes an output-side inductor.

  With the above configuration, the same current signal and direct current (hereinafter referred to as DC current) can be supplied to the first switch circuit at both differential output ends of the balun.

  Further, a connection point may be provided at the center of the output side inductor of the balun, and a current source for supplying current may be connected to the connection point, or the connection point may be grounded.

  With the above configuration, the same current signal and DC current can be supplied to the first switch circuit at both differential output terminals of the balun.

  Further, a current source for supplying current may be connected to a connection point between both output terminals of the balun and an input terminal of the first switch circuit.

  Also in the above configuration, the same current signal and DC current can be supplied to the first switch circuit at both differential output terminals of the balun.

  Further, it is preferable that a low noise amplifier having a single input / output configuration having an input terminal and an output terminal is further provided, and the output terminal of the low noise amplifier is connected to the input side inductor of the balun. In this case, the first signal is introduced from the input terminal of the low noise amplifier.

  With the above configuration, since the amplifier circuit has a single input / output configuration, the amount of noise generation and current consumption can be reduced as compared to the differential configuration.

  Further, the connection point between the first switch circuit and the second switch circuit and the connection point between the first switch circuit and the third switch circuit are respectively connected to the first switch circuit. More preferably, a current source for supplying current is connected. These current sources are preferably composed of transistors.

  With the configuration described above, the amount of current flowing through the second and third switches is set to an optimum current value for the NF and linearity characteristics of the second and third switches, and the amount of current flowing through the first switch. Can be adjusted to an optimum current value for the NF and linearity of the first switch.

  If the frequency handled by the first switch circuit is different from the frequency handled by the second and third switch circuits, the transistor size that is optimal for NF and linearity is selected for the transistors constituting these switch circuits. Is preferred.

  The frequency converter according to another aspect of the present invention performs frequency conversion twice on the first signal with the second and third signals, and converts the first signal to the second and second signals. 4 is a frequency converter that performs frequency conversion twice with the two signals of 4, a first switch circuit that performs the first frequency conversion by mixing the first signal and the second signal; A second switch circuit that performs a second frequency conversion by mixing the output signal of the first switch circuit and the third signal, and a mixture of the output signal of the first switch circuit and the fourth signal And a third switch circuit for performing the second frequency conversion. A differential transistor serving as an amplifier circuit for amplifying the first signal and a current source for supplying current are connected to the input terminal of the first switch circuit.

  In this case, the current source is preferably composed of a transistor. More preferably, bias voltage applying means for applying a bias voltage is provided at the base of a transistor constituting the current source so that the bias voltage can be adjusted. The current source may be constituted by a tank circuit including an inductor and a capacitor.

  With the above configuration, the current flowing through the first switch circuit can be set to an optimal current value that can suppress the amount of noise generation.

  A wireless communication device according to still another aspect of the present invention includes a frequency converter having the characteristics described above.

  According to the present invention, by using a balun, a transistor serving as an amplifier circuit can be configured as a single transistor, so that the amount of noise generation is halved compared to a differential amplifier circuit. For this reason, overall NF can be suppressed.

  In addition, since an optimum amount of current in terms of NF and linearity can be supplied to the switch circuit and the transistor that is an amplifier circuit, the performance of the entire circuit can be adjusted.

  Also, in each switch circuit, an optimum amount of current can be passed in terms of NF and linearity, so that the performance of the entire circuit can be optimally adjusted.

  FIG. 1 is a block diagram of a terminal device of a wireless LAN transceiver using a frequency converter according to the present invention. Referring to FIG. 1, a first signal (for example, 2.4 GHz) received from an antenna 31 is amplified by a low noise amplifier (LNA) 32 and then transmitted to the first switch circuit 1 by, for example, a current signal. .

  In order to perform the first frequency conversion, the first switch circuit 1 mixes the first signal and the second signal (for example, 3.2 GHz) and converts them to an 800 MHz signal that is the difference between them. Thereafter, this signal is divided and supplied to the second switch circuit 2 and the third switch circuit 3.

  Each of the second and third switch circuits 2 and 3 mixes a signal of, for example, 800 MHz with the transmitted signal to perform the second frequency conversion, and the difference is the I side near 0 Hz. Alternatively, a Q-side baseband frequency signal is generated. The generated I-side and Q-side baseband frequency signals pass through the low-pass filter 33, are then amplified by the variable gain amplifier (VGA) 34, pass through the AD converter (AD / C) 35, and the demodulator 36. And extracted as a digital signal.

  Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings.

  FIG. 2 is a circuit diagram illustrating the configuration of the frequency converter according to the first embodiment.

  The frequency converter 10 mixes the first switch circuit 1 that performs the first frequency conversion by mixing the first signal and the second signal, and mixes the output signal of the first switch circuit 1 and the third signal. A second switch circuit 2 for performing a second frequency conversion, a third switch circuit 3 for performing a second frequency conversion by mixing the output signal of the first switch circuit 1 and the fourth signal, A balun 12 and an amplifier circuit 11 are included.

  The output terminal 16a of the balun 12 is connected to the input terminal of the first switch circuit 1, and the first signal RF is transmitted from the balun 12 to the first switch circuit 1 as a current signal. An equivalent circuit diagram of the balun 12 is shown in FIG. The balun 12 may be constituted by a discrete component balun provided outside the semiconductor substrate, but in this embodiment, the same semiconductor as the semiconductor substrate on which the switch circuits 1, 2, and 3 as frequency converters are formed. An explanation will be given by taking a balun formed on a substrate as an example.

  The balun 12 is formed by alternately forming two inductors (input-side inductor 15 and output-side inductor 16) on a semiconductor substrate and winding them in a square shape. The balun 12 is not limited to a square shape, and may be wound in a polygonal shape such as a pentagon, a hexagon, a heptagon, an octagon, or a circle. The balun 12 is formed of an upper metal layer, a lower metal layer, and a connecting layer connecting them, which are formed on a semiconductor substrate. The upper metal layer and the lower metal layer are separated from each other by an interlayer insulating film (not shown), and the upper metal layer and the lower metal layer are electrically connected by a connection layer embedded in a through hole formed in the interlayer insulating film. Connected.

  The balun 12 and the first switch circuit 1 are connected by connecting the input terminal of the first switch circuit 1 and the output terminal 16a of the balun 12 as shown in the figure. Then, a connection point is provided at the central portion 13 of the output-side inductor 16 of the balun 12, and this connection point is grounded. One end of the input-side inductor 15 of the balun 12 is grounded (actually connected to a power supply voltage) so that an AC signal is supplied to the first switch circuit 1, and the other end of the amplifier circuit 11 having a single input / output configuration. Connected to output.

  By making the amplifier circuit 11 have a single input / output configuration, the amount of noise generation is halved compared to a differential amplifier circuit. For this reason, overall NF can be suppressed. Further, since the amplifier circuit 11 has a single input / output configuration, current consumption can be reduced as compared with a differential configuration. Further, with the above configuration, the same current signal and DC current can be supplied to the first switch circuit 1 at both the differential output terminals 16 a and 16 a of the balun 12.

  The amplifier circuit 11 may have any configuration as long as it has a single input / output configuration. Here, a case where the amplifier circuit 11 is configured by a grounded emitter NPN transistor and an RF signal is input to the base is illustrated.

  Here, in the first embodiment, the first signal is a high-frequency signal (hereinafter, the first signal is referred to as a first signal RF), and the second signal is a first local signal from a local oscillator or the like. (Hereinafter, the second signal is referred to as a second signal LO1), and the third signal is a second local signal from a local oscillator or the like (hereinafter, the third signal is referred to as a third signal LO2). The fourth signal is a third local signal (hereinafter, the fourth signal is referred to as a fourth signal LO3) from a local oscillator or the like.

  The second switch circuit 2 outputs an I signal, and the third switch circuit 3 outputs a Q signal. This will be described later.

  Each of the first to third switch circuits 1 to 3 is a switch circuit having a double-balanced input / output configuration, and is composed of first and second bipolar transistors M1 and M2 (NPN) having emitters connected in common. A differential pair, and a transistor differential pair including third and fourth bipolar transistors M3 and M4 (NPN) having emitters connected in common. The connection point of the emitter of the first transistor M1 and the emitter of the second transistor M2 constitutes one input terminal P1 of the differential input terminal, and the emitter of the third transistor M3 and the emitter of the fourth transistor M4. The other connection terminal constitutes the other input terminal P2 of the differential input terminals. If the switch circuits 1, 2, and 3 are configured differentially, the linearity and stability are improved.

  The collector of the first bipolar transistor M1 and the collector of the third bipolar transistor M3 are connected in common, and this connection point constitutes one output terminal P3 of the differential output terminal, and the second bipolar transistor The collector of M2 and the collector of the fourth bipolar transistor M4 are connected in common, and this connection point constitutes the other output terminal P4 of the differential output terminals.

  In the first switch circuit 1, the first local signal LO1 (+) of the positive phase from the local oscillator (corresponding to the second signal) is applied to the bases of the second and third transistors M2 and M3, A negative-phase first local signal LO1 (−) (corresponding to a second signal) is applied to the bases of the first and fourth transistors M1 and M4. The frequency of the first local signal LO1 is N / M times the frequency of the first signal RF (N and M are positive integers). As a result, the first switch circuit 1 is configured such that the sum or difference between the second signal LO1 that is N / M times the frequency of the first signal RF (N and M are positive integers) and the first signal RF. The intermediate frequency IF signal is output with the frequency component of. The output terminal P3 of the first switch circuit 1 is connected to the input terminals P1 of the second and third switch circuits 2 and 3, and the output terminal P4 of the first switch circuit 1 is connected to the second and third switch terminals 1. The switch circuits 2 and 3 are connected to the input terminals P2.

  A positive-phase local signal LO2 (+) (corresponding to the third signal) from the local oscillator is applied to the bases of the second and third transistors M2 and M3 in the second switch circuit 2, and the first and second transistors The negative phase local signal LO2 (−) (corresponding to the third signal) is applied to the bases of the four transistors M1 and M4. Further, the positive phase local signal LO3 (+) (corresponding to the fourth signal) from the local oscillator is applied to the bases of the second and third transistors M2 and M3 in the third switch circuit 3, and the first switch The negative phase local signal LO3 (−) (corresponding to the fourth signal) is applied to the bases of the fourth transistors M1 and M4.

  The local signals LO2 and LO3 have the same frequency, and are set to any one of the frequencies | M ± N | / M times the frequency of the first signal RF. Further, the local signal LO2 and the local signal LO3 are 90 degrees out of phase. For example, if the phase of the local signal LO2 (+) is 0 ° and the phase of the local signal LO2 (−) is 180 °, the phase of the local signal LO3 (+) is 90 ° and the phase of the local signal LO3 (−) is 270 °.

With this configuration, referring to FIG. 4, the second switch circuit 2 converts the frequency component of the sum or difference of the local signal LO2 and the intermediate frequency signal IF into a baseband frequency, and outputs the I-side signal output ( I, I _B ). Further, since the switch circuit 3 is supplied with a local signal LO3 having the same frequency as the signal frequency supplied to the switch circuit 2 and having a phase different by 90 degrees, the switch circuit 3 is configured to output the I-side signal output ( A signal output (Q, Q _B ) of the baseband frequency on the Q side, which is 90 degrees out of phase with I, I _B ), is performed.

  Returning to FIG. 2, an output load 4 is connected to each of the output terminals of the switch circuit 2 and the switch circuit 3, and the output signal is converted into a voltage signal and output. Here, the output load 4 includes a resistor, an inductor, and the like. A buffer amplifier that performs current-voltage conversion may be connected to each of the output terminals of the switch circuit 2 and the switch circuit 3 via a current source.

  In addition, since the frequency handled by the first switch circuit 1 and the frequency handled by the second and third switch circuits 2 and 3 are different, the transistor size that is optimal for NF and linearity is set in the transistors constituting these switch circuits. It is preferable to choose. That is, if the frequency is different, the transistor size also has an appropriate value. Therefore, the size of the transistor constituting the first switch circuit 1 and the size of the transistor constituting the second or third switch circuit 2 or 3 are different. Preferably.

  FIG. 5 is a circuit diagram of a frequency converter according to the second embodiment. The same parts as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated.

  In the frequency converter according to the second embodiment, a connection point is provided at the central portion 13 of the output-side inductor 16 of the balun 12, and a current source 14 including a transistor (NPN) is connected to the connection point. A bias voltage Vb3 is applied to the base of the transistor constituting the current source 14, and this bias voltage Vb3 can be adjusted by a bias circuit (not shown). A stable current can be supplied to the switch circuits 1 to 3 by connecting the current source 14 to the central portion 13 of the output-side inductor 16.

  FIG. 6 is a circuit diagram of a frequency converter according to the third embodiment. The same parts as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated.

  In the frequency converter according to the third embodiment, current sources 17 and 18 each including a transistor (NPN) are independently connected to the input terminal of the first switch circuit 1 and the output terminal of the balun 12. Yes. A bias voltage Vb4 is applied to the bases of the transistors constituting the current sources 17 and 18, and this bias voltage Vb4 can be adjusted by a bias circuit (not shown). By providing the current sources 17 and 18, a stable current can be supplied to the switch circuits 1 to 3. Further, in this case, since it is not necessary to provide a connection point at the center of the output-side inductor 16 of the balun 12, no ground line is required at the center of the inductor constituting the balun 12.

  In the first, second, and third embodiments, although the first frequency conversion and the second frequency conversion are both down-conversion, the first frequency conversion is up-converted, and the second frequency conversion is You may make it down-convert to a baseband frequency.

  Further, if the second switch circuit 2 for I signal and the third switch circuit 3 for Q signal are separately configured in this way, the layout of circuit elements is not symmetrical and the process varies. However, local signals are less likely to leak to the input side (for example, H. Sjoland et al: “A Marged CMOS LNA and Mixer for a WCDMA Receiver” IEEE J. Solid-State Circuits, Vol. 38, No.6 (2003), pp.1045-1050 has the same information).

  Further, since the first signal RF and the second to fourth signals LO1 to LO3 have different frequencies, the second to fourth signals do not leak to the first signal terminal side. Since this can reduce the occurrence of DC offset, it is possible to suppress degradation of reception sensitivity.

  FIG. 7 is a circuit diagram of a frequency converter according to the fourth embodiment. The same parts as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated.

  Referring to FIG. 7, current sources 21 and 22 are connected to a connection point between the first switch circuit 1 and the second switch circuits 2 to 3, respectively. The current sources 21 and 22 are composed of transistors (NPN). A bias voltage Vb1 is applied to the bases of the transistors constituting the current sources 21 and 22, and the bias voltage Vb1 can be adjusted by a bias circuit (not shown).

  As is clear from FIG. 7, the amount of current flowing through the first switch circuit 1 is the sum of the amount of current flowing through the second switch circuit 2 and the amount of current flowing through the third switch circuit 3. Therefore, even if the current amount is optimal for the switch circuits 2 and 3, the sum of the current amounts is not necessarily the optimal current amount for the first switch circuit 1. Similarly, even if the amount of current flowing through the switch circuit 1 is optimum, the amplifier circuit 11 is not necessarily the optimum amount of current. Therefore, by adjusting the bias voltage Vb1, it is possible to allow an appropriate current to flow through the switch circuits 1 to 3 and the amplifier circuit 11. As a result, the switch performance and the signal amplification performance can be brought into an optimum state.

  As shown in FIG. 13A, the currents Isw and IIP3 (third order distortion) flowing through the switch circuit, and the currents Isw and NF (noise index) flowing through the switch circuit have the relationships shown in the figure. . A larger value of IIP3 is preferred, and a smaller value of NF is preferred. Therefore, an optimal current amount can be obtained by adjusting the current amount so as to balance the two. This relationship is the same in the amplifier circuit 11 shown in FIG. 13B, and an optimum current amount can be obtained by adjusting the current amount so as to balance IIP3 and NF.

  FIG. 8 is a circuit diagram illustrating a configuration of a frequency converter according to the fifth embodiment. The same parts as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated. In the frequency converter according to the fifth embodiment, the differential amplifier circuit 11 configured by a transistor (NPN) is connected to the input terminal of the first switch circuit 1 via the capacitor 27. Differential RF is input to the amplifier circuit 11. A current source 25 is connected to a connection point between the input terminal of the first switch circuit 1 and the capacitor 27. In this embodiment, the current source 25 is constituted by a tank circuit including an inductor 26 and a capacitor 29 so as to resonate at an RF frequency, and the center of the inductor 26 is grounded. As a result, the potential difference between the emitter and collector of the transistors constituting the switch circuits 1, 2 and 3 increases, so that the switch performance can be improved. In addition, the current flowing through the first switch circuit 1 can be set to an optimum current value that can suppress the amount of noise generation.

  The current source 25 may be formed of a tank circuit including two inductors and two capacitors as shown in FIG. Further, the current source 25 may be constituted by a transistor. In any case, the switch performance and the signal amplification performance can be optimized by setting the currents flowing through the amplifier circuit 11 and the switch circuits 1, 2, and 3 to appropriate current values.

  FIG. 10 is a circuit diagram illustrating a configuration of a frequency converter according to the sixth embodiment. The same parts as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated.

  In the frequency converter according to the sixth embodiment, the differential amplifier circuit 11 is connected to the input terminal of the first switch circuit 1. The differential amplifier circuit 11 is composed of a transistor (NPN) and receives differential RF. The connection point between the output terminal of the first switch circuit 1 and the input terminal of the second switch circuit 2 and the connection point between the output terminal of the first switch circuit 1 and the input terminal of the third switch circuit 3 , Current sources 21 and 22 each composed of a transistor (NPN) are connected. A bias voltage Vb1 is applied to the bases of the transistors constituting the current sources 21 and 22, and the bias voltage Vb1 can be adjusted by a bias circuit (not shown). Thereby, by adjusting the bias voltage Vb1, it is possible to allow an appropriate current to flow through the first to third switch circuits 1-3.

  Furthermore, current sources 23 and 24 each composed of a transistor (PNP) are connected to a connection point between the input terminal of the first switch circuit 1 and the output terminal of the amplifier circuit 11. By adjusting the bias voltage Vb2, it is possible to allow an appropriate current to flow through the amplifier circuit 11. Thereby, the switch performance and the signal amplification performance can be brought into an optimum state.

  In the above embodiment, an example in which each element of the IC chip is realized mainly by a bipolar transistor has been described. However, the present invention is not particularly limited to a bipolar transistor, and is realized by another type of transistor such as a MOS transistor. You may make it do.

  In the first embodiment, the case where the first signal is transmitted to the first switch circuit using the balun as the current signal is illustrated. However, the present invention is not limited to this, and the first switch You may comprise so that a 1st signal may be transmitted to a circuit with a voltage signal using a balun.

  Furthermore, in the above embodiment, the case where the frequency converter according to the present invention is applied to the wireless LAN transceiver is illustrated, but the present invention is not limited to this, and all wireless communication using a wide range of radio waves such as mobile phones. Can be applied to devices.

  The present invention can also be applied to a phase compensator or the like that generates a local signal by multiplying an output signal by two reference signals.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention is a frequency converter that down-converts an RF signal to a baseband frequency and outputs an I signal and a Q signal having a phase difference of 90 degrees, and is used in a receiving circuit of a terminal device such as a wireless LAN transceiver.

The block diagram of the terminal device of the wireless LAN transceiver using the frequency converter which concerns on this invention 1 is a circuit diagram illustrating a configuration of a frequency converter according to a first embodiment. Equivalent circuit diagram of balun Waveform diagram of output signal on I side and Q side Circuit diagram of frequency converter according to embodiment 2 Circuit diagram of frequency converter according to embodiment 3 Circuit diagram of frequency converter according to Embodiment 4 Circuit diagram showing configuration of frequency converter according to embodiment 5 Circuit diagram showing another configuration example of current source Circuit diagram showing configuration of frequency converter according to embodiment 6 Block diagram of a terminal device such as a conventional wireless LAN transceiver Circuit diagram of conventional frequency converter (A) The figure which shows the relationship between current value (Isw) which flows into a switch circuit, and NF and IIP3 (B) The figure which shows the relationship between the current value (Igm) which flows into an amplifier circuit, and NF and IIP3

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st switch circuit 2 2nd switch circuit 3 3rd switch circuit 4 Output load 10 Frequency converter 11 Amplifying circuit 12 Balun 13 Center part of output side inductor 15 Input side inductor 16 Output side inductor

Claims (18)

The frequency conversion of the first signal is performed twice with the second and third signals, and the frequency conversion of the first signal is performed twice with the second and fourth signals. A frequency converter to perform,
A first switch circuit that mixes the first signal and the second signal to perform a first frequency conversion;
A second switch circuit that performs a second frequency conversion by mixing the output signal of the first switch circuit and the third signal;
A third switch circuit for performing a second frequency conversion by mixing the output signal of the first switch circuit and the fourth signal;
A balun having an input terminal and an output terminal;
An output terminal of the balun is connected to an input terminal of the first switch circuit;
A frequency converter into which the first signal is introduced from an input terminal of the balun. The frequency converter according to claim 1, wherein
A frequency converter for transmitting the first signal as a current signal to the first switch circuit. The frequency converter according to claim 1 or 2,
The balun is composed of two inductors alternately formed on a semiconductor substrate, one of which constitutes an input-side inductor and the other inductor constitutes an output-side inductor. The frequency converter according to claim 3,
A frequency converter, wherein a connection point is provided at the center of the output-side inductor of the balun, and a current source for supplying current is connected to the connection point. The frequency converter according to claim 3,
A frequency converter, wherein a connection point is provided at the center of the output-side inductor of the balun, and the connection point is grounded. The frequency converter according to claim 3,
A frequency converter, wherein a current source for supplying current is connected to a connection point between the output terminal of the balun and an input terminal of the first switch circuit. In the frequency converter in any one of Claims 3-6,
A low noise amplifier having a single input / output configuration having an input terminal and an output terminal;
The output terminal of the low noise amplifier is connected to the input side inductor of the balun,
The frequency converter, wherein the first signal is introduced from an input terminal of the low noise amplifier. In the frequency converter in any one of Claims 1-7,
A current source for supplying current is connected to a connection point between the first switch circuit and the second switch circuit and a connection point between the first switch circuit and the third switch circuit, respectively. A frequency converter characterized in that The frequency converter according to claim 8, wherein
The frequency converter characterized in that the current source comprises a transistor. The frequency converter according to claim 9, wherein
A frequency converter characterized in that a bias voltage applying means for applying a bias voltage is provided to a base of the transistor constituting the current source so that the bias voltage can be adjusted. In the frequency converter in any one of Claims 1-10,
The frequency converter according to claim 1, wherein the transistors constituting the first switch circuit and the transistors constituting the second and third switch circuits have different sizes. The frequency conversion of the first signal is performed twice with the second and third signals, and the frequency conversion of the first signal is performed twice with the second and fourth signals. A frequency converter to perform,
A first switch circuit that mixes the first signal and the second signal to perform a first frequency conversion;
A second switch circuit that performs a second frequency conversion by mixing the output signal of the first switch circuit and the third signal;
A third switch circuit that performs a second frequency conversion by mixing the output signal of the first switch circuit and the fourth signal;
A frequency converter in which a differential transistor serving as an amplifier circuit for amplifying the first signal and a current source for supplying current are connected to an input terminal of the first switch circuit. The frequency converter according to claim 12,
The frequency converter characterized in that the current source comprises a transistor. The frequency converter according to claim 13,
A frequency converter comprising a bias voltage applying means for applying a bias voltage to a base of the transistor constituting the current source so that the bias voltage can be adjusted. The frequency converter according to claim 12,
The frequency converter, wherein the current source is a tank circuit including an inductor and a capacitor. In the frequency converter in any one of Claims 12-15,
A current source for supplying current is connected to a connection point between the first switch circuit and the second switch circuit and a connection point between the first switch circuit and the third switch circuit, respectively. A frequency converter characterized in that The frequency converter according to any one of claims 12 to 16,
The frequency converter characterized in that the transistors constituting the first switch circuit and the second and / or third switch circuit have different sizes.   A wireless communication device comprising the frequency converter according to claim 1.

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