JP2005094248A - Laser controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize safely the switching off of luminescence of a laser diode so that other device or other channel may not be affected when a fault occurs in an operating means, such as a CPU, etc., during the operation of the laser diode. <P>SOLUTION: A laser controller includes the CPU 1 for calculating a laser control value for designating an operation control of an LD 3 to control the LD 3 by using the laser control value sequentially calculated by the CPU 1. The laser controller further includes a memory 6b for storing the present laser control value, and a fault processing unit 5 for processing so as not to update the laser control value stored in the memory 6b when the fault occurs in the CPU 1. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a laser control device capable of safely turning off light emission of a laser diode so that other devices are not affected when a fault occurs in a calculation means such as a CPU during the operation of the laser diode. is there.

  Conventionally, a general communication laser diode has been subjected to feedback control by monitoring temperature and output. On the other hand, with the recent specialization and subdivision of the laser application range, it is required to increase the accuracy of this feedback control. In order to increase this accuracy, control is often performed by performing digital computation instead of analog computation.

JP 2000-277845 A

  By the way, laser diodes used for communications need to withstand decades of use, but digital components that perform digital operations are generally more likely to malfunction and have a higher failure rate than analog components. Have. However, failures of digital parts are often temporary, and can often be recovered by resetting by remote control, etc. Except for this temporary suspension, it is possible to perform high-precision laser control using digital parts. it can.

  However, due to recent demands for higher speeds and larger capacities, WDM communication systems have been multiplexed, and the adjacent wavelength interval has been shortened. The laser diode of the transmitter used in this multiplexed WDM communication system When this reset is performed, there is a problem in that it affects channels of other oscillation wavelengths.

  For example, in a conventional wavelength system with 100 GHz spacing, the filter bandwidth is about 110 pm. It is desired that the wavelength drift of the laser at the time of transmission is suppressed to at least ± 40 pm or less including aging degradation. Furthermore, in recent years, there is a tendency that the wavelength interval is narrowed to 50 GHz and 25 GHz intervals, and it is desired to suppress the wavelength drift during transmission to a small range accordingly. Therefore, in the case of the laser diode having the wavelength dependency of the output at the time of start-up or extinguishing as shown in FIG. There is a problem that the light is turned off while interfering with other oscillating wavelengths, and interference occurs between other channels. Even if temperature control is performed, the laser diode start-up or extinguishing process is completed within the temperature control control interval, so channel interference during start-up and extinction is inevitable.

  For example, when the CPU latches and enters an infinite loop, the watchdog timer overflows and the CPU enters an initialization routine to set a target value such as an output to the laser diode to 0. Then, this setting instruction is output to the laser diode side, and as a result, the laser diode is turned off.

  In addition, the above-described reset takes a certain time until the laser diode is finally turned off by setting and instructing the target value, and the laser diode is in an unstable state within, for example, the temperature. There is a problem that light is emitted and an unintended wavelength output may be performed.

  The present invention has been made in view of the above, and in the event that a failure occurs in a calculation means such as a CPU during the operation of the laser diode, the laser diode is designed so as not to affect other devices and other channels. An object of the present invention is to provide a laser control device capable of safely turning off light emission.

  In order to solve the above-described problems and achieve the object, the present invention has calculation means for calculating a laser control value for instructing operation control of the laser diode, and the laser control value sequentially calculated by the calculation means is obtained. A laser control device that controls the laser diode using a memory that stores the current laser control value, and a process that does not update the laser control value stored in the memory when an abnormality occurs in the arithmetic means; And an abnormality processing means for performing the above.

  Further, the present invention is a laser control device that has a calculation means for calculating a laser control value for instructing operation control of a laser diode, and controls the laser diode using a laser control value sequentially calculated by the calculation means. A memory for storing the current laser control value; a save memory for storing a laser control value before the current laser control value as a save laser control value; And an abnormality processing means for performing processing using the laser control value stored in the evacuation memory.

  Further, the present invention is a laser control device that has a calculation means for calculating a laser control value for instructing operation control of a laser diode, and controls the laser diode using a laser control value sequentially calculated by the calculation means. A memory for storing the current laser control value, a save memory for storing a laser control value before the current laser control value as a save laser control value, and a laser control value stored in the memory And control means for outputting the laser control value stored in the save memory to the laser diode when the laser control values stored in the save memory are substantially the same. And.

  Further, according to the present invention, in the above invention, the abnormality processing means monitors the occurrence of abnormality in the arithmetic means, and when the abnormality is detected, notifies the master apparatus that controls the system including each laser diode of the occurrence of abnormality. The laser diode is turned off when an instruction to turn off the laser diode is received from the master device.

  Further, the present invention is characterized in that, in the above invention, the abnormality processing means is provided in the arithmetic means.

  In the invention described above, the abnormality processing means is provided in a master device that controls a system including each laser diode.

  Further, the present invention is characterized in that, in the above invention, the control means is provided in a digital-analog converter for converting a laser control value of a digital value output from the arithmetic means into an analog value.

  The present invention further includes a memory unit having the memory and / or the save memory and a spare input / output port allowing access to the outside, wherein the memory unit includes the spare input / output port. The spare I / O port is directly connected to the master device via a port, and the spare I / O port is valid from the detection of the abnormality by the abnormality processing means in the master device to the cancellation of the abnormality.

  According to the present invention, since reliable light emission can be continued without stopping the laser diode, and the light emission of the laser diode can be safely turned off, the other channels are not affected, and the laser diode accompanying the occurrence of a failure The stop time can be shortened, and communication can be maintained as much as possible.

  Embodiments of a laser control apparatus according to the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a diagram showing a partial configuration of a laser system including a laser control apparatus according to Embodiment 1 of the present invention. In FIG. 1, this laser system is provided in a transmitter of a WDM communication system, and includes a plurality of LD modules 11 and a master device 21 that supervises them. Another device that is supervised by the master device 21 of the laser system is, for example, a modulation device that modulates light of a predetermined wavelength (channel wavelength) output from the LD module 11, and this modulation device is provided for each channel wavelength. . The wavelength filter band in this WDM communication system is 110 pm, and high-density multiplexing is performed.

  The LD module includes a CPU 1 that controls the module 11 and a laser diode (LD) 3, and also converts a digital signal output from the CPU 1 into an analog signal, converts the analog signal into an LD 3, and outputs the converted signal to the LD 3. 2 and an analog-digital converter (ADC) 4 that converts an analog signal from the LD 3 into a digital signal and outputs the digital signal to the CPU 1. The CPU 1 includes an abnormality processing unit 5 that performs processing for recovering, for example, a failure in the CPU 1 itself. The DAC 2 includes a memory 6b and a memory control unit 6a that controls writing and reading with respect to the memory 6b.

  The CPU 1 outputs a target value such as a control temperature and control power to the DAC based on state information from the LD 3 input via the ADC 4, for example, temperature information and power information, and performs wavelength control of the LD 3. The LD 3 includes a Peltier cooler that performs temperature control (not shown) and an electric circuit that controls the injection current. That is, the CPU calculates the control temperature and control power to acquire temperature information and power information and oscillate the desired wavelength, and outputs the calculation result to the DAC 2 as a target value. Further, the CPU 1 receives an instruction from the master device 21 and performs control thereof, and notifies the master device 21 of the state of the LD module 11 and the like. The DAC 2 stores the above-described target value in the memory 6b, reads the digital signal of the target value via the memory control unit 6a, converts it into an analog signal, and outputs it to the LD 3.

  Here, with reference to the flowchart shown in FIG. 2, an abnormality processing procedure when an abnormality occurs in the CPU 1 will be described. First, the CPU 1 determines whether or not an abnormality has occurred in its own CPU 1 (step S101). The presence / absence of this abnormality is determined, for example, as the occurrence of an abnormality when the watchdog timer in the CPU 1 is reset. This abnormality is not caused by hardware destruction in the CPU 1 but is recovered by reset. If no abnormality occurs (step S101, NO), the above-described abnormality occurrence determination is repeated.

  On the other hand, when an abnormality has occurred (step S101, YES), a target value return process of the memory 6b is performed (step S102). For example, the abnormality processing unit 5 of the CPU 1 instructs the LD to continuously output the target value already held in the memory 6b when an abnormality occurs. That is, the abnormality processing unit 5 gives an instruction not to store the target value in the memory 6b, that is, an instruction not to update to the memory control unit 6a even if the target value calculated after the abnormality occurs by the CPU 1 is output to the DAC 2 side. Do it. As a result, the DAC 2 reads the previous target value stored in the memory 6b at every predetermined timing, and outputs this target value to the LD as an analog signal. As a result, the target value calculated by the CPU 1 in the abnormal state is not output to the LD 3, so that an unintended output is not output from the LD 3.

  Here, when this abnormality occurs, the CPU 1 resets the watchdog timer, so that the target value is set to the initial value by this reset. For example, since the target value is set to 0, if the target value generated after reset is used, the controlled wavelength will be greatly shifted. As a result, the wavelength output from the LD interferes with the wavelength output from another LD module that outputs normal operation. However, in the first embodiment, since the previous target value at the normal time is used, other output wavelengths are not affected. This is based on the fact that the target value for controlling LD3 usually does not vary greatly.

  Thereafter, the abnormality processing unit 5 notifies the master device 21 that an abnormality has occurred (step S103). Accordingly, the target value 6b before the occurrence of the abnormality is fixedly used from the occurrence of the abnormality to this time, and the LD 3 maintains the light emission operation.

  Thereafter, the abnormality processing unit 5 determines whether or not a command for turning off or a return command has been received from the master device 21 (step S104). When these commands are received (step S104, YES), it is further determined whether or not the received command is a turn-off command for the LD 3 (step S105). If the command is an extinguishing command (step S105, YES), the abnormality processing unit 5 performs an end process to turn off the LD 3 (step S106). Thus, for the first time, the LD 3 stops emitting light and is turned off. Here, the fact that the turn-off command 21 is transmitted from the master device 21 means that, for example, the modulation device that modulates the laser light output from the LD module 11 is turned off and the other adjacent wavelengths are not affected. It means that processing is finished. This is because the master device 21 comprehensively controls other LD modules and modulation devices.

  On the other hand, if it is a return command (step S105, NO), the process proceeds to step S108 without performing the termination process for turning off the LD in step S106, and the initialization process is executed. This is because the modulation device is already turned off, and unintended light emission from the LD 3 does not affect other adjacent channels. The determination as to the turn-off command or the return command is made by the master device 21, and this determination is selected according to the content of the abnormality notified from the abnormality processing unit 5 and the state of another LD module or modulation device.

  Thereafter, it is determined whether or not the CPU 1 has recovered, that is, whether or not the failure has been eliminated (step S107). If the CPU 1 has recovered (step S107, YES), initialization processing for the LD 3 is executed (step S108), and thereafter Then, main processing including target value storage for the memory 6b is started (step S109), and this processing is terminated.

  In the above-described process, the initialization process S108 is performed. However, the present invention is not limited to this, and the initialization process may be deleted. In this case, the CPU 1 sucks up the target value stored in the memory 6b and immediately executes target value calculation control using this target value. According to this, the time until the LD3 reaches the target value is shortened, and the rapid start-up control of the LD3 can be performed.

  In the first embodiment described above, when the abnormality processing unit 5 detects the occurrence of an abnormality, the instruction not to update the target value of the memory 6b is given. However, the present invention is not limited to this, and the CPU 1 stores it in the memory 6b. It is also possible to read the target value and output the target value to the DAC 2. That is, the DAC 2 does not perform update suppression processing, but the CPU 1 repeatedly reuses the same target value.

  Further, as shown in the configuration of the DAC 2 shown in FIG. 3, a memory 6c is further provided. The memory control unit 6a stores the target value newly calculated by the CPU 1 in the memory 6c. In the normal state, the read control unit 12a The new target value is read from the stored memory 6c and the contents are shifted and stored in the memory 6b. However, when an abnormality occurs, the target value is read only from the memory 6b and the shift process is not performed. It may be.

  In the above-described embodiment, the previous target value is used under the instruction from the CPU 1, but the DAC 2 itself detects the occurrence of abnormality autonomously and suppresses the update. Also good. In this case, the abnormality processing unit 5 only needs to notify the master device 21 of the occurrence of the abnormality. For example, a comparison unit 16a is provided as shown in FIG. 4, and the comparison unit 16a compares whether or not the current target value stored in the memory 6b matches the new target value stored in the memory 6c. When the comparison result matches, the memory control unit 6a performs update control to store the new target value stored in the memory 6c in the memory 6b. When the comparison result does not match, the memory control unit 6a performs a new control stored in the memory 6c. The update control is performed so that the target value is not stored in the memory 6b, and the previous target value stored in the memory 6b is used. It should be noted that whether or not they coincide may be substantially the same.

  Further, not only the update control by the memory control unit 6a but also a comparison unit 2b is provided in the read control unit 12a as shown in FIG. 5, and the read control unit 12a stores the target value newly calculated by the CPU 1 in the memory 6c. When the target values of the memories 6b and 6c match, the new target values are read from the stored memory 6c, the contents are shifted and stored in the memory 6b by the memory control unit 6a, and the target values do not match The read control unit 12a reads the target value only from the memory 6b, and the memory control unit 6a does not perform the shift process.

  In the above-described embodiment, when an abnormality occurs, the previous target value is used. However, the present invention is not limited to this, and any target value in a normal state may be used as long as it is a target value before the abnormality occurs. For example, the target value used twice before the occurrence of the abnormality may be used.

  In the above-described embodiment, the memories 6b and 6c are provided in the DAC 2. However, the present invention is not limited to this, and the memories 6b and 6c may be provided in a distributed manner in the CPU 1 or the master device 21.

(Embodiment 2)
Next, a second embodiment of the present invention will be described. In the first embodiment described above, the abnormality processing unit 5 is provided in the CPU 1. However, in this second embodiment, the abnormality processing unit is provided in the master device, and an abnormality such as an LD turn-off process from the master device side. The process is executed.

  FIG. 6 is a diagram showing a partial configuration of a laser system including a laser control apparatus according to Embodiment 2 of the present invention. In FIG. 6, the configuration of the abnormality processing unit 5 shown in the first embodiment is deleted in the CPU 1, and the abnormality processing unit 7 is provided in the master device 22 corresponding to the master device 21. Other configurations are the same as those of the first embodiment, and the same reference numerals are given to the same components.

  In the first embodiment, the CPU 1 itself detects the failure of the CPU 1, but in this second embodiment, the abnormality processing 7 of the master device 22 monitors the abnormality, and based on this monitoring result, the implementation is performed. An abnormality process similar to that in the first mode is performed. Here, the master device 22 periodically communicates with the CPU 1 and determines that a failure has occurred in the CPU 1 when the information from the CPU 1 cannot be received.

  Here, the abnormality processing procedure by the abnormality processing unit 7 will be described with reference to the flowchart shown in FIG. In FIG. 7, the abnormality processing unit 7 determines whether or not an abnormality has occurred in the CPU 1 based on the communication state from the CPU 1 (step S201). When it is determined that an abnormality has occurred (step S201, YES), a target value return process in the memory 6b is performed (step S202), as in the first embodiment. As a result, the LD maintains the state immediately before the failure occurs. However, this target value return processing is performed via the CPU 1.

  Thereafter, it is determined whether or not the LD3 extinguishing process is executed (step S203). If the instruction is to perform the extinguishing process (step S203, YES), an end process for turning off the LD 3 is performed (step S204). If it is not an instruction to turn off the light (step S203, NO), the process proceeds to step S205. Thereafter, it is determined whether or not the LD control by the CPU 1 is restored (step S205). When not returning, it transfers to step S203 and repeats the process mentioned above.

  On the other hand, if the instruction is a return instruction (step S205, YES), the LD control initialization process is executed (step S206), and then the main process including the target value storage for the memory 6b is started (step S207). This process ends.

  In the second embodiment, the master device 22 detects the failure state of each LD module 12 by monitoring the communication state with the LD module 12, and if a failure occurs, the abnormality processing unit 7 stores the contents stored in the memory 6b. Is performed forcibly setting the target value to the target value before the failure occurs, and further, the LD extinguishing process is executed in a safe state. In this case, since the master device 22 itself controls not only the LD modules 12 but also the entire laser system such as a modulation device (not shown), the processing by the abnormality processing unit 7 can be performed quickly and reliably.

(Embodiment 3)
Next, a third embodiment of the present invention will be described. In both of the first and second embodiments described above, the CPU 1 in which a failure has occurred is used. However, in this third embodiment, the target value return processing of the memory 6b is directly performed using the external access signal line. I have to.

  FIG. 8 is a diagram showing a partial configuration of a laser system including a laser control apparatus according to Embodiment 3 of the present invention. In FIG. 8, the DAC 2 and the master device 23 are physically connected by an external access signal line L1. The wiring for connecting the DAC 2 and the external device is branched into two using, for example, the switch 13, one is connected to the CPU 1, and the other is connected to the external access signal line L1. The abnormality processing unit 9 controls the switch control unit 14, the switch control unit 14 controls the switch 13, and the master device 23 controls the switch 13 via the abnormality processing unit 9 and the switch control unit 14. The switch control unit 14 is also controlled by the abnormality processing unit 8. However, the switch control unit 14 processes the instruction from the abnormality processing unit 9 with priority over the instruction from the abnormality processing unit 8.

  When the CPU 1 detects an abnormality in the CPU 1 as in the second embodiment, the CPU 1 switches the switch 13 to select L1 and notifies the master device 23 of the occurrence of the abnormality. When the abnormality processing unit 9 of the master device 23 receives an abnormality from the abnormality processing unit 8, the abnormality processing unit 9 performs the target value return processing of the memory 6b via the external access signal line L1 instead of the CPU 1, and then the LD is safely turned off. Perform processing.

  Here, the abnormality processing procedure of the abnormality processing unit 9 is almost the same as the processing procedure shown in FIG. 7, and the notification of the occurrence of abnormality is detected by the notification from the abnormality generating unit 8, and the target value recovery processing of the memory The switch 13 is electrically connected to the external access signal line L1 before, and the external access signal line L1 is opened after the return instruction. Therefore, the abnormality processing unit 9 executes a target value return process of the memory and a termination process for safely turning off the LD after the connection of the external access signal line. That is, all the processes related to the abnormality process are performed via the external access signal line L1, and the external access signal line L1 is connected to the DAC 2 via the switch 13 only from the time of occurrence of the abnormality to the return.

  In this embodiment, the abnormality processing unit 8 in the CPU 1 detects the failure of the CPU 1. However, the abnormality processing unit 8 is not provided and the abnormality processing of the master device 24 is performed as shown in FIG. The abnormality process may be performed only by the unit 10. In this case, when the communication from the CPU 1 is interrupted, the abnormality processing unit 10 determines that an abnormality has occurred in the CPU 1 and starts the abnormality processing. At that time, the abnormality processing unit 10 controls the switch control unit 14 to control the DAC 2 via the switch 13 using the external access signal line L1 as described above.

  According to the third embodiment, when a failure occurs, the master device 24 directly controls the DAC 2 using the external access signal line L1, so that the CPU 1 cannot be restored even by a reset. Thus, even if it is completely broken, it is possible to reliably perform the target value recovery processing of the memory, to securely turn off the LD, and to ensure that other channel wavelengths are not affected. Yes.

  As described above, the laser control apparatus according to the present invention is suitable for a transmitter of a WDM communication system in which optical wavelength multiplexing is performed.

It is a figure which shows the partial structure of the laser system containing the laser control apparatus which is Embodiment 1 of this invention. It is a flowchart which shows the abnormality process procedure by the abnormality process part in CPU. It is a figure which shows the 1st modification of DAC shown in FIG. It is a figure which shows the 2nd modification of DAC shown in FIG. It is a figure which shows the 3rd modification of DAC shown in FIG. It is a figure which shows the partial structure of the laser system containing the laser control apparatus which is Embodiment 2 of this invention. It is a flowchart which shows the abnormality process procedure by the abnormality process part in the master apparatus shown in FIG. It is a figure which shows the partial structure of the laser system containing the laser control apparatus which is Embodiment 3 of this invention. It is a figure which shows the partial structure of the laser system containing the laser control apparatus which is a modification of Embodiment 3 of this invention. It is a figure which shows the wavelength dependence of the output at the time of the rise of LD.

Explanation of symbols

1 CPU
2 DAC
2b, 16a comparison unit 3 LD
4 ADC
5, 7 to 10 Abnormal processing unit 6a Memory control unit 6b, 6c Memory 11 LD module 12, 22, 23, 24 Master device 12a Read control unit 13 Switch 14 Switch control unit L1 External access signal line

Claims (8)

A laser control device having a calculation means for calculating a laser control value for instructing operation control of a laser diode, and controlling the laser diode using a laser control value sequentially calculated by the calculation means;
A memory for storing the current laser control value;
An abnormality processing means for performing processing not to update the laser control value stored in the memory when an abnormality occurs in the arithmetic means;
A laser control device comprising: A laser control device having a calculation means for calculating a laser control value for instructing operation control of a laser diode, and controlling the laser diode using a laser control value sequentially calculated by the calculation means;
A memory for storing the current laser control value;
A save memory for storing a laser control value before the current laser control value as a save laser control value;
Abnormality processing means for performing processing using the laser control value stored in the save memory when an abnormality occurs in the computing means;
A laser control device comprising: A laser control device having a calculation means for calculating a laser control value for instructing operation control of a laser diode, and controlling the laser diode using a laser control value sequentially calculated by the calculation means;
A memory for storing the current laser control value;
A save memory for storing a laser control value before the current laser control value as a save laser control value;
The laser control value stored in the memory and the laser control value stored in the evacuation memory are compared with each other. If they are not substantially the same, the laser control value stored in the evacuation memory is compared Control means for outputting to the laser diode;
A laser control device comprising:   The abnormality processing means monitors the occurrence of abnormality in the arithmetic means, and when the abnormality is detected, notifies the master apparatus that controls the system including each laser diode of the abnormality, and the master apparatus turns off the laser diode. The laser control device according to claim 1, wherein the laser diode is turned off when an instruction is received.   The laser control apparatus according to claim 1, wherein the abnormality processing unit is provided in the calculation unit.   5. The laser control apparatus according to claim 1, wherein the abnormality processing unit is provided in a master apparatus that controls a system including each laser diode.   5. The laser control apparatus according to claim 3, wherein the control unit is provided in a digital-analog converter that converts the laser control value of the digital value output from the calculation unit into an analog value. A memory unit having the memory and / or the save memory and having a spare input / output port allowing access to the outside;
The memory unit is directly connected to the master device via the spare input / output port,
7. The laser control apparatus according to claim 6, wherein the spare input / output port is valid from the detection of the occurrence of an abnormality by the abnormality processing means in the master device to the cancellation of the occurrence of the abnormality.

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