JP2005033139A - Wafer holder plate for polishing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wafer holder plate for polishing a semiconductor wafer that prevents the occurrence of polishing sag on the outer edge of a semiconductor wafer. <P>SOLUTION: A silicon wafer W is bonded to the underside of a carrier plate 14 via a resin wax layer 20. In that case, the center of the wafer is bonded to a flat area a of the carrier plate 14 and the outer edge of the wafer is bonded to a pin structure area b of the carrier plate 14. Thus, the resin wax layer 20 having been applied to the silicon wafer W with an even thickness enters a gap between pins p in the pin structure area b of the carrier plate 14. Hence, the outer edge of the resin wax layer 20 can be reduced in thickness according to an amount of sag appearing on the outer edge of the wafer after polishing caused by elastic deformation of a polishing cloth 13, thereby preventing the occurrence of polishing sag on the outer edge of the wafer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a wafer holding plate for polishing a semiconductor wafer, and more particularly to a wafer holding plate for polishing a semiconductor wafer for fixing a semiconductor wafer to be polished by being pressed against a polishing cloth during polishing.

  The silicon wafer is polished by a polishing apparatus. The polishing apparatus includes a polishing head in which a silicon wafer is fixed to the lower surface, and a polishing surface plate that is disposed immediately below the polishing head and has an upper surface having a polishing cloth adhered thereto. During polishing, while supplying the polishing agent on the polishing cloth, the polishing head on which the silicon wafer is fixed and the polishing surface plate are relatively rotated, and the polishing head is lowered so that the silicon wafer is applied to the polishing cloth at a predetermined pressure. Polish while pressing.

  By the way, as a kind of fixing method of the silicon wafer to the polishing head, for example, a wax bonding method described in Patent Document 1 is known. In Patent Document 1, a carrier plate having a flat surface on the wafer fixing side is used as a wafer holding plate for polishing a semiconductor wafer (hereinafter referred to as a wafer holding plate) to which a silicon wafer is bonded by wax.

JP 2002-172557 A (first page, FIG. 1)

  However, in the carrier plate of Patent Document 1, as shown in FIG. 7, the silicon wafer W is bonded to the carrier plate 100 whose entire surface on the wafer fixing side is flat via the wax 101 and polished. It was. Therefore, sagging has occurred in the outer peripheral portion of the silicon wafer W due to elastic deformation of the polishing pad 102 during polishing. That is, when the silicon wafer W is pressed against the polishing cloth 102 during polishing, a part of the polishing cloth 102 pressed against the silicon wafer W is elastically deformed, and a dent appears on the polishing cloth 102 in accordance with the wafer shape. At this time, a larger polishing pressure is applied to the outer peripheral portion of the wafer than other portions, and the polishing rate of that portion is increased. This is because, in the polishing surface of the silicon wafer W, the region where the action of the restoring force of the elastically deformed polishing cloth 102 is maximized is the portion on the polishing surface side of the outer peripheral portion of the wafer, particularly near the corner. is there. Even if the load from the polishing head 103 side acts uniformly on the entire area of the silicon wafer W through the flat carrier plate 100 and the uniform wax 101, sagging is likely to occur at the outer peripheral portion of the wafer.

  Therefore, as a result of intensive research, the inventors have determined that a portion of the surface of the carrier plate on the wafer fixing side that is in contact with the center of the silicon wafer is a flat region, and a portion that is in contact with the outer periphery of the wafer is provided with many pins. I came up with the idea of a pin structure area. As a result, the wax applied to the entire surface of the fixed side of the silicon wafer with a uniform thickness enters the gap between the adjacent pins in the pin structure region of the carrier plate. As a result, after polishing, the thickness of the outer peripheral portion of the wax can be reduced according to the amount of sagging that is estimated to occur in the outer peripheral portion of the wafer due to elastic deformation of the polishing cloth. Therefore, it was found that the occurrence of polishing sag at the outer peripheral portion of the wafer can be prevented, and the present invention has been completed.

  An object of the present invention is to provide a wafer holding plate for polishing a semiconductor wafer that can prevent the occurrence of polishing sag at the outer peripheral portion of the semiconductor wafer.

  The invention according to claim 1 is used when polishing a semiconductor wafer by pressing it against a polishing cloth, and a wafer holding plate for polishing a semiconductor wafer in which the semiconductor wafer is fixed to the surface of the polishing cloth by wax bonding. Of the surface on the wafer fixing side, a portion where the central portion of the semiconductor wafer contacts is a flat region, a portion where the outer peripheral portion of the semiconductor wafer contacts is a pin structure region where a large number of pins are arranged, and the tip of each pin A wafer holding plate for polishing a semiconductor wafer having a height equal to that of a flat region.

According to the first aspect of the present invention, the semiconductor wafer is bonded to the wafer holding surface of the wafer holding plate via the wax. At that time, the central portion of the semiconductor wafer is bonded to the flat region of the wafer holding plate. Further, the outer peripheral portion of the semiconductor wafer is bonded to the pin structure region of the wafer holding plate through wax.
As a result, the wax applied to the semiconductor wafer with a uniform thickness enters the gap between the adjacent pins in the pin structure region of the wafer holding plate. As a result, the thickness of the outer peripheral portion of the wax can be thinned according to the amount of sagging that is expected to occur in the outer peripheral portion of the semiconductor wafer due to elastic deformation of the polishing cloth after polishing. Therefore, it is possible to prevent the occurrence of polishing sag at the outer peripheral portion of the semiconductor wafer.

As the semiconductor wafer, for example, a silicon wafer or a gallium arsenide wafer can be employed. The semiconductor wafer may be a single body or a bonded substrate (including a bonded SOI substrate) obtained by bonding two semiconductor wafers.
The kind of abrasive cloth is not limited. For example, a porous nonwoven fabric type in which polyester felt is impregnated with polyurethane may be used. Further, a foamable urethane type obtained by slicing a foamed urethane block can be employed. Further, a suede type in which foamed polyurethane is laminated on the surface of a base material in which polyester felt is impregnated with polyurethane, and a surface layer portion of the polyurethane is removed to form an opening in the foamed layer.

During polishing, an abrasive is supplied. The abrasive contains free abrasive grains (polishing abrasive grains). While supplying this polishing agent, the polishing surface of the semiconductor wafer is pressed against the polishing surface of the rotating polishing cloth, whereby the polishing surface of the semiconductor wafer is polished by the grinding action of the free abrasive grains.
The polishing apparatus is not limited. A single wafer type polishing apparatus or a batch type polishing apparatus may be used.

The diameter of the pin formed in the pin structure region is 0.2 mm or more, preferably 0.5 mm or more. If the thickness is less than 0.2 mm, the strength of the pin is insufficient, and there is a problem that the semiconductor wafer cannot be supported flatly with respect to the polishing pressure.
The height of the pin is 1 mm or less, preferably 0.2 mm or less. If the thickness exceeds 1 mm, the surface of the wafer holding plate cannot be heated uniformly, and uneven bonding occurs when the semiconductor wafer is bonded to the wafer holding plate. Further, since the coating thickness of the wax is about several μm to 10 μm, the height of the pin does not need to exceed 1 mm, and processing waste can be omitted.

The pitch of the pins is 2 mm or less, preferably 1 mm or less. If the pitch exceeds 2 mm, the semiconductor wafer is deformed by using the adjacent pins and the beam as a beam due to the polishing pressure, and dimples may be formed in the portion where the semiconductor wafer is supported by the pins after polishing.
The size of the pin structure region is within 1/3 of the wafer radius, preferably 2 to 3 mm, from the outer edge of the semiconductor wafer toward the inside in the wafer radial direction. If it exceeds 1/3 of the wafer radius, the bonding area between the wafer and the wafer holding plate is small, and an adhesive force suitable for the frictional force of polishing cannot be maintained. The method for forming the pins is not limited. For example, it is formed by processing a wafer holding plate by a diamond wheel, a blast processing device, an ultrasonic processing device, or an excimer laser processing device mounted on a surface grinder. In this case, the material of the pins is determined by the wafer holding plate.

The type of wax is not limited. For example, resin wax can be employed. The method for applying the wax is not limited. For example, a spin coating method can be employed.
The coating thickness of the wax is 10 μm or less, preferably 3 μm or less. If the thickness exceeds 10 μm, the wax cannot be uniformly applied in the surface, which adversely affects the flatness of the semiconductor wafer.

  The hardness of the wax after curing is 35 to 75 °, preferably 60 to 70 ° in terms of Hs hardness.

  The invention according to claim 2 is the semiconductor wafer polishing wafer according to claim 1, wherein pins having a diameter of 0.2 mm or more and a height of 1 mm or less are arranged in the pin structure region at a pitch of 2 mm or less. It is a holding plate.

The diameter of the pin formed in the pin structure region is 0.2 mm or more, preferably 0.5 mm or more. If the thickness is less than 0.2 mm, the strength of the pins is insufficient, and the semiconductor wafer cannot be supported flat against the polishing pressure.
The height of the pin is 1 mm or less, preferably 0.2 mm or less. If the thickness exceeds 1 mm, the surface of the wafer holding plate cannot be heated uniformly, and uneven bonding occurs when the semiconductor wafer is bonded to the wafer holding plate. Further, since the coating thickness of the wax is about several μm to 10 μm, the height of the pin does not need to exceed 1 mm, and processing waste can be omitted.

  The pitch of the pins is 2 mm or less, preferably 1 mm or less. When the pitch exceeds 2 mm, the semiconductor wafer is deformed by using the adjacent pins and the beam as a beam by the polishing pressure, and dimples are formed in the portion where the semiconductor wafer is supported by the pins after polishing.

According to a third aspect of the present invention, in the semiconductor wafer according to the first or second aspect, the pin structure region is within 1/3 of the wafer radius from the outer edge of the semiconductor wafer toward the inside in the wafer radial direction. It is a wafer holding plate for polishing.
The size of the pin structure region is preferably 2 to 3 mm. If it exceeds 1/3 of the wafer radius, the bonding area between the semiconductor wafer and the wafer holding plate is small, and the bonding force suitable for the frictional force of the polishing process cannot be maintained.

  According to the present invention, of the wafer holding surface of the wafer holding plate, the portion where the central portion of the semiconductor wafer contacts is a flat region, and the portion where the outer peripheral portion of the semiconductor wafer contacts is a pin structure region where a large number of pins are arranged Therefore, after the polishing, the thickness of the outer peripheral portion of the wax can be reduced according to the amount of sagging estimated to occur in the outer peripheral portion of the wafer by elastic deformation of the polishing cloth. Therefore, it is possible to prevent the occurrence of polishing sag at the outer peripheral portion of the semiconductor wafer.

  An embodiment of the present invention will be described below.

  In FIG. 1, reference numeral 10 denotes a wax bonded polishing apparatus according to an embodiment of the present invention. The polishing apparatus 10 includes a polishing surface plate 11 and a polishing head 12 disposed above and facing the polishing platen 11. A polishing cloth 13 is attached to the upper surface of the polishing surface plate 11 via a thick sponge rubber. The polishing head 12 is provided with a carrier plate (wafer holding plate for polishing a semiconductor wafer) 14 on the lower surface thereof. For the polishing cloth 13, foamable urethane is employed.

The polishing surface plate 11 and the polishing head 12 are disk-shaped, and the opposing surfaces are flat surfaces. The polishing surface plate 11 and the polishing head 12 are rotated by rotating means (not shown) around the respective rotation axes. The polishing head 12 moves up and down by raising and lowering the rotation shaft.
The carrier plate 14 is detachably fixed to the lower surface of the polishing head 12, and the silicon wafer W is bonded to the fixed surface (lower surface) by the resin wax 20. The carrier rate 14 is a disc made of SiC ceramic having a thickness of 20 mm. Further, in the carrier plate 14, a portion of the surface on the wafer fixing side where the central portion of the silicon wafer W contacts (plate central portion) is defined as a flat region a, and a portion where the outer peripheral portion of the silicon wafer W contacts (plate outer peripheral portion). Is a pin structure region b in which a large number of pins p are arranged. The height h (FIG. 4A) of each pin p ... is aligned with the height of the surface of the flat region a. In the pin structure region b, a number of pins p... Having a diameter of 0.5 mm, a height h of 0.2 mm, and a flat tip are arranged at a pitch d of 0.8 mm (FIG. 4B). This pitch d is equal to the amount of the pin p and the pin p corresponding to the amount of sag that the outer periphery of the resin wax 20 is estimated to be generated on the outer periphery of the silicon wafer W when the silicon wafer W is bonded to the carrier plate 14. It is the pitch that goes into the gap. The pin structure region b is provided in a range of 2.5 mm from the outer side of the outer edge of the silicon wafer W to the inner side in the wafer radial direction. The formation of the pins p ... is performed by a blasting method. In order to efficiently form fine and high precision pins p in a predetermined pattern, SiC abrasive grains having a particle size of 10 to 30 μm are applied to a carrier plate 14 masked with a photoresist having a thickness of 50 to 100 μm. Blasting was performed by spraying at 2.0 to 5.0 kgf / cm ² . The flat portions a of the carrier plate 14 and the pin portions of the pin structure region b are patterned on the photoresist using a photomask. After that, after selectively processing a portion without a mask with a blast processing apparatus, the mask is peeled off to form pins p... In a predetermined pattern on the carrier plate 14.

Next, a method for polishing the silicon wafer W by the polishing apparatus 10 according to an embodiment will be described.
As shown in FIG. 1, at the time of wafer polishing, a resin wax 20 is uniformly spin-coated with a thickness of 2 μm over the entire surface opposite to the polishing side of the silicon wafer W in advance. The hardness of the resin wax 20 after curing is 63 ° in terms of Hs hardness. The applied resin wax 20 hardly moves in a direction parallel to the polished surface even if the silicon wafer W is inclined. Thereafter, the silicon wafer W is bonded to the fixed side surface of the carrier plate 14 by, for example, pressurization by a vacuum chamber or pressurization by a stamp.

  When the silicon wafer W is bonded to the wafer fixing surface of the carrier plate 14 by wax, the central portion of the wafer is bonded to the flat region a at the central portion of the carrier plate 14. On the other hand, the outer peripheral portion of the silicon wafer W is bonded to the pin structure region b of the carrier plate 14 via the resin wax 20. At this time, the resin wax 20 applied to the silicon wafer W with a uniform thickness enters the gap between the adjacent pins p in the pin structure region a of the carrier plate 14 by a predetermined amount. As a result, the thickness of the outer peripheral portion of the resin wax 20 is reduced according to the amount of sagging that is estimated to occur in the outer peripheral portion of the silicon wafer W due to elastic deformation of the polishing cloth after polishing. Therefore, it is possible to prevent the occurrence of polishing sag at the outer peripheral portion of the silicon wafer W after polishing.

Then, the polishing head 12 is rotated on the polishing surface plate 11 at a predetermined rotation speed while supplying the abrasive containing the free abrasive grains from the slurry supply nozzle 21 onto the central portion of the polishing cloth 13 at 0.5 liter / min. Then, the polishing surface of the silicon wafer W is pressed against the polishing pad 13 with a predetermined polishing pressure and polished. As a result, a silicon wafer W in which no sagging has occurred in the outer peripheral portion is obtained.
Thus, when the carrier plate 14 having the pin structure region b on the outer peripheral portion is employed, the pin structure region b of the carrier plate 14 is formed according to the polishing apparatus to be used, the amount of elastic deformation of the polishing cloth, the type of wax, and the like. By changing the conditions, the flatness of the outer peripheral portion of the silicon wafer W can be controlled.

  Here, with reference to FIG. 6, the result of having evaluated the flatness of the polishing surface of an actual silicon wafer by the electrostatic capacitance type wafer flatness measuring apparatus is reported. As shown in FIG. 6A, no polishing sagging is observed in the outer peripheral portion of the silicon wafer polished under the same conditions as in the example. On the other hand, as shown in FIG. 6B, when a conventional carrier plate having a flat entire surface on the wafer fixing side was used, polishing sagging occurred on the outer peripheral portion of the polished silicon wafer. .

It is a perspective view of the use condition of the wax adhesion type polisher in which the wafer holding plate for semiconductor wafer polish concerning one example of this invention was built. It is a top view of the wafer holding plate for semiconductor wafer grinding concerning one example of this invention. It is a longitudinal cross-sectional view of the wafer holding plate for semiconductor wafer grinding | polishing which concerns on one Example of this invention. (A) It is a principal part expanded sectional view of the wafer holding plate for semiconductor wafer grinding | polishing which concerns on one Example of this invention. (B) It is a principal part enlarged plan view of the wafer holding plate for semiconductor wafer grinding | polishing which concerns on one Example of this invention. It is a principal part expanded sectional view of the use condition of the wax adhesion type polisher in which the wafer holding plate for semiconductor wafer polish concerning one example of this invention was built. (A) is the perspective view which showed the wafer grind | polished by the wax adhesion | attachment grinding | polishing apparatus with which the wafer holding plate for semiconductor wafer grinding | polishing which concerns on one Example of this invention was integrated was shown with the contour line. (B) is the perspective view which showed the wafer grind | polished by the wax adhesion | attachment grinding | polishing apparatus in which the wafer holding plate for semiconductor wafer grinding | polishing which concerns on the conventional means was integrated was shown with the contour line. It is a principal part expanded sectional view of the use condition of the wax adhesion type polisher in which the wafer holding plate for semiconductor wafer polish concerning conventional means was built.

Explanation of symbols

13 Abrasive cloth,
14 Carrier plate (wafer holding plate for polishing semiconductor wafer),
20 resin wax,
W Silicon wafer (semiconductor wafer),
a flat area,
b pin structure region,
p Pin.

Claims (3)

In a wafer holding plate for polishing a semiconductor wafer, which is used when polishing by pressing a semiconductor wafer against a polishing cloth, and the semiconductor wafer is fixed to the surface on the polishing cloth side by wax adhesion,
Of the surface on the wafer fixing side, a portion where the central portion of the semiconductor wafer contacts is a flat region, a portion where the outer peripheral portion of the semiconductor wafer contacts is a pin structure region where a large number of pins are arranged, and the tip of each pin A wafer holding plate for polishing semiconductor wafers with a height equal to the height of the flat area.   The wafer holding plate for semiconductor wafer polishing according to claim 1, wherein pins having a diameter of 0.2 mm or more and a height of 1 mm or less are arranged in the pin structure region at a pitch of 2 mm or less. 3. The wafer holding plate for polishing a semiconductor wafer according to claim 1, wherein the pin structure region is within １ ／ of the wafer radius from the outer edge of the semiconductor wafer toward the inside in the wafer radial direction.

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