JP2005012287A - Semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit the use of a function mounted module of which can partially be restricted. <P>SOLUTION: The semiconductor integrated circuit includes a use restriction function module 302 whose use is restricted when use restriction release information 410 is invalid; a key information acquisition means 400 for acquiring use permission key information to validate the use restriction function module 302; and an authentication means 402 for authenticating the use permission key information given from the key information acquisition means 400 based on the use permission information stored in advance and validating the use restriction release information 410 and gives the information to the use restriction function module 302 only when the use permission is to be authenticated, and also includes a switching means for switching the use restriction function module 302 to be partially valid and partially invalid. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor integrated circuit capable of restricting the use of functional modules.
[0002]
[Prior art]
FIG. 9 shows a conventional semiconductor integrated circuit in which the use of function modules can be restricted. As shown in FIG. 9, the conventional semiconductor integrated circuit has a use restriction control circuit 303, and this use restriction control circuit 303 includes a key data register 400 and an authentication circuit 402. 301 is a memory bus, and 410 is a use restriction release signal. Reference numeral 302 denotes a scramble function module.
[0003]
In such a configuration, the key data register 400 holds the use permission key data sent from the memory bus 301 and sends the use permission key data to the authentication circuit 402. The authentication circuit 402 holds secret use permission information in advance as comparison reference data, and compares the key data from the key data register 400 with the use permission information. If they do not match, the use restriction release signal 410 is set to a use-prohibited state. On the other hand, only when they match, the use restriction release signal 410 is set to a use permission state, and use permission is given to the scramble function module 302 (Patent Document 1).
[0004]
[Patent Document 1]
Japanese Patent Laid-Open No. 2002-305250
[Problems to be solved by the invention]
In the conventional technique described above, the use restriction control circuit 303 is enabled or disabled only by the use permission key data sent from the memory bus 301. For example, in the case of a semiconductor integrated circuit having a use restriction circuit for a scramble function module used at the time of data input / output with a flash memory, if the use permission key information is given to the use restriction circuit, the entire flash memory, that is, input / output is performed. All data is scrambled.
[0006]
However, it may be desirable not to enable the scramble function for the entire area of the flash memory in usages where the user partially uses the flash memory as a RAM space. However, in the above-described conventional technique, there is no means for selecting valid / invalid for use of the scramble function module for each partial area of the flash memory to be used, which is inconvenient for the user to use. was there.
[0007]
Accordingly, an object of the present invention is to solve such problems and to partially limit the use of function-equipped modules in a semiconductor integrated circuit.
[0008]
[Means for Solving the Problems]
The present invention according to claim 1 obtains a function module with use restriction whose use is restricted when the use restriction release information is invalid, and key information for use permission for activating the function module with use restriction And the use restriction release information only when the use permission information is authenticated based on the use permission information held in advance and the use permission information provided from the key information acquisition means is authenticated. A semiconductor integrated circuit having an authentication unit that validates and gives to the function module with use restriction has switch means for partially switching the function module with use restriction between valid and invalid.
[0009]
The present invention according to claim 2 is the semiconductor integrated circuit according to claim 1, wherein the functional module with use restriction has a scramble function.
According to a third aspect of the present invention, in the semiconductor integrated circuit according to the first or second aspect, the switching control by the switching unit is performed based on an address range of a memory that is a target of use of the function module with use restriction. It is the structure.
[0010]
According to a fourth aspect of the present invention, in the semiconductor integrated circuit according to the third aspect, the switching control by the switching unit causes the key information acquisition unit to acquire key information for use permission determined by designating an address range. It is the structure performed by whether or not.
[0011]
According to a fifth aspect of the present invention, there is provided the semiconductor integrated circuit according to the third aspect, wherein the switching permission by the switching means is obtained from the key information acquisition means to the authentication means by the use permission key information determined by designating an address range. It is the structure performed by whether it gives to.
[0012]
According to a sixth aspect of the present invention, in the semiconductor integrated circuit according to the third aspect, the use restriction release information that is enabled by the switching control by the switching means being specified by specifying the address range is restricted from use by the authentication means. The configuration is performed depending on whether or not the function module is given.
[0013]
According to a seventh aspect of the present invention, in the semiconductor integrated circuit according to the third aspect, the switching control by the switching means includes: (a) key information obtaining means for obtaining use permission key information determined by designating an address range. (B) whether or not to give the key information for use permission determined by designating the address range from the key information obtaining unit to the authentication unit, and (c) effectively by designating the address range The use restriction cancellation information is given to the functional module with use restriction from the authentication means.
[0014]
The present invention according to claim 8 is the semiconductor integrated circuit according to claim 1 or 2, wherein the switching control by the switching unit is another semiconductor integrated circuit or other memory to which the function module with use restriction is used. It is the structure performed based on the selection signal to (5).
[0015]
The present invention according to claim 9 is the semiconductor integrated circuit according to claim 8, wherein the switching control by the switching means is selected to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction. It is characterized in that the configuration is performed depending on whether or not the key information for use permission determined by the signal is acquired by the key information acquisition means.
[0016]
According to a tenth aspect of the present invention, in the semiconductor integrated circuit according to the eighth aspect, the switching control by the switching means is a selection to another semiconductor integrated circuit or another memory that is a target of use of the functional module with use restriction. The configuration is characterized in that it is performed depending on whether the key information for use permission determined by the signal is given from the key information acquisition means to the authentication means.
[0017]
The present invention according to claim 11 is the semiconductor integrated circuit according to claim 8, wherein the switching control by the switching means is selected to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction. The configuration is characterized in that it is performed depending on whether or not use restriction release information validated by a signal is given from the authentication means to the function module with use restriction.
[0018]
The present invention according to claim 12 is the semiconductor integrated circuit according to claim 8, wherein the switching control by the switching means is (a) another semiconductor integrated circuit or other memory that is a target of use of the function module with use restriction. Whether or not the key information acquisition means is allowed to acquire use permission key information determined by the selection signal to (b) selection to another semiconductor integrated circuit or other memory that is a target of use of the function module with use restriction Whether or not to give the key information for use permission determined by the signal from the key information acquisition means to the authentication means, and (c) a selection signal to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction In the configuration that is performed by any combination of whether or not to give the usage restriction release information that is enabled in the authentication means to the functional module with usage restriction And wherein the Rukoto.
[0019]
A thirteenth aspect of the present invention is the semiconductor integrated circuit according to any one of the first to twelfth aspects, having a function of dynamically switching a control signal to a use restriction control means by a program. It is characterized by.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a semiconductor integrated circuit according to the present invention will be described below in detail with reference to the drawings.
(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a semiconductor integrated circuit according to a first embodiment of the present invention and an external flash memory. Reference numeral 100 denotes a semiconductor integrated circuit, and reference numeral 200 denotes a flash memory provided outside the semiconductor integrated circuit 100. In the semiconductor integrated circuit 100, 300 is a CPU (Central Processing Unit), 301 is a memory bus, 302 is a scramble function module, and 303 is a use restriction control circuit.
[0021]
The scramble function module 302 can be used only by users who are permitted to use it. That is, the scramble function module 302 is an example of a module with use restriction. The use restriction control circuit 303 controls whether or not the use permission is given. The CPU 300 operates according to a program read from the flash memory 200 connected to the memory bus 301 via the scramble function module 302. The scramble function module 302 can be used only when the use restriction control circuit 303 clears the use permission authentication and the use restriction release signal 410 is in the use permission state. The use restriction canceling signal 410 may have either the level “1” or the level “0” in the use permission state, but here the level “1” is in the use permission state.
[0022]
FIG. 2 is a diagram illustrating a method of using the flash memory 200. In the present invention, the flash memory 200 is divided into several areas. Here, the flash memory 200 is divided into two areas. One is used as a user program area 201 and the other is used as a user information area 202. To do. In this example, the address of the user program area is 0x200000 to 0x2f7fff, and the address of the user information area is 0x2f8000 to 0x2fffff.
[0023]
FIG. 3 is a block diagram showing the internal structure of the use restriction control circuit 303 in FIG. Here, 400 is a key data register as key information holding means, 401 is an effective address register as means for specifying an address range, and 402 is an authentication circuit as authentication means. The key data register 400 holds the use permission key data sent from the memory bus 301 and sends the use permission key data to the authentication circuit 402. The authentication circuit 402 holds secret use permission information in advance as comparison reference data, compares the use permission key data from the key data register 400 with the use permission information, and if they do not match, the use restriction release signal 410. The use restriction cancellation signal 410 is switched to the level “1” only when they match, and the use permission is given to the scramble function module 302.
[0024]
As a control signal for switching, a control signal 404 from the effective address register 401 to the key data register 400 controls whether or not a signal is given to the key data register 400. The control signal 405 output from the effective address register 401 is input to the AND circuit 407 together with the signal output from the key data register 400, so that the signal output from the key data register 400 is given to the authentication circuit 402. It is a signal that controls whether or not. Further, the control signal 406 output from the effective address register 401 is input to the AND circuit 408 together with the signal output from the authentication circuit 402, so that the signal output from the authentication circuit 402 is used as the use restriction release signal 410. This is to control whether or not to do. These control signals 404, 405, and 406 do not need all, and any one of them may be implemented. There is no problem with implementing two or more.
[0025]
First, a case where switching control of the use restriction release signal 410 is performed by the control signal 404 will be described.
In this case, when the semiconductor integrated circuit 100 is shipped as a product, the authentication circuit 402 is initially set to a state of outputting “0” indicating prohibition of use as the use restriction release signal 410. At this time, the scramble function module 302 to which “0” is input as the use restriction release signal 410 is in an invalid state. That is, the scramble function module 302 is disabled.
[0026]
When the user of the semiconductor integrated circuit 100 wants to use the scramble function module 302, the user performs a process of enabling it. That is, at this time, the user performs switching to partially enable / disable the scramble function module by using the control signal 404 generated by the effective address register 401 based on the address range information. FIG. 4 shows specific processing, that is, processing for rewriting and checking the flash memory 200 by applying the scramble / descramble function to a partially selected area.
[0027]
4, in the flash memory 200, as shown in FIG. 4A, data at the time of initialization, that is, when all bits are rewritable, is “x′ff ′”. The user creates data to be written in the entire area of the flash memory 200 in this state. This data is data in which program data is set in a portion corresponding to the user program area, and “x′ff ′” is set in a portion corresponding to the user information area.
[0028]
When the scramble function module 302 is in a usable valid state, in order to partially validate the scramble function module 302, the valid address register 401 is given data indicating that the valid range is from 0x200000 to 0x2f7fff (FIG. 2). . When data prepared by the user is written in the flash memory 200 with the scramble function module 302 partially enabled, the user program area 201 of the flash memory 200 is stored in the user program area 201 as shown in FIG. The scrambled user program data is written, and “x'ff '”, that is, the unscrambled data is written in the user information area 202.
[0029]
Next, as shown in FIG. 4C, user information setting data is written in the user information area 202. The contents and timing of writing are arbitrarily determined by the user. As an example, when the system in which the semiconductor integrated circuit 100 of FIG. 1 is mounted is a DVD system, the user program management number, the laser power data adjustment value for each optical disk medium, region code information, etc. can give. As the write timing, there is a process adjustment stage on the production line. As a part of a specific example of the user information setting data, the user program management numbers are written as x'A5 ', x'80', x'ff ', x'35' as shown in FIG. Shall.
[0030]
Next, reading is performed to confirm the data written in the flash memory 200. In the following description, it is assumed that the same data as that at the time of program data writing is set in the effective address register 401 shown in FIG. At the time of data reading, descrambling is performed by the scramble function module 302 as shown in FIG. As a result, the descrambled data, that is, the same data as the program data prepared by the user is read from the user program area 201. At the time of reading from the user information area 202, the same data as at the time of writing without descrambling is read.
[0031]
Next, as shown in FIG. 4E, the data read from the user program area 201 is compared with the user program data prepared by the user at the time of writing, that is, data targeting addresses 0x200000 to 0x2f7fff. The data read from the user information area 202 is data written by the user as user information setting data. Here, only the management number part of the user program is extracted, and x'A5 ', x'80', x Compare with 'ff', x'35 '. Based on the result of the comparison, it is determined whether or not reading from the flash memory 200 and writing to the flash memory 200 are possible.
[0032]
In the above, switching control of the use restriction release signal 410 is performed by controlling whether or not to give a signal to the key data register 400 by the control signal 404 sent from the effective address register 401 to the key data register 400. explained. On the other hand, in the configuration in which the use restriction control circuit 303 has the effective address register 401 as shown in FIG. 3, the control signal 405 generated by the effective address register 401 based on the signal supplied from the memory bus 301 Switching control of the use restriction release signal 410 can also be performed by controlling whether or not the output from the data register 400 is given to the authentication circuit 402. Further, in the configuration in which the use restriction control circuit 303 has the effective address register 401, a signal output from the authentication circuit 402 is generated by a control signal 406 generated by the effective address register 401 based on a signal given from the memory bus 301. The switching control of the use restriction release signal 410 can also be performed by controlling whether or not the use restriction release signal 410 can be used.
(Embodiment 2)
FIG. 5 is a block diagram showing a configuration of the semiconductor integrated circuit and the external flash memory according to the second embodiment of the present invention. Reference numeral 100 denotes a semiconductor integrated circuit, 300 denotes a CPU, 301 denotes a memory bus, 302 denotes a scramble function module, 303 denotes a use restriction control circuit, and 410 denotes a use restriction release signal. Here, two flash memories, a first flash memory 210 and a second flash memory 220, are provided.
[0033]
FIG. 6 is a block diagram showing the internal structure of the use restriction control circuit 303 in FIG. The use restriction control circuit 303 includes a selector 403 as designation means for generating a signal for designating another semiconductor integrated circuit or a signal for selecting another memory. The other configuration is the same as that of the use restriction control circuit 303 shown in FIG.
[0034]
When the first flash memory 210 shown in FIG. 5 is the user program area and the second flash memory 210 is the user information area, the user wants to use the scramble function only for the first flash memory 210. At this time, the user controls the control signal 404 to the key data register 400 by the selector 403 shown in FIG. 6 so that the scramble function module 302 is effective only for the first flash memory 210. As a result, the usage restriction cancellation signal 410 is switched, and the scramble function module 302 as the functional module with usage restriction is partially switched between valid / invalid.
[0035]
6 is generated by the selector 403 based on a signal given from the memory bus 301 instead of controlling the control signal 404 to the key data register 400 as described above. Switching control of the use restriction release signal 410 can also be performed by controlling whether or not the output from the key data register 400 is given to the authentication circuit 402 by the control signal 405. Furthermore, by controlling whether or not the signal output from the authentication circuit 402 can be used as the use restriction release signal 410 by the control signal 406 generated by the selector 403 based on the signal given from the memory bus 301, Switching control of the use restriction release signal 410 can be performed.
(Embodiment 3)
FIG. 7 is a block diagram showing a configuration of the semiconductor integrated circuit and the external flash memory according to the third embodiment of the present invention. Here, two flash memories of the first flash memory 210 and the second flash memory 220 are provided.
[0036]
FIG. 8 is a block diagram showing the internal structure of the use restriction control circuit 303 in FIG. The use restriction control circuit 303 includes an effective address register 401 as means for specifying an address range, and a selector 403 as specification means for generating a signal for specifying another semiconductor integrated circuit or a signal for selecting another memory. It has. Other configurations are the same as those shown in FIG. 3 or FIG.
[0037]
The first flash memory 210 is divided into a user program area 201 and a user information area 202. On the other hand, the second flash memory 220 has only the user program area 201. In such a case, the user wants to use the scramble function only for the user program area 201 of the first flash memory 210 and the user program area 201 of the second flash memory 220.
[0038]
Therefore, in the third embodiment, control is performed based on the control signal 404, the control signal 405, or the control signal 406 by using the effective address register 401 and the selector 403 in FIG. 8 in combination. Accordingly, as in the case of the first embodiment and the second embodiment described above, the scramble function module 302 that is a function module with use restriction can be partially switched between valid / invalid.
(Embodiment 4)
In the above description, the data in the effective address register 401 or the data in the selector 403 is the same both when reading data from the flash memories 200, 210, and 220 and when writing data to the flash memories 200, 210, and 220. I was doing. However, considering the confidentiality of user data, it is not always necessary to be the same. It is possible to allow the user to confirm the contents of the user data written to the flash memories 200, 210, and 220 only under specific conditions.
[0039]
That is, for example, in a system in which the semiconductor integrated circuit 100 of FIG. 1 having the use restriction control circuit 303 configured as shown in FIG. 3 is mounted, the effective address is only obtained when reading is performed under the conditions specified by the user. It is also possible to set the same data in the register 401 as when writing a program. This can be implemented by the user setting conditions in the program in advance and the control signal to the use restriction control means 303 being dynamically switched by the program. In such a case, even when someone else tries to read the program area during normal use, the scrambled data that is not descrambled is read and descrambled only when the condition specified by the user is met. It is possible to read out data in the user program area that has been set.
[0040]
【The invention's effect】
As described above, according to the present invention, it is possible to partially switch the function module with use restriction between valid / invalid by realizing that the function use module can be partially restricted in the semiconductor integrated circuit. Can be provided to users.
[Brief description of the drawings]
1 is a block diagram showing a schematic configuration and a memory of a semiconductor integrated circuit according to a first embodiment of the present invention; FIG. 2 is a usage pattern diagram of a flash memory in FIG. 1; FIG. 4 is a block diagram showing an operation of the flash memory in FIG. 1. FIG. 5 is a block diagram showing a schematic configuration of a semiconductor integrated circuit according to a second embodiment of the present invention and a memory. FIG. 7 is a block diagram showing a schematic configuration of a semiconductor integrated circuit according to a third embodiment of the present invention and a memory. FIG. 8 is a block diagram showing a configuration of a usage restriction control circuit in FIG. Block diagram [FIG. 9] A block diagram showing the configuration of a use restriction control circuit in a conventional semiconductor integrated circuit
100 Semiconductor Integrated Circuit 200 Flash Memory 300 CPU
302 Scramble function module 303 Usage restriction control circuit 400 Key data register 401 Effective address register 402 Authentication circuit 403 Selector 410 Usage restriction release signal

Claims (13)

A use-restricted function module whose use is restricted when the use restriction release information is invalid, a key information obtaining unit for obtaining use permission key information for enabling the use-restricted function module, and the key The use restricted function which validates the use restriction release information only when authenticating the use permission by authenticating the use permission key information given from the information acquisition means in advance and performing use permission authentication. A semiconductor integrated circuit having authentication means for giving to a module, and having switching means for switching a function module with use restriction partially between valid and invalid. The semiconductor integrated circuit according to claim 1, wherein the functional module with use restriction has a scramble function. 3. The semiconductor integrated circuit according to claim 1, wherein the switching control by the switching means is performed based on an address range of a memory that is a target of use of the function module with use restriction. 4. The semiconductor integrated circuit according to claim 3, wherein the switching control by the switching unit is performed depending on whether or not the key information acquiring unit acquires use permission key information determined by designating an address range. 4. The semiconductor integrated circuit according to claim 3, wherein the switching control by the switching means is performed depending on whether or not use permission key information determined by designating an address range is given from the key information acquisition means to the authentication means. 4. The semiconductor integrated circuit according to claim 3, wherein the switching control by the switching means is performed depending on whether or not use restriction release information that is enabled by designating an address range is given from the authentication means to the function module with use restriction. . Switching control by switching means is
(A) whether to allow the key information acquisition means to acquire key information for use permission determined by specifying an address range;
(B) whether or not to give use permission key information determined by designating an address range from the key information acquisition means to the authentication means;
(C) whether or not to give usage restriction release information that is enabled by designating an address range from the authentication means to the functional module with usage restrictions;
4. The semiconductor integrated circuit according to claim 3, wherein the semiconductor integrated circuit is configured by any combination of the above. 3. The semiconductor integrated circuit according to claim 1, wherein the switching control by the switching means is performed based on a selection signal to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction. Whether or not the switching control by the switching means causes the key information acquisition means to acquire use permission key information determined by a selection signal to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction 9. The semiconductor integrated circuit according to claim 8, wherein the semiconductor integrated circuit is configured as described above. Whether the switching control by the switching means gives the key information for use permission determined by the selection signal to another semiconductor integrated circuit or another memory to be used for the function module with use restriction from the key information acquisition means to the authentication means. The semiconductor integrated circuit according to claim 8, wherein the semiconductor integrated circuit is configured depending on whether or not. Switching control by the switching means is used from the authentication means to the function module with use restriction, which is enabled by the selection signal to the other semiconductor integrated circuit or other memory to be used by the function module with use restriction. The semiconductor integrated circuit according to claim 8, wherein the semiconductor integrated circuit is configured to be performed depending on whether or not to provide. Switching control by switching means is
(A) whether or not to allow the key information obtaining means to obtain use permission key information determined by a selection signal to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction;
(B) whether or not to give key information for use permission determined by a selection signal to another semiconductor integrated circuit or another memory to be used by the function module with use restriction from the key information acquisition unit to the authentication unit;
(C) Whether or not use restriction release information validated by a selection signal to another semiconductor integrated circuit or another memory that is a target of use of the function module with use restriction is given from the authentication means to the function module with use restriction ,
9. The semiconductor integrated circuit according to claim 8, wherein the semiconductor integrated circuit is configured by any combination of the above. 13. The semiconductor integrated circuit according to claim 1, which has a function of dynamically switching a control signal to the use restriction control means by a program.

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