JP2004518276A - Chip component terminal formation method - Google Patents
Chip component terminal formation method Download PDFInfo
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- JP2004518276A JP2004518276A JP2002556897A JP2002556897A JP2004518276A JP 2004518276 A JP2004518276 A JP 2004518276A JP 2002556897 A JP2002556897 A JP 2002556897A JP 2002556897 A JP2002556897 A JP 2002556897A JP 2004518276 A JP2004518276 A JP 2004518276A
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- terminal
- chip component
- conductive material
- chip
- hollow portion
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- 238000000034 method Methods 0.000 title claims abstract description 51
- 230000015572 biosynthetic process Effects 0.000 title description 4
- 239000004020 conductor Substances 0.000 claims abstract description 32
- 239000000463 material Substances 0.000 claims abstract description 5
- 238000004544 sputter deposition Methods 0.000 claims description 10
- 238000009713 electroplating Methods 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 3
- 230000005484 gravity Effects 0.000 claims description 2
- 230000000873 masking effect Effects 0.000 claims description 2
- 238000003780 insertion Methods 0.000 claims 1
- 230000037431 insertion Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 description 15
- 239000008188 pellet Substances 0.000 description 9
- 230000001681 protective effect Effects 0.000 description 7
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G13/00—Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
- H01G13/006—Apparatus or processes for applying terminals
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
【課題】チップ成分に端子を形成する改良方法を提供
【解決手段】チップ成分の対向する端部に端子を形成する方法である。チップ成分の一端を露出した状態で、チップ成分を中空部に挿入する。次に、チップ成分の露出端部に端子用導電性材料を形成し、チップ成分を中空部から取り出し、反転する。次に、露出している他端部に端子用材料を形成する。別な実施態様では、チップ成分の対向する端部を露出した状態で、チップ成分をプレートの貫通孔に挿入する。次に、端子用材料をチップ成分の両端に形成する。
【選択図】図１An improved method for forming a terminal on a chip component is provided. A method for forming terminals on opposite ends of a chip component. The chip component is inserted into the hollow portion with one end of the chip component exposed. Next, a conductive material for a terminal is formed on the exposed end of the chip component, and the chip component is removed from the hollow portion and inverted. Next, a terminal material is formed on the other exposed end. In another embodiment, the chip component is inserted into the through hole of the plate with the opposite end of the chip component exposed. Next, a terminal material is formed on both ends of the chip component.
[Selection diagram] Fig. 1
Description
【０００１】
【発明の技術分野】
本発明は、チップ成分の端子形成方法に関する。
【０００２】
【従来の技術】
タンタルコンデンサーなどのチップ成分の場合、チップ体の対向する両端に端子キャップを形成する必要がある。これら端子キャップを形成するために多くの方法があり、いずれもスパッタリングや電気メッキなどの方法でコンデンサーに導電性材料を被覆形成する。これら方法を使用する場合、チップ体の両端間の中心部分をマスク又はシールドその他の手段で遮蔽し、この上に導電性材料が形成しないようにする。
【０００３】
【発明が解決しようとする課題】
すなわち、本発明の第１の目的は、チップ成分に端子を形成する改良方法を提供することである。
【０００４】
本発明の第２の目的は、チップ成分本体の対向する両端に導電性材料を被覆形成し、端子キャップを形成する間、チップ成分本体の中心部分に隣接する部分をマスクする改良方法を提供することである。
【０００５】
本発明の第３の目的は、複数のチップ成分に一回で端子キャップを形成できる方法を提供することである。
【０００６】
本発明の第４の目的は、経済的な上に、耐久性があり、また効率のよいチップ成分を製造できる、チップ成分の端子形成改良方法を提供することである。
【０００７】
【課題を解決するための手段】
上記目的は、以下の態様によって実現することができる。まず、端子を形成する相互に対向する第１端部と第２端部とを有し、かつ第１端部と第２端部との間に中心部分をもつチップ成分を用意する。次に、チップ成分を保持部材の中空部（ｃａｖｉｔｙ）に挿入する。なお、この中空部の深さがチップ成分の第１端部と第２端部との間の距離より浅いため、チップ成分を中空部に挿入した場合、第２端部と中心部分とが中空部内部に位置し、第１端部は中空部外部に位置することになる。第１端部の外面に第１導電性端子を形成し、同時に保持部材の中空部内で第２端部をマスクし、導電性端子を形成しないようにする。次に、中空部からチップ成分を取り出し、中空部内部に第１端部および第２端部が位置し、第２端部が中空部外部に位置するように、チップ成分を中空部に再挿入する。次に、第２端部の外面に第２導電性端子を形成し、同時に保持部材の中空部内で中心部分および第１端部をマスクし、導電性端子を形成しないようにする。
【０００８】
チップ成分に第１導電性端子および第２導電性端子を形成するために各種の方法を使用することができる。例えば、第１端部および第２端部に導電性材料をスパッタ、噴霧または塗布する方法、第１端部および第２端部を導電性材料の液体に浸漬する方法や第１端部および第２端部それぞれに導電性材料を電気メッキする方法がある。さらに、チップ成分の第１端部および第２端部の外面に導電性材料を被覆する他の公知方法を使用しても、本発明の作用効果を実現することができる。
【０００９】
さらに、本発明の第２の特徴によれば、貫通孔をもつ可撓性プレートを使用することも可能である。第１端部および第２端部を貫通孔の両端外部におき、かつ中心部を貫通孔内部においた状態で、チップ成分を貫通孔に挿入する。次に、チップ成分の第１端部および第２端部に導電性材料を形成し、同時に中心部をマスクし、導電性材料が形成しないようにする。
【００１０】
この特徴を実現するには、チップ成分の第１端部および第２端部の両者に導電性材料を同時形成するか、あるいは第１端部に導電性材料を形成してから、第２端部に導電性材料を別に形成すればよい。
【００１１】
さらに、本発明の第３の特徴によれば、複数のチップ成分を対象とする複数の中空部または貫通孔をプレートに形成し、一回の作業でチップ成分の第１端部および第２端部すべてに導電性材料を被覆することも可能である。
【００１２】
【発明の実施の形態】
図１について説明すると、符号１０は剛性をもつプレート４２に形成した中空部４４に挿入したコンデンサーである。このコンデンサー１０は、陽極ペレット端部１４と陰極ペレット端部１６とを有するペレット１２で構成する。ペレット１２の陽極ペレット端部１４に陽極線１８を埋設し、これから延設する。
【００１３】
符号２０は、上端部２２、下端部２４および中心部２６を有する予め切断したコンデンサー体である。このコンデンサー体２０は、下端部に隣接する側部に凹部３０、３２をもつ非導電性外側保護体２８から形成する。外側保護体２８の底部に配設した陰極導体３４でペレット１２の底端部を取り囲む。陰極導体３４の下端部の平坦な陰極導体面３６を保護体２８面に露出する。同様な陽極線１８についても、外側保護体２８面に露出し、陽極導電性面１９を形成する。
【００１４】
陰極端子３８を外側保護体２８の下端２４に被覆し、陽極端子４０を外側保護体２８の上端２２に被覆する。これら端子３８、４０は、コンデンサー１０を電気回路に実装する回路基板に接合できる。以下に説明する方法をコンデンサーに適用する場合には、両端に端子を形成する必要がある任意のタイプのチップ成分に対して以上の方法を適用することも可能である。
【００１５】
図１に示した方法の場合、端子３８、４０を設けないコンデンサー体２０を剛性プレート４２の中空部４４に挿入する必要がある。中空部４４の深さについては、端子を形成することが望ましい各成分の端部部分がプレート表面上に突出するように選択する。図１に示すように、上端２２はプレート４２上に露出する。
【００１６】
次に、突出部分について、真空スパッタ、塗布、噴霧、浸漬や電気メッキなどの方法によって金属被覆し、これによって上端２２の外面に導電性材料を被覆して、陽極端子キャップ４０を形成する。
【００１７】
好ましい方法は、端子領域３８、４０上に非常に薄い膜をスパッタし、プレート４２から本体２０から取り外し、次に別な電気メッキ工程で端子３８、４０の肉厚を厚くする方法である。また、本体２０をプレート４２に挿入した後、スパッタする前に、真空下プラズマエッチング工程を行なって、本体２０の外面をクリーン化処理し、スパッタ膜の表面すべてに対する、あるいはその一部に対する電気的物理的付着（堆積）性を良好なものにすることも重要である。エッチング工程終了後、外側の誘電体２８の外面を従来知られている方法によって酸化処理する。他の方法も使用することができるが、この方法が好ましい方法である。
【００１８】
本発明のプレート４０の作用効果についていえば、一定の真空下で２つの工程（エッチング工程およびスパッタ工程）を実施できるため、スパッタ処理前にクリーン化表面が汚染される恐れや変質する恐れを最小限に抑えることができる。エッチング工程およびスパッタ工程については、別々な装置を用いて２段階で行なってもよい。
【００１９】
陽極端子キャップ４０の形成後、チップ成分を中空部４４から取り出し、再挿入するが、再挿入のさいに上端２２を中空部４４の底部におき、そして下端２４をプレート４２の上面上方に突出させる。次に、予め形成しておいた保護体の露出下端２４に陰極端子３８を形成する。
【００２０】
図１の状態では、端子キャップ３８が既にコンデンサー１０の陰極に形成されている。まず最初に端子キャップ３８か端子キャップ４０のいずれかを形成することができるが、中空部４４の大きさについては、キャップ３８または４０のいずれかを形成したコンデンサー４０を十分に収容できる大きさでなければならない。
【００２１】
図３について説明すると、複数の予め切断したコンデンサー体２０を対象とする複数の中空部４４をプレート４２に形成することができる。このようなプレートを利用すると、複数のコンデンサー体２０を一回の処理で被覆できる。次に、コンデンサー体２０を中空部から取り出し、これらを反転し、他端のすべてに陰極端子を被覆形成することができる。
【００２２】
図２、４および５に本発明方法の別な実施態様を示す。この実施態様では、ゴムなどの可撓性材料で構成したプレート４６に、これを貫通し、かつ大きさが予め切断されたコンデンサー体２０の横断面の大きさよりわずかに小さい貫通孔４８を形成する。この実施態様による方法では、上端２２をプレート４６上方に突出させ、下端２４を可撓性プレート４６下方に突き出した状態で予め切断したコンデンサー体２０を貫通孔４８に挿入する。このプレートの厚みについては、端子を形成するのが望ましいチップ成分の両端が突出するように選択する。
【００２３】
本実施態様による方法では、両端子（陽極端子４０および陰極端子３８）を、図１に示す方法について説明したように、同様な金属化処理手段によって同時に形成することができる。すなわち、この方法は真空下プラズマエッチングによって両端をクリーン化処理し、両端に導電性薄膜をスパッタし、プレートからチップを取り外し、次のメッキ工程で最終的に端子の厚みを増す工程からなる。第１工程で陽極端子４０を形成し、次の第２工程で陰極端子１６を形成することも可能である。
【００２４】
貫通孔４８の長さおよび幅については、貫通孔４８に挿入するチップ成分の寸法と同じか、わずかに小さくする。可撓性材料はチップ成分の形状にマッチするため、端子形成が望ましくない部分での金属化を防止できる上に、チップ成分の重力による貫通孔からの脱落を防止できる。
【００２５】
以上から理解できるように、本発明方法によれば、簡単かつ効率のよい手段でチップ導体両端に端子キャップを形成することができる。
【００２６】
添付図面および明細書において本発明の好適な実施態様を特定の用語・述語を使用して説明してきたが、本発明はこれらに制限されないものである。各構成部材やこれらと等価な部材における変更などは、いずれも特許請求の範囲に記載した発明の精神または範囲から逸脱せずに事情その他に応じて実施可能である。
【図面の簡単な説明】
【図１】
本発明で使用するプレートの中空部に挿入したコンデンサーを示す断面図である。
【図２】
コンデンサーを挿入するプレートの別な実施態様を示す、図１と同様な図である。
【図３】
図１に示したプレートの側面図である。
【図４】
図２で使用したプレートの上面図である。
【図５】
図２に示したプレートの側面図である。
【符号の説明】
１０：コンデンサー
１２：ペレット
１４：陽極ペレット端部
１６：陰極ペレット端部
２０：コンデンサー体
２２：上端
２４：下端
２６：中心部分
４２：保持部材
４４：中空部[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming a terminal of a chip component.
[0002]
[Prior art]
In the case of a chip component such as a tantalum capacitor, it is necessary to form terminal caps at opposite ends of the chip body. There are many methods for forming these terminal caps, and in each case, a capacitor is coated with a conductive material by a method such as sputtering or electroplating. When these methods are used, a central portion between both ends of the chip body is shielded by a mask or a shield or other means so that a conductive material is not formed thereon.
[0003]
[Problems to be solved by the invention]
That is, a first object of the present invention is to provide an improved method for forming terminals on chip components.
[0004]
A second object of the present invention is to provide an improved method of coating a conductive material on opposite ends of a chip component body and masking a portion adjacent to a central portion of the chip component body while forming a terminal cap. That is.
[0005]
A third object of the present invention is to provide a method for forming a terminal cap on a plurality of chip components at one time.
[0006]
A fourth object of the present invention is to provide a method for improving the terminal formation of a chip component, which is economical, durable and can produce an efficient chip component.
[0007]
[Means for Solving the Problems]
The above object can be achieved by the following modes. First, a chip component having a first end and a second end facing each other and forming a terminal and having a center portion between the first end and the second end is prepared. Next, the chip component is inserted into the cavity of the holding member. Since the depth of the hollow portion is smaller than the distance between the first end and the second end of the chip component, when the chip component is inserted into the hollow portion, the second end and the central portion are hollow. The first end is located inside the hollow part, and the first end is located outside the hollow part. A first conductive terminal is formed on the outer surface of the first end, and at the same time, the second end is masked in the hollow portion of the holding member so that the conductive terminal is not formed. Next, the chip component is taken out of the hollow portion, and the chip component is reinserted into the hollow portion such that the first end and the second end are located inside the hollow portion and the second end is located outside the hollow portion. I do. Next, a second conductive terminal is formed on the outer surface of the second end, and at the same time, the central portion and the first end are masked in the hollow portion of the holding member so that the conductive terminal is not formed.
[0008]
Various methods can be used to form the first conductive terminal and the second conductive terminal on the chip component. For example, a method of sputtering, spraying or applying a conductive material to the first end and the second end, a method of immersing the first end and the second end in a liquid of the conductive material, a method of immersing the first end and the second end, There is a method of electroplating a conductive material on each of two ends. Furthermore, the operation and effect of the present invention can be realized by using another known method of coating the outer surface of the first end and the second end of the chip component with a conductive material.
[0009]
Furthermore, according to the second aspect of the present invention, it is also possible to use a flexible plate having a through hole. The chip component is inserted into the through-hole with the first end and the second end placed outside the both ends of the through-hole, and the center located inside the through-hole. Next, a conductive material is formed at the first end and the second end of the chip component, and at the same time, the central portion is masked so that the conductive material is not formed.
[0010]
To achieve this feature, a conductive material may be simultaneously formed on both the first and second ends of the chip component, or a conductive material may be formed on the first end and then the second end. A conductive material may be separately formed in the portion.
[0011]
Further, according to a third aspect of the present invention, a plurality of hollow portions or through holes for a plurality of chip components are formed in the plate, and the first end and the second end of the chip components are formed in one operation. It is also possible to cover all parts with a conductive material.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Referring to FIG. 1, reference numeral 10 denotes a capacitor inserted into a hollow portion 44 formed in a rigid plate 42. This condenser 10 is composed of a pellet 12 having an anode pellet end 14 and a cathode pellet end 16. An anode wire 18 is buried in the anode pellet end 14 of the pellet 12 and extends therefrom.
[0013]
Reference numeral 20 denotes a pre-cut capacitor body having an upper end 22, a lower end 24, and a center 26. The capacitor body 20 is formed from a non-conductive outer protective body 28 having recesses 30 and 32 on the side adjacent the lower end. The bottom end of the pellet 12 is surrounded by the cathode conductor 34 disposed on the bottom of the outer protective body 28. A flat cathode conductor surface 36 at the lower end of the cathode conductor 34 is exposed on the surface of the protective body 28. The same anode wire 18 is exposed on the outer protective body 28 to form an anode conductive surface 19.
[0014]
The cathode terminal 38 covers the lower end 24 of the outer protective body 28, and the anode terminal 40 covers the upper end 22 of the outer protective body 28. These terminals 38 and 40 can be joined to a circuit board on which the capacitor 10 is mounted on an electric circuit. When the method described below is applied to a capacitor, the above method can be applied to any type of chip component that needs to form terminals at both ends.
[0015]
In the case of the method shown in FIG. 1, it is necessary to insert the condenser body 20 without the terminals 38 and 40 into the hollow portion 44 of the rigid plate 42. The depth of the hollow portion 44 is selected so that the end portion of each component for which a terminal is desired to be formed projects above the plate surface. As shown in FIG. 1, the upper end 22 is exposed on the plate 42.
[0016]
Next, the protruding portion is metal-coated by a method such as vacuum sputtering, coating, spraying, dipping, or electroplating, thereby coating the outer surface of the upper end 22 with a conductive material to form the anode terminal cap 40.
[0017]
A preferred method is to sputter a very thin film on the terminal areas 38, 40, remove it from the body 20 from the plate 42, and then increase the thickness of the terminals 38, 40 in another electroplating step. Also, after the main body 20 is inserted into the plate 42 and before sputtering, a plasma etching process is performed under vacuum to clean the outer surface of the main body 20 and to electrically control the entire surface of the sputtered film or a part thereof. It is also important to have good physical adhesion (deposition). After the etching step, the outer surface of the outer dielectric 28 is oxidized by a conventionally known method. Other methods can be used, but this is the preferred method.
[0018]
Regarding the function and effect of the plate 40 of the present invention, since two steps (etching step and sputtering step) can be performed under a certain vacuum, the risk of contamination or deterioration of the clean surface before the sputtering processing is minimized. Can be minimized. The etching step and the sputtering step may be performed in two stages using different apparatuses.
[0019]
After the formation of the anode terminal cap 40, the chip component is removed from the hollow portion 44 and reinserted, and the upper end 22 is placed at the bottom of the hollow portion 44 and the lower end 24 is projected above the upper surface of the plate 42 during reinsertion. . Next, a cathode terminal 38 is formed on the exposed lower end 24 of the protective body formed in advance.
[0020]
In the state of FIG. 1, the terminal cap 38 has already been formed on the cathode of the capacitor 10. First, either the terminal cap 38 or the terminal cap 40 can be formed, but the size of the hollow portion 44 should be large enough to accommodate the capacitor 40 formed with either the cap 38 or 40. There must be.
[0021]
Referring to FIG. 3, a plurality of hollow portions 44 for a plurality of pre-cut capacitor bodies 20 can be formed in the plate 42. When such a plate is used, a plurality of capacitor bodies 20 can be covered in one process. Next, the capacitor body 20 is taken out from the hollow portion, these are inverted, and the entire other end can be coated with the cathode terminal.
[0022]
2, 4 and 5 show another embodiment of the method of the invention. In this embodiment, a through hole 48 is formed in a plate 46 made of a flexible material such as rubber, and penetrates the plate 46 and has a size slightly smaller than the cross-sectional size of the pre-cut capacitor body 20. . In the method according to this embodiment, the pre-cut capacitor body 20 is inserted into the through hole 48 with the upper end 22 projecting above the plate 46 and the lower end 24 projecting below the flexible plate 46. The thickness of the plate is selected so that both ends of the chip component for which terminals are desired to be formed project.
[0023]
In the method according to this embodiment, both terminals (the anode terminal 40 and the cathode terminal 38) can be formed simultaneously by the same metallization processing means as described for the method shown in FIG. In other words, this method comprises a step of cleaning both ends by plasma etching under vacuum, sputtering a conductive thin film on both ends, removing the chip from the plate, and finally increasing the terminal thickness in the next plating step. The anode terminal 40 can be formed in the first step, and the cathode terminal 16 can be formed in the next second step.
[0024]
The length and width of the through hole 48 are the same as or slightly smaller than the dimensions of the chip component inserted into the through hole 48. Since the flexible material matches the shape of the chip component, it is possible to prevent metallization in a portion where terminal formation is not desired and also prevent the chip component from dropping out of the through hole due to gravity.
[0025]
As can be understood from the above, according to the method of the present invention, terminal caps can be formed at both ends of the chip conductor by simple and efficient means.
[0026]
Although the preferred embodiments of the present invention have been described using specific terms and predicates in the accompanying drawings and specification, the present invention is not limited thereto. Changes in each of the constituent members and members equivalent thereto can be made according to circumstances and the like without departing from the spirit or scope of the invention described in the claims.
[Brief description of the drawings]
FIG.
It is sectional drawing which shows the capacitor inserted in the hollow part of the plate used by this invention.
FIG. 2
FIG. 2 is a view similar to FIG. 1, showing another embodiment of a plate for inserting a condenser.
FIG. 3
It is a side view of the plate shown in FIG.
FIG. 4
FIG. 3 is a top view of the plate used in FIG. 2.
FIG. 5
FIG. 3 is a side view of the plate shown in FIG. 2.
[Explanation of symbols]
10: condenser 12: pellet 14: anode pellet end 16: cathode pellet end 20: condenser body 22: upper end 24: lower end 26: central portion 42: holding member 44: hollow portion
Claims (11)
深さが上記チップ成分の相互に対向する第１端部と第２端部との間の距離より浅い、保持部材の中空部に挿入し、これによって上記第２端部と上記中心部を上記中空部内におくとともに、上記第１端部を上記中空部外におき、上記第１端部の外面に導電性の第１端子を形成し、同時に上記保持部材の上記中空部内の上記中心部と上記第２端部をマスクして、上記導電性端子が形成しないようにし、上記中空部から上記チップ成分を取り出し、上記中空部に上記チップ成分を再挿入して、上記第１端部および上記中心部を上記中空部内におくとともに、上記第２端部を上記中空部外におき、上記第２端部の外面に導電性の第２端子を形成し、同時に上記保持部材の上記中空部内の上記中心部分と上記第１端部をマスクして、上記導電性端部が形成しないようにしたを特徴とするチップ成分の端子形成方法。A terminal is formed on a chip component having a first end and a second end facing each other that need to form a terminal, and having a central portion between the first end and the second end. In the method
The tip component is inserted into the hollow portion of the holding member, the depth being smaller than the distance between the first and second end portions of the chip component facing each other. Along with the inside of the hollow portion, the first end portion is placed outside the hollow portion, and a conductive first terminal is formed on an outer surface of the first end portion. The second end is masked so that the conductive terminal is not formed, the chip component is taken out from the hollow portion, the chip component is reinserted into the hollow portion, and the first end and the A central portion is placed inside the hollow portion, the second end portion is placed outside the hollow portion, and a conductive second terminal is formed on an outer surface of the second end portion. The conductive end is shaped by masking the central portion and the first end. Terminal forming method of the chip component, wherein the non manner.
プレートを貫通する貫通孔であって、上記第１端部および第２端部がこの貫通孔の両端外に位置し、かつ上記中心部分がこの貫通孔内に位置する位置まで達する貫通孔に上記チップ部材を挿入し、上記チップ成分の上記第１端部および第２端部上に導電性材料を形成し、同時に上記中心部分をマスクし、上記導電性材料が形成しないようにしたことを特徴とするチップ成分の端子形成方法。A terminal is formed on a chip component having a first end and a second end facing each other that need to form a terminal, and having a central portion between the first end and the second end. In the method
A through hole passing through the plate, wherein the first end and the second end are located outside both ends of the through hole, and the central portion reaches a position located in the through hole. A tip member is inserted, a conductive material is formed on the first end and the second end of the chip component, and the central portion is simultaneously masked so that the conductive material is not formed. A method for forming terminals of chip components.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/758,800 US6541302B2 (en) | 2001-01-11 | 2001-01-11 | Method of forming termination on chip components |
| PCT/US2001/002020 WO2002056323A1 (en) | 2001-01-11 | 2001-01-22 | Method of forming termination of chip components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004518276A true JP2004518276A (en) | 2004-06-17 |
| JP3778895B2 JP3778895B2 (en) | 2006-05-24 |
Family
ID=25053166
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002556897A Expired - Fee Related JP3778895B2 (en) | 2001-01-11 | 2001-01-22 | Capacitor terminal forming method |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6541302B2 (en) |
| JP (1) | JP3778895B2 (en) |
| WO (1) | WO2002056323A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8394469B2 (en) | 2004-07-14 | 2013-03-12 | Yamaha Hatsudoki Kabushiki Kaisha | Exhaust pipe for internal combustion engine |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7088573B2 (en) * | 2004-03-02 | 2006-08-08 | Vishay Sprague, Inc. | Surface mount MELF capacitor |
| US7085127B2 (en) * | 2004-03-02 | 2006-08-01 | Vishay Sprague, Inc. | Surface mount chip capacitor |
| US6914770B1 (en) | 2004-03-02 | 2005-07-05 | Vishay Sprague, Inc. | Surface mount flipchip capacitor |
| US20060172062A1 (en) * | 2005-01-28 | 2006-08-03 | Mu-Yuan Chen | Method for manufacturing a plating seed layer of electronic elements |
| US8062385B2 (en) * | 2008-02-12 | 2011-11-22 | Kemet Electronics Corporation | Solid electrolytic capacitor with improved volumetric efficiency method of making |
| JP7203323B2 (en) * | 2018-12-12 | 2023-01-13 | パナソニックＩｐマネジメント株式会社 | Solid electrolytic capacitor and manufacturing method thereof |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4561954A (en) | 1985-01-22 | 1985-12-31 | Avx Corporation | Method of applying terminations to ceramic bodies |
| US4688322A (en) | 1986-02-06 | 1987-08-25 | Sprague Electric Company | Solid electrolyte chip capacitor method |
| US4741077A (en) | 1987-05-15 | 1988-05-03 | Sfe Technologies | End terminations for capacitors |
| US4859498A (en) * | 1987-11-18 | 1989-08-22 | Murata Manufacturing Co., Ltd. | Chip component holding plate |
| US5226382A (en) | 1991-05-20 | 1993-07-13 | Denver Braden | Apparatus for automatically metalizing the terminal ends of monolithic capacitor chips |
| JPH06188161A (en) * | 1992-12-19 | 1994-07-08 | Taiyo Yuden Co Ltd | Coating jig for chip component and coating method using same |
| JPH07263273A (en) * | 1994-03-24 | 1995-10-13 | Mitsubishi Materials Corp | Formation method of terminal electrode |
| JP3728707B2 (en) * | 1996-03-07 | 2005-12-21 | 株式会社村田製作所 | Application method and application device for electronic component substrate |
| DE19634495C2 (en) | 1996-08-26 | 2003-04-03 | Epcos Ag | Process for the metallization of component bodies of electro-ceramic components |
-
2001
- 2001-01-11 US US09/758,800 patent/US6541302B2/en not_active Expired - Fee Related
- 2001-01-22 WO PCT/US2001/002020 patent/WO2002056323A1/en active Application Filing
- 2001-01-22 JP JP2002556897A patent/JP3778895B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8394469B2 (en) | 2004-07-14 | 2013-03-12 | Yamaha Hatsudoki Kabushiki Kaisha | Exhaust pipe for internal combustion engine |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002056323A1 (en) | 2002-07-18 |
| JP3778895B2 (en) | 2006-05-24 |
| US6541302B2 (en) | 2003-04-01 |
| US20020090790A1 (en) | 2002-07-11 |
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