JP2004363211A - Semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To avoid malfunction resulting from undesired voltage drop after a semiconductor chip is manufactured. <P>SOLUTION: In the semiconductor integrated circuit, a plurality of blocks which are divided and formed in a prescribed circuit scale, first power supply wirings (101, 102, 103, 104) for supplying power to a plurality of the blocks, a second power supply wiring (109) for taking in voltage of a level higher than the power supply voltage taken in through the first power supply wiring, and a power supply path switch means (105, 106, 107, 108) which can be changed into power supply from a second power supply wiring are installed. After semiconductor chip manufacture, power supply from the first power supply wirings can be changed into power supply from the second power source wiring, thereby avoiding the malfunction resulting from undesired voltage drop. As a result, power supply is performed to a part where undesired voltage drop is generated or a part where the degree of seriousness is high, through the second power supply wiring prepared independently of the first power supply wirings, so that various troubles resulting from the undesired voltage drop can be avoided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor integrated circuit and a technique for avoiding a malfunction due to an undesired voltage drop therein.
[0002]
[Prior art]
In order to operate a semiconductor integrated circuit, it is generally necessary to supply power. Such power supply is usually performed via power supply pads or power supply wiring formed around or inside the semiconductor chip. If the power consumed by the semiconductor integrated circuit can be accurately grasped, the circuit can be operated as intended by the designer by laying out sufficient power supply wiring necessary to supply the power consumption. . Laying the necessary and sufficient power supply wiring in this manner is desirable from the viewpoint of chip cost, because the area on the semiconductor chip occupied by the power supply wiring can be optimized.
[0003]
However, when a large number of circuit elements are present on a semiconductor chip, it is difficult to accurately grasp where and how much power is consumed at the time of design. In recent semiconductor integrated circuits, the scale of a circuit mounted on one chip is not rarely several million gates or more, and power supply analysis in design is becoming more difficult.
[0004]
Insufficient power supply wiring strength (width of wiring, number of layers, etc.) for the power consumption assumed at the time of design causes an undesired voltage drop at a certain location in the chip. In other words, if the strength of the power supply wiring is insufficient, the resistance and inductance of the power supply wiring increase, so that a voltage drop (a so-called IR drop) occurs according to the product of the current and the resistance, or a change component of the current and the inductance. , A voltage drop (so-called LdI / dt drop) occurs. When a voltage drop occurs with respect to the original power supply voltage, the apparent power supply voltage becomes small, which causes various inconveniences. For example, in a digital circuit, the operation speed is slow, and the logical value is not accurately determined because the reference of the potential level is shifted. In addition, an analog circuit has a limited operation range with respect to a voltage, and thus may not be able to operate.
[0005]
The power supply voltage used in semiconductor integrated circuits tends to decrease with the miniaturization of the process, so even with the same amount of voltage drop, as the process miniaturization progresses, the undesired voltage drop becomes more serious. Become.
[0006]
By the way, if the power consumption (or current consumption) estimated at the time of design differs from the actual power consumption (current consumption), it may happen that the semiconductor chip does not operate as originally intended after the semiconductor chip is operated after manufacturing. Prove. Once a semiconductor chip has been manufactured and the chip does not operate, it is necessary to re-design the semiconductor chip, and in that case, economic and time losses are large.
[0007]
Therefore, we accurately analyze the circuit scale and operating conditions as much as possible at the time of design, estimate how much current will flow to which location, and then lay out the power wiring sufficient to supply it And so on. For example, a logic circuit portion performing a predetermined logic operation, a first power supply line provided on the logic circuit portion and supplying a power supply voltage to the logic circuit portion, and a first power supply line on the logic circuit portion A second power supply line, which is provided in a different layer from the first power supply line and is connected via a contact at an intersection with the first power supply line. There is known a technique for setting the number and position of contacts provided between the first power supply line and the second power supply line so that the amount is minimized (see Patent Document 1). Further, in a semiconductor integrated circuit device comprising: a circuit portion performing a predetermined circuit operation; a power supply line provided on the circuit portion for supplying power to the circuit portion; and a power supply pad connected to the power supply line. The power is supplied from a power supply pad different from the power supply pad connected to the power supply wiring, and two minutes so that the voltage drop amount in each area of the circuit section divided by the power supply wiring falls within a predetermined value or less. There is known a technique in which a reinforcing power supply wiring connected to the power supply wiring in a tree shape is provided (see Patent Document 2).
[0008]
[Patent Document 1]
JP-A-10-284690 (FIG. 1)
[Patent Document 2]
Japanese Patent Application Laid-Open No. 11-45977 (FIG. 1)
[0009]
[Problems to be solved by the invention]
However, when the inventors of the present application have examined the above-described conventional technology, it is extremely difficult to accurately predict where and how much power is consumed in a semiconductor chip as the number of integrated elements increases, In such a situation, it has been found that only after the semiconductor chip is operated after manufacturing, an operation defect or a defect is found. Even if it is found that a voltage drop occurs in the power supply wiring after the manufacture of the semiconductor chip, it has to be redesigned, and the cost and time required for the redesign are large. In order to prevent such inconvenience, it is common to try to lay out the power supply wiring after analyzing the circuit scale and operating conditions as accurately as possible at the time of design, but when the circuit scale becomes large, It is becoming virtually impossible to accurately determine the power consumption associated with operation. This is because, for example, it is impossible to calculate power for all input patterns because the number of combinations of inputs to the circuit increases exponentially. Further, with the progress of miniaturization of semiconductor processing technology, the number of mountable elements has been increased, so that many functional blocks can be mounted on one chip. At that time, since there are many combinations of whether or not to operate each functional block, the operating conditions of the entire chip are variously different. As described above, since there are many operating conditions of the chip, it is very difficult to accurately calculate the power consumption under all the conditions.
[0010]
In addition to the causes described above, there are other factors that make accurate estimation of power consumption difficult. Elements and wirings used in integrated circuits may vary in various physical quantities due to manufacturing reasons. Such variations include the material characteristics and impurity concentration of the parts constituting each terminal (source, gate, drain, substrate) of the transistor, the transistor characteristics (threshold and current amount) determined thereby, Various things such as the width and thickness of the wiring are included. Since the variation differs depending on the location in the chip, the current value and the capacitance value vary depending on the location. As a result, the power consumption also varies from place to place from a typical calculation result.
[0011]
As described above, for various reasons, it is difficult to accurately grasp where and how much power is consumed in a chip before manufacturing the semiconductor chip. Therefore, it is also difficult to accurately predict where and how much the voltage drop occurs on the chip. On the other hand, if a defect is found after the manufacture of a semiconductor chip, the manufactured chip cannot be used, so that not only is it economically lost, but if it is redesigned, it will be time and economically large. Therefore, even after the semiconductor chip is manufactured, if a malfunction caused by an undesired voltage drop can be avoided, the above-described economical and time-related losses can be avoided.
[0012]
An object of the present invention is to provide a technique for avoiding a malfunction caused by an undesired voltage drop after a semiconductor chip is manufactured.
[0013]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0014]
[Means for Solving the Problems]
The outline of a representative invention among the inventions disclosed in the present application will be briefly described as follows.
[0015]
That is, a plurality of blocks divided and formed in a predetermined circuit scale, a first power supply line for supplying power to the plurality of blocks, and a voltage input through a path different from the first power supply line are possible. And a power supply path switching unit capable of changing the power supply from the first power supply line to the power supply from the second power supply line to form a semiconductor integrated circuit. .
[0016]
According to the above-described means, the second power supply wiring can take in a voltage at a higher level than the power supply voltage transmitted via the first power supply wiring. Then, the power supply path switching means can change the power supply from the first power supply wiring to the power supply from the second power supply wiring after manufacturing the semiconductor chip. This achieves prevention of malfunction due to an undesired voltage drop after manufacturing the semiconductor chip.
[0017]
At this time, in order to automatically avoid malfunction due to the undesired voltage drop, first power supply voltage detecting means for detecting a power supply voltage taken in through the first power supply wiring, and Preferably, a comparator for comparing the detection result of the first power supply voltage detection means with a reference voltage is provided, and the operation of the power supply path switching means is controlled based on the comparison result of the comparator.
[0018]
Further, in order to avoid a malfunction caused by the undesired voltage drop according to the operating condition of the semiconductor chip, a first power supply voltage detection for detecting a power supply voltage taken in through the first power supply wiring is provided. Means, a plurality of reference voltage generation circuits capable of forming reference voltages having different voltage levels from each other, selection means capable of selecting output voltages of the plurality of reference voltage generation circuits, and detection of the first power supply voltage detection means The block may include a comparator for comparing the result with a reference voltage selected by the selection unit.
[0019]
Further, the value of the reference voltage can be changed according to the type of the block.
[0020]
Then, a booster circuit for boosting the voltage of the first power supply wiring and supplying the boosted voltage to the second power supply wiring can be provided.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 4 shows a main part of a semiconductor integrated circuit according to the present invention.
[0022]
Although not particularly limited, the semiconductor integrated circuit 41 shown in FIG. 4 is a general-purpose processor, and is formed on one semiconductor substrate such as a single crystal silicon substrate by a known semiconductor integrated circuit manufacturing technique. The semiconductor integrated circuit 41 has a plurality of blocks divided and formed in a predetermined circuit scale. In the example shown in FIG. 4, a region in which the entire block is surrounded by power supply wiring having sufficiently small resistance (or inductance) is divided into 30 blocks (X coordinates: 1 to 6, Y coordinates: 1 to 5). ) Is shown. In the figure, 30 blocks are drawn with the same size as each other, but need not necessarily be the same size.
[0023]
Here, it is assumed that, for example, the block 301 at the coordinates [X = 2, Y = 2] is a digital circuit block having a high degree of voltage drop. The case where the voltage drop is high in severity is, for example, a case where the operation frequency of this block 301 is relatively high as compared with other blocks. For example, an instruction decoding circuit or the like which determines the processing performance of the microprocessor is used. It is included in this. In such a case, power is preferentially supplied as the power supply of the block 301 via a second power supply wiring, which will be described later, so that a malfunction due to an undesired voltage drop is avoided. .
[0024]
FIG. 1 shows a detailed configuration example of the block 301 in the semiconductor integrated circuit 41. The other blocks have the same configuration.
[0025]
In order to supply power to a circuit unit (power consumption unit) 302 in the block 301, power supply wiring is laid so as to surround the circuit unit 302. The power supply wiring includes first power supply wirings 101, 102, 103, and 104, and a second power supply wiring 109 formed separately therefrom.
[0026]
The first power supply wirings 101, 102, 103, and 104 are wirings for supplying power to many circuits in the semiconductor chip, and correspond to power supply wirings in a conventional circuit. The first power supply wirings 101, 102, 103, and 104 include wirings (101, 103) formed in the vertical direction and wirings (102, 104) formed to intersect the wirings (101, 103). The internal circuit 302 is supplied with power by wiring drawn from these (or directly from the vertical wirings 101 and 103 and the horizontal wirings 102 and 104). In addition, between adjacent blocks, the first power supply wirings 101, 102, 103, and 104 are switch elements 105 and 106 that can change their electrical conduction state in order to enable switching of a power supply path after manufacturing a semiconductor chip. , 107, and 108.
[0027]
The second power supply wiring 109 is different from the first power supply wirings 101, 102, 103, and 104, and is a wiring for supplying power only to a specific circuit portion in a semiconductor chip. Second power supply wiring 109 is coupled to first power supply wirings 101, 102, 103, 104 via corresponding switch element 110.
[0028]
The switch elements 105, 106, 107, 108, and 110 are MOS transistors or bipolar transistors that can be controlled to be electrically conductive, and can be switched by a signal externally applied through an external terminal, for example. You. Here, the switch elements 105, 106, 107, 108, 110 are an example of a power supply path switching unit in the present invention.
[0029]
When an undesired voltage drop does not occur in any of the blocks, the switch element (110) connecting between the first power supply wiring and the second power supply wiring is turned off. However, if it is found that an undesired voltage drop occurs in a specific block (referred to as a “target block”), the target block is relieved as follows in the semiconductor integrated circuit having the above structure.
[0030]
First, the switch elements 105, 106, 107, and 108 are turned off so that the first power supply wiring around the target block is separated from the first power supply wiring of the adjacent block. For example, when the first power supply wiring 101 running in the left vertical direction in the target block is separated, the switch elements 105 and 106 are turned off. Similarly, when separating the first power supply wiring 102 running laterally below the target block, the switch elements 107 and 108 are turned off. In the same manner, the first power supply wiring 103 running in the vertical direction to the right of the target block and the first power supply wiring 104 running in the horizontal direction on the target block can be separated.
[0031]
Next, in order to supply power to the target block from the second power supply line 109, the switch element 110 between the first power supply line and the second power supply line is brought into an electrically conductive state. . The switch element 110 makes the left power supply wiring and the second power supply wiring of the target block conductive. In addition, if necessary, the switch element can also be set to a conductive state between the first power supply line and the second power supply line on the right and upper and lower sides of the circuit portion 302.
[0032]
As described above, the target block is preferentially supplied with power from the second power supply wiring 109. The second power supply wiring 109 does not need to supply power to a large number of other blocks unlike the first power supply wirings 101, 102, 103, and 104, and the voltage drop there is negligible.
[0033]
Here, the second power supply wiring 109 as described above is a wiring that can change electrical continuity with the power supply wirings of the majority of other blocks and the first power supply wiring of the target block after manufacturing the semiconductor chip. However, such a second power supply wiring 109 is not limited to one type as in the above example, but may be a plurality of types.
[0034]
As shown in FIG. 5, it is assumed that the block 303 at the coordinates [X = 5, Y = 4] is another digital circuit block having a high degree of voltage drop, for example, an arithmetic unit block operating at a high frequency. In such a case, in addition to the block 301, by connecting the arithmetic unit block 303 to the second power supply wiring, it is possible to rescue two blocks having a high voltage drop severity.
[0035]
Next, a specific configuration example of the main part will be described.
[0036]
7 to 10, switch elements between the first power supply lines 101, 102, 103, 104 and the second power supply line 109, and switch elements between the first power supply lines between the blocks, The case where a MOS transistor is applied is shown.
[0037]
In FIG. 7, the first power supply lines 101, 102, 103, 104 and the second power supply line 109 are both constituted by vertical second-layer metal lines M2. Reference numerals 501, 502, 503, 504, and 505 denote a polysilicon layer, a source / drain region, a contact between the source / drain region and the first-layer metal wiring M1, a first-layer metal wiring M1 and a second-layer metal wiring M2, respectively. And stacked vias (stacking of contacts and vias) between source / drain regions and the second layer metal wiring. Here, a control signal 506 is transmitted to the gate 501 of the MOS transistor. By controlling the on / off state of the MOS transistor by the control signal 506, the first power supply wiring and the second It is possible to switch between a conductive state and a non-conductive state with the power supply wiring. Since the MOS transistor can be formed below the wiring, there is no disadvantage on the chip area. Although FIG. 7 shows the case where the MOS transistors are arranged on both the first and second power supply lines, they may be arranged on either one of them. For example, FIG. 8 shows a case where a MOS transistor is arranged on the second power supply wiring side as an example.
[0038]
In FIG. 9, both the first power supply wiring and the second power supply wiring are formed by the second-layer metal wiring M2 in the horizontal direction. The specific configuration is the same as that shown in FIG. 7, and a detailed description thereof will be omitted. FIG. 9 shows the case where the MOS transistors are arranged on both the first and second power supply lines, but they may be arranged on either one of them. FIG. 10 shows, as an example, a case where a MOS transistor is arranged on the second power supply wiring side.
[0039]
Here, according to the conventional technology, if the power wiring strength (such as the width and the number of layers) of the actually laid power supply is insufficient with respect to the power consumption assumed at the time of design, in FIG. As shown by, an undesired voltage drop occurs at some point in the chip. In other words, if the strength of the power supply wiring is insufficient, the resistance and inductance of the power supply wiring increase, so that a voltage drop occurs according to the product of the current and the resistance, or the product of the change component of the current and the inductance. A voltage drop occurs. For example, as shown in FIG. 3, when the voltage drop 204 occurs with respect to the original power supply voltage 203, the apparent power supply voltage 205 decreases, which causes various inconveniences. For example, in a digital circuit, the operation speed is slow, and the logical value is not accurately determined because the reference of the potential level is shifted. In addition, an analog circuit has a limited operation range with respect to a voltage, and thus may not be able to operate.
[0040]
On the other hand, in the above example, the switch element 110 causes the first power supply wirings 101, 102, 103, 104 and the second power supply wiring 109 to be in a conductive state. The power can be preferentially supplied from the second power supply wiring. The second power supply wiring 109 does not need to supply power to a large number of other blocks unlike the first power supply wirings 101, 102, 103, and 104, so that the voltage drop there can be ignored. That is, according to the second power supply voltage 109, it is possible to take in a voltage at a higher level than the power supply voltage taken in through the first power supply wirings 101, 102, 103, 104. Therefore, various inconveniences caused by an undesired voltage drop can be eliminated in the target block.
[0041]
FIG. 6 shows a simulation result in a case where a block having a high voltage drop as described above is relieved after manufacturing a semiconductor chip. In the figure, there are a total of 81 blocks (9 divisions in each of the X and Y directions), of which two blocks with high severity ([X = 5, Y = 3] and [X = 6, Y = 6], which are hereinafter referred to as critical blocks) (for example, high-frequency operation circuits such as the above-described instruction decode circuit and arithmetic unit block). A simulation of how the voltage drop changes between when the present invention is not used and when the present invention is used is as follows. In comparison, the comparison conditions are the same when the present invention is not used and when the present invention is used.
[0042]
First, FIG. 6A shows a case where power is supplied to all the blocks from the same power supply wiring as in the related art. In this case, the drop of the power supply voltage (1.5 V) is 93.8 mV and 86.7 mV in the two critical blocks (critical points), respectively. If the same wiring width is used on the ground side as on the power supply side, a voltage drop occurs on both the power supply and the ground.Therefore, the speed degradation of the logic circuit in these blocks is smaller than when there is no voltage drop. , About 25%, about 16%.
[0043]
On the other hand, FIG. 6B shows a case where the first and second power supply wirings are used, and power is supplied to two critical blocks (critical points) through the second power supply wiring 109. I have. It can be seen that in the two critical blocks, the voltage drop is reduced to less than half compared to the previous case where the present invention is not used. As a result, the speed deterioration rate of the logic circuit is also greatly reduced.
[0044]
According to the above example, the following effects can be obtained.
[0045]
(1) The first power supply lines 101, 102, 103, 104 and the second power supply line 109 are made conductive by the switch element 110, so that the first power supply line 101 is connected to the target block. , 102, 103, and 104, power can be preferentially supplied from the second power supply wiring 109, which can take in a voltage higher than the power supply voltage taken in through the target block. Various inconveniences caused by a large voltage drop can be eliminated.
[0046]
(2) Since the power supply path can be switched by the switch element 110 after the semiconductor chip is manufactured, the operation and effect (1) can be obtained even after the semiconductor chip is manufactured.
[0047]
FIG. 11 shows another configuration example.
[0048]
In the configuration example shown in FIG. 11, a detection circuit 702 for detecting a power supply voltage drop is arranged in a part of a block, and based on a detection result of the detection circuit 702, an undesired voltage drop is caused. Malfunction is avoided. The power supply voltage drop may be detected at any location inside the block. In FIG. 11, as an example of such a location, the power supply branch line 701 connecting between the first power supply wires in the vertical direction is substantially used. It is located in the center. This takes into account that the location where the voltage drop is large inside the block is a location located farther from the first power supply wiring inside the normal block. Then, when a voltage drop larger than a certain reference amount occurs, the signal 703 of the switch element 704 between the first power supply wiring and the second power supply wiring and the switch elements 707 and 708 of the first power supply wiring. , 705, and 706, it is possible to relieve a portion where a significant voltage drop occurs.
[0049]
FIG. 12 shows a specific example when the detection circuit 702 is adopted.
[0050]
When the detection circuit 702 is used, as shown in FIG. 12, a control circuit including an allowable reference potential generation circuit 801, a comparator 803, and a storage element 804 is incorporated in a semiconductor chip.
[0051]
The detection result in of the detection circuit 802 and the output reference voltage ref from the reference voltage generation circuit 801 are compared by the comparator circuit (803), and the comparison result is stored in the storage element 804. Information stored in the storage element 804 is transmitted to the switch element as a control signal 805 thereof. Although the logic state of the control signal 805 is held by the storage element 804, when it is not necessary, the output signal of the comparator 803 can be used as the control signal of the switch element.
[0052]
The reference voltage ref can be generated, for example, by a reference voltage generation circuit having the configuration shown in FIG. In the figure, for example, five MOS transistors (gate widths W are equal to each other) stacked vertically under the same conditions are connected with reference to a reference voltage that gives an original power supply voltage (the higher power supply voltage side). The potential 806 of the first drain voltage is taken out (with reference to the reference), and is taken as the reference voltage ref. The number of vertical stacks is not limited to five. Further, the voltage take-out location can also be set arbitrarily.
[0053]
A plurality of reference voltages ref1 and ref2 having different values may be prepared and selected from the plurality of reference voltages according to the operating conditions of the semiconductor chip. For example, as shown in FIG. 14, two types of reference voltage generation circuits 801-1 and 802-2 are prepared, and the output voltage to be compared with which output voltage can be switched by the selector 903 according to the operating condition. good. Although not particularly limited, the selector 903 is selectively operated by a control signal transmitted through an external terminal. Further, as described later, the selection operation of the selector 903 may be controlled based on information stored in a memory provided in the semiconductor chip.
[0054]
The two types of reference voltage generation circuits 801-1 and 802-2 may be formed individually as shown in FIG. 15, but as shown in FIG. The reference voltages ref1 and ref2 may be extracted from different nodes in the transistor. Note that three or more types of reference voltages may be formed and selected as appropriate. FIG. 17 shows a configuration example in that case.
[0055]
A large number of allowable reference potential generation circuits 801-1 to 801-n for forming different reference voltages are provided, and output voltages from the large number of allowable reference potential generation circuits 801-1 to 801-n are provided at a subsequent stage. It is designed to be selected by the selector 1003 arranged. The operation of the selector 1003 is controlled by a signal output from a memory 1001 provided in a semiconductor chip. The memory 1001 stores a control value determined in advance according to the relationship between the operating voltage and the operating condition of the operating mode, and the value of the reference voltage ref can be changed by using the output signal. . If the memory 1001 is realized by a writable element after manufacturing a semiconductor chip, it is possible to program a selected reference voltage.
[0056]
In the above configuration, it is assumed that, for example, the semiconductor chip is operating at 1.5 V, and the operation mode is operation mode 1 in which a predetermined function block group operates. At this time, the control output 1002 stored in the memory 1001 selects the ith reference voltage (1004) from the output of the selector 1003 through the control signal [1, 0, 0]. And the voltage at the observation point. The configuration shown in FIG. 17 is advantageous, for example, when the semiconductor chip operates with a plurality of power supply voltages.
[0057]
Note that such operating conditions are not limited to the power supply voltage and the operating mode, but can also include the operating frequency of the semiconductor chip, the temperature sensed by the sensor of the semiconductor chip in actual operation, and the like.
[0058]
FIG. 18 shows another configuration example.
[0059]
The configuration shown in FIG. 18 includes a plurality of blocks having different reference drop voltages. For example, an analog block 1101 with a strictly limited voltage drop and a digital block 1102 with a strictly limited voltage drop are provided, and switch control circuits 181 and 182 are arranged correspondingly. The switch control circuits 181 and 182 can basically adopt the configuration shown in FIG. However, the information written in the memory 1101 is different from each other corresponding to the blocks 1101 and 1102. In such a configuration, for example, it is possible to use a 10% reference voltage drop in the analog block 1101 with a strictly limited voltage drop, and use a 20% reference voltage drop in the digital block 1102 with a strictly limited voltage drop.
[0060]
Further, in FIG. 18, it is possible to use not only one reference voltage effect for each block but also a plurality of reference voltage drops for each block. For example, for an analog block, one of three types of reference voltage drops (8%, 10%, 12%) is selected, and for a digital block, another three types of reference voltage drops (8%, 10%, 12%) are selected. 10%, 15%, 20%). According to this, it is possible to cope with the case where the sensitivity to the voltage drop differs for each block.
[0061]
FIG. 19 shows another configuration example.
[0062]
In this example, an internal booster circuit 1203 is provided to apply a voltage higher than that of the first power supply wiring 101 to the second power supply wiring 109. The booster circuit 1203 boosts the voltage taken in through the power supply pad and supplies the boosted voltage to the second power supply wiring 109. This configuration has the following advantages.
[0063]
If the transistor characteristics are worse than expected at the time of initial design due to variations in process conditions (for example, if the operation speed is reduced due to insufficient transistor current in a digital circuit), the target frequency of the chip is achieved. It may happen that it is not done. However, the target frequency may not be achieved at all points in the chip, and the target frequency may be slightly achieved only at a limited high-speed operation block. In such a case, if a voltage slightly higher than the original power supply voltage can be applied to the second power supply wiring 109 separated from the first power supply wiring 101 in the block, the target frequency is achieved. You can do it.
[0064]
It is not always easy to supply a high voltage to all blocks in order to achieve the target frequency in the case described above. This is because it is difficult to extract a large current when extracting a current from a booster circuit. (In a circuit such as a charge pump, a charge is accumulated in a capacitor to generate a boosted level. It is known that when the above current is taken out, the boosted potential level drops.) However, in the case where a high voltage needs to be supplied only to a limited small-scale block as in this example, a current much smaller than that supplied to all chips may be supplied to the second power supply wiring 109. Does not cause any inconvenience.
[0065]
Although the invention made by the present inventors has been specifically described above, the present invention is not limited thereto, and it goes without saying that various modifications can be made without departing from the gist of the invention.
[0066]
For example, in the above example, a switch element is provided as an example of the power supply path switching means. However, instead of this switch element, a fuse capable of turning off electric conduction or an electric conduction can be turned on. An element such as an antifuse can be applied.
[0067]
In the above description, the case where the invention made by the inventor is mainly applied to a general-purpose processor, which is the background of use, has been described. However, the present invention is not limited to this, and in particular, power is supplied by wiring Application to various semiconductor integrated circuits such as logic circuits, signal processors, ASICs (Application Specific ICs), gate arrays, FPGAs (Field Programmable Gate Array), image processors, semiconductor memories, system modules, memory modules, etc. Can be.
[0068]
The present invention can be applied on the condition that at least a circuit unit that needs to supply a power supply voltage is provided.
[0069]
【The invention's effect】
The effects obtained by the representative inventions among the inventions disclosed in the present application will be briefly described as follows.
[0070]
That is, by supplying power to a place where an undesired voltage drop is generated or a place where the degree of the voltage drop is high, via a second power supply wiring prepared separately from the first power supply wiring. In addition, various inconveniences caused by an undesired voltage drop can be avoided.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a detailed configuration example of a block included in a semiconductor integrated circuit according to the present invention.
FIG. 2 is an explanatory diagram of a voltage drop location in a semiconductor integrated circuit.
FIG. 3 is a voltage characteristic diagram between a power supply and a ground in a semiconductor integrated circuit.
FIG. 4 is an explanatory diagram of a configuration example of a main part in a semiconductor integrated circuit according to the present invention.
FIG. 5 is an explanatory diagram of a configuration example of a main part in a semiconductor integrated circuit according to the present invention.
FIG. 6 is an explanatory diagram of a case where a block included in the semiconductor integrated circuit is rescued after manufacturing a semiconductor chip.
FIG. 7 is an explanatory diagram of a configuration example of a main part included in the semiconductor integrated circuit.
FIG. 8 is an explanatory diagram of a configuration example of a main part included in the semiconductor integrated circuit.
FIG. 9 is an explanatory diagram of a configuration example of a main part included in the semiconductor integrated circuit.
FIG. 10 is an explanatory diagram of a configuration example of a main part included in the semiconductor integrated circuit.
FIG. 11 is a circuit diagram illustrating another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 12 is a block diagram illustrating another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 13 is a circuit diagram showing another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 14 is a block diagram showing another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 15 is a circuit diagram illustrating another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 16 is a circuit diagram illustrating another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 17 is a block diagram illustrating another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 18 is an explanatory diagram of another configuration example of a main part included in the semiconductor integrated circuit.
FIG. 19 is an explanatory diagram of another configuration example of a main part included in the semiconductor integrated circuit.
[Explanation of symbols]
101-104 First power supply wiring
105, 106, 107, 108 switch element
109 Second power supply wiring
301 blocks
302 circuit section

Claims (5)

A plurality of blocks divided and formed in a predetermined circuit scale;
A first power supply wiring for supplying power to the plurality of blocks;
A second power supply line that enables voltage to be taken in through a different path from the first power supply line;
A semiconductor integrated circuit, comprising: a power supply path switching unit capable of changing power supply from the first power supply line to power supply from the second power supply line. A first power supply voltage detecting means for detecting a power supply voltage taken in through the first power supply wiring;
2. The semiconductor according to claim 1, further comprising: a comparator for comparing a detection result of said first power supply voltage detection means with a reference voltage, wherein said power supply path switching means is operation-controlled based on a comparison result of said comparator. Integrated circuit. A first power supply voltage detecting means for detecting a power supply voltage taken in through the first power supply wiring;
A plurality of reference voltage generation circuits capable of forming reference voltages having different voltage levels from each other;
Selecting means for selecting output voltages of the plurality of reference voltage generating circuits;
A comparator for comparing a detection result of the first power supply voltage detection means with a reference voltage selected by the selection means,
2. The semiconductor integrated circuit according to claim 1, wherein the operation of the power supply path switching means is controlled based on a result of the comparison by the comparator. 4. The semiconductor integrated circuit according to claim 3, wherein the value of the reference voltage is changed according to the type of the block. 5. The semiconductor integrated circuit according to claim 1, further comprising a booster circuit for boosting a voltage of said first power supply line and supplying the boosted voltage to said second power supply line.

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