JP2004363202A - Protective circuit and indicating device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that a static electricity generated in a manufacturing stage cannot be protected, since a protective diode is operated after a power source is switched on, in the case of a constitution in which the protective diode is connected with a part between an input line and a power source line of positive/negative. <P>SOLUTION: Depletion type p-channel MOS (metal oxide semiconductor) transistors 31-34 are formed in which sources are connected with input terminals 11, 12, 13, drains are connected with a ground line 24, and gates are connected with a power source line 25. The transistors 31-34 are depletion type so that they turn on at the dry time of power source. As a result, each of the input terminals 11, 12, 13 can be made to short-circuit with the ground by the transistors 31-34 at the time of power source un-supplying. Consequently, circuit elements can be protected from the static electricity generated in each of the input terminals 11, 12, 13 especially in the manufacturing stage (e.g. line assembling time). <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a protection circuit and a display device, and more particularly to a protection circuit for protecting a circuit element from static electricity generated in an input terminal and a panel-type display device represented by a liquid crystal display device and an electroluminescence display device.
[0002]
[Prior art]
In a panel-type display device, for example, a liquid crystal display device, when static electricity is generated in an input terminal called a pad that electrically connects to an external circuit, an internal circuit element may be destroyed by the static electricity. . Therefore, in order to protect circuit elements from electrostatic breakdown due to static electricity, a protection circuit is usually provided near each terminal on the display panel to take measures against static electricity.
[0003]
2. Description of the Related Art Conventionally, as a protection circuit for preventing static electricity, a protection circuit using a protection diode is generally known (for example, see Patent Document 1). As shown in FIG. 6, the protection circuit is provided between the input line 102 connected to the input terminal (pad) 101 and the power supply line 103 of the positive power supply VDD in the forward direction, that is, the anode is connected to the input line 102. A diode 111 having a cathode connected to the power supply line 103 and a reverse direction between the input line 102 and the power supply line 104 of the negative power supply VSS, that is, a cathode is connected to the input line 102 and an anode is connected to the power supply line 103. And a diode 112 that is configured to be able to cope with both positive and negative static electricity (voltage).
[0004]
[Patent Document 1]
JP 2001-141778 A (in particular, paragraph 0024, FIG. 3)
[0005]
[Problems to be solved by the invention]
As described above, in the related art according to Patent Document 1, the protection diodes 111 and 112 are connected between the input line 102 and the positive and negative power lines 103 and 104, and the protection diodes 111 and 112 are connected. Cannot operate unless power is turned on. For example, in each chip (panel) on a wafer at a manufacturing stage (for example, at the time of line assembly), it is possible to protect a circuit element against static electricity in each input terminal. There was a problem that it was impossible.
[0006]
As a countermeasure against static electricity at the manufacturing stage, a measure of inserting a resistance element into the input line 102 is also employed. However, when a resistive element is inserted into the input line 102, in a liquid crystal display device, it adversely affects a sampling pulse driving system of a horizontal switch that sequentially samples a video signal in a horizontal direction, and causes factors such as vertical stripes and ghosts. Therefore, it is not possible to insert a resistance element having a resistance value that moderates a transient as a resistance element, and therefore, there is a problem that sufficient electrostatic measures cannot be taken in a manufacturing stage.
[0007]
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a purpose thereof is to provide a sufficient countermeasure against static electricity generated in an input terminal particularly at a manufacturing stage (for example, at the time of line assembly). It is an object of the present invention to provide a protection circuit capable of performing the above and a display device equipped with the same.
[0008]
[Means for Solving the Problems]
The protection circuit according to the present invention is configured to include a depletion-type PchMOS transistor in which a source is connected to an input terminal, a drain is connected to a ground line, and a gate is connected to a power supply line. This protection circuit connects a source of a depletion type PchMOS transistor to an input terminal on a display panel, a drain to a ground line, and a gate to a power supply line in a panel type display device. Used by
[0009]
In the protection circuit having the above configuration or a display device equipped with the protection circuit, the PchMOS transistor is of a depletion type, so that the PchMOS transistor is turned on without applying a voltage to the gate. Therefore, when the power is not turned on, the PchMOS transistor is turned on and the input terminal is short-circuited to the ground line, so that static electricity generated at the input terminal flows to the ground. When the power is turned on, the power supply voltage is applied to the power supply line, so that the PchMOS transistor is turned off, and the input terminal is opened from the short-circuit state with the ground line to be in an independent state.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0011]
FIG. 1 is a circuit diagram illustrating a configuration example of a protection circuit according to an embodiment of the present invention. Here, as an example, a case where a circuit element is protected from static electricity generated in each of three input terminals (pads) will be described.
[0012]
In FIG. 1, input lines 21, 22, and 23 are respectively connected to three input terminals 11, 12, and 13, respectively. In addition to the input terminals 11, 12, and 13, a ground (GND) terminal 14 which is always grounded and a power supply terminal 15 to which a power supply voltage VDD on the positive side is supplied when the power is turned on are provided. A ground line 24 is connected to the ground terminal 14, and a power line 25 is connected to the power terminal 15.
[0013]
In order to protect the circuit elements from static electricity generated at each of the input terminals 11, 12, and 13 when the power is not turned on (when the power is turned off), a depletion type terminal is provided between these input terminals 11, 12, and 13. PchMOS transistors 31, 32, and 33 are connected. Specifically, the MOS transistor 31 has a source connected to the input line 21, a drain connected to the ground line 24, and a gate connected to the power supply line 25.
[0014]
The MOS transistor 32 has a source connected to the input line 22, a drain connected to the input line 21 (source of the MOS transistor 31), and a gate connected to the power supply line 25. The MOS transistor 33 has a source connected to the input line 23, a drain connected to the input line 22 (source of the MOS transistor 32), and a gate connected to the power supply line 25.
[0015]
Here, the depletion type is a MOS transistor that conducts even if the gate bias is zero, in other words, a type in which a drain current flows without applying a voltage to the gate. FIG. 2 shows an example of the conductivity characteristics of a depletion-type PchMOS transistor.
[0016]
In order to protect the circuit elements from static electricity generated at each of the input terminals 11, 12, 13 when the power is turned on (when the power is turned on), the input terminals 11, 12, 13 are further provided with protection diodes 41 to 46. It is connected. Specifically, the protection diode 41 has an anode connected to the input line 21 and a cathode connected to the power supply line 25. The protection diode 42 has a cathode connected to the input line 21 and an anode connected to the ground line 24.
[0017]
The protection diode 43 has an anode connected to the input line 22 and a cathode connected to the power supply line 25. The protection diode 44 has a cathode connected to the input line 22 and an anode connected to the ground line 24, respectively. The protection diode 45 has an anode connected to the input line 23 and a cathode connected to the power supply line 25. The protection diode 46 has a cathode connected to the input line 23 and an anode connected to the ground line 24.
[0018]
Next, the circuit operation of the protection circuit according to the present embodiment having the above configuration will be described.
[0019]
First, when the power is not turned on (when the power is turned off), since each of the MOS transistors 31, 32, and 33 is of a depletion type, the drain current does not need to be applied to the gate even if the gate-source voltage is 0V. Is turned on by the flow of. At this time, the drain of the MOS transistor 32 is connected to the ground line 24 via the MOS transistor 31, and the drain of the MOS transistor 33 is connected to the ground line 24 via the MOS transistors 32 and 31.
[0020]
Thus, when the power is not turned on, the input terminal 11 is short-circuited to the ground line 24 via the MOS transistor 31, and the input terminal 12 is short-circuited to the ground line 24 via the MOS transistors 32 and 31. Thus, the input terminal 13 is short-circuited to the ground line 24 via the MOS transistors 33, 32, 31.
[0021]
In this state, if static electricity is generated at the input terminal 11, the static electricity flows into the ground through the path of the input line 21, the MOS transistor 31 in the ON state, the ground line 24, and the ground terminal 14. Thus, a circuit element (not shown) connected to the input line 21 can be protected from static electricity generated at the input terminal 11.
[0022]
Assuming that static electricity is generated in the input terminal 12, the static electricity flows into the ground through a path of the input line 22 → the MOS transistor 32 in the ON state → the MOS transistor 31 in the ON state → the ground line 24 → the ground terminal 14. Thereby, a circuit element (not shown) connected to the input line 22 can be protected from static electricity generated at the input terminal 12.
[0023]
Assuming that static electricity is generated at the input terminal 13, the static electricity is applied to the input line 22 → the MOS transistor 33 in the ON state → the MOS transistor 32 in the ON state → the MOS transistor 31 in the ON state → the ground line 24 → the ground terminal 14. Flow into the ground through the path. Thereby, a circuit element (not shown) connected to the input line 23 can be protected from static electricity generated at the input terminal 13.
[0024]
When the power is turned on (when the power is turned on), a positive power supply voltage VDD is applied to the power supply line 25, and the power supply voltage VDD is applied to the gates of the MOS transistors 31, 32, 33, and 34 via the power supply line 25. Since the voltage is applied, the MOS transistors 31, 32, 33, and 34 are turned off. As a result, the input terminals 11, 12, and 13 are released from the state of being short-circuited to the ground line 24, and each of them becomes an electrically independent state.
[0025]
In this state, if static electricity is generated at the input terminal 11, the static electricity is supplied to the power supply through the path of the input line 21 → the diode 41 → the power supply line 25 → the power supply terminal 15 or the input line 21 → the diode 42 → the ground. It flows into the ground through the path from the line 24 to the ground terminal 14. Thereby, the circuit element connected to the input line 21 can be protected from negative static electricity generated at the input terminal 11.
[0026]
Assuming that static electricity is generated at the input terminal 12, the static electricity is supplied to the power supply through a path of the input line 22 → the diode 43 → the power supply line 25 → the power supply terminal 15 or the input line 22 → the diode 44 → the ground line 24 → the ground. It flows into the ground through the path of the terminal 14. Thus, the circuit element connected to the input line 22 can be protected from negative static electricity generated at the input terminal 12.
[0027]
Assuming that static electricity is generated at the input terminal 13, the static electricity is supplied to the power supply through the path of the input line 23 → the diode 45 → the power supply line 25 → the power supply terminal 15 or the input line 23 → the diode 46 → the ground line 24 → the ground. It flows into the ground through the path of the terminal 14. Thereby, the circuit element connected to the input line 23 can be protected from negative static electricity generated at the input terminal 13.
[0028]
As described above, in the protection circuit according to the present embodiment, the depletion type in which the sources are connected to the input terminals 11, 12, and 13, the drain is connected to the ground line 24, and the gate is connected to the power supply line 25, respectively. PchMOS transistors 31 to 34 are turned on when power is not turned on, and each of input terminals 11, 12, and 13 is short-circuited to the ground, thereby generating a current caused by static electricity generated at each of input terminals 11, 12, and 13. All flows into the ground, so that a sufficient countermeasure against static electricity generated at each of the input terminals 11, 12, and 13 can be taken particularly at the manufacturing stage (for example, during line assembly).
[0029]
[Application example]
FIG. 3 is a block diagram schematically showing a configuration of, for example, an active matrix type liquid crystal display device to which the present invention is applied.
[0030]
The active matrix type liquid crystal display device according to this application example has a pixel portion 51 in which pixels are arranged in a matrix, and is disposed on both left and right sides of the pixel portion 51, and selects each pixel of the pixel portion 51 in a row unit. Vertical drive circuits 52 and 53, a horizontal drive circuit 54 for sequentially writing video signals to pixels in a row selected by the vertical drive circuits 52 and 53, and prior to writing of video signals by the horizontal drive circuit 54, A precharge driving circuit 55 for writing a precharge signal in advance to the pixels in the row selected by the vertical driving circuits 52 and 53 is provided.
[0031]
The vertical drive circuits 52 and 53, the horizontal drive circuit 54, and the precharge drive circuit 55 are mounted on the same semiconductor substrate (display panel) 56 as the pixel unit 51. At an end of one side of the display panel, a pad portion 57 in which a number of input terminals (pads) are arranged is provided. Through each input terminal of the pad section 57, reference signals such as a master clock signal, a horizontal synchronization signal, and a vertical synchronization signal, and various types of signals for controlling the vertical drive circuits 52 and 53, the horizontal drive circuit 54, and the precharge drive circuit 55. Is taken into the substrate.
[0032]
The input terminals of the pad unit 57 include a ground (GND) terminal, a negative power supply (VSS) terminal, and a positive power supply (VDD) terminal. As the positive power supply (VDD) terminal, a positive power supply (VVDD) terminal for the vertical drive circuits 52 and 53 and a positive power supply (HVDD) terminal for the horizontal drive circuit 54 are separately provided.
[0033]
In the vicinity (immediately after) of the pad portion 57, a protection circuit 58 for protecting internal circuit elements from static electricity generated at each of the input terminals is provided. As the protection circuit 58, the protection circuit according to the above-described embodiment is used.
[0034]
In mounting the protection circuit according to the above-described embodiment on the display panel of the liquid crystal display device, a positive power supply (VVDD) for the vertical drive circuits 52 and 53 and a positive power supply (HVDD) for the horizontal drive circuit 54 are used. Use it. Specifically, as shown in FIG. 4, each gate of the PchMOS transistors 31 to 33 is connected to a power supply line 25H connected to a positive power supply (HVDD) terminal 15H for the horizontal drive circuit 54. . The cathodes of the protection diodes 41, 43, and 45 are connected to a power supply line 25V that is connected to a positive power supply (VVDD) terminal 15V for the vertical drive circuits 52 and 53.
[0035]
Here, only three MOS transistors are shown according to the above-described embodiment, but actually, there are provided MOS transistors corresponding to the number of input terminals of the pad unit 57. Similarly, the protection diodes are provided corresponding to the number of input terminals of the pad portion 57. The gates of the Pch MOS transistors 31 to 33 may be connected to the power supply line 25V on the VVDD terminal 15V side, and the cathodes of the protection diodes 41, 43, and 45 may be connected to the power supply line 25H on the HVDD terminal 15H side. .
[0036]
As described above, when the protection circuit according to the above-described embodiment is mounted on the display panel of the liquid crystal display device, the positive power supply (VVDD) for the vertical drive circuits 52 and 53 is used as the power supply (including GND) of the protection circuit. ) And the positive power supply (HVDD) for the horizontal drive circuit 54, the MOS transistors 31, 32, and 33 are turned on when the liquid crystal display device is not driven, and all the input terminals of the pad portion 57 are connected to the pad portion. Since it is short-circuited to the ground immediately after 57, it is possible to take sufficient measures against static electricity generated at each of the input terminals 11, 12, and 13 particularly at the stage of manufacturing the display panel (for example, at the time of line assembly). .
[0037]
Further, when the liquid crystal display device is not driven, the MOS transistors 31, 32, and 33 are turned off, and the input terminals 11, 12, and 13 are made independent, so that the MOS transistors 31, 32, and 33 are protected. The circuit portion has no adverse effect on the driving of the liquid crystal display device.
[0038]
By the way, in the liquid crystal display device, as shown in FIG. 5, various signals including the clock signal CLK are input from the outside of the panel as signals having a low voltage amplitude of, for example, 5 V or less. The level is converted to a high voltage amplitude of about 5V. This level conversion circuit 60 is, of course, arranged after the protection circuit 58.
[0039]
As described above, in the liquid crystal display device in which the level conversion circuit 60 is arranged for each signal, when the liquid crystal display device is not driven, the MOS transistors 31, 32, and 33 are turned on, and the input terminal of the pad unit 57 is turned on. By shorting everything to the ground immediately after the pad portion 57, sufficient electrostatic countermeasures can be taken, and the load on the level conversion circuit 60 and the protection diodes 41 to 46 is reduced, and the electrostatic strength is reduced. Can be mentioned.
[0040]
Also, if a resistive element is inserted into the input line for the purpose of countermeasures against static electricity in the manufacturing stage, it will adversely affect the sampling pulse drive system of the horizontal switch that sequentially samples video signals in the horizontal direction, causing vertical streaks and ghosts. However, by using the protection circuit according to the above-described embodiment, it is possible to take measures against static electricity at the manufacturing stage without inserting a resistance element into the input line, and therefore, vertical streaks or ghosts can be achieved. And the like can be prevented, and the electrostatic strength can be increased.
[0041]
In this application example, the case where the present invention is applied to a liquid crystal display device has been described as an example, but the present invention is not limited to the application to a liquid crystal display device, and may be applied to a display panel such as an electroluminescent display device. The present invention is applicable to all panel type display devices having an input terminal.
[0042]
【The invention's effect】
As described above, according to the present invention, the depletion-type PchMOS transistor in which the source is connected to the input terminal, the drain is connected to the ground line, and the gate is connected to the power supply line is provided. The MOS transistor is turned on when the power is not turned on, short-circuits the input terminal to the ground, and allows current due to static electricity generated at the input terminal to flow to the ground. Can be applied.
[Brief description of the drawings]
FIG. 1 is a circuit diagram illustrating a configuration example of a protection circuit according to an embodiment of the present invention.
FIG. 2 is a diagram showing the conductivity characteristics of a depletion-type PchMOS transistor.
FIG. 3 is a block diagram schematically illustrating a configuration of, for example, an active matrix type liquid crystal display device to which the present invention is applied.
FIG. 4 is a circuit diagram illustrating a configuration example of a protection circuit mounted on a liquid crystal display device.
FIG. 5 is a circuit diagram showing a configuration of level conversion of a clock signal CLK.
FIG. 6 is a circuit diagram showing a configuration example of a protection circuit according to a conventional example.
[Explanation of symbols]
11, 12, 13 ... input terminal, 14 ... ground (GND) terminal, 15, 15H, 15V ... power supply terminal, 21, 22, 23 ... input line, 24 ... ground line, 25, 25H, 25V ... power supply line, 31 .., 32, 33... Depletion type PchMOS transistors, 41 to 46... Protection diode, 51... Pixel unit, 52, 53... Vertical drive circuit, 54. ... Protection circuit

Claims (7)

A protection circuit comprising a depletion-type PchMOS transistor in which a source is connected to an input terminal, a drain is connected to a ground line, and a gate is connected to a power supply line. 2. The protection circuit according to claim 1, wherein the PchMOS transistor is connected between each of a plurality of input terminals, and a drain of an endmost MOS transistor is connected to a ground line. A first protection diode having an anode connected to the input terminal and a cathode connected to a power supply line; and a second protection diode having a cathode connected to the input terminal and an anode connected to the ground line. 2. The protection circuit according to claim 1, comprising a protection diode. A display device comprising a depletion-type PchMOS transistor in which a source is connected to an input terminal on a display panel, a drain is connected to a ground line, and a gate is connected to a power supply line. 5. The display according to claim 4, wherein the PchMOS transistor is connected between each of a plurality of input terminals on a display panel, and a drain of a MOS transistor at an end is connected to a ground line. apparatus. A first protection diode having an anode connected to the input terminal and a cathode connected to a power supply line; and a second protection diode having a cathode connected to the input terminal and an anode connected to the ground line. The display device according to claim 4, further comprising a protection diode. The display device according to claim 4, wherein a power supply of a horizontal drive system or a vertical drive system is supplied to the power supply line.

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