JP2004361219A - Semiconductor test system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To efficiently test a semiconductor chip. <P>SOLUTION: A chip information acquiring device 103 acquires chip information 102 stored in a semiconductor chip 101, selects a test program corresponding to the acquired chip information 102 out of programs stored in a test program database 104, and loads the selected test program onto a semiconductor tester 105. The semiconductor tester 105 loaded with the test program tests the semiconductor chip 101, based on the test program. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor test system for testing a semiconductor chip.
[0002]
[Prior art]
In testing a semiconductor chip in a conventional semiconductor test system, an operator visually recognizes a type of a semiconductor chip to be tested, selects a test program corresponding to the recognized type, and loads the selected test program into a semiconductor tester. I was going by.
[0003]
FIG. 3 is a diagram showing a schematic configuration of a conventional semiconductor test system.
The semiconductor test system 200 includes a semiconductor chip 201 to be tested, a semiconductor tester 205 for testing the semiconductor chip 201, data 204 on the semiconductor chip 201, a worker 202, a test program name, and the like. And a program list 203.
[0004]
The operation of the semiconductor test system 200 will be described.
FIG. 4 is a flowchart illustrating the operation of the conventional semiconductor test system.
The person 202 visually confirms the semiconductor chip 201 and the material 204, and confirms the kind of the semiconductor chip 201, the mask set version, the ROM version, and the like. (S21). Further, the person 202 selects a test program corresponding to the semiconductor chip 201 with reference to the program list 203 based on the information confirmed in S21 (S22), and sends the selected test program to the semiconductor tester 205. An operation for loading is performed (S23). After that, the semiconductor tester 205 tests the semiconductor chip 201 based on the loaded test program (for example, see Patent Document 1).
[0005]
[Patent Document 1]
JP-A-11-23659
[Problems to be solved by the invention]
However, in the above-described conventional semiconductor test system, since a semiconductor chip is visually checked, a test program is selected by a human, and a loading operation to the semiconductor tester 105 is manually performed, a similar product or a plurality of semiconductor chips are used. If there is a mask set version or the like, a selection error or an operation error may occur. For this reason, an inappropriate test program is loaded on the semiconductor tester 105, and the semiconductor test cannot be performed properly. In addition, since human judgment is added, it takes much time to test the semiconductor chip.
[0007]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor test system that can efficiently test a semiconductor chip.
[0008]
[Means for Solving the Problems]
A semiconductor test system according to the present invention is a semiconductor test system for testing a semiconductor chip, comprising: a test program storage means for storing a test program for the semiconductor chip; and an identification for acquiring identification information of the semiconductor chip from the semiconductor chip. Information acquisition means; test program selection means for selecting a test program corresponding to the identification information acquired by the identification information acquisition means from among the test programs stored in the test program storage means; A tester for testing the semiconductor chip based on a test program selected by the means.
[0009]
Further, in the semiconductor test system according to the present invention, the identification information acquiring means acquires the identification information from a storage medium built in the semiconductor chip.
[0010]
Further, in the semiconductor test system according to the present invention, the identification information acquiring means recognizes a mark marked on a package of the semiconductor chip, and acquires the identification information based on the mark.
[0011]
According to the above configuration, the test of the semiconductor chip can be performed efficiently.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a diagram showing a schematic configuration of a semiconductor test system 100 for describing an embodiment of the present invention.
The semiconductor test system 100 acquires a semiconductor chip 101 containing chip information 102, a performance board 107 having a socket 108 for detachably mounting the semiconductor chip 101, and the chip information 102 of the semiconductor chip 101 via the performance board 107. A chip information acquisition device 103, a test program database 104 for storing a test program corresponding to the chip information 102, and a semiconductor tester 105 having the chip information acquisition device 103 built in a tester head 106.
[0013]
The chip information 102 is identification information for identifying the semiconductor chip 101, and is stored in advance in a storage medium such as a ROM in the semiconductor chip 101. The contents of the chip information 102 include, for example, a product name, a ROM version, a mask set version, and the like of the semiconductor chip 101, and are preferably information that is caused by a change in the type of the test program.
[0014]
Regarding the specifications of the ROM, the address is 2 bits, the format is fixed, the type name of the semiconductor chip 101 is stored at address 2'b00, the ROM version is stored at address 2'b01, and the mask set version is stored at address 2'b10. Is stored. Prepare fixed size with fixed data.
[0015]
The test program database 104 stores a test program (a program for testing a semiconductor chip) corresponding to the chip information 102. The test program database 104 may be provided in the chip information acquisition device 103 or may be provided in the semiconductor tester 105.
[0016]
The chip information acquisition device 103 accesses the semiconductor chip 101 via the performance board 107 and the socket 108, and acquires the chip information 102 stored in the ROM. Further, a test program corresponding to the acquired chip information 102 is selected from the test program database 104, and the selected test program is acquired from the test program database 104 and loaded on the semiconductor tester 105.
[0017]
The semiconductor chip 101 has a mode terminal for reading chip information 102, an address terminal, a data terminal, a ROM control terminal, and a power supply terminal.
[0018]
The performance board 107 has a tester channel assigned to a mode terminal, an address terminal, a data terminal, and a control terminal of the ROM of the semiconductor chip 101, and a power supply channel assigned to a power supply terminal. By allocating channels in this manner, an access path from the chip information acquisition device 103 to the ROM of the semiconductor chip 101 can be determined.
[0019]
By fixing the capacity of the ROM in the semiconductor chip 101, a method of accessing the ROM can be determined in advance. Further, if the power supply voltage value of the semiconductor chip 101 is fixed, the chip information 102 can always be easily extracted by the same method regardless of the type.
[0020]
Further, instead of storing the chip information 102 in the semiconductor chip 101, a marking corresponding to the chip information may be applied to a package of the semiconductor chip 101. In this case, a method may be adopted in which the chip information acquisition device 103 captures the marked mark with a CCD (Charge Coupled Device) or the like and recognizes the chip information 102 by image processing. For this purpose, a database that associates marks marked on the package of the semiconductor chip 101 with chip information is provided at a location accessible from the chip information acquisition device 103. In this case, it is not necessary to fix and determine the tester channel 116, the power supply channel 117, and the like. In this case, the chip information acquisition device 103 may be provided in a handler or a prober of the semiconductor tester 105.
[0021]
The tester head 106 can access the semiconductor chip 101 via the performance board 107 and the socket 108, and supplies the information obtained here to the semiconductor tester 105.
[0022]
The semiconductor tester 105 performs a test on the semiconductor chip 101 based on the information supplied from the tester head 106, and outputs a test result. The test is performed based on a test program selected and loaded by the chip information acquisition device 103. When the test program database 104 is in the semiconductor tester 105, the semiconductor tester 105 acquires the test program by itself. In this case, the chip information acquisition device 103 does not load the test program, only selects it, and only needs to notify the semiconductor tester 105 of the information (name, etc.) of the selected test program.
[0023]
Next, the operation of the semiconductor test system 100 will be described.
FIG. 2 is a diagram showing an operation flow of the semiconductor test system for explaining the embodiment of the present invention.
First, the chip information acquisition device 103 acquires the chip information 102 stored in the semiconductor chip 101 (S11). Next, a test program corresponding to the acquired chip information 102 is selected from the programs stored in the test program database 104 (S12), and the selected test program is loaded on the semiconductor tester 105 (S13). The semiconductor tester 105 loaded with the test program tests the semiconductor chip 101 based on the test program.
[0024]
As described above, according to the present embodiment, the test of the semiconductor chip 101 can be performed automatically instead of the operation of a person, so that the test of the semiconductor chip 101 can be performed efficiently.
[0025]
【The invention's effect】
According to the present invention, it is possible to provide a semiconductor test system capable of efficiently testing a semiconductor chip.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram showing a semiconductor test system for describing an embodiment of the present invention; FIG. 2 is a diagram showing an operation flow of the semiconductor test system for describing an embodiment of the present invention; FIG. FIG. 4 is a diagram showing a schematic configuration of a semiconductor test system of FIG. 4. FIG. 4 is a diagram showing a flow for explaining an operation of a conventional semiconductor test system.
Reference Signs List 100 semiconductor test system 101 semiconductor chip 102 chip information 103 chip information acquisition device 104 test program database 105 semiconductor tester 106 tester head 107 performance board 108 socket

Claims (3)

A semiconductor test system for testing a semiconductor chip,
Test program storage means for storing a test program for the semiconductor chip,
Identification information acquisition means for acquiring identification information of the semiconductor chip from the semiconductor chip,
A test program selecting unit that selects a test program corresponding to the identification information obtained by the identification information obtaining unit from the test programs stored in the test program storage unit;
A tester that tests the semiconductor chip based on a test program selected by the test program selection means. The semiconductor test system according to claim 1, wherein
The semiconductor test system, wherein the identification information obtaining means obtains the identification information from a storage medium built in the semiconductor chip. The semiconductor test system according to claim 1, wherein
The semiconductor test system, wherein the identification information acquiring unit is configured to recognize a mark marked on a package of the semiconductor chip and acquire the identification information based on the mark.

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