JP2004356230A - Light emitting device and its manufacturing method - Google Patents

Light emitting device and its manufacturing method Download PDF

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Publication number
JP2004356230A
JP2004356230A JP2003149752A JP2003149752A JP2004356230A JP 2004356230 A JP2004356230 A JP 2004356230A JP 2003149752 A JP2003149752 A JP 2003149752A JP 2003149752 A JP2003149752 A JP 2003149752A JP 2004356230 A JP2004356230 A JP 2004356230A
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Japan
Prior art keywords
light
light emitting
type semiconductor
semiconductor layer
electrode
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JP2003149752A
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Japanese (ja)
Inventor
Kazunari Kuzuhara
一功 葛原
Nobuyuki Takakura
信之 高倉
Masaharu Yasuda
正治 安田
Takanori Akeda
孝典 明田
Shigenari Takami
茂成 高見
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Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Priority to JP2003149752A priority Critical patent/JP2004356230A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting device and its manufacturing method which can improve light extraction efficiency to the outside. <P>SOLUTION: The light emitting device is provided with a light emitting diode element A and a base substrate B on which the element A is mounted. The light emitting diode element A is provided with a light emitting layer 4, an n-type semiconductor layer 3 which is formed on one side of thickness direction of the light emitting layer 4 and has a band gap larger than the light emitting layer 4, and a double hetero structure composed of a p-type semiconductor layer 5 which is formed on the other side of the thickness direction of the light emitting layer 4 and has a band gap larger than the light emitting layer 4. A surface opposite to the light emitting layer 4 in the n-type semiconductor layer 3 is made a light extraction surface to the outside. Grating 3a is prepared in the light extraction surface of the n-type semiconductor layer 3, and a sealing part 14 composed of resin is formed in clearance between the light emitting element A and the base substrate B. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、発光装置およびその製造方法に関するものである。
【０００２】
【従来の技術】
従来から、図７に示すように、サファイア基板４１の厚み方向の一表面（図７における下面）側に、バッファ層４２、ｎ形半導体層４３、発光層４４、ｐ形半導体層４５が順次形成された発光ダイオード素子Ａ’が提案されている（例えば、特許文献１参照）。なお、バッファ層４２、ｎ形半導体層４３、発光層４４、ｐ形半導体層４５は、それぞれ窒化ガリウム系の化合物半導体材料（例えば、ＧａＮ、ＩｎＧａＮなど）により形成されている。
【０００３】
上述の発光ダイオード素子Ａ’は、サファイア基板４１の厚み方向の他表面（図７における上面）を光取り出し面としたものであって、図示しない基板にフリップチップ実装して使用される。すなわち、発光層４４にて発光した光はサファイア基板４１を通して外部へ放射されることになる。なお、発光ダイオード素子Ａ’と上記基板とで発光装置が構成される。
【０００４】
ところで、上述の発光ダイオード素子Ａ’は、ｎ形半導体層４３上にｎ電極４８が形成され、ｐ形半導体層４５上に電流拡散膜４６を介してｐ電極４７が形成されている。ここに、上述の発光ダイオード素子Ａ’では、電流拡散膜４６が導電性を有し且つ反射率の高い金属材料により形成されているので、発光層４４からｐ形半導体層４５側へ放射された光をｎ形半導体層４３側へ反射させることができ、外部への光取り出し効率を高めることができる。なお、図７中の矢印Ｅは、発光層４４からｎ形半導体層４３側へ放射されサファイア基板４１の光取り出し面を通して外部へ放射された光を示し、同図中の矢印Ｒは、電流拡散膜４６にて反射されサファイア基板４１の光取り出し面を通して外部へ放射された光を示している。
【０００５】
【特許文献１】
特開平１１−２２０１７０号公報
【０００６】
【発明が解決しようとする課題】
ところで、上記従来構成の発光装置では、発光層４４にて発光した光が少なくともｎ形半導体層４３とサファイア基板４１とを通して外部へ放出するものであるが、サファイア基板４１とｎ形半導体層４３との屈折率差に起因してサファイア基板４１とｎ形半導体層４３との界面に到達した光の約５０％が当該界面で全反射して発光層４４に再吸収されてしまうので、外部への光取り出し効率の更なる向上が望まれている。なお、図７中の矢印Ｌは、上記界面で全反射して発光層４４に再吸収される光を示している。
【０００７】
本発明は上記事由に鑑みて為されたものであり、その目的は、外部への光取り出し効率を向上できる発光装置およびその製造方法を提供することにある。
【０００８】
【課題を解決するための手段】
請求項１の発明は、上記目的を達成するために、半導体材料からなる発光層、発光層の厚み方向の一方側に設けられ発光層よりもバンドギャップが大きなｎ形半導体層、発光層の厚み方向の他方側に設けられ発光層よりもバンドギャップの大きなｐ形半導体層、ｐ形半導体層における発光層とは反対側の表面側に設けられｐ形半導体層に電気的に接続されたｐ電極、ｎ形半導体層における発光層と同じ側の表面に設けられｎ形半導体層に電気的に接続されたｎ電極を備えた発光ダイオード素子と、発光ダイオード素子のｐ電極およびｎ電極それぞれがバンプを介して電気的に接続される導体部が発光ダイオード素子との対向面に設けられたベース基板とを備え、発光ダイオード素子のｎ形半導体層における発光層とは反対側の表面を光取り出し面としてなることを特徴とする。この発明によれば、ｎ形半導体層における発光層とは反対側の表面を光取り出し面としていることにより、外部への光取り出し効率を向上させることができる。また、発光層の厚み方向に沿った装置全体の厚さ寸法を小さくできて装置全体の小型化を図れるという利点もある。
【０００９】
請求項２の発明は、請求項１の発明において、前記ｎ形半導体層における光取り出し面にグレーティングを設けてなることを特徴とする。この発明によれば、前記ｎ形半導体層と空気との屈折率差に起因した全反射を抑制することができ、外部への光取り出し効率をより向上させることができる。
【００１０】
請求項３の発明は、請求項１または請求項２の発明において、前記ｐ電極および前記ｎ電極は金属材料により形成されてなることを特徴とする。この発明によれば、前記発光層から放射され前記ｐ電極および前記ｎ電極それぞれに到達した光を前記光取り出し面側へ反射させることができ、外部への光取り出し効率をより向上させることができる。
【００１１】
請求項４の発明は、請求項１ないし請求項３の発明において、前記発光ダイオード素子と前記ベース基板との間の隙間を埋める樹脂からなる封止部を備えてなることを特徴とする。この発明によれば、前記発光ダイオード素子における前記ベース基板側の表面を保護することができて且つ前記発光ダイオード素子と前記ベース基板との接合強度が向上するので、取り扱いが容易になるとともに、接合信頼性が向上する。
【００１２】
請求項５の発明は、請求項１ないし請求項４の発明において、前記ベース基板における前記発光ダイオード素子との対向面とは反対側の面に前記各導体部それぞれに電気的に接続されたパッドが設けられてなることを特徴とする。この発明によれば、前記ベース基板において前記発光ダイオード素子を実装する側の面にパッドを設ける場合に比べて前記ベース基板の平面サイズを小さくすることができ、実装基板への実装面積を小さくすることができる。
【００１３】
請求項６の発明は、請求項１ないし請求項５のいずれか１項に記載の発光装置の製造方法であって、発光ダイオード素子を形成するための犠牲基板の一表面側にｎ形半導体層、発光層、ｐ形半導体層を順次成長する結晶成長工程と、結晶成長工程の後でｎ電極およびｐ電極を形成する電極形成工程と、ｎ電極およびｐ電極それぞれをベース基板の導体部へバンプを介して接続する実装工程と、実装工程の後で犠牲基板を除去してｎ形半導体層における発光層とは反対側の表面全体を露出させる露出工程とを備えることを特徴とする。この発明によれば、ｎ形半導体層における発光層とは反対側の表面が光取り出し面となり外部への光取り出し効率が向上した発光装置を提供できる。また、犠牲基板の一表面側に形成した発光ダイオード素子をベース基板に実装した後で犠牲基板を除去するので、発光ダイオード素子から犠牲基板を除去した後で発光ダイオード素子をベース基板に実装する場合に比べて、製造途中で発光ダイオード素子が破損するのを防止することができ、製造歩留まりが向上する。
【００１４】
請求項７の発明は、請求項４記載の発光装置の製造方法であって、発光ダイオード素子を形成するための犠牲基板の一表面側にｎ形半導体層、発光層、ｐ形半導体層を順次成長する結晶成長工程と、結晶成長工程の後でｎ電極およびｐ電極を形成する電極形成工程と、ｎ電極およびｐ電極それぞれをベース基板の導体部へバンプを介して接続する実装工程と、実装工程の後で犠牲基板を除去してｎ形半導体層における発光層とは反対側の表面全体を露出させる露出工程とを備え、実装工程よりも前にベース基板における導体部が設けられている側の面に封止部用の樹脂を配設する樹脂配設工程を備えることを特徴とする。この発明によれば、ｎ形半導体層における発光層とは反対側の表面が光取り出し面となり外部への光取り出し効率が向上した発光装置を提供できる。また、犠牲基板の一表面側に形成した発光ダイオード素子をベース基板に実装した後で犠牲基板を除去するので、発光ダイオード素子から犠牲基板を除去した後で発光ダイオード素子をベース基板に実装する場合に比べて、製造途中で発光ダイオード素子が破損するのを防止することができ、製造歩留まりが向上する。また、実装工程よりも前にベース基板における導体部が設けられている側の面に封止部用の樹脂を配設しているので、封止部用の樹脂がｎ形半導体層の外周面に沿って這い上がるのを防止することができる。
【００１５】
【発明の実施の形態】
（実施形態１）
本実施形態の発光装置は、図１に示すように、発光ダイオード素子Ａと、発光ダイオード素子Ａが実装されたベース基板Ｂとを備えている。
【００１６】
発光ダイオード素子Ａは、発光層４と、発光層４の厚み方向の一方側に設けられ発光層４よりもバンドギャップが大きなｎ形半導体層３と、発光層４の厚み方向の他方側に設けられ発光層４よりもバンドギャップの大きなｐ形半導体層５とからなるダブルへテロ構造を有している。なお、発光層４、ｎ形半導体層３、ｐ形半導体層５はそれぞれ窒化ガリウム系の化合物半導体材料（例えば、ＧａＮ、ＩｎＧａＮなど）により形成されている。
【００１７】
また、発光ダイオード素子Ａは、ｐ形半導体層５に電気的に接続される金属材料からなるｐ電極（アノード電極）７がｐ形半導体層５における発光層４とは反対の表面側に低抵抗の導電性材料からなる電流拡散膜６を介して設けられ、ｎ形半導体層３に電気的に接続される金属材料からなるｎ電極（カソード電極）８がｎ形半導体層３における発光層４と同じ側の表面に設けられている。ここにおいて、ｎ形半導体層３は、発光層４およびｐ形半導体層５よりも厚み方向に直交する面の面積が大きく形成されており、発光層４およびｐ形半導体層５に重ならない部分にｎ電極８が設けられている。また、電流拡散膜６は、発光層４に流れる電流の面内均一性を高めるために設けてあるが、低抵抗で且つ反射率の高い導電性材料（例えば、アルミニウムなど）により形成されており、発光層４からｐ形半導体層５側へ放射された光をｎ形半導体層３側へ反射させる反射膜としての機能も有している。
【００１８】
ベース基板Ｂは、発光ダイオード素子Ａとの対向面（図１の上面）において発光ダイオード素子Ａのｐ電極７およびｎ電極８それぞれに対応する部位に導体部１１ａ，１１ｂが設けられており、発光ダイオード素子Ａの各電極７，８が対向する各導体部１１ａ，１１ｂそれぞれに金属材料（例えば、金、半田など）からなるバンプ９ａ，９ｂを介して電気的に接続されている。また、ベース基板Ｂは、発光ダイオード素子Ａとの対向面とは反対側の面（図１の下面）に各導体部１１ａ，１１ｂそれぞれに電気的に接続されたパッド１２ａ，１２ｂが設けられており、各パッド１２ａ，１２ｂ下には金属材料（例えば、半田など）からなるボール状のバンプ１５ａ，１５ｂが設けられている。なお、各導体部１１ａ，１１ｂとパッド１２，１２ｂとはベース基板Ｂに形成されたスルーホールに埋設された導電性材料からなる接続部１３ａ，１３ｂを介して電気的に接続されている。
【００１９】
また、本実施形態の発光装置は、発光ダイオード素子Ａとベース基板Ｂとの間の隙間を埋める樹脂からなる封止部１４が設けられている。ここに、封止部１４の樹脂としては、例えば、黒色のフィラー入りのエポキシ樹脂を用いればよい。
【００２０】
以上説明した本実施形態の発光装置は、発光ダイオード素子Ａのｎ形半導体層３における発光層４とは反対側の表面（図１における上面）を光取り出し面としてある。すなわち、図７に示した従来例では発光層４４にて発光した光がサファイア基板４１を通して外部へ放射されるのに対して、本実施形態の発光装置では、発光層４にて発光した光がｎ形半導体層３における発光層４とは反対側の表面から外部へ放射される。ここに、発光ダイオード素子Ａは、ｎ形半導体層３における光取り出し面にグレーティング３ａを設けてある。なお、グレーティング３ａは、ｎ形半導体層３の光取り出し面に、図１の左右方向に周期的に配列された多数の凹部３ｂを設けることにより形成されている。
【００２１】
しかして、本実施形態の発光装置では、ｎ形半導体層３における発光層４とは反対側の表面を光取り出し面としていることにより、外部への光取り出し効率を向上させることができる。しかも、ｎ形半導体層３における光取り出し面にグレーティング３ａを設けてあるので、ｎ形半導体層３と空気との屈折率差に起因した全反射を抑制することができ、外部への光取り出し効率をより向上させることができる。また、ｐ電極７およびｎ電極８それぞれが金属材料により形成されているので、発光層４から放射されｐ電極７およびｎ電極８それぞれに到達した光を光取り出し面側へ反射させることができるので、各電極７，８がＩＴＯ膜などの透明導電膜により形成されている場合に比べて、外部への光取り出し効率を向上させることができる。さらに、発光ダイオード素子Ａとベース基板Ｂとの間の隙間に封止部１４が設けられていることにより、発光ダイオード素子Ａにおけるベース基板Ｂ側の表面を保護することができて且つ発光ダイオード素子Ａとベース基板Ｂとの接合強度が向上するので、取り扱いが容易になるとともに、接合信頼性が向上する。その上、封止部１４の樹脂として黒色のフィラー入りのエポキシ樹脂を用いているので、封止部１４の樹脂として透明樹脂を用いる場合に比べて、発光ダイオード素子Ａをより確実に保護することができるとともに、接合信頼性を向上させることができる。また、発光ダイオード素子Ａにおけるベース基板Ｂ側から外部へ光が漏れるのを防止することができる。
【００２２】
また、本実施形態の発光装置では、ベース基板Ｂにおける発光ダイオード素子Ａとの対向面とは反対側の面に各導体部１１ａ，１１ｂそれぞれに電気的に接続されたパッド１２ａ，１２ｂを設けているので、ベース基板Ｂにおいて発光ダイオード素子Ａを実装する側の面にパッドを設ける場合に比べてベース基板Ｂの平面サイズを小さくすることができ、実装基板などの他の部材への実装面積を小さくすることができる。
【００２３】
また、本実施形態の発光装置では、発光ダイオード素子Ａの厚さ寸法を図７に示した従来例に比べてサファイア基板４１の厚さとバッファ層４２の膜厚とを合わせた分だけ薄くすることが可能となるので、装置全体の薄型化を図ることができる。
【００２４】
以下、本実施形態の発光装置の製造方法について図２および図３を参照しながら説明する。
【００２５】
サファイア基板（α−Ａｌ２Ｏ３基板）からなるウェハ１の厚み方向の一表面（図２（ａ）における下面）側に、バッファ層２、ｎ形半導体層３、発光層４、ｐ形半導体層５を例えば有機金属気相成長法（ＭＯＶＰＥ法）によって順次成長（連続して成長）するエピタキシャル成長工程を行い、その後、ｐ形半導体層５および発光層４のうちｎ形半導体層３におけるｎ電極８の形成予定領域に対応する部分などをエッチングしてから、ｎ形半導体層３における発光層４側の露出表面にｎ電極８を形成し、続いて、ｐ形半導体層５の表面に電流拡散膜６を形成してから、電流拡散膜６の表面にｐ電極７を形成し、更にその後、各電極７，８それぞれの表面にバンプ９ａ，９ｂを形成することによって、図２（ａ）に示す構造を得る。なお、本実施形態では、ウェハ１とバッファ層２とで犠牲基板を構成しており、上述のエピタキシャル成長工程が発光ダイオード素子Ａを形成するための犠牲基板の一表面側にｎ形半導体層３、発光層４、ｐ形半導体層５を順次成長する結晶成長工程となる。また、本実施形態では、ｎ電極８を形成する工程とｐ電極７を形成する工程とを合わせて電極形成工程となる。
【００２６】
次に、ウェハ１に対応する大きさに形成され一表面側に２つ１組の導体部１１ａ，１１ｂが複数組設けられるとともに他表面側に２つ１組のパッド１２ａ，１２ｂが複数組設けられ、厚み方向に重なる導体部１１ａ，１１ｂとパッド１２ａ，１２ｂとが接続部１３ａ，１３ｂを介して電気的に接続されたベース基板Ｂ’の一表面側に封止部１４用の樹脂（黒色のフィラー入りのエポキシ樹脂）を塗布することによって図３に示す構造を得てから、各半導体層５，３において各電極７，８が設けられた側の表面が厚み方向においてベース基板Ｂ’側となるように配置して各電極７，８それぞれをベース基板Ｂ’の導体部１１ａ，１１ｂへバンプ９ａ，９ｂを介して接続する実装工程を行うことによって、図２（ｂ）に示す構造を得る。すなわち、本実施形態では、一表面側に複数の発光ダイオード素子Ａが形成されたウェハ１をベース基板Ｂ’にフェースダウンで実装している。なお、本実施形態では、ベース基板１４の一表面側に封止部１４用の樹脂を塗布する工程が樹脂配設工程となるが、封止部１４用の樹脂シートをベース基板１４の上記一表面側へ貼り付けるようにしてもよい。また、本実施形態では、各電極７，８それぞれの表面にバンプ９ａ，９ｂを形成してから、実装工程を行っているが、各バンプ９ａ，９ｂをベース基板Ｂ’の対応する各導体部１１ａ，１１ｂの表面に形成した後、封止部１４用の樹脂を塗布してから実装工程を行うようにしてもよい。
【００２７】
上述の実装工程を行った後、レーザ光をサファイア基板からなるウェハ１の上記他表面側からウェハ１を通してバッファ層２へ照射することでバッファ層２を熱分解してなる熱分解層２’を形成する熱分解工程を行うことによって、図２（ｃ）に示す構造を得る。
【００２８】
その後、熱分解層２’を塩酸などのエッチング液により除去してウェハ１を剥離する剥離工程を行い、続いて、ｎ形半導体層３における発光層４とは反対側の表面にレーザ光やダイシングソーなどを利用して複数の凹部３ｂを設けることでグレーティング３ａを形成することによって、図２（ｄ）に示す構造を得る。なお、この種の熱分解工程や剥離工程は例えば特開２００３−０３７２８６号公報に開示されているように周知技術である。また、本実施形態では、熱分解工程と剥離工程とで、ウェハ１とバッファ層２とからなる犠牲基板を除去してｎ形半導体層３における発光層４とは反対側の表面全体を露出させる露出工程となる。
【００２９】
次に、ベース基板Ｂ’の各パッド１２ａ，１２ｂそれぞれの表面にバンプ１５ａ，１５ｂを形成することによって、図２（ｅ）に示す構造を得る。
【００３０】
続いて、ダイシングソーなどを用いて個々の発光装置に分離する切断工程を行うことによって、図２（ｆ）に示す構造を得る。
【００３１】
以上説明した製造方法によれば、ｎ形半導体層３における発光層４とは反対側の表面が光取り出し面となり外部への光取り出し効率が向上した発光装置を提供できる。また、犠牲基板の一表面側に形成した発光ダイオード素子Ａをベース基板Ｂ’に実装した後で犠牲基板を除去するので、発光ダイオード素子Ａから犠牲基板を除去した後で発光ダイオード素子Ａをベース基板Ｂ’に実装する場合に比べて、取り扱いが容易になるとともに、製造途中で発光ダイオード素子Ａが破損するのを防止することができ、製造歩留まりが向上する。
【００３２】
なお、本実施形態では、複数の発光ダイオード素子Ａが形成されたウェハ１をフェースダウンでベース基板Ｂ’に実装した後で、露出工程および切断工程を行っているが、実装工程の前にウェハ１を発光ダイオード素子Ａごとに切断して、あらかじめ発光ダイオード素子Ａに対応する大きさに形成されたベース基板Ｂに、発光ダイオード素子Ａをフェースダウンで実装し、ｎ形半導体層３における発光層４とは反対側の表面全体を露出させる露出工程を行うようにしてもよい。
【００３３】
（実施形態２）
本実施形態の発光装置の基本構成は実施形態１と略同じであって、図４に示すように、ベース基板Ｂの平面サイズが発光ダイオード素子Ａの平面サイズよりもやや大きく設定されており、封止部１４がｎ形半導体層３の外周面も覆っている点などが相違するだけである。なお、実施形態１と同様の構成要素には同一の符号を付して説明を省略する。
【００３４】
しかして、本実施形態の発光装置においても、実施形態１の発光装置と同様、ｎ形半導体層３における発光層４とは反対側の表面を光取り出し面としていることにより、外部への光取り出し効率を向上させることができ、また、ｎ形半導体層３における光取り出し面にグレーティング３ａを設けてあることにより、ｎ形半導体層３と空気との屈折率差に起因した全反射を抑制することができ、外部への光取り出し効率をより向上させることができる。
【００３５】
以下、本実施形態の発光装置の製造方法について図５および図６を参照しながら説明する。
【００３６】
サファイア基板（α−Ａｌ２Ｏ３基板）からなる支持基板２１の厚み方向の一表面（図５（ａ）における下面）側に、バッファ層２、ｎ形半導体層３、発光層４、ｐ形半導体層５を例えば有機金属気相成長法（ＭＯＶＰＥ法）によって順次成長（連続して成長）するエピタキシャル成長工程を行い、その後、ｐ形半導体層５および発光層４のうちｎ形半導体層３におけるｎ電極８の形成予定領域に対応する部分などをエッチングしてから、ｎ形半導体層３における発光層４側の露出表面にｎ電極８を形成し、続いて、ｐ形半導体層５の表面に電流拡散膜６を形成してから、電流拡散膜６の表面にｐ電極７を形成し、更にその後、各電極７，８それぞれの表面にバンプ９ａ，９ｂを形成することによって、図５（ａ）に示す構造を得る。なお、本実施形態では、支持基板２１とバッファ層２とで犠牲基板を構成しており、上述のエピタキシャル成長工程が発光ダイオード素子Ａを形成するための犠牲基板の一表面側にｎ形半導体層３、発光層４、ｐ形半導体層５を順次成長する結晶成長工程となる。また、本実施形態では、ｎ電極８を形成する工程とｐ電極７を形成する工程とを合わせて電極形成工程となる。
【００３７】
次に、支持基板２１よりもやや大きな平面サイズに形成され一表面側に２つ１組の導体部１１ａ，１１ｂが設けられるとともに他表面側に２つ１組のパッド１２ａ，１２ｂが設けられ、厚み方向に重なる導体部１１ａ，１１ｂとパッド１２ａ，１２ｂとが接続部１３ａ，１３ｂを介して電気的に接続されたベース基板Ｂ（図６参照）に対して、各半導体層５，３において各電極７，８が設けられた側の表面が厚み方向においてベース基板Ｂ側となるように配置して各電極７，８それぞれをベース基板Ｂの導体部１１ａ，１１ｂへバンプ９ａ，９ｂを介して接続する実装工程を行い、その後、発光ダイオード素子Ａとベース基板Ｂとの間の隙間に樹脂を充填して封止部１４を形成することによって、図５（ｂ）に示す構造を得る。なお、本実施形態では、各電極７，８それぞれの表面にバンプ９ａ，９ｂを形成してから実装工程を行っているが、各バンプ９ａ，９ｂを、各電極７，８の表面に形成する代わりにベース基板Ｂの対応する各導体部１１ａ，１１ｂの表面に形成してから実装工程を行うようにしてもよい。
【００３８】
上述の実装工程を行った後、レーザ光をサファイア基板からなる支持基板２１の他表面側から支持基板２１を通してバッファ層２へ照射することでバッファ層２を熱分解してなる熱分解層２’を形成する熱分解工程を行うことによって、図５（ｃ）に示す構造を得る。
【００３９】
その後、熱分解層２’を塩酸などのエッチング液により除去して支持基板２１を剥離する剥離工程を行い、続いて、ｎ形半導体層３における発光層４とは反対側の表面にレーザ光やダイシングソーなどを利用して複数の凹部３ｂを設けることでグレーティング３ａを形成することによって、図５（ｄ）に示す構造を得る。なお、本実施形態では、熱分解工程と剥離工程とで、支持基板２１とバッファ層２とからなる犠牲基板を除去してｎ形半導体層３における発光層４とは反対側の表面全体を露出させる露出工程となる。
【００４０】
次に、ベース基板Ｂの各パッド１２ａ，１２ｂそれぞれの表面にバンプ１５ａ，１５ｂを形成することによって、図５（ｅ）に示す構造を得る。
【００４１】
以上説明した製造方法によれば、ｎ形半導体層３における発光層４とは反対側の表面が光取り出し面となり外部への光取り出し効率が向上した発光装置を提供できる。また、犠牲基板の一表面側に形成した発光ダイオード素子Ａをベース基板Ｂに実装した後で犠牲基板を除去するので、発光ダイオード素子Ａから犠牲基板を除去した後で発光ダイオード素子Ａをベース基板Ｂに実装する場合に比べて、製造途中で発光ダイオード素子Ａが破損するのを防止することができ、製造歩留まりが向上する。
【００４２】
なお、本実施形態の製造方法では、サファイア基板からなる支持基板２１の上記一表面側に発光ダイオード素子Ａを形成してから、ベース基板Ｂに実装しているが、実施形態１の製造方法と同様に複数の発光ダイオード素子Ａをサファイア基板からなるウェハ１の一表面側に形成してから、ダイシングソーなどを用いて分離することで図５（ａ）に示す構造を得て、その後でベース基板Ｂへ実装するようにしてもよいことは勿論である。
【００４３】
ところで、上記各実施形態では、上述のように、発光層４、ｎ形半導体層３、ｐ形半導体層５の結晶材料として窒化ガリウム系の化合物半導体材料を採用しているが、発光ダイオード素子Ａの所望の発光色に応じて窒化ガリウム系以外の化合物半導体材料以外を採用してもよい。ただし、ｎ形半導体層３の材料としては、耐酸化性に優れた材料を採用することが望ましい。また、ウェハ１や支持基板２１の材料についてもＡｌ２Ｏ３に限定するものではなく、例えば、ＧａＮ、ＧａＡｓ、ＧａＰ、ＳｉＣなどの材料を発光層４、ｎ形半導体層３、ｐ形半導体層５の半導体材料に応じて適宜採用することも可能である。
【００４４】
【発明の効果】
請求項１の発明では、ｎ形半導体層における発光層とは反対側の表面が光取り出し面となるので、外部への取り出し効率を向上させることができるという効果がある。
【００４５】
請求項２の発明では、前記ｎ形半導体層と空気との屈折率差に起因した全反射を抑制することができ、外部への光取り出し効率をより向上させることができるという効果がある。
【００４６】
請求項３の発明では、前記発光層から放射され前記ｐ電極および前記ｎ電極それぞれに到達した光を前記光取り出し面側へ反射させることができ、外部への光取り出し効率をより向上させることができるという効果がある。
【００４７】
請求項４の発明では、前記発光ダイオード素子における前記ベース基板側の表面を保護することができて且つ前記発光ダイオード素子と前記ベース基板との接合強度が向上するので、取り扱いが容易になるとともに、接合信頼性が向上するという効果がある。
【００４８】
請求項５の発明では、前記ベース基板において前記発光ダイオード素子を実装する側の面にパッドを設ける場合に比べて前記ベース基板の平面サイズを小さくすることができて、実装基板への実装面積を小さくすることができるという効果がある。
【００４９】
請求項６の発明では、ｎ形半導体層における発光層とは反対側の表面が光取り出し面となり外部への光取り出し効率が向上した発光装置を提供できるという効果がある。また、犠牲基板の一表面側に形成した発光ダイオード素子をベース基板に実装した後で犠牲基板を除去するので、発光ダイオード素子から犠牲基板を除去した後で発光ダイオード素子をベース基板に実装する場合に比べて、製造途中で発光ダイオード素子が破損するのを防止することができ、製造歩留まりが向上するという効果がある。
【００５０】
請求項７の発明では、ｎ形半導体層における発光層とは反対側の表面が光取出し面となり外部への光取り出し効率が向上した発光装置を提供できるという効果がある。また、犠牲基板の一表面側に形成した発光ダイオード素子をベース基板に実装した後で犠牲基板を除去するので、発光ダイオード素子から犠牲基板を除去した後で発光ダイオード素子をベース基板に実装する場合に比べて、製造途中で発光ダイオード素子が破損するのを防止することができ、製造歩留まりが向上するという効果がある。また、実装工程よりも前にベース基板における導体部が設けられている側の面に封止部用の樹脂を配設しているので、封止部用の樹脂がｎ形半導体層の外周面に沿って這い上がるのを防止することができるという効果がある。
【図面の簡単な説明】
【図１】実施形態１を示す概略断面図である。
【図２】同上の製造方法を説明するための主要工程断面図である。
【図３】同上の製造方法を説明するための主要工程断面図である。
【図４】実施形態２を示す概略断面図である。
【図５】同上の製造方法を説明するための主要工程断面図である。
【図６】同上の製造方法を説明するための主要工程断面図である。
【図７】従来例を示す概略断面図である。
【符号の説明】
Ａ 発光ダイオード素子
Ｂ ベース基板
３ ｎ形半導体層
４ 発光層
５ ｐ形半導体層
６ 電流拡散膜
７ ｐ電極
８ ｎ電極
９ａ，９ｂ バンプ
１１ａ，１１ｂ 導体部
１２ａ，１２ｂ パッド
１４ 封止部
１５ａ，１５ｂ バンプ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a light emitting device and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, as shown in FIG. 7, a buffer layer 42, an n-type semiconductor layer 43, a light emitting layer 44, and a p-type semiconductor layer 45 are sequentially formed on one surface (lower surface in FIG. 7) in the thickness direction of a sapphire substrate 41. A light emitting diode element A ′ has been proposed (for example, see Patent Document 1). The buffer layer 42, the n-type semiconductor layer 43, the light emitting layer 44, and the p-type semiconductor layer 45 are each formed of a gallium nitride-based compound semiconductor material (for example, GaN, InGaN, or the like).
[0003]
The light-emitting diode element A 'described above uses the other surface in the thickness direction of the sapphire substrate 41 (the upper surface in FIG. 7) as a light extraction surface, and is used by being flip-chip mounted on a substrate (not shown). That is, light emitted from the light emitting layer 44 is radiated to the outside through the sapphire substrate 41. The light emitting diode element A 'and the substrate constitute a light emitting device.
[0004]
Incidentally, in the above-described light emitting diode element A ′, an n-electrode 48 is formed on an n-type semiconductor layer 43, and a p-electrode 47 is formed on a p-type semiconductor layer 45 via a current diffusion film 46. Here, in the above-described light emitting diode element A ′, since the current diffusion film 46 is formed of a metal material having conductivity and high reflectivity, the light is emitted from the light emitting layer 44 to the p-type semiconductor layer 45 side. Light can be reflected to the n-type semiconductor layer 43 side, and the light extraction efficiency to the outside can be increased. Note that an arrow E in FIG. 7 indicates light emitted from the light emitting layer 44 to the n-type semiconductor layer 43 side and emitted to the outside through the light extraction surface of the sapphire substrate 41, and an arrow R in FIG. The light reflected by the film 46 and emitted to the outside through the light extraction surface of the sapphire substrate 41 is shown.
[0005]
[Patent Document 1]
JP-A-11-220170
[0006]
[Problems to be solved by the invention]
By the way, in the light emitting device having the conventional configuration, light emitted from the light emitting layer 44 is emitted to the outside through at least the n-type semiconductor layer 43 and the sapphire substrate 41. Approximately 50% of the light that reaches the interface between the sapphire substrate 41 and the n-type semiconductor layer 43 due to the refractive index difference is totally reflected at the interface and re-absorbed by the light-emitting layer 44. Further improvement in light extraction efficiency is desired. Note that the arrow L in FIG. 7 indicates light that is totally reflected at the interface and re-absorbed by the light emitting layer 44.
[0007]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a light emitting device capable of improving the efficiency of extracting light to the outside and a method for manufacturing the same.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, the invention of claim 1 provides a light emitting layer made of a semiconductor material, an n-type semiconductor layer provided on one side in the thickness direction of the light emitting layer and having a larger band gap than the light emitting layer, and a thickness of the light emitting layer. A p-type semiconductor layer provided on the other side in the direction and having a larger band gap than the light-emitting layer, and a p-electrode provided on the surface of the p-type semiconductor layer opposite to the light-emitting layer and electrically connected to the p-type semiconductor layer A light emitting diode element having an n electrode provided on the same surface of the n type semiconductor layer as the light emitting layer and electrically connected to the n type semiconductor layer; and a p electrode and an n electrode of the light emitting diode element each having a bump. A base portion provided on a surface facing the light-emitting diode element, and a light-extracting surface of the n-type semiconductor layer of the light-emitting diode element opposite to the light-emitting layer; Characterized by comprising a surface. According to the present invention, since the surface of the n-type semiconductor layer opposite to the light emitting layer is a light extraction surface, the efficiency of extracting light to the outside can be improved. In addition, there is an advantage that the thickness of the entire device along the thickness direction of the light emitting layer can be reduced and the entire device can be downsized.
[0009]
According to a second aspect of the present invention, in the first aspect, a grating is provided on a light extraction surface of the n-type semiconductor layer. According to the present invention, total reflection caused by a difference in refractive index between the n-type semiconductor layer and air can be suppressed, and the efficiency of extracting light to the outside can be further improved.
[0010]
According to a third aspect of the present invention, in the first or second aspect, the p-electrode and the n-electrode are formed of a metal material. According to the present invention, light emitted from the light emitting layer and reaching each of the p-electrode and the n-electrode can be reflected toward the light extraction surface, and the efficiency of extracting light to the outside can be further improved. .
[0011]
A fourth aspect of the present invention is characterized in that, in the first to third aspects of the present invention, a sealing portion made of a resin that fills a gap between the light emitting diode element and the base substrate is provided. According to the present invention, the surface of the light emitting diode element on the side of the base substrate can be protected, and the bonding strength between the light emitting diode element and the base substrate is improved. Reliability is improved.
[0012]
According to a fifth aspect of the present invention, in the first to fourth aspects of the present invention, the pad electrically connected to each of the conductors on the surface of the base substrate opposite to the surface facing the light emitting diode element. Is provided. According to the present invention, the planar size of the base substrate can be reduced as compared with the case where pads are provided on the surface of the base substrate on which the light emitting diode elements are mounted, and the mounting area on the mounting substrate is reduced. be able to.
[0013]
According to a sixth aspect of the present invention, there is provided the method for manufacturing a light emitting device according to any one of the first to fifth aspects, wherein an n-type semiconductor layer is provided on one surface side of a sacrificial substrate for forming a light emitting diode element. A crystal growth step of sequentially growing a light-emitting layer and a p-type semiconductor layer, an electrode formation step of forming an n-electrode and a p-electrode after the crystal growth step, and bumping each of the n-electrode and the p-electrode onto a conductor of a base substrate. And an exposure step of removing the sacrificial substrate after the mounting step and exposing the entire surface of the n-type semiconductor layer on the side opposite to the light emitting layer. According to the present invention, it is possible to provide a light emitting device in which the surface of the n-type semiconductor layer on the side opposite to the light emitting layer becomes a light extracting surface and the efficiency of extracting light to the outside is improved. Further, since the sacrificial substrate is removed after the light emitting diode element formed on one surface side of the sacrificial substrate is mounted on the base substrate, the light emitting diode element is mounted on the base substrate after the sacrificial substrate is removed from the light emitting diode element. In comparison with the above, it is possible to prevent the light emitting diode element from being damaged during the production, and the production yield is improved.
[0014]
The invention according to claim 7 is the method for manufacturing a light emitting device according to claim 4, wherein an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are sequentially formed on one surface side of a sacrificial substrate for forming a light-emitting diode element. A crystal growing step of growing, an electrode forming step of forming an n-electrode and a p-electrode after the crystal growing step, a mounting step of connecting each of the n-electrode and the p-electrode to a conductor of the base substrate via a bump, An exposing step of removing the sacrificial substrate after the step to expose the entire surface of the n-type semiconductor layer opposite to the light emitting layer, wherein the conductor portion of the base substrate is provided prior to the mounting step. A resin arranging step of arranging a resin for a sealing portion on the surface of the first member. According to the present invention, it is possible to provide a light emitting device in which the surface of the n-type semiconductor layer on the side opposite to the light emitting layer becomes a light extracting surface and the efficiency of extracting light to the outside is improved. Further, since the sacrificial substrate is removed after the light emitting diode element formed on one surface side of the sacrificial substrate is mounted on the base substrate, the light emitting diode element is mounted on the base substrate after the sacrificial substrate is removed from the light emitting diode element. In comparison with the above, it is possible to prevent the light emitting diode element from being damaged during the production, and the production yield is improved. In addition, since the resin for the sealing portion is provided on the surface of the base substrate on the side where the conductor portion is provided before the mounting process, the resin for the sealing portion is formed on the outer peripheral surface of the n-type semiconductor layer. Can be prevented from crawling along.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
(Embodiment 1)
As shown in FIG. 1, the light emitting device of the present embodiment includes a light emitting diode element A and a base substrate B on which the light emitting diode element A is mounted.
[0016]
The light emitting diode element A is provided on the light emitting layer 4, the n-type semiconductor layer 3 provided on one side in the thickness direction of the light emitting layer 4 and having a larger band gap than the light emitting layer 4, and provided on the other side in the thickness direction of the light emitting layer 4. And a p-type semiconductor layer 5 having a larger band gap than the light emitting layer 4. The light emitting layer 4, the n-type semiconductor layer 3, and the p-type semiconductor layer 5 are each formed of a gallium nitride-based compound semiconductor material (for example, GaN, InGaN, or the like).
[0017]
In the light-emitting diode element A, a p-electrode (anode electrode) 7 made of a metal material electrically connected to the p-type semiconductor layer 5 has a low resistance on the surface of the p-type semiconductor layer 5 opposite to the light-emitting layer 4. An n-electrode (cathode electrode) 8 made of a metal material electrically connected to the n-type semiconductor layer 3 is provided between the light-emitting layer 4 and the light-emitting layer 4 in the n-type semiconductor layer 3. It is provided on the surface on the same side. Here, the n-type semiconductor layer 3 is formed so as to have a larger area on a surface orthogonal to the thickness direction than the light-emitting layer 4 and the p-type semiconductor layer 5, and to a portion not overlapping the light-emitting layer 4 and the p-type semiconductor layer 5. An n-electrode 8 is provided. The current diffusion film 6 is provided to enhance the in-plane uniformity of the current flowing through the light emitting layer 4, but is formed of a conductive material having low resistance and high reflectivity (for example, aluminum). Also, it has a function as a reflection film for reflecting light emitted from the light emitting layer 4 to the p-type semiconductor layer 5 side to the n-type semiconductor layer 3 side.
[0018]
The base substrate B is provided with conductor portions 11a and 11b at portions corresponding to the p-electrode 7 and the n-electrode 8 of the light-emitting diode element A on the surface facing the light-emitting diode element A (the upper surface in FIG. 1). The electrodes 7 and 8 of the diode element A are electrically connected to the opposing conductors 11a and 11b via bumps 9a and 9b made of a metal material (for example, gold, solder or the like). The base substrate B has pads 12a and 12b electrically connected to the conductors 11a and 11b, respectively, on a surface (lower surface in FIG. 1) opposite to the surface facing the light emitting diode element A. Under the pads 12a and 12b, ball-shaped bumps 15a and 15b made of a metal material (for example, solder or the like) are provided. The conductors 11a and 11b and the pads 12 and 12b are electrically connected via connection portions 13a and 13b made of a conductive material buried in through holes formed in the base substrate B.
[0019]
Further, the light emitting device of the present embodiment is provided with a sealing portion 14 made of resin that fills a gap between the light emitting diode element A and the base substrate B. Here, as the resin of the sealing portion 14, for example, an epoxy resin containing a black filler may be used.
[0020]
In the light emitting device of the present embodiment described above, the surface (upper surface in FIG. 1) of the light emitting diode element A on the side opposite to the light emitting layer 4 in the n-type semiconductor layer 3 is used as a light extraction surface. That is, in the conventional example shown in FIG. 7, light emitted from the light emitting layer 44 is emitted to the outside through the sapphire substrate 41, whereas in the light emitting device of the present embodiment, light emitted from the light emitting layer 4 is The light is radiated to the outside from the surface of the n-type semiconductor layer 3 opposite to the light emitting layer 4. Here, the light emitting diode element A is provided with a grating 3 a on the light extraction surface of the n-type semiconductor layer 3. The grating 3a is formed by providing a large number of concave portions 3b periodically arranged in the left-right direction in FIG. 1 on the light extraction surface of the n-type semiconductor layer 3.
[0021]
However, in the light emitting device of the present embodiment, since the surface of the n-type semiconductor layer 3 on the side opposite to the light emitting layer 4 is a light extraction surface, the efficiency of light extraction to the outside can be improved. Moreover, since the grating 3a is provided on the light extraction surface of the n-type semiconductor layer 3, total reflection due to the difference in refractive index between the n-type semiconductor layer 3 and air can be suppressed, and the light extraction efficiency to the outside can be reduced. Can be further improved. Further, since each of the p-electrode 7 and the n-electrode 8 is formed of a metal material, light emitted from the light emitting layer 4 and reaching each of the p-electrode 7 and the n-electrode 8 can be reflected to the light extraction surface side. The efficiency of extracting light to the outside can be improved as compared with the case where each of the electrodes 7 and 8 is formed of a transparent conductive film such as an ITO film. Furthermore, since the sealing portion 14 is provided in the gap between the light emitting diode element A and the base substrate B, the surface of the light emitting diode element A on the base substrate B side can be protected and the light emitting diode element Since the bonding strength between A and the base substrate B is improved, handling is facilitated and bonding reliability is improved. Furthermore, since the epoxy resin containing the black filler is used as the resin of the sealing portion 14, the light emitting diode element A can be more reliably protected as compared with the case where a transparent resin is used as the resin of the sealing portion 14. And joint reliability can be improved. Further, it is possible to prevent light from leaking from the base substrate B side of the light emitting diode element A to the outside.
[0022]
In the light emitting device of the present embodiment, pads 12a and 12b electrically connected to the conductors 11a and 11b are provided on the surface of the base substrate B opposite to the surface facing the light emitting diode element A. Therefore, the planar size of the base substrate B can be reduced as compared with the case where a pad is provided on the surface of the base substrate B on which the light emitting diode element A is mounted, and the mounting area for other members such as the mounting substrate can be reduced. Can be smaller.
[0023]
Further, in the light emitting device of the present embodiment, the thickness dimension of the light emitting diode element A is made thinner by the sum of the thickness of the sapphire substrate 41 and the thickness of the buffer layer 42 as compared with the conventional example shown in FIG. Therefore, it is possible to reduce the thickness of the entire device.
[0024]
Hereinafter, a method for manufacturing the light emitting device of the present embodiment will be described with reference to FIGS.
[0025]
Sapphire substrate (α-Al 2 O 3 The buffer layer 2, the n-type semiconductor layer 3, the light emitting layer 4, and the p-type semiconductor layer 5 are formed, for example, by metal organic chemical vapor deposition on one surface (lower surface in FIG. 2A) in the thickness direction of the wafer 1 composed of the substrate). An epitaxial growth step of sequentially growing (continuously growing) by the MOVPE method (MOVPE method), and thereafter, a portion of the p-type semiconductor layer 5 and the light emitting layer 4 corresponding to a region where the n-electrode 8 is to be formed in the n-type semiconductor layer 3 After etching, the n-electrode 8 is formed on the exposed surface of the n-type semiconductor layer 3 on the light emitting layer 4 side, and then the current diffusion film 6 is formed on the surface of the p-type semiconductor layer 5. A structure shown in FIG. 2A is obtained by forming a p-electrode 7 on the surface of the diffusion film 6 and then forming bumps 9a and 9b on the surfaces of the electrodes 7 and 8, respectively. In this embodiment, the wafer 1 and the buffer layer 2 constitute a sacrificial substrate. The n-type semiconductor layer 3 is formed on one surface side of the sacrificial substrate for forming the light emitting diode element A by the above-described epitaxial growth step. This is a crystal growth step of sequentially growing the light emitting layer 4 and the p-type semiconductor layer 5. In the present embodiment, the step of forming the n-electrode 8 and the step of forming the p-electrode 7 constitute an electrode forming step.
[0026]
Next, a plurality of pairs of conductor portions 11a and 11b are formed on one surface side and formed in a size corresponding to the wafer 1, and a plurality of pairs of pads 12a and 12b are provided on the other surface side. A resin for the sealing portion 14 (black) is provided on one surface side of the base substrate B ′ where the conductor portions 11a and 11b and the pads 12a and 12b overlapping in the thickness direction are electrically connected via the connection portions 13a and 13b. After the structure shown in FIG. 3 is obtained by applying a filler-containing epoxy resin), the surface of each of the semiconductor layers 5 and 3 on which the electrodes 7 and 8 are provided is closer to the base substrate B ′ in the thickness direction. By performing a mounting step of connecting the electrodes 7 and 8 to the conductors 11a and 11b of the base substrate B ′ via the bumps 9a and 9b, the structure shown in FIG. obtain. That is, in this embodiment, the wafer 1 having the plurality of light emitting diode elements A formed on one surface side is mounted face down on the base substrate B ′. In the present embodiment, the step of applying a resin for the sealing portion 14 to one surface side of the base substrate 14 is a resin disposing step. It may be attached to the front side. In this embodiment, the bumps 9a and 9b are formed on the surfaces of the electrodes 7 and 8, respectively, and then the mounting process is performed. However, the bumps 9a and 9b are connected to the corresponding conductors of the base substrate B '. After forming on the surfaces of 11a and 11b, the resin for the sealing portion 14 may be applied before the mounting process is performed.
[0027]
After performing the above-described mounting process, the thermal decomposition layer 2 ′ obtained by thermally decomposing the buffer layer 2 by irradiating the laser light from the other surface side of the wafer 1 made of the sapphire substrate to the buffer layer 2 through the wafer 1 is used. The structure shown in FIG. 2C is obtained by performing the thermal decomposition process.
[0028]
Thereafter, a stripping step of stripping the wafer 1 by removing the thermal decomposition layer 2 ′ with an etching solution such as hydrochloric acid is performed. Subsequently, laser light or dicing is performed on the surface of the n-type semiconductor layer 3 opposite to the light emitting layer 4. The structure shown in FIG. 2D is obtained by forming the grating 3a by providing a plurality of recesses 3b using a saw or the like. In addition, this kind of thermal decomposition process and peeling process are well-known techniques as disclosed in, for example, JP-A-2003-037286. In the present embodiment, the sacrificial substrate including the wafer 1 and the buffer layer 2 is removed in the thermal decomposition step and the peeling step to expose the entire surface of the n-type semiconductor layer 3 on the side opposite to the light emitting layer 4. This is an exposure step.
[0029]
Next, bumps 15a and 15b are formed on the respective surfaces of the pads 12a and 12b of the base substrate B 'to obtain the structure shown in FIG.
[0030]
Subsequently, a cutting step of separating the light emitting devices into individual light emitting devices using a dicing saw or the like is performed to obtain a structure shown in FIG.
[0031]
According to the manufacturing method described above, it is possible to provide a light emitting device in which the surface of the n-type semiconductor layer 3 on the side opposite to the light emitting layer 4 is a light extraction surface and the efficiency of extracting light to the outside is improved. In addition, since the light-emitting diode element A formed on one surface side of the sacrificial substrate is mounted on the base substrate B ′ and then the sacrificial substrate is removed, the light-emitting diode element A is removed from the light-emitting diode element A and then the base is removed. Compared with the case where the light emitting diode element A is mounted on the substrate B ', the handling becomes easier and the light emitting diode element A can be prevented from being damaged during the manufacturing, and the manufacturing yield is improved.
[0032]
In the present embodiment, the exposure step and the cutting step are performed after the wafer 1 on which the plurality of light emitting diode elements A are formed is mounted face-down on the base substrate B ′. 1 is cut for each light emitting diode element A, and the light emitting diode element A is mounted face down on a base substrate B formed in advance in a size corresponding to the light emitting diode element A, and the light emitting layer in the n-type semiconductor layer 3 is formed. An exposure step of exposing the entire surface opposite to 4 may be performed.
[0033]
(Embodiment 2)
The basic configuration of the light emitting device of the present embodiment is substantially the same as that of the first embodiment, and the plane size of the base substrate B is set slightly larger than the plane size of the light emitting diode element A, as shown in FIG. The only difference is that the sealing portion 14 also covers the outer peripheral surface of the n-type semiconductor layer 3. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
[0034]
Thus, in the light emitting device of the present embodiment, similarly to the light emitting device of the first embodiment, since the surface of the n-type semiconductor layer 3 on the side opposite to the light emitting layer 4 is a light extracting surface, light is extracted to the outside. Efficiency can be improved, and since the grating 3a is provided on the light extraction surface of the n-type semiconductor layer 3, total reflection caused by a difference in refractive index between the n-type semiconductor layer 3 and air can be suppressed. And the efficiency of extracting light to the outside can be further improved.
[0035]
Hereinafter, a method for manufacturing the light emitting device of the present embodiment will be described with reference to FIGS.
[0036]
Sapphire substrate (α-Al 2 O 3 The buffer layer 2, the n-type semiconductor layer 3, the light-emitting layer 4, and the p-type semiconductor layer 5 are formed, for example, by a metalorganic vapor phase on one surface (lower surface in FIG. 5A) in the thickness direction of the support substrate 21 made of An epitaxial growth step of sequentially growing (continuously growing) by a growth method (MOVPE method) is performed, and then corresponds to a region of the p-type semiconductor layer 5 and the light-emitting layer 4 where the n-electrode 8 is to be formed in the n-type semiconductor layer 3. After etching a portion or the like, an n-electrode 8 is formed on the exposed surface of the n-type semiconductor layer 3 on the light-emitting layer 4 side, and then a current diffusion film 6 is formed on the surface of the p-type semiconductor layer 5. A structure shown in FIG. 5A is obtained by forming a p-electrode 7 on the surface of the current diffusion film 6 and thereafter forming bumps 9a and 9b on the surfaces of the electrodes 7 and 8, respectively. In the present embodiment, the supporting substrate 21 and the buffer layer 2 constitute a sacrificial substrate, and the above-described epitaxial growth process forms the n-type semiconductor layer 3 on one surface side of the sacrificial substrate for forming the light emitting diode element A. , A crystal growth step of sequentially growing the light emitting layer 4 and the p-type semiconductor layer 5. In the present embodiment, the step of forming the n-electrode 8 and the step of forming the p-electrode 7 constitute an electrode forming step.
[0037]
Next, a pair of conductors 11a and 11b are formed on one surface side, and a pair of pads 12a and 12b are provided on the other surface side. Each of the semiconductor layers 5 and 3 is connected to a base substrate B (see FIG. 6) in which the conductor portions 11a and 11b and the pads 12a and 12b overlapping in the thickness direction are electrically connected via the connection portions 13a and 13b. The electrodes 7 and 8 are arranged such that the surface on the side on which the electrodes 7 and 8 are provided is on the base substrate B side in the thickness direction, and the respective electrodes 7 and 8 are respectively connected to the conductor portions 11a and 11b of the base substrate B via bumps 9a and 9b. A mounting step for connecting is performed, and then the gap between the light emitting diode element A and the base substrate B is filled with resin to form the sealing portion 14, thereby obtaining the structure shown in FIG. 5B. In the present embodiment, the bumps 9a and 9b are formed on the respective surfaces of the electrodes 7 and 8 before the mounting process is performed. However, the bumps 9a and 9b are formed on the surfaces of the electrodes 7 and 8. Alternatively, the mounting process may be performed after forming on the surface of each of the corresponding conductor portions 11a and 11b of the base substrate B.
[0038]
After performing the above-described mounting step, the buffer layer 2 is thermally decomposed by irradiating a laser beam to the buffer layer 2 from the other surface side of the support substrate 21 made of a sapphire substrate through the support substrate 21, and a thermal decomposition layer 2 ′. The structure shown in FIG. 5C is obtained by performing a thermal decomposition step of forming
[0039]
Thereafter, a stripping step of stripping the support substrate 21 by removing the thermally decomposed layer 2 ′ with an etching solution such as hydrochloric acid is performed. Subsequently, a laser beam or the like is applied to the surface of the n-type semiconductor layer 3 opposite to the light emitting layer 4. The structure shown in FIG. 5D is obtained by forming the grating 3a by providing a plurality of recesses 3b using a dicing saw or the like. In this embodiment, the entire surface of the n-type semiconductor layer 3 opposite to the light emitting layer 4 is exposed by removing the sacrificial substrate composed of the support substrate 21 and the buffer layer 2 in the thermal decomposition step and the peeling step. This is an exposure step.
[0040]
Next, bumps 15a and 15b are formed on the respective surfaces of the pads 12a and 12b of the base substrate B to obtain the structure shown in FIG.
[0041]
According to the manufacturing method described above, it is possible to provide a light emitting device in which the surface of the n-type semiconductor layer 3 on the side opposite to the light emitting layer 4 is a light extraction surface and the efficiency of extracting light to the outside is improved. Further, since the light-emitting diode element A formed on one surface side of the sacrificial substrate is mounted on the base substrate B and then the sacrificial substrate is removed, the light-emitting diode element A is removed from the light-emitting diode element A, and The light emitting diode element A can be prevented from being damaged during the production as compared to the case where the light emitting diode element A is mounted on B, and the production yield is improved.
[0042]
In the manufacturing method of the present embodiment, the light emitting diode element A is formed on the one surface side of the support substrate 21 made of the sapphire substrate, and then mounted on the base substrate B. Similarly, a plurality of light emitting diode elements A are formed on one surface side of the wafer 1 made of a sapphire substrate, and then separated using a dicing saw or the like to obtain a structure shown in FIG. Needless to say, it may be mounted on the board B.
[0043]
In each of the above embodiments, as described above, the gallium nitride-based compound semiconductor material is used as the crystal material of the light emitting layer 4, the n-type semiconductor layer 3, and the p-type semiconductor layer 5, but the light emitting diode element A Depending on the desired emission color, a compound semiconductor material other than a gallium nitride-based compound semiconductor material may be employed. However, it is desirable to use a material having excellent oxidation resistance as the material of the n-type semiconductor layer 3. The material of the wafer 1 and the support substrate 21 is also Al 2 O 3 However, for example, a material such as GaN, GaAs, GaP, or SiC can be appropriately used according to the semiconductor material of the light emitting layer 4, the n-type semiconductor layer 3, and the p-type semiconductor layer 5.
[0044]
【The invention's effect】
According to the first aspect of the present invention, since the surface of the n-type semiconductor layer opposite to the light emitting layer is a light extraction surface, there is an effect that the efficiency of extraction to the outside can be improved.
[0045]
According to the second aspect of the present invention, it is possible to suppress the total reflection caused by the difference in the refractive index between the n-type semiconductor layer and the air, and to improve the light extraction efficiency to the outside.
[0046]
According to the third aspect of the present invention, light emitted from the light emitting layer and reaching each of the p-electrode and the n-electrode can be reflected toward the light extraction surface, so that the efficiency of light extraction to the outside can be further improved. There is an effect that can be.
[0047]
According to the invention of claim 4, since the surface of the light emitting diode element on the base substrate side can be protected and the bonding strength between the light emitting diode element and the base substrate is improved, handling becomes easy, There is an effect that joining reliability is improved.
[0048]
According to the fifth aspect of the present invention, the planar size of the base substrate can be reduced as compared with a case where pads are provided on the surface of the base substrate on which the light emitting diode elements are mounted, and the mounting area on the mounting substrate is reduced. There is an effect that it can be reduced.
[0049]
According to the invention of claim 6, there is an effect that a light emitting device in which the surface of the n-type semiconductor layer on the side opposite to the light emitting layer becomes a light extraction surface and the light extraction efficiency to the outside is improved can be provided. Further, since the sacrificial substrate is removed after the light emitting diode element formed on one surface side of the sacrificial substrate is mounted on the base substrate, the light emitting diode element is mounted on the base substrate after the sacrificial substrate is removed from the light emitting diode element. In comparison with the above, it is possible to prevent the light emitting diode element from being damaged during the manufacturing, and it is possible to improve the manufacturing yield.
[0050]
According to the invention of claim 7, there is an effect that a light emitting device in which the surface of the n-type semiconductor layer on the side opposite to the light emitting layer becomes a light extraction surface and the efficiency of extracting light to the outside is improved can be provided. Further, since the sacrificial substrate is removed after the light emitting diode element formed on one surface side of the sacrificial substrate is mounted on the base substrate, the light emitting diode element is mounted on the base substrate after the sacrificial substrate is removed from the light emitting diode element. In comparison with the above, it is possible to prevent the light emitting diode element from being damaged during the manufacturing, and it is possible to improve the manufacturing yield. In addition, since the resin for the sealing portion is provided on the surface of the base substrate on the side where the conductor portion is provided before the mounting process, the resin for the sealing portion is formed on the outer peripheral surface of the n-type semiconductor layer. There is an effect that it is possible to prevent crawling along.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view showing a first embodiment.
FIG. 2 is a main process sectional view for explaining the manufacturing method of the above.
FIG. 3 is a cross-sectional view of a main process for describing the manufacturing method of the above.
FIG. 4 is a schematic sectional view showing a second embodiment.
FIG. 5 is a main process sectional view for explaining the manufacturing method of the above.
FIG. 6 is a main process sectional view for explaining the manufacturing method of the above.
FIG. 7 is a schematic sectional view showing a conventional example.
[Explanation of symbols]
A Light-emitting diode element
B base board
3 n-type semiconductor layer
4 Light-emitting layer
5 p-type semiconductor layer
6 Current diffusion film
7 p electrode
8 n electrode
9a, 9b bump
11a, 11b conductor
12a, 12b pad
14 Sealing part
15a, 15b Bump

Claims (7)

半導体材料からなる発光層、発光層の厚み方向の一方側に設けられ発光層よりもバンドギャップが大きなｎ形半導体層、発光層の厚み方向の他方側に設けられ発光層よりもバンドギャップの大きなｐ形半導体層、ｐ形半導体層における発光層とは反対側の表面側に設けられｐ形半導体層に電気的に接続されたｐ電極、ｎ形半導体層における発光層と同じ側の表面に設けられｎ形半導体層に電気的に接続されたｎ電極を備えた発光ダイオード素子と、発光ダイオード素子のｐ電極およびｎ電極それぞれがバンプを介して電気的に接続される導体部が発光ダイオード素子との対向面に設けられたベース基板とを備え、発光ダイオード素子のｎ形半導体層における発光層とは反対側の表面を光取り出し面としてなることを特徴とする発光装置。A light-emitting layer made of a semiconductor material, an n-type semiconductor layer provided on one side in the thickness direction of the light-emitting layer and having a larger band gap than the light-emitting layer, and a band gap larger than the light-emitting layer provided on the other side in the thickness direction of the light-emitting layer A p-type semiconductor layer, a p-electrode provided on the surface of the p-type semiconductor layer opposite to the light-emitting layer and electrically connected to the p-type semiconductor layer, and provided on the same surface as the light-emitting layer of the n-type semiconductor layer A light-emitting diode element having an n-electrode electrically connected to the n-type semiconductor layer; and a light-emitting diode element having a conductor part to which each of the p-electrode and the n-electrode of the light-emitting diode element is electrically connected via a bump. And a base substrate provided on the opposite surface of the light emitting diode element, wherein a surface of the n-type semiconductor layer of the light emitting diode element opposite to the light emitting layer is formed as a light extraction surface. 前記ｎ形半導体層における光取り出し面にグレーティングを設けてなることを特徴とする請求項１記載の発光装置。The light emitting device according to claim 1, wherein a grating is provided on a light extraction surface of the n-type semiconductor layer. 前記ｐ電極および前記ｎ電極は金属材料により形成されてなることを特徴とする請求項１または請求項２記載の発光装置。The light emitting device according to claim 1, wherein the p electrode and the n electrode are formed of a metal material. 前記発光ダイオード素子と前記ベース基板との間の隙間を埋める樹脂からなる封止部を備えてなることを特徴とする請求項１ないし請求項３のいずれかに記載の発光装置。The light emitting device according to claim 1, further comprising a sealing portion made of a resin that fills a gap between the light emitting diode element and the base substrate. 前記ベース基板における前記発光ダイオード素子との対向面とは反対側の面に前記各導体部それぞれに電気的に接続されたパッドが設けられてなることを特徴とする請求項１ないし請求項４のいずれかに記載の発光装置。5. The pad according to claim 1, wherein a pad electrically connected to each of the conductors is provided on a surface of the base substrate opposite to a surface facing the light emitting diode element. 6. The light-emitting device according to any one of the above. 請求項１ないし請求項５のいずれか１項に記載の発光装置の製造方法であって、発光ダイオード素子を形成するための犠牲基板の一表面側にｎ形半導体層、発光層、ｐ形半導体層を順次成長する結晶成長工程と、結晶成長工程の後でｎ電極およびｐ電極を形成する電極形成工程と、ｎ電極およびｐ電極それぞれをベース基板の導体部へバンプを介して接続する実装工程と、実装工程の後で犠牲基板を除去してｎ形半導体層における発光層とは反対側の表面全体を露出させる露出工程とを備えることを特徴とする発光装置の製造方法。The method for manufacturing a light emitting device according to claim 1, wherein an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor are provided on one surface side of a sacrificial substrate for forming a light-emitting diode element. A crystal growth step of sequentially growing layers, an electrode formation step of forming an n-electrode and a p-electrode after the crystal growth step, and a mounting step of connecting each of the n-electrode and the p-electrode to a conductor of the base substrate via a bump And a step of exposing the entire surface of the n-type semiconductor layer opposite to the light emitting layer by removing the sacrificial substrate after the mounting step. 請求項４記載の発光装置の製造方法であって、発光ダイオード素子を形成するための犠牲基板の一表面側にｎ形半導体層、発光層、ｐ形半導体層を順次成長する結晶成長工程と、結晶成長工程の後でｎ電極およびｐ電極を形成する電極形成工程と、ｎ電極およびｐ電極それぞれをベース基板の導体部へバンプを介して接続する実装工程と、実装工程の後で犠牲基板を除去してｎ形半導体層における発光層とは反対側の表面全体を露出させる露出工程とを備え、実装工程よりも前にベース基板における導体部が設けられている側の面に封止部用の樹脂を配設する樹脂配設工程を備えることを特徴とする発光装置の製造方法。5. A method for manufacturing a light-emitting device according to claim 4, wherein an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are sequentially grown on one surface side of a sacrificial substrate for forming a light-emitting diode element; An electrode forming step of forming an n-electrode and a p-electrode after the crystal growth step, a mounting step of connecting each of the n-electrode and the p-electrode to a conductor of the base substrate via a bump, and a sacrificial substrate after the mounting step. Removing the entire surface of the n-type semiconductor layer on the side opposite to the light-emitting layer, and forming a sealing portion on the surface of the base substrate on which the conductor portion is provided before the mounting process. A method for manufacturing a light emitting device, comprising a resin disposing step of disposing the resin.
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