JP2004349351A - Crystalline semiconductor film, its manufacturing method, semiconductor device, and indicating device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a semiconductor device with high electron mobility by a method wherein crystal quality is evaluated with sufficient reproducibility, so that crystal defect is reduced and a crystalline semiconductor film with superior crystallinity is obtained. <P>SOLUTION: In a method for forming the crystalline semiconductor film by a method wherein energy is applied to an amorphous semiconductor film 2 formed on a substrate 1 and crystal growth is performed, each crystal grain which constitutes the crystalline semiconductor film is controlled in such a manner that ratio of grains wherein crystal orientation angle difference of adjoining crystal grains is at least 34° and at most 42° and at least 58° and at most 62° is controlled to at least 0.35 and at most 1. For example, excimer laser luminous energy density is set to at least 380 mJ/cm<SP>2</SP>and at most 400 mJ/cm<SP>2</SP>. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【００４２】
エネルギー密度３６０ｍＪ／ｃｍ２および３７０ｍＪ／ｃｍ２でエキシマレーザ光を照射して得られる結晶性シリコン膜は、エキシマレーザ光による非晶質シリコン膜の加熱が不十分であるため、結晶化も不十分となり、Ｍ長さが長く、ＴＦＴの電子移動度も低くなると考えられる。
【００４３】
また、エネルギー密度が３８０ｍＪ／ｃｍ２〜４００ｍＪ／ｃｍ２でエキシマレーザ光を照射して得られる結晶性シリコン膜は、エキシマレーザ光による非晶質シリコン膜の加熱が適切であり、充分に結晶化されるため、Ｍ長さが短く、ＴＦＴの電子移動度も高くなると考えられる。即ち、表１では、レーザエネルギー密度を適宜設定してＭ角度が「３４°〜４２°」および「５８°〜６２のものの比率が０．３７〜０．４０の範囲内にあるときに「移動度」が高くなっている。
【００４４】
さらに、エネルギー密度が４１０ｍＪ／ｃｍ２以上では、結晶性シリコン膜が完全溶融された後、冷却中に極微結晶として析出していると考えられる。このため、Ｍ長さが長く、再結合中心が多い状態であり、再結合中心がキャリアのトラップ準位として働き、ＴＦＴの電子移動度が低下したと考えられる。
【００４５】
上記表１によれば、ＴＦＴの電子移動度２００ｃｍ２／Ｖ・ｓｅｃ以上を得るための適正条件は、エキシマレーザ光のエネルギー密度が、３８０ｍＪ／ｃｍ２以上４００ｍＪ／ｃｍ２以下の範囲であるということが分かる。このような条件でエキシマレーザ光を照射して得られる結晶性シリコン膜のＭ長さは、Ｍ角度３４°以上４２°以下および５８°以上６２°以下（図１参照）で長くなっている。その中には、再結合中心として作用する結晶格子欠陥が含まれる３４°以上４２°以下のＭ角度も存在するが、実用上は許容できる範囲である。
【００４６】
上記表１において、隣接する結晶粒の結晶方位差の比率は、下記の式（１）によって求めたものである。
（隣接する結晶粒の結晶方位差３４°以上４２°以下および５８°以上６２°以下であるものの比率）＝｛（Ｍ角度３４°以上４２°以下であるもののＭ長さ）＋（Ｍ角度５８°以上６２°以下であるもののＭ長さ）｝／（Ｍ角度２°以上６５°以下であるもののＭ長さ）・・・・・・・・式（１）
上記表１によれば、エキシマレーザ光のエネルギー密度が、３８０ｍＪ／ｃｍ２以上４００ｍＪ／ｃｍ２以下（表１参照）の範囲である場合、隣接する結晶粒の結晶方位差３４°以上４２°以下および５８°以上６２°以下であるものの比率は、０．３５以上１以下（表１では０．３７以上０．４０以下）になっている。
従って、隣接する結晶粒の結晶方位差３４°以上４２°以下および５８°以上６２°以下であるものの比率が０．３５以上１以下であることが好ましいことが分かる。
【００４７】
また、ＴＦＴの電子移動度が最も高い最適条件では、隣接する結晶粒の結晶方位差が３４°以上４２°以下および５８°以上６２°以下であるものの比率も最も高くなっている。したがって、隣接する結晶粒の結晶方位差が３４°以上４２°以下および５８°以上６２°以下であるものの比率が最も高くなるように、エキシマレーザ光のエネルギー密度を制御することによって、結晶性が良好な結晶性シリコン膜が得られ、移動度が高いＴＦＴが得られることが分かる。
【００４８】
以下に、本発明の結晶性半導体膜とその製造方法、その結晶性半導体膜を用いた半導体装置およびそれを用いた表示装置の具体例について、図面を参照しながら説明する。なお、本発明では、以下の各具体例（実施形態１〜３）に限定されるものではない。
【００４９】
（実施形態１）
本実施形態１では、絶縁性表面を有する基板としてのガラス基板上に、非晶質半導体膜としての非晶質シリコン膜を形成し、その非晶質シリコン膜に対して、エネルギーとしてエキシマレーザ光を照射することにより、結晶性半導体膜として結晶性シリコン膜を作製する場合である。
【００５０】
図２は、本発明の結晶性半導体膜の実施形態１とその製造方法について説明するための要部断面図である。
【００５１】
図２に示すように、まず、ＰＥ−ＣＶＤ法によって、ガラス基板１上の全面にわたって、非晶質シリコン膜２を５０ｎｍの膜厚に形成する。この成膜に用いる材料ガスとしては、ＳｉＨ４ガスを用い、基板温度は３００℃とする。
【００５２】
次に、ＸｅＣｌエキシマレーザ光を非晶質シリコン膜２上に照射して、非晶質シリコン膜２を結晶化させる。このときのエキシマレーザ光のエネルギー密度は、隣接する結晶粒同士の結晶方位角度差が３４°以上４２°以下および５８°以上６２°以下であるものの比率が最も高くなるように、３８０ｍＪ／ｃｍ２以上４００ｍＪ／ｃｍ２以下の範囲内に設定する。
【００５３】
以上の工程により、隣接する各結晶粒の結晶方位角度差が３４°以上４２°以下および５８°以上６２°以下であるものの比率が０．３５以上１以下に制御された結晶性シリコン膜が作製される。
【００５４】
このようにして、作製された結晶性シリコン膜は、隣接する各結晶粒の結晶方位角度差が３４°以上４２°以下であるものは結晶欠陥が少なく、隣接する各結晶粒の結晶方位角度差が５８°以上６２°以下であるものは再結合中心として作用しないため、良好な結晶性を有する結晶シリコン膜を得ることができる。
【００５５】
（実施形態２）
本実施形態２では、上述した実施形態１において説明した結晶性シリコン膜を用いて、半導体装置としてのＴＦＴ（薄膜トランジスタ）を製造する場合である。
【００５６】
図３は、本発明の半導体装置の実施形態２とその製造方法について説明するための断面図である。
【００５７】
図３において、本発明の半導体装置としてのＴＦＴ（薄膜トランジスタ）は、ガラス基板１１上に結晶性シリコン膜１２が設けられ、結晶性シリコン膜１２に設けられたチャネル領域上に、ＳｉＯ２膜からなるゲート絶縁膜１３を介して、結晶性ＷＳｉ２膜からなるゲート電極１４が設けられている。結晶性シリコン膜１２の両側のソース領域およびドレイン領域はそれぞれ、ＳｉＯ２膜からなるゲート絶縁膜１３および層間絶縁膜１５に設けられた各コンタクトホール１６をそれぞれ介して、Ａｌ膜からなる各配線１７とそれぞれ電気的に接続されている。この各配線１７は、ＳｉＮ膜からなる保護膜１８の各スルーホール１９によって外部との各電気的接続が可能となっている。
【００５８】
上記構成の薄膜トランジスタを、以下のようにして製造することができる。
【００５９】
まず、ガラス基板１１上に、上記実施形態１で説明したように、結晶性シリコン膜を形成し、次に、この結晶性シリコン膜をＣＦ４ガスとＯ２ガスとを用いたＲＩＥ法によって、所定形状にパターニングすることによって、島状の結晶性シリコン膜１２を形成する。
【００６０】
その後、この結晶性シリコン膜１２が形成されたガラス基板１１の全面にわたって、ＴＥＯＳ（テトラエトキシシラン）ガスとＯ３ガスとを用いたプラズマＣＶＤ法によって、ＳｉＯ２膜からなるゲート絶縁膜１３を形成する。
【００６１】
次に、スパッタリング法によって、ゲート絶縁膜１３が形成されたガラス基板１１の全面にわたって結晶性ＷＳｉ２膜を形成した後、ＣＦ４ガスとＯ２ガスとを用いたＲＩＥ法によって、結晶性シリコン膜１２上の略中央部分にのみＷＳｉ２膜が残るようにエッチングを行ってパターニングすることにより、結晶性ＷＳｉ２膜からなるゲート電極１４を形成する。
【００６２】
さらに、ＴＦＴ（薄膜トランジスタ）のソース領域およびドレイン領域となる結晶性シリコン膜１２の所定部分に不純物をイオンドーピング法により導入する。本実施形態２では、上記結晶性ＷＳｉ２膜からなるゲート電極１４が不純物を導入する際のマスクとして作用するため、ゲート電極１４が設けられた部分以外の結晶シリコン膜１２に不純物が導入される。ｎ型のトランジスタを形成する場合には、導入される不純物としてリン（Ｐ）が用いられ、ｐ型のトランジスタを形成する場合には、導入される不純物としてホウ素（Ｂ）が用いられる。
【００６３】
さらに、ＴＥＯＳガスとＯ３ガスとを用いたプラズマＣＶＤ法によって、ガラス基板１１の全面にわたって、ＳｉＯ２膜からなる層間絶縁膜１５を形成した後、ＣＦ４ガスとＣＨＦ３ガスとを用いたＲＩＥ法によって、ソース領域およびドレイン領域とされる結晶性シリコン膜１２上の層間絶縁膜１５に各コンタクトホール１６をそれぞれ形成する。
【００６４】
さらに、スパッタリング法を用いて基板の全体にわたってＡｌ層を積層した後、ＢＣｌ３ガスとＣｌ２ガスとを用いたＲＩＥ法によって、層間絶縁膜１５に形成された各コンタクトホール１６をそれぞれ介して結晶性シリコン膜１２に導通するＡｌ配線１７とする。
【００６５】
さらに、ＳｉＨ４ガスとＮＨ３ガスまたはＮ２ガスとを用いたプラズマＣＶＤ法によって、ガラス基板１１の全面にわたって、ＳｉＮ膜からなる保護膜１８を形成し、最後に、保護膜１８の一部をＣＦ４ガスとＣＨＦ３ガスとを用いたエッチングによって、Ａｌ膜からなるＡｌ配線１７上に電気的に接続可能なように各スルーホール１９を保護膜１８にそれぞれ形成することによって、ＴＦＴ（薄膜トランジスタ）が完成する。
【００６６】
このようにして作製されたＴＦＴ（薄膜トランジスタ）は、結晶性シリコン膜１２において、隣接する各結晶粒の結晶方位角度差が３４°以上４２°以下であるものは結晶欠陥が少なく、隣接する各結晶粒の結晶方位角度差が５８°以上６２°以下であるものは再結合中心として作用しないため、移動度が高いＴＦＴ（薄膜トランジスタ）を得ることができる。このＴＦＴ（薄膜トランジスタ）は、半導体装置として、液晶ドライバー装置、半導体メモリ装置および半導体論理回路などに用いることが可能である。
【００６７】
（実施形態３）
本実施形態３では、上記の実施形態２で説明した半導体装置を用いて液晶表示装置などの表示装置を構成する場合である。
【００６８】
図４（ａ）および図４（ｂ）は、本発明の表示装置の実施形態３とその製造方法について説明するための断面図である。なお、図４では、上記実施形態２で説明したＴＦＴについては、図３と同じ符号を付してその詳しい説明は省略する。
【００６９】
図４（ａ）に示すように、表示装置としての液晶表示装置を構成する一方の基板部（アクティブマトリクス基板）は、ガラス基板１１上にＴＦＴおよび画素電極２０が設けられている。
【００７０】
画素電極２０は、保護膜１８上に設けられており、スルーホール１９を介してＴＦＴの配線１７と電気的に接続されている。また、画素電極２０上にはＳｉＮからなる保護膜２１が設けられており、その上にポリイミド膜からなる配向膜２２が設けられている。なお、図４（ａ）では、１画素分だけが示されており、ガラス基板１１上には、複数のＴＦＴおよび複数の画素電極２０が縦方向および横方向にマトリックス状に設けられてそれぞれ電気的に接続されている。
【００７１】
図３（ｂ）に示すように、表示装置としての液晶表示装置を構成する他方の基板部（対向基板）は、ガラス基板３１上に、カラーフィルタ３２、対向電極３３およびポリイミド膜からなる配向膜３４が設けられている。
【００７２】
両基板部はそれぞれ、所定の間隔を開けて対向配置（間に液晶層を挟んで配向膜２２，３４が互いに対向配置）されており、両基板の間隙には液晶層が挟持される。
【００７３】
この液晶表示装置は、例えば以下のようにして製造することができる。
【００７４】
図４（ａ）に示すように、一方の基板部は、まず、上記実施形態２に説明したように、ガラス基板などの絶縁性基板１１上に半導体装置としてのＴＦＴを製造する。
【００７５】
次に、保護膜１８が形成されたガラス基板１１の全面にわたってＩＴＯ膜を形成し、続いて、ＨＣｌガスとＦｅＣｌ３ガスとを用いてエッチングを行ってパターニングすることにより、保護膜１８に形成されたスルーホール１９を介してＴＦＴの配線１７に電気的に接続される画素電極２０を形成する。
【００７６】
さらに、ＳｉＨ４ガスとＮＨ３ガスまたはＮ２ガスとを用いたプラズマＣＶＤ法によって、ガラス基板１１の全面にわたってＳｉＮ膜からなる保護膜２１を形成する。
【００７７】
その後、この保護膜２１上に、ポリイミド膜をオフセット印刷法を用いて形成し、ラビング処理を行うことによって所定の配向膜２２を形成する。
【００７８】
一方、他方の基板部は、図４（ｂ）に示すように、まず、ガラス基板３１上に、Ｒ（赤）、Ｇ（緑）、Ｂ（青）の各感光性樹脂膜を付したフィルムを熱圧着により転写した後、フォトリソグラフィ工程によるパターニングを行い、さらに、Ｒ、Ｇ、Ｂの各感光性樹脂が転写された部分間に、遮光性を有するブラックマトリクス部を形成して、カラーフィルタ３２を作製する。
【００７９】
このカラーフィルター３２上に、スパッタリング法によってＩＴＯ膜をガラス基板３１の全面にわたって形成し、これを対向電極３３とする。
【００８０】
その後、この対向電極３３上にポリイミド膜をオフセット印刷法によって形成し、この液晶層側の面のラビング処理を行うことによって配向膜３４を形成する。
【００８１】
以上のようにして作製された図４（ｂ）に示すカラーフィルタ３２などが形成されたガラス基板３１を有する対向基板と、図４（ａ）に示すＴＦＴなどが形成されたガラス基板１１を有するアクティブマトリクス基板とを、ラビング処理が施された配向膜２２，３４の各面が互いに対向するように配置して、シール樹脂によって貼り合わせる。この際、２枚の各ガラス基板１１，３１間の間隙が一定になるように、ガラス基板１１，３１間に真球状のシリカからなるスペーサーを散布する。両基板１１，３１間の間隙に表示媒体となる液晶を注入した後、両ガラス基板１１，３１の両外側にそれぞれ偏光板を貼り付け、さらに、その周辺にドライバーＩＣなどを実装することによって、液晶表示装置が完成する。
【００８２】
このようにして作製された液晶表示装置は、結晶性シリコン膜１２において、隣接する各結晶粒の結晶方位角度差が３４°以上４２°以下であるものは結晶欠陥が少なく、隣接する各結晶粒の結晶方位角度差が５８°以上６２°以下であるものは再結合中心として作用せず、移動度が高いＴＦＴを備えているため、良好な表示状態の液晶表示装置を得ることができる。
【００８３】
以上により、上記実施形態１〜３では、絶縁性表面を有する基板１上に形成された非晶質半導体膜２にエネルギーを加えて結晶成長させることにより結晶性半導体膜を製造する結晶性半導体膜の製造方法において、結晶性半導体膜を構成する各結晶粒が、隣接する結晶粒同士の結晶方位角度差が概略３４°以上４２°以下および５８°以上６２°以下であるものの比率が０．３５以上１以下に制御する。例えば、エキシマレーザ光のエネルギー密度を３８０ｍＪ／ｃｍ２以上４００ｍＪ／ｃｍ２以下に設定する。これによって、結晶品質を再現性良く評価することにより、結晶欠陥をより低減でき、結晶性が良好な結晶性半導体膜を得ることができて、電子移動度が高い半導体装置および、表示が良好な表示装置を得ることができる。
【００８４】
なお、上記実施形態１〜３では、絶縁性表面を有する基板として、ガラス基板１１，３１を用いたが、石英基板を用いてもよい。また、ＳｉウェハにＳｉＯ２膜やＳｉＮ膜などを形成したものなどを用いてもよい。
【００８５】
また、上記実施形態１〜３では、作製される結晶性半導体膜の具体例として、結晶性シリコン膜を形成する方法を示したが、本発明の結晶性半導体膜の製造方法としては、結晶性シリコン膜を形成する場合に限らず、ＳｉＧｅ膜（結晶性ＳｉＧｅ膜）などを形成する場合についても適用することができる。
【００８６】
また、上記実施形態１〜３では、非晶質半導体膜（非晶質シリコン膜）を形成する方法として、ＳｉＨ４ガスを用いたＰＥ−ＣＶＤ法を用いたが、Ｓｉ２Ｈ６ガスを用いた減圧ＣＶＤ法、スパッタ法などの他の方法を用いてもよい。
【００８７】
さらに、上記実施形態１〜３では、形成される非晶質半導体膜の膜厚を５０ｎｍとしたが、５０ｎｍ〜１５０ｎｍの範囲であれば、本発明の結晶性半導体膜の製造方法を適用することができる。
【００８８】
この非晶質半導体膜に照射されるレーザ光として、紫外光の波長域を有するエキシマレーザ光、可視・紫外光の波長域を有するＹＡＧレーザ光などが挙げられるが、これらは、半導体膜の種類および膜厚によって使い分けることができる。例えば、紫外光の吸収係数はシリコン材料に対して高いので、薄いシリコン膜を溶融させるためには、紫外光の波長域を有するエキシマレーザ光が適している。また、可視・紫外光の吸収係数はシリコン材料に対して低いので、厚いシリコン膜を溶融させるためには、可視・紫外光の波長域を有するＹＡＧレーザ光が適している。上記実施形態１〜３では、５０ｎｍの薄膜のシリコン膜を用いたので、エキシマレーザー光が適している。
【００８９】
なお、非晶質半導体膜を結晶化させるためのエネルギーとしてはレーザ光以外の強光によるエネルギーであってもよく、また、荷電粒子によるエネルギーであってもよい。
【００９０】
また、上記実施形態１〜３では、レーザエネルギー密度が、非晶質半導体膜にエネルギーを加えた後で、隣接する結晶粒同士の結晶方位角度差が所定範囲（略３４°以上４２°以下または／および５８°以上６２°以下）であるものの比率が０．３５以上１以下になる（または最も高くなる）ように制御する場合について説明したが、レーザ照射条件として、レーザエネルギー密度の他にレーザ照射時間（エネルギー供給時間）があり、レーザエネルギー密度が一定でレーザ照射時間を変化させたり、レーザエネルギー密度およびレーザ照射時間を共に変化させたりすることにより、隣接する結晶粒同士の結晶方位角度差が所定範囲であるものの比率が０．３５以上１以下になる（または最も高くなる）ように制御していもよい。
【００９１】
【発明の効果】
以上により、本発明によれば、基板上に形成された非晶質半導体膜に、隣接する各結晶粒の結晶方位角度差が概略３４°以上４２°以下または／および５８°以上６２°以下に制御されたエネルギーを加えることにより、高品質な結晶性半導体膜を得ることができる。このような結晶性が良好な結晶性半導体膜をＴＦＴなどの半導体装置に用いることにより、移動度が高い、高性能な半導体装置を得ることができる。また、このような高性能な半導体装置を用いることにより、表示状態が良好な表示装置を得ることができる。
【図面の簡単な説明】
【図１】レーザ照射によって得られる結晶性シリコン膜の結晶方位についてＭｉｓｏｒｉｅｎｔａｔｉｏｎ長さを示すグラフである。
【図２】本発明の結晶性半導体膜の実施形態１とその製造方法を説明するための基板部の断面図である。
【図３】図１の結晶性シリコン膜を用いた本発明の半導体装置の実施形態２とその製造方法を説明するための基板部の断面図である。
【図４】（ａ）および（ｂ）はそれぞれ、本発明の表示装置の実施形態３とその製造方法を説明するための各基板部の断面図である。
【符号の説明】
１，１１，３１ ガラス基板
２ 非晶質シリコン膜
１２ 結晶性シリコン膜
１３ ゲート絶縁膜
１４ ゲート電極
１５ 層間絶縁膜
１６ コンタクトホール
１７ 配線
１８，２１ 保護膜
１９ スルーホール
２０ 画素電極
２２，３４ 配向膜
３２ カラーフィルタ
３３ 対向電極[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a crystalline semiconductor film used as a TFT (thin film transistor) channel region of a liquid crystal driver device, a semiconductor memory device, a semiconductor logic circuit, and the like, a method of manufacturing the same, and a semiconductor device such as a TFT using the crystalline semiconductor film. And a display device such as a liquid crystal display device or an electroluminescence display device using the semiconductor device.
[0002]
[Prior art]
Conventionally, an amorphous semiconductor film is formed over a substrate having an insulating surface such as a non-single-crystal insulating film formed on a substrate having an insulating surface or a non-single-crystal insulating substrate. A crystallization method for crystallizing an amorphous semiconductor film by applying energy to the semiconductor film is known.
[0003]
For example, in Patent Literature 1, an amorphous silicon film is formed to a thickness of 100 nm on a quartz substrate by a sputtering method, and then the amorphous silicon film is irradiated with excimer laser light as energy. A crystallization method for manufacturing a crystalline silicon film by crystallizing a crystalline silicon film is disclosed. In Patent Document 1, a crystalline silicon film obtained by this crystallization method is subjected to Raman spectroscopic measurement, and a TFT (thin film transistor) is formed using a thin film having a Raman peak Raman shift of 515 cm −1 or more. Thus, it is disclosed that electron mobility can be increased.
[0004]
Non-Patent Document 1 discloses that an amorphous silicon film is formed to a thickness of 45 to 50 nm on a glass substrate by using a PE-CVD (Plasma Enhanced Chemical Vapor Deposition) method, and then the amorphous silicon film is formed. A crystallization method is disclosed in which an amorphous silicon film is crystallized by irradiating the film with excimer laser light to produce a crystalline silicon film having a large crystal grain size of 700 nm. According to Non-Patent Document 1, a TFT (thin film transistor) manufactured using a crystalline silicon film obtained by this crystallization method has an electron mobility that increases as the crystal grain size increases, It is disclosed that a mobility of 320 cm 2 / V · sec was obtained at a crystal grain size of 700 nm.
[0005]
Further, as a patent document 2, a step of contacting a substance which promotes crystallization with an amorphous silicon film in order to obtain a semiconductor device with high characteristics, and a step of crystallizing only a part of the silicon film after this step Irradiating the silicon film with a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) having an energy density of 200 to 400 (mJ / cm2), for example, 250 (mJ / cm2) after the crystallization step. Are disclosed.
[0006]
[Patent Document 1]
JP 2000-311857 A
[Non-patent document 1]
IEICE Technical Report, IEICE Technical Report, Vol. 100, no. 2, ED2000-14 (April 2000) pp. 27-32
[Patent Document 2]
JP-A-2000-150382
[0007]
[Problems to be solved by the invention]
However, in the crystallization method of evaluating the crystallization state by measuring the Raman shift and controlling the electron mobility of the TFT as in Patent Document 1, the Raman peak value varies depending on the oxygen concentration in the crystal and the like. Therefore, there is a problem that the electron mobility cannot be controlled with good reproducibility.
[0008]
In addition, in the crystallization method of Non-Patent Document 1, the electron mobility of a TFT is evaluated based on the crystal grain size. However, in Non-Patent Document 1, the properties of the crystal grain boundaries are not specified, and No consideration is given to recombination orders that differ by nature. Therefore, when the crystallization condition of the semiconductor film is controlled by the crystal grain size as in Non-Patent Document 1, a semiconductor film having a high recombination level may be manufactured. Semiconductor devices such as manufactured TFTs have a problem that desired performance cannot be obtained with good reproducibility. Also, in Patent Document 2, similarly to Non-Patent Document 1, the properties of the crystal grain boundaries are not specified, and recombination levels that differ depending on the properties of the grain boundaries are not considered.
[0009]
The present invention solves the above-mentioned conventional problems, and evaluates crystal quality with good reproducibility, thereby greatly reducing crystal defects. It is an object to provide a semiconductor device using a film and a display device using the semiconductor device.
[0010]
[Means for Solving the Problems]
The crystalline semiconductor film of the present invention is a crystalline semiconductor film obtained by applying energy to an amorphous semiconductor film provided on a substrate, wherein each crystal grain constituting the crystalline semiconductor film has an adjacent crystal grain. The crystal orientation angle difference between them is controlled so as to be approximately 34 ° or more and 42 ° or less and / or 58 ° or more and 62 ° or less, thereby achieving the above object.
[0011]
Preferably, in the crystalline semiconductor film of the present invention, each crystal grain constituting the crystalline semiconductor film has a crystal orientation angle difference between adjacent crystal grains of 34 ° or more and 42 ° or less or / and 58 ° or more and 62 ° or less. The ratio is controlled so that the ratio is less than or equal to 0.35 and less than or equal to 1.
[0012]
More preferably, in the crystalline semiconductor film of the present invention, each crystal grain constituting the crystalline semiconductor film has a crystal orientation angle difference between adjacent crystal grains of 34 ° or more and 42 ° or less or / and 58 ° or more and 62 ° or less. ° or less is controlled so that the ratio is the highest.
[0013]
More preferably, the crystalline semiconductor film in the crystalline semiconductor film of the present invention is made of a silicon material.
[0014]
In the method for manufacturing a crystalline semiconductor film of the present invention, a step of forming an amorphous semiconductor film on a substrate, and a difference in crystal orientation angle between adjacent crystal grains with respect to the amorphous semiconductor film is approximately 34 ° or more. Crystallizing the amorphous semiconductor film by applying energy so as to be 42 ° or less and / or 58 ° or more and 62 ° or less, thereby achieving the above object.
[0015]
Further, preferably, at least one of the energy density and the supply time used in the method for manufacturing a crystalline semiconductor film of the present invention is such that, after applying energy to the amorphous semiconductor film, the crystal of adjacent crystal grains is formed. The azimuth angle difference is controlled so that the ratio of those having an azimuth angle difference of 34 ° or more and 42 ° or less and / or 58 ° or more and 62 ° or less becomes 0.35 or more and 1 or less.
[0016]
Further preferably, at least one of the energy density and the supply time used in the method for manufacturing a crystalline semiconductor film of the present invention is such that, after applying energy to the amorphous semiconductor film, the crystal of adjacent crystal grains is formed. The azimuth angle difference is controlled so that the ratio of those having a directional angle difference of 34 ° or more and 42 ° or less and / or 58 ° or more and 62 ° or less becomes the highest.
[0017]
Still preferably, in a method for manufacturing a crystalline semiconductor film according to the present invention, the crystalline semiconductor film is made of a silicon material.
[0018]
More preferably, the energy used in the method for producing a crystalline semiconductor film of the present invention is energy from strong light or charged particles.
[0019]
Still preferably, in the method for manufacturing a crystalline semiconductor film according to the present invention, the intense light is one of an excimer laser beam and a YAG laser beam.
[0020]
More preferably, the energy density of excimer laser light in the method for manufacturing a crystalline semiconductor film of the present invention is 380 mJ / cm2 or more and 400 mJ / cm2 or less.
[0021]
A semiconductor device according to the present invention uses the crystalline semiconductor film according to any one of claims 1 to 4, thereby achieving the above object.
[0022]
A display device according to the present invention uses the semiconductor device according to claim 12, thereby achieving the above object.
[0023]
The ratio is 0.37 or more and 0.40 or less.
[0024]
The operation of the present invention having the above configuration will be described below.
[0025]
In the present invention, for example, a crystalline semiconductor film obtained by applying energy such as strong light or charged particles to an amorphous semiconductor film made of a silicon material or the like formed over a substrate having an insulating surface is adjacent to the amorphous semiconductor film. When the crystal orientation angle difference between the crystal grains is in the range of 34 ° or more and 42 ° or less, the crystal grain boundary becomes a low index CSL (Coincidence site lattice) and lattice defects are reduced. When the crystal orientation angle difference is in the range of 58 ° or more and 62 ° or less, the crystal structure becomes a twin structure, and no recombination center is generated at the crystal grain boundary. Therefore, the ratio of these ranges is, for example, 0.35 or more and 1 or less, and more preferably, by controlling the ratio to be the highest, the crystal quality is evaluated with good reproducibility, and a high-quality crystalline semiconductor film is obtained. It is possible to obtain.
[0026]
When intense light is used as energy in this case, for example, excimer laser light can be used to melt a thin amorphous semiconductor film, and YAG laser light can be used to melt a thick amorphous semiconductor film. It becomes.
[0027]
When excimer laser light is used, the energy density is, for example, not less than 380 mJ / cm2 and not more than 400 mJ / cm2.
[0028]
A semiconductor device such as a TFT can be manufactured using the high-quality crystalline semiconductor film manufactured as described above. Thereby, a transistor such as a TFT having high electron mobility can be obtained. Using this transistor, a high-performance semiconductor device such as a liquid crystal driver device, a semiconductor memory device, or a semiconductor logic circuit can be obtained. It is also possible to realize a high-performance display device including this semiconductor device.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0030]
The present invention relates to a crystalline semiconductor film obtained by applying energy to an amorphous silicon film in an amorphous semiconductor region formed on a substrate having an insulating surface to crystallize the amorphous silicon film. It is made by paying attention to the fact that there are appropriate conditions. According to the experiments of the present inventors, when energy is applied to the amorphous silicon film under the proper conditions, the crystal orientation difference between adjacent crystal grains in the obtained crystalline silicon film is 34 ° or more and 42 ° or less or And / or the ratio of those of 58 ° or more and 62 ° or less was increased, and it was found that a crystalline silicon film having good crystallinity with reduced crystal defects can be obtained with good reproducibility.
[0031]
Hereinafter, an experiment in which the inventors of the present application have obtained such knowledge will be described in detail.
[0032]
First, an amorphous silicon film was formed to a thickness of 50 nm on a glass substrate by a PE-CVD method using a SiH 4 gas at a film formation temperature of 300 ° C.
[0033]
Next, a crystalline silicon film was produced by irradiating the amorphous silicon film with XeCl excimer laser light for crystallization. At this time, the energy density of the excimer laser light irradiated for crystallization on the amorphous silicon film is changed in the range of 360 mJ / cm2 to 420 mJ / cm2, and the energy density of the excimer laser light is The optimal conditions were studied.
[0034]
The crystal orientation of the crystalline silicon film obtained by performing heat treatment on the amorphous silicon film and the crystalline silicon film obtained by irradiating the amorphous silicon film with excimer laser light is EBSP (Electron Backscatter Diffraction Pattern). ) Method. In the EBSP method, an electron beam is applied to a sample whose crystal orientation is to be measured, and the crystal orientation is adjusted to an angle accuracy of ± 1 ° or less by a chrysanthemum map represented by the electron beam scattered by the sample. This is a method of measuring the azimuth angle.
[0035]
Using this EBSP method, a silicon film having an area of 6 μm × 6 μm is irradiated with an electron beam at a measurement pitch of 0.05 μm, and the angle difference of crystal orientation between adjacent measurement points = Misorientation angle (hereinafter referred to as M angle) ) Was measured.
[0036]
FIG. 1 is a graph showing the crystal orientation of a crystalline silicon film obtained by performing a heat treatment on an amorphous silicon film by converting the number of occurrences of each M angle into a length.
[0037]
Referring to FIG. 1, the Misorientation length (hereinafter, referred to as M length) appears from an M angle of 2 ° which is a lower limit value of the measurement accuracy, and is distributed up to about 65 °. The M length is longer in the range of 34 ° to 42 ° and 58 ° to 62 °. The reason is considered as follows.
[0038]
Excimer laser light is applied to the amorphous silicon film for crystallization, but due to its high energy density, part of the formed crystalline silicon film is locally melted and recrystallized. You. At this time, small crystal grains are formed. When the M angle of the small crystal grains is 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less, the energy is stabilized and the alignment is easy. It is considered to be.
[0039]
When the inventors of the present application examined a crystal grain boundary having an M angle of 34 ° or more and 42 ° or less, it was found that the index was mainly CSL (coincidence site lattice) having a low index of Σ5, Σ7, and Σ9. For example, $ 5CSL indicates that the boundary of the same structure is repeated for every five basic unit cells, $ 7CSL indicates that the boundary of the same structure is repeated for every seven basic unit cells, and $ 9CSL indicates that the boundary of the same structure is nine. It indicates that the boundary of the same structure is repeated for each of the basic unit cells. A small CSL number corresponds to a small number of lattice defects.
[0040]
Further, the present inventors examined the crystal structure of Misorientation having an M angle of 58 ° or more and 62 ° or less, and found that the crystal structure had a twin structure.
Table 1 below shows the M length of the obtained crystalline silicon film when the energy density of the excimer laser light applied to the amorphous silicon film was variously changed in the range of 360 mJ / cm2 to 420 mJ / cm2. Shows the results of the measurement. In Table 1, column (a) shows the laser energy density of the excimer laser beam, and column (b) shows the crystalline silicon film (crystalline semiconductor film) obtained by irradiating the excimer laser beam of each energy density. M angle range 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less (see Table 1 and FIG. 1), M length of each region of 2 ° or more and 65 ° or less (see FIG. 1), and M in column (c). The ratio of each region in the angle range of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less and the sum thereof are shown. In column (d), an N-channel TFT was fabricated using a crystalline silicon film obtained by irradiating an excimer laser beam of each energy density, and the result of measurement of the electron mobility of the TFT was measured. Is shown.
[0041]
[Table 1]

[0042]
A crystalline silicon film obtained by irradiating an excimer laser beam at an energy density of 360 mJ / cm2 and 370 mJ / cm2 has insufficient crystallization due to insufficient heating of the amorphous silicon film by the excimer laser beam. It is considered that the M length is long and the electron mobility of the TFT is also low.
[0043]
A crystalline silicon film obtained by irradiating an excimer laser beam at an energy density of 380 mJ / cm2 to 400 mJ / cm2 is suitable for heating an amorphous silicon film by the excimer laser beam and is sufficiently crystallized. Therefore, it is considered that the M length is short and the electron mobility of the TFT is also increased. That is, in Table 1, the laser energy density is appropriately set, and the “moving” is performed when the ratio of the M angles of “34 ° to 42 °” and “58 ° to 62” is in the range of 0.37 to 0.40. Degree is higher.
[0044]
Further, when the energy density is 410 mJ / cm2 or more, it is considered that the crystalline silicon film is completely melted and then precipitated as microcrystals during cooling. Therefore, the M length is long and the number of recombination centers is large, and it is considered that the recombination centers function as trap levels of carriers, and the electron mobility of the TFT is reduced.
[0045]
According to the above Table 1, it is understood that the appropriate condition for obtaining the electron mobility of 200 cm2 / V · sec or more of the TFT is that the energy density of the excimer laser light is in the range of 380 mJ / cm2 to 400 mJ / cm2. . The M length of the crystalline silicon film obtained by irradiating the excimer laser beam under such conditions is longer at M angles of 34 ° to 42 ° and 58 ° to 62 ° (see FIG. 1). Among them, there is also an M angle of 34 ° or more and 42 ° or less including a crystal lattice defect acting as a recombination center, but this is within a practically acceptable range.
[0046]
In the above Table 1, the ratio of the crystal orientation difference between adjacent crystal grains is obtained by the following equation (1).
(Ratio of crystal orientation difference between adjacent crystal grains of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less) = ｛(M length of M angle of 34 ° or more and 42 ° or less) + (M angle 58 M length of not less than 60 ° and not more than 62 °) / (M length of M not less than 2 ° and not more than 65 °) Equation (1)
According to Table 1, when the energy density of the excimer laser beam is in the range of 380 mJ / cm2 to 400 mJ / cm2 (see Table 1), the crystal orientation difference between adjacent crystal grains is 34 ° to 42 ° and 58%. The ratio of those not less than ° and not more than 62 ° is not less than 0.35 and not more than 1 (in Table 1, not less than 0.37 and not more than 0.40).
Therefore, it is understood that the ratio of the crystal orientation difference between adjacent crystal grains of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less is preferably 0.35 or more and 1 or less.
[0047]
Further, under the optimum condition where the electron mobility of the TFT is the highest, the ratio of the crystal orientation difference between adjacent crystal grains of 34 ° to 42 ° and 58 ° to 62 ° is also highest. Therefore, the crystallinity is controlled by controlling the energy density of the excimer laser light so that the ratio of the crystal orientation difference between adjacent crystal grains of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less becomes highest. It can be seen that a favorable crystalline silicon film can be obtained and a TFT having high mobility can be obtained.
[0048]
Hereinafter, specific examples of a crystalline semiconductor film of the present invention, a manufacturing method thereof, a semiconductor device using the crystalline semiconductor film, and a display device using the same will be described with reference to the drawings. The present invention is not limited to the following specific examples (Embodiments 1 to 3).
[0049]
(Embodiment 1)
In Embodiment 1, an amorphous silicon film as an amorphous semiconductor film is formed on a glass substrate as a substrate having an insulating surface, and excimer laser light is used as energy for the amorphous silicon film. Is applied to form a crystalline silicon film as a crystalline semiconductor film.
[0050]
FIG. 2 is a cross-sectional view of a principal part for describing Embodiment 1 of the crystalline semiconductor film of the present invention and a method for manufacturing the same.
[0051]
As shown in FIG. 2, first, an amorphous silicon film 2 is formed to a thickness of 50 nm over the entire surface of a glass substrate 1 by PE-CVD. As a material gas used for the film formation, a SiH4 gas is used, and the substrate temperature is set to 300 ° C.
[0052]
Next, the amorphous silicon film 2 is crystallized by irradiating the amorphous silicon film 2 with XeCl excimer laser light. At this time, the energy density of the excimer laser light is 380 mJ / cm 2 or more such that the ratio of the crystal orientation angle difference between adjacent crystal grains of 34 ° to 42 ° and 58 ° to 62 ° is highest. It is set within the range of 400 mJ / cm2 or less.
[0053]
Through the above steps, a crystalline silicon film in which the ratio between crystal orientation angles of adjacent crystal grains of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less is controlled to 0.35 or more and 1 or less is manufactured. Is done.
[0054]
In the crystalline silicon film thus manufactured, the crystal orientation angle difference between adjacent crystal grains of 34 ° or more and 42 ° or less has few crystal defects, and the crystal orientation angle difference between adjacent crystal grains is small. Is 58 ° or more and 62 ° or less, does not act as a recombination center, so that a crystalline silicon film having good crystallinity can be obtained.
[0055]
(Embodiment 2)
In the second embodiment, a TFT (thin film transistor) as a semiconductor device is manufactured using the crystalline silicon film described in the first embodiment.
[0056]
FIG. 3 is a cross-sectional view for describing Embodiment 2 of the semiconductor device of the present invention and a method for manufacturing the same.
[0057]
In FIG. 3, a TFT (thin film transistor) as a semiconductor device of the present invention has a crystalline silicon film 12 provided on a glass substrate 11, and a gate made of a SiO 2 film on a channel region provided in the crystalline silicon film 12. A gate electrode 14 made of a crystalline WSi2 film is provided via an insulating film 13. The source region and the drain region on both sides of the crystalline silicon film 12 are connected to respective wirings 17 made of an Al film via respective contact holes 16 provided in a gate insulating film 13 made of a SiO 2 film and an interlayer insulating film 15. Each is electrically connected. Each wiring 17 can be electrically connected to the outside by each through hole 19 of a protective film 18 made of a SiN film.
[0058]
The thin film transistor having the above configuration can be manufactured as follows.
[0059]
First, a crystalline silicon film is formed on the glass substrate 11 as described in the first embodiment, and then this crystalline silicon film is formed into a predetermined shape by RIE using CF4 gas and O2 gas. By patterning, an island-shaped crystalline silicon film 12 is formed.
[0060]
Thereafter, a gate insulating film 13 made of a SiO2 film is formed over the entire surface of the glass substrate 11 on which the crystalline silicon film 12 is formed by a plasma CVD method using a TEOS (tetraethoxysilane) gas and an O3 gas.
[0061]
Next, a crystalline WSi2 film is formed over the entire surface of the glass substrate 11 on which the gate insulating film 13 is formed by a sputtering method, and then the crystalline silicon film 12 is formed on the crystalline silicon film 12 by an RIE method using a CF4 gas and an O2 gas. The gate electrode 14 made of a crystalline WSi2 film is formed by performing etching and patterning so that the WSi2 film remains only at a substantially central portion.
[0062]
Further, impurities are introduced into predetermined portions of the crystalline silicon film 12 to be source and drain regions of a TFT (thin film transistor) by an ion doping method. In the second embodiment, since the gate electrode 14 made of the crystalline WSi2 film functions as a mask when introducing the impurity, the impurity is introduced into the crystalline silicon film 12 other than the portion where the gate electrode 14 is provided. When an n-type transistor is formed, phosphorus (P) is used as an impurity to be introduced, and when a p-type transistor is formed, boron (B) is used as an impurity to be introduced.
[0063]
Further, after an interlayer insulating film 15 made of a SiO2 film is formed over the entire surface of the glass substrate 11 by a plasma CVD method using a TEOS gas and an O3 gas, the source is formed by an RIE method using a CF4 gas and a CHF3 gas. Each contact hole 16 is formed in the interlayer insulating film 15 on the crystalline silicon film 12 to be a region and a drain region.
[0064]
Further, after an Al layer is stacked over the entire substrate by using the sputtering method, the crystalline silicon is formed through the respective contact holes 16 formed in the interlayer insulating film 15 by the RIE method using BCl3 gas and Cl2 gas. The Al wiring 17 is connected to the film 12.
[0065]
Further, a protective film 18 made of a SiN film is formed over the entire surface of the glass substrate 11 by a plasma CVD method using a SiH4 gas and an NH3 gas or a N2 gas. Finally, a part of the protective film 18 is formed with a CF4 gas. By forming each through hole 19 in the protective film 18 so as to be electrically connectable on the Al wiring 17 made of an Al film by etching using CHF3 gas, a TFT (thin film transistor) is completed.
[0066]
In the TFT (thin film transistor) manufactured as described above, the crystal silicon film 12 in which the crystal orientation angle difference between adjacent crystal grains is 34 ° or more and 42 ° or less has few crystal defects, and Those having a crystal orientation angle difference of 58 ° or more and 62 ° or less do not act as recombination centers, so that a TFT (thin film transistor) having high mobility can be obtained. This TFT (thin film transistor) can be used as a semiconductor device in a liquid crystal driver device, a semiconductor memory device, a semiconductor logic circuit, or the like.
[0067]
(Embodiment 3)
In the third embodiment, a display device such as a liquid crystal display device is configured using the semiconductor device described in the second embodiment.
[0068]
FIGS. 4A and 4B are cross-sectional views illustrating a display device according to a third embodiment of the present invention and a method for manufacturing the display device. In FIG. 4, the same reference numerals as in FIG. 3 denote the TFTs described in the second embodiment, and a detailed description thereof will be omitted.
[0069]
As shown in FIG. 4A, one substrate portion (active matrix substrate) of a liquid crystal display device as a display device has a TFT and a pixel electrode 20 provided on a glass substrate 11.
[0070]
The pixel electrode 20 is provided on the protective film 18 and is electrically connected to the TFT wiring 17 via the through hole 19. A protective film 21 made of SiN is provided on the pixel electrode 20, and an alignment film 22 made of a polyimide film is provided thereon. In FIG. 4A, only one pixel is shown. On the glass substrate 11, a plurality of TFTs and a plurality of pixel electrodes 20 are provided in a matrix in a vertical direction and a horizontal direction, and each of them is electrically connected. Connected.
[0071]
As shown in FIG. 3B, the other substrate part (opposite substrate) constituting the liquid crystal display device as a display device includes a glass substrate 31, a color filter 32, an opposite electrode 33, and an alignment film made of a polyimide film. 34 are provided.
[0072]
The two substrates are opposed to each other at a predetermined interval (the alignment films 22 and 34 are opposed to each other with a liquid crystal layer interposed therebetween), and the liquid crystal layer is sandwiched between the two substrates.
[0073]
This liquid crystal display device can be manufactured, for example, as follows.
[0074]
As shown in FIG. 4A, in one substrate portion, first, as described in the second embodiment, a TFT as a semiconductor device is manufactured on an insulating substrate 11 such as a glass substrate.
[0075]
Next, an ITO film was formed over the entire surface of the glass substrate 11 on which the protective film 18 was formed, and subsequently, the protective film 18 was formed by etching and patterning using HCl gas and FeCl 3 gas. A pixel electrode 20 that is electrically connected to the TFT wiring 17 via the through hole 19 is formed.
[0076]
Further, a protective film 21 made of a SiN film is formed over the entire surface of the glass substrate 11 by a plasma CVD method using a SiH4 gas and an NH3 gas or an N2 gas.
[0077]
Thereafter, a polyimide film is formed on the protective film 21 by using an offset printing method, and a predetermined alignment film 22 is formed by performing a rubbing process.
[0078]
On the other hand, as shown in FIG. 4B, the other substrate portion is a film in which R (red), G (green), and B (blue) photosensitive resin films are formed on a glass substrate 31. Is transferred by thermocompression bonding, patterning is performed by a photolithography process, and a black matrix portion having a light-shielding property is formed between the portions where the R, G, and B photosensitive resins are transferred. 32 is manufactured.
[0079]
On this color filter 32, an ITO film is formed over the entire surface of the glass substrate 31 by a sputtering method, and this is used as a counter electrode 33.
[0080]
Thereafter, a polyimide film is formed on the counter electrode 33 by an offset printing method, and a rubbing process is performed on the surface on the liquid crystal layer side to form an alignment film 34.
[0081]
A counter substrate having the glass substrate 31 on which the color filter 32 and the like shown in FIG. 4B formed as described above is formed, and a glass substrate 11 on which a TFT and the like are formed as shown in FIG. The active matrix substrate is arranged such that the surfaces of the rubbed alignment films 22 and 34 face each other, and are bonded together with a sealing resin. At this time, a spacer made of true spherical silica is dispersed between the glass substrates 11 and 31 so that the gap between the two glass substrates 11 and 31 is constant. After injecting liquid crystal serving as a display medium into the gap between the two substrates 11 and 31, a polarizing plate is attached to both outer sides of the two glass substrates 11 and 31, and further, a driver IC or the like is mounted on the periphery thereof. The liquid crystal display device is completed.
[0082]
In the liquid crystal display device manufactured in this manner, in the crystalline silicon film 12, when the crystal orientation angle difference between adjacent crystal grains is 34 ° or more and 42 ° or less, there are few crystal defects, and A crystal liquid crystal display device having a crystal orientation angle difference of 58 ° or more and 62 ° or less does not act as a recombination center and has a high mobility TFT, so that a liquid crystal display device in a good display state can be obtained.
[0083]
As described above, in the first to third embodiments, the crystalline semiconductor film is manufactured by applying energy to the amorphous semiconductor film 2 formed on the substrate 1 having an insulating surface to grow the crystal. In the manufacturing method, the ratio of the crystal grains constituting the crystalline semiconductor film in which the crystal orientation angle difference between adjacent crystal grains is approximately 34 ° to 42 ° and 58 ° to 62 ° is 0.35. It is controlled to be 1 or less. For example, the energy density of the excimer laser light is set to 380 mJ / cm2 or more and 400 mJ / cm2 or less. Thereby, by evaluating the crystal quality with good reproducibility, crystal defects can be further reduced, a crystalline semiconductor film having good crystallinity can be obtained, and a semiconductor device having high electron mobility and good display can be obtained. A display device can be obtained.
[0084]
In the first to third embodiments, the glass substrates 11 and 31 are used as substrates having an insulating surface, but a quartz substrate may be used. Further, an Si wafer formed with a SiO2 film, a SiN film, or the like may be used.
[0085]
In the first to third embodiments, a method of forming a crystalline silicon film has been described as a specific example of a crystalline semiconductor film to be manufactured. The present invention can be applied not only to the case of forming a silicon film but also to the case of forming a SiGe film (crystalline SiGe film) or the like.
[0086]
In the first to third embodiments, the PE-CVD method using a SiH4 gas is used as a method for forming an amorphous semiconductor film (amorphous silicon film), but the low-pressure CVD method using a Si2H6 gas is used. Alternatively, another method such as a sputtering method may be used.
[0087]
Further, in the first to third embodiments, the thickness of the formed amorphous semiconductor film is set to 50 nm. However, if the thickness is in the range of 50 nm to 150 nm, the method of manufacturing a crystalline semiconductor film of the present invention may be applied. Can be.
[0088]
Examples of the laser light applied to the amorphous semiconductor film include an excimer laser light having a wavelength range of ultraviolet light and a YAG laser light having a wavelength range of visible / ultraviolet light. It can be properly used depending on the film thickness. For example, since the absorption coefficient of ultraviolet light is higher than that of a silicon material, excimer laser light having a wavelength range of ultraviolet light is suitable for melting a thin silicon film. Further, since the absorption coefficient of visible / ultraviolet light is lower than that of a silicon material, a YAG laser beam having a visible / ultraviolet light wavelength range is suitable for melting a thick silicon film. In the first to third embodiments, since a thin silicon film of 50 nm is used, excimer laser light is suitable.
[0089]
Note that the energy for crystallizing the amorphous semiconductor film may be energy due to strong light other than laser light, or energy due to charged particles.
[0090]
In the first to third embodiments, the laser energy density is such that the crystal orientation angle difference between adjacent crystal grains is within a predetermined range (approximately 34 ° to 42 ° or less) after applying energy to the amorphous semiconductor film. And / or 58 ° or more and 62 ° or less), the case where the ratio is controlled to be 0.35 or more and 1 or less (or the highest) has been described. There is an irradiation time (energy supply time). By changing the laser irradiation time while the laser energy density is constant, or by changing both the laser energy density and the laser irradiation time, the crystal orientation angle difference between adjacent crystal grains May be controlled so that the ratio of which is within a predetermined range becomes 0.35 or more and 1 or less (or becomes the highest).
[0091]
【The invention's effect】
As described above, according to the present invention, the crystal orientation angle difference of each crystal grain adjacent to the amorphous semiconductor film formed on the substrate is approximately 34 ° or more and 42 ° or less and / or 58 ° or more and 62 ° or less. By applying controlled energy, a high-quality crystalline semiconductor film can be obtained. By using such a crystalline semiconductor film with good crystallinity for a semiconductor device such as a TFT, a high-performance semiconductor device with high mobility can be obtained. In addition, by using such a high-performance semiconductor device, a display device with a favorable display state can be obtained.
[Brief description of the drawings]
FIG. 1 is a graph showing a Misorientation length with respect to a crystal orientation of a crystalline silicon film obtained by laser irradiation.
FIG. 2 is a cross-sectional view of a substrate portion for explaining a crystalline semiconductor film according to a first embodiment of the present invention and a method for manufacturing the same.
FIG. 3 is a cross-sectional view of a substrate part for describing a second embodiment of the semiconductor device of the present invention using the crystalline silicon film of FIG. 1 and a method of manufacturing the same.
FIGS. 4A and 4B are cross-sectional views of respective substrate portions for describing a display device according to a third embodiment of the present invention and a method for manufacturing the same.
[Explanation of symbols]
1,11,31 glass substrate
2 Amorphous silicon film
12 crystalline silicon film
13 Gate insulating film
14 Gate electrode
15 Interlayer insulation film
16 Contact hole
17 Wiring
18,21 protective film
19 Through Hole
20 pixel electrode
22, 34 alignment film
32 color filters
33 Counter electrode

Claims (13)

In a crystalline semiconductor film obtained by applying energy to an amorphous semiconductor film provided on a substrate,
Each crystal grain constituting the crystalline semiconductor film is controlled such that the crystal orientation angle difference between adjacent crystal grains is at least one of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less. Crystalline semiconductor film. The crystal grains constituting the crystalline semiconductor film have a crystal orientation angle difference between adjacent crystal grains of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less in a ratio of 0. 2. The crystalline semiconductor film according to claim 1, wherein the crystalline semiconductor film is controlled to be not less than 35 and not more than 1. In each of the crystal grains constituting the crystalline semiconductor film, the ratio of those in which the crystal orientation angle difference between adjacent crystal grains is in at least one of 34 ° to 42 ° and 58 ° to 62 ° is the most. 2. The crystalline semiconductor film according to claim 1, which is controlled to be higher. The crystalline semiconductor film according to claim 1, wherein the crystalline semiconductor film is made of a silicon material. Forming an amorphous semiconductor film on the substrate;
By applying energy to the amorphous semiconductor film so that the crystal orientation angle difference between adjacent crystal grains falls within at least one of 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or less. Crystallizing the amorphous semiconductor film. At least one of the energy density and the supply time is such that after applying energy to the amorphous semiconductor film, the crystal orientation angle difference between adjacent crystal grains is 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or more. The method for manufacturing a crystalline semiconductor film according to claim 5, wherein a ratio of at least one of the following ranges is controlled to be 0.35 or more and 1 or less. At least one of the energy density and the supply time is such that after applying energy to the amorphous semiconductor film, the crystal orientation angle difference between adjacent crystal grains is 34 ° or more and 42 ° or less and 58 ° or more and 62 ° or more. The method for manufacturing a crystalline semiconductor film according to claim 5, wherein a ratio of at least one of the following ranges is controlled to be highest. The method according to claim 5, wherein the crystalline semiconductor film is made of a silicon material. The method for manufacturing a crystalline semiconductor film according to claim 5, wherein the energy is energy by strong light or charged particles. The method for manufacturing a crystalline semiconductor film according to claim 9, wherein the intense light is one of an excimer laser beam and a YAG laser beam. The method for manufacturing a crystalline semiconductor film according to claim 10, wherein the energy density of the excimer laser light is 380 mJ / cm2 or more and 400 mJ / cm2 or less. A semiconductor device using the crystalline semiconductor film according to claim 1. A display device using the semiconductor device according to claim 12.

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