JP2004336437A - Circuit and system for video image receiving - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a video image receiving system at low cost for determining the header identifier of a received package in real time. <P>SOLUTION: A packet received by a MAC unit 103 through a PHY unit 104 is transferred to a packet selector unit 102. The packet selector unit 102 determines the header identifier of the packet selects one of processing IF units 105 to 107 and a bus controller unit 101, and transfers the header identifier to the processing IF unit 105 to 107 or to the bus controller unit 101.In this case, only by adding the packet selector unit 102 and the processing IF units 105 to 107 to a general purpose Ethernet(R) controller composed of only the bus controller unit 101, the MAC unit 103, and the PHY unit 104, a video image receiving circuit can be constituted and can be formed into an LSI, so that the video image receiving circuit can be obtained at low cost. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a video receiving apparatus for a network that transmits and receives packet data.
[0002]
[Prior art]
A conventional video receiving apparatus has at least one processing IF separately from a bus for performing IO with a host CPU to receive and process a large amount of data such as a moving image, and receives received packets. Having a table corresponding to the identifier described in the header and the processing IF in a local memory, having a local CPU for selecting a processing IF according to the table, and selecting a processing IF according to a table registered in advance for a received packet; The distribution of received data was performed. (For example, see Patent Document 1).
[0003]
FIG. 6 shows a configuration of a conventional video receiving apparatus.
[0004]
6, a host CPU 609 and a host memory 610 are connected by a host bus 611, and are connected to a local CPU 602, a local memory 603, and a MAC unit 604 via a bus controller 601, and a PHY is connected to the MAC unit 604. The unit 605 is connected.
[0005]
The packet received from the network 612 by the PHY unit 605 is temporarily stored in the local memory 603 via the MAC unit 604. The packet temporarily stored in the local memory 603 is compared with an identifier described in a packet header according to a table in the local memory 603, and is compared with an appropriate video processing interface 606, video processing interface 607, video processing interface 608. Is DMA-transferred and distributed.
[0006]
The video processing interface 606 to the video processing interface 608 are connected to a video decompression device corresponding to the video compression method of the data in the received packet, and are distributed by the local CPU 602 according to a table in the local memory 603. The video decompression processor 613 connected to the video processing interface decompresses the data and reproduces the video.
[0007]
If there is a packet that does not exist in the table in the local memory 603, the packet is transferred to the bus controller 601 by the local CPU 602, transferred to the host memory 610 via the host bus 611, and subjected to packet processing by the host CPU 609. Is
[0008]
However, in this method, it is necessary to include a local CPU 609 having high processing capability and a large-capacity local memory 610 in order to process large-capacity data such as video.
[0009]
[Patent Document 1]
JP-A-2002-247039 (page 5, FIG. 1)
[0010]
[Problems to be solved by the invention]
However, in the conventional configuration, it is necessary to sort received packets at high speed, and a local CPU with high processing performance is required to determine the header identifier of the received packet in real time. At the same time, a large local memory for temporarily storing data such as video was required, so that there was a problem that configuring the video receiving apparatus would be costly.
[0011]
The present invention solves the above-mentioned conventional problem, by determining the header identifier of a received packet by hardware, and by directly transferring data included in a packet such as video and audio to a dedicated hardware processing system, A table that eliminates the need for the local CPU performing packet reception processing, and at the same time reduces the amount of local memory that holds codes and the like required by the local CPU for processing, and associates packet identifiers with destination video processing interfaces. The present invention relates to a video receiving apparatus capable of processing a packet only by retaining only the data, and thereby greatly reducing the memory capacity.
[0012]
Further, by expanding the Ethernet (R) controller, it can be easily realized, and the cost increase can be reduced. Further, the present invention relates to a video receiving apparatus capable of performing high-speed processing because hardware performs determination of a packet identifier and transfer processing to a transfer destination video processing interface.
[0013]
[Means for Solving the Problems]
In order to solve the above-mentioned conventional problems, a video receiving circuit of the present invention includes a PHY unit for transmitting and receiving a physical signal of a network, a timing for transmitting a packet to the network, and temporarily storing the received packet. Determining a packet header identifier from the identifier described in the header of the packet received by the MAC unit, a bus controller unit for connecting to one or more processing IF units, an external general-purpose bus, and the MAC unit received by the MAC unit; The network unit is directly connected to the PHY unit, the PHY unit is connected to the MAC unit, and the processing unit is connected to the MAC unit. The received packet is transferred to the packet selector, and the packet selector receives the packet before the packet received by the MAC unit. Determining a header identifier, processing IF section, or select one of the bus controller, the selected processing IF section, or, is characterized in that the transfer to the bus controller.
[0014]
Further, the video receiving circuit of the present invention may not include a PHY for transmitting and receiving physical signals of a network.
[0015]
Further, a configuration in which a memory interface unit that exchanges data with an external memory may be added to the packet selector unit may be used.
[0016]
Also, the video receiving apparatus of the present invention is configured such that a video decompression processing unit is connected to one or more processing IFs, a packet received from a network is sorted by a video reception processing circuit, and transferred to the video decompression processing unit. This is a video receiving apparatus characterized by the following.
[0017]
Further, the present invention provides a method for receiving video data for a packet whose identifier is one or more of IP header information in IP (Internet Protocol) or a port number in TCP / IP or UDP / IP or a protocol similar thereto. The present invention relates to a circuit and a video receiving device.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0019]
(Embodiment 1)
FIG. 1 is a configuration diagram of a video receiving circuit according to a first embodiment of the present invention.
[0020]
In FIG. 1, a video receiving circuit includes a PHY unit 104 for transmitting and receiving a physical signal of the network 108, a MAC unit 103 for controlling the timing of transmitting a packet to the network 108 and temporarily storing the received packet, At least one of the first processing IF unit 105, the second processing IF unit 106, the third processing IF unit 107, the bus controller unit 101 for connecting to an external general-purpose bus, and the MAC unit 103 It is composed of a packet selector unit 102 that selects and transfers any one of the processing IF unit 105 to the processing IF unit 107 or the bus controller unit 101 from the identifier described in the packet header. I have.
[0021]
The packet received by the MAC unit 103 via the PHY unit 104 is transferred to the packet selector unit 102. The packet selector unit 102 determines the identifier of the header of the packet received by the MAC unit 103, and determines at least one processing IF One of the unit 105 to the processing IF unit 107 or the bus controller unit 101 is selected and transferred to the processing IF unit 105 to the processing IF unit 107 or the bus controller unit 101.
[0022]
In the present embodiment, the packet selector unit 102, the processing IF 105 to the processing IF unit 107 are simply added to a general-purpose Ethernet (R) controller configured only by the bus controller unit 101, the MAC unit 103, and the PHY unit 104. In addition, since a video receiving circuit can be configured, and furthermore, an LSI can be formed, an inexpensive video receiving circuit can be configured. The processing IF can also have a function of decrypting the received video information when it has been encrypted, and a function of absorbing the reception fluctuation of the packet.
[0023]
(Embodiment 2)
FIG. 2 is a diagram of a video receiving circuit according to a second embodiment of the present invention.
[0024]
In FIG. 2, the same components as those in FIG. In FIG. 2, the PHY unit 104 is configured not to be built in the video processing circuit 200 but to be connected to the outside of the video processing circuit 200.
[0025]
(Embodiment 3)
FIG. 3 is a diagram of a video receiving circuit according to a third embodiment of the present invention.
[0026]
3, the same components as those of the video receiving apparatus shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The configuration is such that the memory IF 300 is connected to the packet selector unit 102 in the video receiving circuit 100 according to the first embodiment to interface with an external memory.
[0027]
In this embodiment, the configuration using the memory IF is shown. However, it is also possible to connect a memory to the memory IF and use the same configuration to incorporate the memory into the LSI.
[0028]
(Embodiment 4)
FIG. 4 is a diagram of a video receiving device according to a fourth embodiment of the present invention. In FIG. 4, the same components as those of the video receiving apparatus shown in FIGS. 1 and 3 are denoted by the same reference numerals, and description thereof will be omitted.
[0029]
The video receiving circuit 100 receives a packet from the network 108, selects one of the processing IF units 105 to 107, and the bus controller unit 101 according to a rule specified in advance by the packet selector 102, and transfers the selected packet.
[0030]
When the received packet is transferred to the processing IF 105, the packet selector unit 102 extracts the data in the packet and transfers the packet at a timing required by the video decompression processing unit 404. The video decompression processing unit 404 decompresses the received data and displays it as an image on an external display device.
[0031]
When the received packet is transferred to the bus control unit 101, the packet selector unit 102 extracts the data in the packet, transfers the data to the bus controller unit 101, and the bus controller unit 101 transfers the data to the host memory 402. Forward.
[0032]
The host CPU 401 performs reception processing on the data transferred to the host memory 402, performs the processing when the host CPU expands the video, and performs other processing in accordance with an algorithm programmed in advance in the host CPU. I do.
[0033]
A video receiving circuit can be configured by simply adding a packet selector unit 102, a processing IF 105 to a processing IF 107 to a general-purpose Ethernet (R) controller including only a bus controller unit 101, a MAC unit 103, and a PHY unit 104. In this case, an inexpensive video receiving circuit can be configured by being able to be an LSI.
[0034]
Also, in applications that have a video decompression unit, such as digital TV, by configuring a processing IF that has the same interface as a TV tuner, the function of reproducing video packets received from a network on a digital TV can be reduced. It can be added.
[0035]
(Embodiment 5)
FIG. 5 is a diagram illustrating a configuration of a packet received by the video receiving device according to the embodiment of the present invention.
[0036]
FIG. 5 is a diagram showing the configuration of a header such as TCP / IP or UDP / IP which is widely used as a standard communication protocol on the Internet or the like.
[0037]
The packet is processed according to the header information. This information is exchanged with the communication partner in advance, and the header information, TCP and UDP port numbers shown in FIG. 5 are set in the packet selector 102, and the processing IF units 105 to 107 and the bus are set according to the set contents. One of the controller units 101 is selected and transferred.
[0038]
In this embodiment, it is assumed that all the header information is used for sorting, but a part of the header information can be used for the sorting condition.
[0039]
【The invention's effect】
As described above, according to the video receiving circuit and the video receiving apparatus of the present invention, the video receiving circuit is configured by simply adding the packet selector unit and at least one or more processing IFs to the general-purpose Ethernet (R) controller. It is possible to receive an image without squeezing the bandwidth of the host bus, and furthermore, it is possible to implement an LSI, so that an inexpensive image receiving apparatus can be configured.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of a video receiving circuit according to a first embodiment of the present invention. FIG. 2 is a block diagram illustrating a configuration of a video receiving circuit according to a second embodiment of the present invention. 3 is a block diagram illustrating a configuration of a video receiving circuit according to a third embodiment of the present invention. FIG. 4 is a block diagram illustrating a configuration of a video receiving device according to a fourth embodiment of the present invention. FIG. 6 is a diagram showing a configuration of a packet received by the video receiving device in the embodiment of the present invention. FIG. 6 is a block diagram showing a configuration of a conventional video receiving circuit.
Reference Signs List 100 video receiving circuit 101 bus controller unit 102 packet selector unit 103 MAC unit 104 PHY units 105 to 107 processing IF unit 108 network 200 video receiving circuit 300 memory IF
400 Video receiver 401 Host CPU
402 Host memory 403 Host bus 404 Video decompression processing unit 500 Packet configuration diagram 600 Video receiving circuit 601 Bus controller 602 Local CPU
603 Local memory 604 MAC unit 605 PHY unit 606 to 608 Processing IF unit 609 Host CPU
610 Host memory 611 Host bus 612 Network 613 Video decompression processing unit

Claims (2)

A PHY unit for transmitting and receiving physical signals of the network,
A MAC unit for controlling the timing of sending packets to the network and temporarily storing received packets, one or more processing IF units, a bus controller unit for connecting to an external general-purpose bus, and the MAC unit A packet selector unit that determines a header identifier of the packet from an identifier described in a header of the packet received at the processing unit and transfers the packet to the processing IF unit or the bus controller unit. Directly connected to a PHY unit, the PHY unit is connected to the MAC unit, a packet received by the MAC unit is transferred to the packet selector unit, the packet selector unit, the MAC selector The identifier of the header of the received packet is determined, and the processing IF unit or the previous It said processing IF unit selects any one was chosen for the bus controller, or the video receiving circuit, characterized in that to transfer to the bus controller. The video receiving circuit according to claim 1, wherein a video decompression processing unit is connected to one or more processing IFs, sorts packets received from a network, and transfers the packets to the video decompression processing unit.

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