JP2004327686A - Plasma etching system and pattern forming method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma etching system which ensures high etching rate and high selectivity ratio, and to provide a pattern forming method. <P>SOLUTION: A magnetic coil 3 is arranged around a vacuum chamber 1. A microwave introducing window 2 is provided at the upper portion of the vacuum chamber 1 for introducing microwaves 50 into the vacuum chamber 1. A gas introducing system 4 is provided in the vacuum chamber 1 for introducing a predetermined gas thereinto. A stage 5 for holding a substrate is arranged in the vacuum chamber 1. An SiC substrate 93, as a substrate, is mounted on the stage 5 through a quartz plate 94. A power supply path 7 is connected to a DC power source 6 for applying bias voltage, and is in contact with a predetermined portion of the SiC substrate 93. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a plasma etching apparatus and a pattern forming method, and more particularly to a plasma etching apparatus in which charging is suppressed and a pattern forming method in which charging is suppressed.
[0002]
[Prior art]
In manufacturing a semiconductor device, an etching apparatus is used to form a pattern. As an etching apparatus, an etching apparatus using plasma is widely used.
[0003]
2. Description of the Related Art Conventionally, in an etching apparatus using plasma, reactive ion etching in which etching is performed by applying a bias voltage to a substrate and accelerating ions incident on the substrate is generally used.
[0004]
In recent years, in the manufacture of high-frequency devices, sensors, MEMS (Micro Electro Machining System) devices, and the like, there has been a demand for deeper etching of relatively difficult-to-etch materials represented by SiC.
[0005]
In such etching, it is required to achieve both an increase in the etching rate in order to shorten the processing time and an increase in the selectivity (etching selectivity) with respect to the etching mask by reducing the thickness of the etching mask. I have.
[0006]
In order to satisfy this requirement, it is necessary to control the energy of incident ions with higher precision in reactive ion etching.
[0007]
Next, as an example of a conventional plasma etching apparatus for performing such reactive ion etching, an electron cyclotron resonance ECR (Electron Cyclotron Resonance) type plasma etching apparatus disclosed in Patent Document 1 will be described.
[0008]
In this plasma etching apparatus, a magnetic field coil is provided around a vacuum chamber. A microwave introduction window for introducing microwaves into the vacuum chamber is provided at an upper portion of the vacuum chamber.
[0009]
A stage for holding the substrate is provided in the vacuum chamber. A high frequency power supply for applying a bias voltage to a substrate mounted on the stage is connected to the stage. Further, a gas introduction system for introducing a predetermined gas into the vacuum chamber is provided.
[0010]
Next, the operation of the plasma etching apparatus will be described. First, microwaves are introduced into the vacuum chamber through the microwave introduction window. In the vacuum chamber, an ECR region is formed by a magnetic field coil. On the other hand, a predetermined gas is introduced into the vacuum chamber by a gas introduction system.
[0011]
In the ECR region, the introduced gas is ionized by microwaves to generate plasma. For example, in the case of a microwave having a frequency of 2.45 GHz, plasma is generated in an ECR region having a magnetic field intensity of 875 G.
[0012]
A high-frequency voltage is applied to the substrate mounted on the stage from a high-frequency power supply via a contact surface with the stage. As a result, a bias voltage is generated between the surface of the substrate and the plasma.
[0013]
The ions existing in the plasma are accelerated toward the substrate by the bias voltage and enter the surface of the substrate. On the other hand, in plasma, the gas is excited to generate dissociated species such as radicals and active species. Some of the dissociated species of the gas so generated adhere to the surface of the substrate.
[0014]
On the surface of the substrate, a predetermined etching is performed by the reaction between the incident ions and the dissociated species of the attached gas.
[0015]
As described above, in the above-described plasma etching apparatus, a predetermined etching is performed by applying ions to the surface of the substrate by applying a high frequency voltage as a bias voltage.
[0016]
However, it is known that when a bias voltage is applied by a high-frequency voltage, ions incident on the substrate have a wide energy distribution. Therefore, the energy of the incident ions cannot be controlled with high accuracy, and it is difficult to secure a required high etching rate and a high selectivity.
[0017]
Therefore, as a plasma etching apparatus that improves this, a plasma etching apparatus that applies a DC voltage as a bias voltage applied to a substrate has been proposed.
[0018]
As such a plasma etching apparatus, a plasma etching apparatus described in Non-Patent Document 1 will be described.
[0019]
This plasma etching apparatus has basically the same configuration as the above-described plasma etching apparatus except that a DC power supply for applying a bias voltage to a substrate mounted on the stage is connected to the stage. Having.
[0020]
Next, the operation of the plasma etching apparatus will be described. First, as in the case of the plasma etching apparatus described above, an ECR region is formed by a magnetic field coil in a vacuum chamber.
[0021]
On the other hand, a predetermined gas is introduced into the vacuum chamber by a gas introduction system. In the ECR region, the introduced gas is ionized by microwaves to generate plasma.
[0022]
A DC voltage is applied to the substrate mounted on the stage by a DC power supply via a contact surface with the stage. As a result, a bias voltage is generated between the surface of the substrate and the plasma.
[0023]
The ions existing in the plasma are accelerated toward the substrate by the bias voltage and enter the surface of the substrate. On the other hand, a part of the dissociated species generated by exciting the gas in the plasma adheres to the surface of the substrate.
[0024]
On the surface of the substrate, a predetermined etching is performed by the reaction between the incident ions and the dissociated species of the attached gas.
[0025]
In the above-described plasma etching apparatus, a DC voltage is applied as a bias voltage. In this case, the distribution of the ion energy incident on the substrate can be suppressed to several eV, which is about the plasma electron temperature.
[0026]
Thereby, the energy of the incident ions can be controlled with high precision by adjusting the DC voltage, and both a high etching rate and a high etching selectivity can be secured.
[0027]
[Patent Document 1]
JP-A-8-35082
[0028]
[Non-patent document 1]
W. M. Holber, J .; Forster, 'Ion energys in electron cyclotron resonance dishes', J. Am. Vac. Sci. Technol. A8 (5), Sep / Oct, 3720 (1990).
[0029]
[Problems to be solved by the invention]
However, the plasma etching apparatus that applies a DC voltage as a bias voltage has the following problems.
[0030]
As a semiconductor device, for example, there is a high-frequency device using a GaAs substrate. In the manufacture of such a high-frequency device, the GaAs substrate may be mounted on a stage with an insulating material such as quartz interposed during the etching.
[0031]
In this case, the layer to be etched formed on the substrate is electrically insulated from the DC power supply.
[0032]
In addition, in an etching process of a general semiconductor device, a layer to be etched such as a conductive layer formed on an insulating layer such as a silicon oxide film is often formed. That is, the layer to be etched is formed on the substrate with the insulating layer interposed.
[0033]
Therefore, also in this case, the layer to be etched formed on the substrate and the DC power supply are electrically insulated.
[0034]
As described above, since the layer to be etched and the DC power supply are electrically insulated, the layer to be etched is in an electrically floating state even when a DC voltage is applied to the stage.
[0035]
Therefore, the layer to be etched formed on the surface of the substrate is charged by the incident ions. When the layer to be etched is charged, the bias voltage between the plasma and the layer to be etched decreases. As a result, the etching is hindered, and the etching process cannot be performed substantially.
[0036]
Further, even if the etching process is not substantially prevented, the bias current due to the incident ions flows to the back surface of the substrate through the substrate.
[0037]
At this time, the bias current may also flow to a portion of the element and the like formed under the layer to be etched, which may damage a portion of the gate oxide film of the transistor, for example, and damage the semiconductor device. there were.
[0038]
For this reason, a plasma etching apparatus that applies a DC voltage as a bias voltage is not effectively applied, and a plasma etching apparatus that applies a high-frequency voltage as a bias voltage is still used.
[0039]
As a result, there is still a problem that it is difficult to secure a high etching rate and a high selectivity.
[0040]
The present invention has been made to solve the above problems, and one object is to provide a plasma etching apparatus in which a high etching rate and a high selectivity are ensured, and another object is to provide a high etching rate and a high etching rate. An object of the present invention is to provide a pattern forming method that ensures a high selectivity.
[0041]
[Means for Solving the Problems]
A plasma etching apparatus using plasma according to the present invention includes a chamber, a power supply unit, and a DC power supply. In the chamber, a plasma is generated by accommodating the substrate. The power supply unit contacts a conductive power supply unit formed on the surface of the substrate. The DC power supply is electrically connected to the power supply unit and applies a predetermined bias voltage to the power supply unit. It is assumed that the conductive power-supplying portion referred to in this specification includes, for example, a semi-conductive power feeding portion such as SiC or GaAs.
[0042]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiment 1
An ECR type plasma processing apparatus according to Embodiment 1 of the present invention will be described. As shown in FIG. 1, first, a magnetic field coil 3 is provided around a vacuum chamber 1. A microwave introduction window 2 for introducing a microwave 50 into the vacuum chamber 1 is provided above the vacuum chamber 1. Further, a gas introduction system 4 for introducing a predetermined gas into the vacuum chamber 1 is provided.
[0043]
A stage 5 for holding a substrate is provided in the vacuum chamber 1. The SiC substrate 93 as a substrate is mounted on the stage 5 with a quartz plate 94 interposed.
[0044]
That is, the SiC substrate 93 is electrically insulated from the stage 5. As the SiC substrate 93, an N-type substrate doped with aluminum (Al) and having a specific resistance of 0.04 Ω · cm is preferable.
[0045]
Then, the power supply path 7 connected to the DC power supply 6 for applying a predetermined bias voltage comes into contact with a predetermined portion of the SiC substrate 93.
[0046]
In order to stabilize the plasma potential and stabilize the bias voltage, as a return path of a circuit for applying a DC voltage, a wall portion of the chamber 1 or a metal part (not shown) that comes into contact with the generated plasma is connected to a DC path. It is desirable that the power supply 6 be electrically connected to the power supply 6 via the return path 8.
[0047]
Next, the structure of the portion where the power supply path 7 contacts the SiC substrate 93 will be described in more detail. As shown in FIG. 2, in order to hold the SiC substrate 93 placed on the stage 5 with the quartz plate 94 interposed therebetween, a wafer holder 10 made of, for example, alumina and covering the peripheral portion of the SiC substrate 93 is provided. I have.
[0048]
A part 72 of the power supply path 7 is provided on the back side of the wafer holder 10. As shown in FIG. 3, the leading end of the part 72 of the power supply path is in contact with a part of the SiC substrate 93 (layer to be etched) which is not covered with the resist pattern 20 as a power supply target.
[0049]
Thus, the power supply path 7 is in contact with the entire periphery of the peripheral portion of the SiC substrate 93. Note that a part 72 of the power supply path is formed of, for example, Au.
[0050]
Next, the operation of the above-described plasma etching apparatus will be described. First, the microwave 50 is introduced into the vacuum chamber 1 through the microwave introduction window 2. In the vacuum chamber 1, an ECR region (not shown) is formed by the magnetic field coil 3. On the other hand, a predetermined gas is introduced into the vacuum chamber 1 by the gas introduction system 4.
[0051]
In the ECR region, the introduced gas is ionized by microwaves to generate plasma. For example, in the case of a microwave having a frequency of 2.45 GHz, plasma is generated in an ECR region having a magnetic field intensity of 875 G.
[0052]
The SiC substrate 93 mounted on the stage 5 is electrically connected to the DC power supply 6 via the power supply path 7 including the part 72 of the power supply path formed on the back side of the wafer holder 10 as described above. ing. Thus, a predetermined bias voltage from the DC power supply 6 is reliably applied to the SiC substrate 93.
[0053]
The ions present in the generated plasma are accelerated by the bias voltage applied to the SiC substrate 93 and enter the surface of the SiC substrate 93. On the other hand, in plasma, the gas is excited to generate dissociated species such as radicals and active species. Some of the dissociated species of the gas thus generated adhere to the surface of the SiC substrate 93.
[0054]
On the surface of the SiC substrate 93, a predetermined etching process is performed on the layer to be etched by the reaction between the incident ions and the dissociated species of the attached gas.
[0055]
In the above-described plasma etching apparatus, in particular, since the DC power supply 6 and the SiC substrate (layer to be etched) 93 are electrically connected via the power supply path 7, the SiC substrate 93 can be reliably maintained at a predetermined bias voltage. Will be fixed.
[0056]
Thus, compared with the case where the SiC substrate (the layer to be etched) is electrically floating as in the case of the conventional plasma processing apparatus, the SiC substrate 93 is charged by the incident ions in the present plasma etching apparatus. Be suppressed.
[0057]
Therefore, the energy of the incident ions is reduced due to the charging of the SiC substrate 93, so that the progress of the etching is not hindered. As a result, a desired etching process can be reliably performed on the SiC substrate 93, and as described later, a high etching rate and a high etching selectivity can be secured.
[0058]
Further, the bias current caused by the incident ions does not flow to the back surface of the SiC substrate 93 through the SiC substrate 93. As a result, it is possible to prevent a portion of an element or the like already formed on the SiC substrate 93 from being destroyed due to the bias current flowing to the back surface of the SiC substrate 93.
[0059]
In the above-described plasma etching apparatus, gold (Au) is used as an example of the material of the part 72 of the power supply electrode provided on the back side of the wafer retainer 10. However, in addition to gold, for example, platinum (Pt) or the like is used. A chemically stable material having excellent electrical conductivity and resistance to radicals can be used.
[0060]
In addition, although alumina has been described as an example of the material of the wafer 10 holding member, another suitable insulating material may be applied.
[0061]
Embodiment 2
Here, a modified example of the power supply path in the plasma etching apparatus will be described. As shown in FIG. 4, for example, an arm-shaped power supply path 73 in which a wire made of gold (Au) is coated with an insulating material 74 made of alumina is provided. As shown in FIG. 5, the end of the power supply path 73 contacts the peripheral portion of the SiC substrate 93 as the power-supplied part that is not covered by the resist pattern 20.
[0062]
In the present plasma etching apparatus, a plurality (for example, three) of such arm-shaped power supply paths 73 are provided. In this case, it is desirable to dispose the power supply path 73 such that each end of the power supply path 73 contacts different positions along the peripheral portion of the SiC substrate 93.
[0063]
The remaining configuration is the same as that of the plasma etching apparatus shown in FIG. 1, and therefore, the same members are denoted by the same reference numerals and description thereof will be omitted.
[0064]
In the present plasma etching apparatus, plasma is generated in the ECR region in the same manner as in the above-described plasma etching apparatus. Some of the dissociated species of the gas generated in the plasma adhere to the surface of the SiC substrate 93.
[0065]
The SiC substrate 93 mounted on the stage 5 is electrically connected to the DC power supply 6 via the power supply paths 7 and 73, and a predetermined bias voltage from the DC power supply 6 is applied.
[0066]
The ions present in the generated plasma are accelerated by the bias voltage applied to the SiC substrate 93 and enter the surface of the SiC substrate 93. On the surface of the SiC substrate 93, a predetermined etching process is performed on the layer to be etched by the reaction between the incident ions and the dissociated species of the attached gas.
[0067]
In the above-described plasma etching apparatus, the DC power supply 6 and the SiC substrate (layer to be etched) 93 are electrically connected to each other via the plurality of arm-shaped power supply paths 73, so that the SiC substrate 93 has a predetermined bias voltage. Fixed securely.
[0068]
Thus, compared to the case where the SiC substrate (the layer to be etched) is in an electrically floating state, the plasma etching apparatus suppresses charging of the SiC substrate 93 by incident ions.
[0069]
As a result, the energy of the incident ions is reduced due to the charging of the SiC substrate 93, so that the progress of the etching is not hindered, and the desired etching process can be performed on the SiC substrate 93.
[0070]
Further, the bias current caused by the incident ions does not flow to the back surface of the SiC substrate 93 through the SiC substrate 93. As a result, it is possible to prevent a portion of an element or the like already formed on the SiC substrate 93 from being destroyed due to the bias current flowing to the back surface of the SiC substrate 93.
[0071]
In addition, by using the arm-shaped power supply path 73 in which a wire material such as gold is coated with an insulating material 74 as the power supply electrode, compared with the case where the power supply electrode is disposed on the back side of the wafer holder 10 described above, SiC The area where the substrate 93 is covered by the power supply electrode 73 is reduced.
[0072]
As a result, a region (area) for forming a semiconductor device on the SiC substrate 93 can be increased, and more semiconductor devices can be formed.
[0073]
In the above-described plasma etching apparatus, gold (Au) is taken as an example of the material of the power supply electrode 73. However, in addition to gold, for example, platinum (Pt) or the like has excellent electrical conductivity and is free from radicals. A chemically stable material having resistance can be applied.
[0074]
Although alumina is used as an example of a material for covering the power supply electrode 73, another suitable insulating material may be used.
[0075]
Further, in the plasma etching apparatus described in the first and second embodiments, an example has been described in which etching is performed on SiC substrate 93 as a layer to be etched using a predetermined resist pattern as an etching mask.
[0076]
In this plasma etching apparatus, an insulating etching mask such as a photoresist or a conductive etching mask is used for a conductive film or a semiconductive film (semiconductor film) such as Si or GaAs as a layer to be etched. Thus, a desired etching process can be performed.
[0077]
The above-described plasma etching apparatus has been described by taking an ECR type as an example. In addition, for example, a capacitively coupled plasma etching apparatus, an ICP (Inductively Coupled Plasma) type plasma etching apparatus, and a helicon type plasma etching apparatus And so on.
[0078]
Embodiment 3
Here, a case in which the ECR type plasma etching apparatus described in Embodiment 1 is applied and plasma etching is performed on a SiC substrate as a layer to be etched using a conductive Ni etching mask will be specifically described.
[0079]
In this case, as shown in FIG. 6, a predetermined Ni etching mask 30a is formed on SiC substrate 93. First, an example of a method for manufacturing a conductive etching mask such as the Ni etching mask will be described.
[0080]
As shown in FIG. 7, a Ni layer 30 is formed on a SiC substrate 93. Next, as shown in FIG. 8, a resist pattern 32 corresponding to the etching mask is formed on the Ni layer 30.
[0081]
Next, as shown in FIG. 9, the surface of the SiC substrate 93 is exposed by performing anisotropic etching on the Ni layer 30 using the resist pattern 32 as a mask. Thereafter, as shown in FIG. 10, by removing the resist pattern 32, a Ni etching mask 30a is formed.
[0082]
Next, the SiC substrate 93 is etched through the Ni etching mask 30a. First, SF is used as an etching gas. ₆ (0.03 L / min (30 sccm)) and O ₂ (0.01 L / min (10 sccm)) mixed gas was used. The pressure in the vacuum chamber 1 was 0.665 Pa (5 mTorr), the current flowing through the magnetic field coil 3 was 200 A, the microwave power was 1 KW, and the voltage of the DC power supply 6 was 200 V.
[0083]
As the substrate, an N-type SiC substrate 93 having a diameter of 2 inches, a thickness of 100 μm, and a specific resistance (Al-doped) of 0.04 Ω · cm was used. The thickness of the Ni etching mask 30a was 3 μm. The pattern of the Ni etching mask was a hole pattern having a diameter of 100 μm.
[0084]
As shown in FIG. 6, the power supply path 72 formed in the wafer holder 10 contacts the surface of the Ni etching mask 30a. As a result, a DC bias voltage is applied to the Ni etching mask 30a via the power supply path 7.
[0085]
At this time, it is desirable to form the mask pattern so that there is no electrically isolated pattern as the mask pattern of the Ni etching mask.
[0086]
For example, as shown in FIG. 11, the outer peripheral portion 30aa of the Ni etching mask that covers the peripheral edge of the SiC substrate and is in contact with the power supply path and the substantial mask pattern 30bb formed inside the outer peripheral portion 30aa are electrically connected. It is desirable to be connected.
[0087]
On the other hand, in the Ni etching mask 130 shown in FIG. 12, the outer peripheral portion 130a of the Ni etching mask is not connected to the substantial mask pattern 130b, and the substantial mask pattern 130b is electrically isolated. become.
[0088]
Since there is no electrically isolated pattern and the substantial mask pattern 30bb is connected to the outer peripheral portion 30aa, a bias voltage is uniformly applied to the entire Ni etching mask 30a.
[0089]
As a result, the ions present in the generated plasma are accelerated by the bias voltage applied to the SiC substrate 93 and are incident on the surface of the SiC substrate 93 almost uniformly.
[0090]
On the surface of the SiC substrate 93, the incident ions react with the dissociated species of the attached gas, so that a predetermined etching process is uniformly performed on the SiC substrate 93, as shown in FIG. It is formed.
[0091]
It was confirmed that the etching rate using a DC power supply as the bias voltage can achieve an etching rate of 6.5 μm / min for the SiC substrate 93.
[0092]
In addition, it was confirmed that an etching selectivity (SiC / Ni) value of 80 between the etching rate of the SiC and the etching rate of the Ni etching mask could be achieved.
[0093]
On the other hand, for comparison, results of an etching method using a high-frequency power supply as a bias voltage will be described. In this case, the conditions such as the flow rate and the pressure of the etching gas were the same as those when a DC power supply was used. Further, the high frequency power was set to 150 W so that the self-bias voltage excited by the high frequency was almost equal to the DC bias voltage (200 V).
[0094]
When the plasma etching process was performed under these conditions, it was confirmed that the value of the etching rate of the SiC substrate was 6 μm / min. It was also confirmed that the value of the etching selectivity (SiC / Ni) between the etching rate of SiC and the etching rate of the Ni etching mask was 40.
[0095]
Therefore, it was found that the etching rate of the SiC substrate was slightly increased by changing the bias voltage from the high frequency bias to the DC bias. It was also found that the etching selectivity was improved about twice.
[0096]
When the bias voltage was a DC bias, it was confirmed that an in-plane uniformity of the etching rate of 5% could be achieved, and it was found that good results were obtained. The in-plane uniformity is obtained by dividing the difference between the maximum value and the minimum value of the etching rate by twice the average value of the in-plane etching rate.
[0097]
Further, it was confirmed that the semiconductor device formed on the SiC substrate was not adversely affected by the plasma etching treatment, and it was found that the reliability of the semiconductor device could be secured.
[0098]
In the plasma etching process described above, the Ni etching mask 30 has been described as an example of the etching mask. As a material of the etching mask, a metal material such as Al, Cr, Au, Pt, and Ru can be used in addition to Ni.
[0099]
The etching mask may be formed by lift-off in addition to the above-described method using a resist pattern.
[0100]
In this case, first, a resist pattern 33 is formed on SiC substrate 93 as shown in FIG. Next, as shown in FIG. 15, a Ni film 30 is formed on SiC substrate 93 so as to cover resist pattern 33.
[0101]
Next, as shown in FIG. 16, by removing the resist pattern 3, a predetermined Ni etching mask 30a is formed.
[0102]
Further, a plating layer may be used in combination as an etching mask. In this case, first, as shown in FIG. 17, the seed layer 31 for plating is formed on the SiC substrate 93. Next, a resist pattern 32 is formed on the seed layer 31 as shown in FIG.
[0103]
Next, as shown in FIG. 19, a plating layer 34 of, for example, Ni plating is formed on the exposed seed layer 31. Next, as shown in FIG. 20, the resist pattern 32 is removed. Next, as shown in FIG. 21, the exposed seed layer 31 is removed to form an etching mask.
[0104]
In the above-described plasma etching process, the SiC substrate has been described as an example of the layer to be etched. As the layer to be etched, in addition to the SiC substrate, a conductive material such as a metal applied to a semiconductor device, Si, GaAs, and the like can be applied. Further, a conductive material such as ITO (Indium Tin Oxide) can be used.
[0105]
In the case of a semiconductor device in which a semiconductor element is formed on a surface of a Si substrate, plasma etching can be applied to a layer to be etched formed as a power-supplied portion formed on the Si substrate.
[0106]
In this case, as shown in FIG. 22, the power supply path 72 provided in the wafer holder 10 is brought into contact with the surface of the Si substrate 9 or a layer to be etched (not shown) formed on the surface, A plasma etching process will be performed.
[0107]
Further, as shown in FIG. 23, the tip of the arm-shaped power supply path 73 is brought into contact with the surface of the Si substrate 9 or a layer to be etched (not shown) formed on the surface to perform plasma etching. Will be applied.
[0108]
Further, as shown in FIG. 24, when a Ni etching mask 30, for example, is used as the etching mask, the power supply path 72 is brought into contact with the Ni etching mask to perform the plasma etching process.
[0109]
The above-described pattern forming method by the plasma etching process is summarized as follows. First, when a conductive material (a power-supplied portion including a semiconductive material) is applied as a layer to be etched, an etching mask made of an insulating material such as a photoresist, or a conductive material is used as an etching mask. An etching mask (power-supplied portion) can be used.
[0110]
In particular, when an etching mask made of an insulating material is used, a plasma treatment is performed on the layer to be etched by applying a DC bias voltage to the layer to be etched (power-supplied portion).
[0111]
On the other hand, when an etching mask made of a conductive material is used, a plasma process is performed on the layer to be etched by applying a DC bias voltage to either the layer to be etched or the etching mask (power-supplied portion). .
[0112]
In the case where an insulating film is used as a layer to be etched, an etching mask of a conductive material is used as an etching mask.
[0113]
In this case, a plasma process is performed on the layer to be etched by applying a DC bias voltage to the etching mask (power-supplied portion).
[0114]
In this manner, by applying a DC bias voltage to the layer to be etched or the etching mask, ions existing in the plasma are incident almost uniformly toward the layer to be etched, and dissociated species of the gas attached to the layer to be etched. , The layer to be etched can be uniformly etched.
[0115]
As a result, a high etching rate and a high etching selectivity are secured, and a desired pattern can be reliably and uniformly formed on the substrate.
[0116]
The embodiment disclosed this time is an example in all respects and should be considered as not being restrictive. The present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
[0117]
【The invention's effect】
According to the plasma etching apparatus using plasma according to the present invention, a voltage from a DC power supply is applied as a bias voltage to a power-supplied portion formed on a substrate via a power supply portion, and the substrate is securely fixed at a predetermined voltage. Is done. This suppresses the substrate from being charged by incident ions as compared with the case where the substrate is in an electrically floating state. Therefore, it is possible to prevent the energy of incident ions from being reduced due to the charging of the substrate, thereby preventing the progress of the etching from being hindered. As a result, a desired etching process can be reliably performed on the layer to be etched formed on the substrate, and a high etching rate and a high etching selectivity can be secured.
[Brief description of the drawings]
FIG. 1 is a sectional view of a plasma etching apparatus according to Embodiment 1 of the present invention.
FIG. 2 is an enlarged cross-sectional view around a stage of the plasma etching apparatus shown in FIG. 1 in the embodiment.
FIG. 3 is a partially enlarged cross-sectional view around the stage shown in FIG. 2 in the embodiment.
FIG. 4 is an enlarged sectional view around a stage of a plasma etching apparatus according to a second embodiment of the present invention.
FIG. 5 is a partially enlarged cross-sectional view around the stage shown in FIG. 4 in the embodiment.
FIG. 6 is an enlarged sectional view around a stage of a plasma etching apparatus according to a third embodiment of the present invention.
FIG. 7 is a cross-sectional view showing one step of a pattern forming method in the embodiment.
FIG. 8 is a cross-sectional view showing a step performed after the step shown in FIG. 7 in the embodiment.
FIG. 9 is a cross-sectional view showing a step performed after the step shown in FIG. 8 in the embodiment.
FIG. 10 is a cross-sectional view showing a step performed after the step shown in FIG. 9 in the embodiment.
FIG. 11 is a plan view showing a pattern of an etching mask in the step shown in FIG. 10 in the embodiment.
FIG. 12 is a plan view showing a pattern of an etching mask as a comparative example in the embodiment.
FIG. 13 is a cross-sectional view showing a step performed after the step shown in FIG. 10 in the embodiment.
FIG. 14 is a cross-sectional view showing a step of another method for forming an etching mask in the embodiment.
FIG. 15 is a cross-sectional view showing a step performed after the step shown in FIG. 14 in the embodiment.
FIG. 16 is a cross-sectional view showing a step performed after the step shown in FIG. 15 in the embodiment.
FIG. 17 is a cross-sectional view showing a step of still another method for forming an etching mask in the embodiment.
FIG. 18 is a cross-sectional view showing a step performed after the step shown in FIG. 17 in the embodiment.
FIG. 19 is a cross-sectional view showing a step performed after the step shown in FIG. 18 in the embodiment.
FIG. 20 is a cross-sectional view showing a step performed after the step shown in FIG. 19 in Embodiment 1;
FIG. 21 is a cross-sectional view showing a step performed after the step shown in FIG. 20 in Embodiment 1;
FIG. 22 is an enlarged cross-sectional view of the periphery of a stage in a pattern forming method according to a modification in the embodiment.
FIG. 23 is another enlarged cross-sectional view of the periphery of the stage in the pattern forming method according to the modification in the embodiment.
FIG. 24 is another enlarged cross-sectional view of the periphery of the stage in the pattern forming method according to the modification in the embodiment.
[Explanation of symbols]
1 vacuum chamber, 2 microwave introduction window, 3 magnetic field coil, 4 gas introduction system, 5 stage, 6 DC power supply, 7, 72, 73 power supply path, 8 return path, 9 Si substrate, 10 wafer holder, 20, 32, 33 Resist pattern, 30Ni layer, 30a Ni etching mask, 31 seed layer, 34 plating layer, 50 microwave, 74 insulating material, 93 SiC substrate, 94 quartz plate.

Claims (8)

A plasma etching apparatus using plasma,
A chamber for accommodating the substrate and generating a plasma;
A power supply unit that contacts a conductive power supply unit formed on the surface of the substrate,
A plasma etching apparatus electrically connected to the power supply unit and including a DC power supply for applying a predetermined bias voltage to the power supply unit. A stage unit disposed in the chamber, for mounting a substrate,
A substrate holder for holding the peripheral portion of the substrate placed on the stage portion by holding it down,
2. The plasma etching apparatus according to claim 1, wherein the power supply unit is provided on a side of the substrate press that comes into contact with the power supply unit so as to be sandwiched between the substrate press and the substrate. 3. The power supply unit,
A conductive wire having an end contacting the power-supplied portion,
And an insulating portion that covers the conductive wire,
The plasma etching apparatus according to claim 1, wherein the power supply unit is disposed so as to be in contact with the power supply unit located at a peripheral portion of the substrate. A plurality of the power supply units,
The plasma etching apparatus according to claim 3, wherein the plurality of power supply units are disposed so as to contact different positions in the power supplied unit. A pattern forming method using the plasma etching apparatus according to claim 1. Forming a layer to be etched, which is subjected to an etching process on the surface of the substrate,
Forming a predetermined etching mask on the layer to be etched;
A plasma etching step of forming a predetermined pattern by performing a plasma etching process on the layer to be etched through the etching mask;
Removing the etching mask,
In the step of forming the layer to be etched and the step of forming the etching mask, at least one of the layer to be etched and the etching mask is formed of a conductive material,
The pattern forming method, wherein in the plasma etching step, a predetermined DC voltage is applied as a bias voltage to at least one of the etching target layer and the etching mask formed of a conductive material. In the step of forming the etching mask, the etching mask is formed of a conductive material,
7. The pattern forming method according to claim 6, wherein in the plasma etching step, the predetermined DC voltage is applied to the etching mask formed of a conductive material. The pattern forming method according to claim 7, wherein in the step of forming the etching mask, the etching mask is formed so that the entire etching mask is electrically connected.

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