JP2004325266A - Method of inspecting stacked ceramic element and method of manufacturing stacked ceramic component - Google Patents

Method of inspecting stacked ceramic element and method of manufacturing stacked ceramic component Download PDF

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JP2004325266A
JP2004325266A JP2003120772A JP2003120772A JP2004325266A JP 2004325266 A JP2004325266 A JP 2004325266A JP 2003120772 A JP2003120772 A JP 2003120772A JP 2003120772 A JP2003120772 A JP 2003120772A JP 2004325266 A JP2004325266 A JP 2004325266A
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defect
multilayer ceramic
ceramic element
size
echo
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JP4031729B2 (en
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Masashi Sakagami
勝伺 坂上
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Kyocera Corp
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Kyocera Corp
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N29/00Investigating or analysing materials by the use of ultrasonic, sonic or infrasonic waves; Visualisation of the interior of objects by transmitting ultrasonic or sonic waves through the object
    • G01N29/04Analysing solids
    • G01N29/11Analysing solids by measuring attenuation of acoustic waves
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2291/00Indexing codes associated with group G01N29/00
    • G01N2291/04Wave modes and trajectories
    • G01N2291/044Internal reflections (echoes), e.g. on walls or defects
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2291/00Indexing codes associated with group G01N29/00
    • G01N2291/26Scanned objects
    • G01N2291/269Various geometry objects
    • G01N2291/2697Wafer or (micro)electronic parts

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
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  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of inspecting a stacked ceramic element and a method of manufacturing a stacked ceramic component which can calculate the defect size of a minute internal defect with high precision. <P>SOLUTION: A high-frequency wave is focused on a position which is at a predetermined distance from the surface having surface roughness Ra not larger than 2μm of the stacked ceramic element, which has a conductive layer therewithin and a porus ratio not more than 5%, with a probe of frequency not lower than 50MHz, and is incident on the device so that the incident angle is nearly perpendicular to the surface. A defect echo having a height not lower than 5% of that of a standard echo is extracted, wherein the standard echo is obtained when the high-frequency wave is focused on an artificial defect in a standard sample having the artificial defect. Based on a defect size D1 calculated from the defect echo and the relationship between the defect size of the artificial defect obtained from the standard echo and the defect size of the actual artificial defect, a defect size D2 actually present within the stacked ceramic element is calculated. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、積層型セラミック素子の検査法及び積層型セラミック部品の製法に関するものである。
【0002】
【従来技術】
セラミック層と導体層を交互に積層した積層型セラミック素子は、例えば、内部電極材料を含有する内部電極パターンが形成されたグリーンシートを複数積層し、これをプレスして一体化した後、脱脂、焼成することで作製していた。積層型セラミック部品は、積層型セラミック素子の側面に、導体層と接続する外部電極を形成して構成されていた。
【0003】
このような積層型セラミック部品は、その様々な特性を満足させるため、特性検査や概観検査が行われて、良品のみが梱包、出荷されている。特に積層型セラミック部品内部の欠陥を検査するために、従来、超音波探傷を用いた検査を行い、良品をスクリーニングすることが行われている(特許文献1参照)。
【0004】
この検査法では、積層型セラミック部品に高周波を入射させ、反射波を解析することにより、空気層(ボイド)の有無、大きさを検出できることが記載されている。
【0005】
【特許文献1】
特開平5−36567号
【0006】
【発明が解決しようとする課題】
しかしながら、上記特許文献1の検査法では、空気層の有無、存在位置、大きさをある程度検出できるものの、実際に積層型セラミック部品内部に存在する欠陥サイズを正確に得ることができず、今日における厳密な良否判定を行うことができなかった。
【0007】
即ち、近年、セラミック層の薄層化、多層積層、高集積化や小型化よって、部品の高品質化はますます要求が厳しくなり、より厳密な良否判定が要求され、このためには、製品を欠陥サイズで選別する必要性が生じてきているが、従来の検査法では、積層型セラミック部品表面での高周波の乱反射、セラミック層の微細な内部欠陥(ボイド)による乱反射により、200μm以上の内部欠陥サイズはある程度正確に得ることができるものの、小さい内部欠陥の欠陥サイズ、例えば積層方向に対して直交する方向のサイズが100μm以下の内部欠陥の欠陥サイズを正確に得ることができなかった。
【0008】
本発明は、微小な内部欠陥の欠陥サイズを精度よく算出できる積層型セラミック素子の検査法及び積層型セラミック部品の製法を提供することを目的とする。
【0009】
【課題を解決するための手段】
本発明者は、積層型セラミック素子に内在する微小な内部欠陥の積層方向に対して直交する方向の欠陥サイズを、積層型セラミック素子の気孔率が5%以下で、高周波が入射される積層型セラミック素子の表面の表面粗さを2μm以下とし、さらに積層型セラミック素子の表面に対して高周波をほぼ直角に入射することにより検出できること、並びに、積層型セラミック素子内部に実際に内在する微小な内部欠陥の欠陥サイズが、欠陥エコーから算出した理論上の欠陥サイズD1との間に一定の関係があり、その関係に基づいて算出した欠陥サイズD2は、実際内在する内部欠陥サイズと近似していることを見出し、本発明に至った。
【0010】
即ち、本発明の積層型セラミック素子の検査法は、内部に導体層を有する気孔率5%以下の積層型セラミック素子に、その積層方向上方に設けられた周波数50MHz以上のプローブを用いて、高周波を表面粗さRaが2μm以下の前記積層型セラミック素子表面から一定距離内部の位置に焦点をあわせるように、かつ前記積層型セラミック素子表面に対してほぼ直角となるように入射させ、人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して5%以上の高さの欠陥エコーを抽出し、該欠陥エコーから算出した積層方向に対して直交する方向の欠陥サイズD1、及び前記標準エコーから求めた人工欠陥の欠陥サイズと実際の人工欠陥の欠陥サイズとの関係に基づき、前記積層型セラミック素子に実際に存在する積層方向に対して直交する方向の欠陥サイズD2を算出することを特徴とする。
【0011】
このような検査法によれば、内部に導体層を有する積層型セラミック素子であっても、積層型セラミック素子の気孔率が5%以下で、高周波を表面粗さRaが2μm以下の積層型セラミック素子表面から、積層型セラミック素子表面に対してほぼ直角となるように入射させることにより、積層型セラミック素子の高周波入射面の乱反射、積層型セラミック素子内部における乱反射を充分抑制でき、積層方向に対して直交する方向の長さが微小な内部欠陥(ボイド)からの高周波の反射波(欠陥エコー)を充分に検出することができる。尚、本発明の検査法は、積層型セラミック素子に外部電極を形成した積層セラミック部品に用いても良く、導体層とセラミック層が積層されたものであれば好適に用いることができる。
【0012】
また、人工欠陥を内蔵した標準試料を作製し、この人工欠陥に焦点を合わせたときの標準エコーを求め、この標準エコーから人工欠陥の積層方向に直交する方向の理論上の欠陥サイズを求めるとともに、実際に試料内部に存在する人工欠陥の積層方向に直交する方向の欠陥サイズを測定し、理論上の欠陥サイズと実際の欠陥サイズとの関係を求める。
【0013】
一方、標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して5%以上の高さの欠陥エコーを抽出し、積層型セラミック素子の欠陥エコーから、積層型セラミック素子に存在する、積層方向に対して直交する方向の理論上の欠陥サイズD1を求める。この後、標準試料における理論上の欠陥サイズと実際の欠陥サイズとの関係から、積層型セラミック素子に実際に存在する、積層方向に対して直交する方向の欠陥サイズD2を算出することにより、実際の微小な内部欠陥(ボイド)の欠陥サイズを精度良く得ることができる。
【0014】
また、本発明の積層型セラミック素子の検査法は、積層型セラミック素子のセラミック層がPZT系、Al系、Si系、BaTiO系からなり、D1≦200μmの場合、前記積層型セラミック素子に実際に内在する欠陥サイズD2をD1/10〜D1/1.5とし、D1>200μmの場合、欠陥サイズD2をD1/8〜D1/1.5として算出することを特徴とする。
【0015】
このような検査法では、積層型セラミック素子のセラミック層がPZT系、Al系、Si系、BaTiO系の場合に、積層型セラミック素子に実際に内在する欠陥サイズを精度良く求めることができ、製品を欠陥サイズで選別することができ、これにより厳密な良否判定を行うことができ、高信頼性を有する積層型セラミック素子を提供することができる。
【0016】
さらに、本発明の積層型セラミック素子の検査法は、積層型セラミック素子は、積層方向厚みが10mm以上、または導体層数が20層以上であり、前記積層型セラミック素子の積層方向における上下面から高周波を入射して、欠陥サイズD2を算出することを特徴とする。
【0017】
積層方向厚みが10mm以上、または導体層数が20層以上である積層型セラミック素子では、一方側からの高周波の入射だけでは焦点を合わせることが困難であったり、また、明瞭な反射波を得ることが困難であるが、本発明では、積層型セラミック素子の積層方向の両側から高周波を入射させ、それぞれの表面から中央部までに存在する欠陥サイズD2を求めることができるため、全体にわたって欠陥サイズD2を精度良く算出できる。
【0018】
また、本発明の積層型セラミック素子の検査法は、積層型セラミック素子の積層方向に対して直交する方向の長さが6〜300μmの内部欠陥を検出することを特徴とする。このような検査法では、微細な内部欠陥の欠陥サイズを精度良く算出することにより、製品の歩留まりを向上でき、さらに高い信頼性を有する積層型セラミック素子を提供できる。
【0019】
本発明の積層型セラミック部品の製法は、内部に導体層を有する気孔率5%以下の積層型セラミック素子に、その積層方向上方に設けられた周波数50MHz以上のプローブを用いて、高周波を表面粗さRaが2μm以下の前記積層型セラミック素子表面から一定距離内部の位置に焦点をあわせるように、かつ前記積層型セラミック素子表面に対して直角となるように入射させ、人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して5%以上の高さの欠陥エコーを抽出し、該欠陥エコーから算出した積層方向に対して直交する方向の欠陥サイズD1が所定値以上の前記積層型セラミック素子を除去し、良品のみの積層型セラミック素子に、前記導体層と接続する外部電極を形成することを特徴とする。
【0020】
このような積層型セラミック部品の製法では、上記したように、積層型セラミック素子の欠陥エコーから、積層方向に対して直交する方向の理論上の欠陥サイズD1、及び標準試料における理論上の欠陥サイズと実際の欠陥サイズとの関係から、積層型セラミック素子に実際に存在する、積層方向に対して直交する方向の欠陥サイズを推定できるため、欠陥エコーによる理論上の欠陥サイズD1が所定値以上の積層型セラミック素子を除去し、良品のみの積層型セラミック素子に、導体層と接続する外部電極を形成することができ、積層セラミック部品の歩留まりを向上できる。
【0021】
本発明の積層型セラミック部品の製法は、積層型セラミック素子のセラミック層がPZT系、Al系、Si系、BaTiO系からなり、D1≦200μmの場合、D1/10の値が所定値以下を良品とし、D1>200μmの場合、D1/8の値が所定値以下を良品とすることを特徴とする。
【0022】
このような積層型セラミック部品の製法では、所定の大きさの欠陥を有する積層型セラミック素子を精度良く分別することにより、特性の高い高信頼性の積層型セラミック部品を提供できる。
【0023】
【発明の実施の形態】
図1は、積層型セラミック素子を高周波探傷する状態を示す縦断面図であり、図2は図1の内部欠陥が存在する積層型セラミック素子(以下、試料ということもある)の一部を拡大して示す断面図であり、図3は高周波探傷装置の概略図である。
【0024】
高周波探傷による内部欠陥の欠陥サイズの測定は、図1、3に示すように、繰り返しパルス電圧を印加したプローブ6から、音響レンズによって収束された高周波が発せられ、溶媒中、例えば純水内に浸漬された試料の内部欠陥4で反射し、図3に示すように、戻ってきた反射波(反射音)が電圧として受信器に出力される。受信器に入力された信号は増幅され、検出器に出力される。
【0025】
検出器では、映像化したい欠陥部の反射波を処理するため、検出回路を経て、そのピーク値をDC電圧として出力される。DC電圧のAD変換は、操作中に実行されながら、その変換値を演算処理した後、メモリに格納され、操作映像が表示される。ディスプレイは反射波をモニタするもので、送信波のほか、内部欠陥のエコーを観察できる。
【0026】
エコーは、図1に示すように、内部欠陥4による反射源に焦点が合うと、強い反射エコーが得られる。
【0027】
高周波は、試料内に入射されると、試料の表面および密度差、透過率の異なる導体層や異物によって反射されるが、高周波の入射角度が垂直であれば、反射率がもっとも高くなり、内部欠陥による反射波を探知しやすくなる。
【0028】
セラミック層2と導体層3を積層した、図1に示すような積層型セラミック素子1は、減衰の大きい試料であり、数μm以下のボイドが多数存在するほど、高周波の反射が散乱され、反射波の減衰が大きくなり、欠陥による反射波が探知されにくくなる。
【0029】
このような積層型セラミック素子1は、複数のセラミック層2と複数の導体層3とを交互に積層してなり、内部欠陥4を有している。この積層型セラミック素子(試料)は、気孔率5%以下、好ましくは気孔率3%以下のものを用いることが望ましい。気孔率が5%以下であれば、高周波の反射波の散乱が抑制され、欠陥となる反射波を容易に探知できる。
【0030】
セラミックス層2は、セラミックスであれば何れでも良いが、例えば、チタン酸ジルコン酸鉛Pb(Zr,Ti)O(以下PZTと略す)、チタン酸バリウムBaTiO3、アルミナAl、窒化珪素Siを主成分とするセラミック材料などが使用されるが、これらに限定されるものではない。
【0031】
導体層3は、例えばAg、Al、Au、Cu、Ni、Pd、Wを主成分とする導電性ペースト、箔、板、膜、樹脂または網状の材料などが使用されるが、これらに限定されるものではなく、抵抗率が10−3Ωm以下であれば何れでも良い。
【0032】
このような試料に、高周波を表面から内部に向けて入射させ、例えば6〜300μmの内部欠陥サイズを求める。測定する欠陥サイズは、6μm以上、特に8μm以上が好ましい。密度差が大きいセラミック層2と導体層3を積層しているため、高周波の散乱が大きく、更には、導体層の多層配線、スルーホールの形成により、減衰が著しく大きく、6μmより小さい欠陥は、探知しにくいためである。
【0033】
本発明の対象となる試料は、図4(a)に示すように、高周波の入射面の表面粗さRaが2μm以下、入射面の平面度が100μm/mm以下であることが望ましい。
【0034】
表面粗さRaはJIS B 1601で示された方法で測定される。Raは2μm以下、特に1μm以下が好ましい。表面粗さRaが2μm以下であるため、表面での高周波の散乱が小さく、内部欠陥4の反射波を容易に探知できる。積層型セラミック素子の積層方向端面の平面度は形状偏差を示すもので、JIS B0621−1981で示された方法で測定される。平面度は100μm以下、特に80μm以下が好ましい。平坦度が100μm以下であるため、表面での高周波の散乱が小さく、内部欠陥4の反射波を容易に探知できる。
【0035】
図4(b)は、高周波の試料表面の表面粗さ並びに平面度が大きい場合において、高周波の散乱状態を模式的に示す。
【0036】
本発明では、プローブ6を用いて、ある欠陥サイズの人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコーを求めることが重要である。人工欠陥を内蔵した標準試料を用いることは、プローブ6の劣化や、高周波探傷装置の不具合を修正して、探知する欠陥サイズのばらつきを制御するためである。
【0037】
人工欠陥を内蔵した標準試料としては、積層したセラミック層2と同材からなることが好ましいが、SUSやスチール材を使用してもよい。人工欠陥は、測定精度を上げるためサイズが小さいほど好ましいが、高周波の入射方向に対して直交する方向のサイズ(セラミック層の面方向)の最大サイズが400μm以下であればよい。形状は、平板状が好ましいが、球形でもかまわない。尚、人工欠陥に高周波の焦点を合わせることが容易かつ短時間に行えるという点から、標準試料に内在する人工欠陥の位置(表面からの積層方向深さ)を把握することが重要である。つまり、高周波を入射する面からの距離を制御することが望ましい。
【0038】
人工欠陥の作製は、積層時にあらかじめ欠陥となる位置に特定したサイズの欠陥源を導入させて、脱バインダや焼成によって飛散または消失させて作製する。人工欠陥源の材質は、樹脂のような有機体で作製できるが、カーボン材でも構わない。
【0039】
これにより、一定の欠陥サイズに対する標準エコーを得ることができ、欠陥サイズに応じた標準エコーを得ることができる。
【0040】
この後、試料の理論上の欠陥サイズD1を求める。具体的に説明すると、図5に示すように、試料の上方に設けられたプローブ6から高周波を試料表面から内部に向けて入射させる。プローブ6の周波数は50MHz以上が好ましい。周波数が50MHz以上と高いため、収束するビーム径が小さくなり、欠陥サイズの焦点精度を高くでき、微小サイズの欠陥を探知し易くなる。
【0041】
内部欠陥4の抽出は、上記試料の入射表面より0.12mm以上の内部に焦点をあわせることが望ましい。0.12mm以上内部に焦点を合わせるため、表面形状のうねりや傾きの影響を受け難く、反射波の散乱が小さくなり、欠陥サイズの測定精度を向上できる。
【0042】
試料入射表面より0.12mm以上の内部に焦点をあわせた後にプローブ6を移動させながらスキャンニングを行う。プローブ6が移動するピッチ幅は、収束するビーム直径より小さければ、欠陥を見落とすことはない。焦点を合わせた面が終了すると、プローブを試料側にさらに近づけ、測定を行う。プローブを試料側に近づける距離は2mm以下が好ましい。試料側に近づける距離を一定間隔に保つ理由は、欠陥を見落とすことが無いようにするためである。測定する面は、底面側から行っても問題はない。
【0043】
このプローブ6を用いて、人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して、5%以上のエコー高さを有する欠陥エコーを抽出することが重要である。欠陥エコー高さが標準エコー高さの5%以上であるため、ノイズを拾う確率を低くできる。図5に欠陥エコーの一例を示す。
【0044】
図6に高周波の試料入射面の湾曲が及ぼす反射波の散乱状態を模式的に示す。(a)は散乱が小さく、(b)は散乱が大きくなる。試料に対して高周波を積層方向に入射しながら測定を行うことで、欠陥サイズの測定精度を向上できるが、試料表面、あるいは導体層が湾曲している場合、入射面の平面度が100μm/mm以下であることが望ましいが、高周波を照射する試料の表面に対して、直角度≦±0.5°となるようにプローブ6を3次元的に傾動させることが望ましい。この際、スキャンニングするプローブ6のピッチ幅は、収束した際のビーム直径以下、さらには1/2以下で測定することが好ましい。
【0045】
試料は、厚みが10mm以下、または導体層数が20層以下であることが好ましい。厚みが10mmより大きい範囲を測定する場合、測定範囲よりプローブ位置側に内部欠陥が多数存在すると、高周波の減衰が大きく、測定精度が低下する恐れがある。導体層数が20層よりも多い場合も上記と同様の問題が発生する。
【0046】
厚みが10mmより大きいか、または導体層数が20層以上である場合、試料の両面から測定を行う。つまり、試料の上下面から中心部までを検出することで測定精度を維持することができる。
【0047】
次に、欠陥エコーからセラミック層の積層方向に対して直交する方向における理論上の欠陥サイズD1を算出する。理論上の欠陥サイズD1は、例えば、欠陥エコーの発生している長さから求める。
【0048】
この後、上記標準エコーから、高周波の入射方向と直交する方向の欠陥サイズ(理論上の欠陥サイズ)を求めるとともに、実際に標準試料に存在する人工欠陥サイズ(高周波の入射方向と直交する方向の欠陥サイズ)を標準試料を切断して求め、理論上の欠陥サイズと、実際の欠陥サイズの関係を求めておく。
【0049】
本発明者は、標準試料のセラミック層をPZT系で作製し、導体層をAg−Pdで形成した場合、セラミック層をAl系で作製し、導体層をCuで形成した場合、セラミック層をSi系で作製し、導体層をWで形成した場合、セラミック層をBaTiO系で形成し、導体層をNiで形成した場合について、理論上の欠陥サイズD11と、実際の欠陥サイズD21を求め、それを、図7に示すようにプロットした。
【0050】
この図7から、標準試料に存在する実際の欠陥サイズD21は、標準エコーから求めた理論上の欠陥サイズD11に対して、理論上の欠陥サイズD11がD1≦200μmの場合、実際に内在する欠陥サイズD21をD11/10〜D11/1.5とし、D11>200μmの場合、欠陥サイズD21をD11/8〜D11/1.5として算出できることが判る。
【0051】
この工程は、標準試料における理論上の標準欠陥エコーを求める際に行っても良い。
【0052】
そして、算出された理論上の欠陥サイズD1が、D1≦200μmの場合、積層型セラミック部品に実際に内在する欠陥サイズD2をD1/10〜D1/1.5とし、D1>200μmの場合、欠陥サイズD2をD1/8〜D1/1.5として算出する。これにより、実際の試料に存在する欠陥サイズを精度良く求めることができる。
【0053】
また、本発明では、例えば、電子部品等を搭載していないセラミック基板、外部電極を形成していない積層セラミックコンデンサ、積層型圧電アクチュエータにおいて、セラミック層がPZT系、Al系、Si系、BaTiO系からなり、検出した理論上の欠陥サイズD1が、D1≦200μmの場合、D1/10の値が、例えば70μm以下を良品とし、D1>200μmの場合、D1/8の値が70μm以下を良品とし、それ以外を不良品として除去し、良品のみに電子部品等を搭載したり、外部電極を形成することができ、その後の電子部品の搭載や外部電極の形成工程を無駄にすることがない。
【0054】
尚、本発明における積層型セラミック素子とは、例えば電子部品等を搭載していないセラミック基板、外部電極を形成していない積層セラミックコンデンサ、積層型圧電アクチュエータ等がある。
【0055】
また、図7に示すように、セラミック層を構成する材料により、理論上の欠陥サイズD11と実際の欠陥サイズD21との間に特有の関係を有するため、セラミック層を構成する材料に応じて関係式を作製し、その関係式よりD2を算出することにより、さらにD2算出精度を向上できる。
【0056】
【実施例】
セラミック材料として、チタン酸ジルコン酸鉛Pb(Zr,Ti)O、アルミナAl、窒化珪素Si、チタン酸バリウムBaTiOのセラミックスの粉末と、有機高分子からなるバインダと、可塑剤とを混合したスラリーを作製し、スリップキャステイング法によりセラミックグリーンシートを作製した。
【0057】
このグリーンシートの片面に、導体層となる銀−パラジウム、銅、タングステン、ニッケルを主成分とする導電性ペーストをスクリーン印刷し、導体層パターンを形成した。この導体層パターンが形成されたグリーンシートを積層し、この積層体の上下面に、導電性ペーストを塗布していないグリーンシートを1〜10枚積層した。尚、表1中の積層数は、内部電極により挟持されたセラミック層の積層数を記載した。アルミナAl材および窒化珪素Si材は、密着液を塗布しながら積層を行った。
【0058】
次に、この積層型セラミック成形体を金型内に配置し100℃ので加熱を行いながら金型加圧、または、温水CIPを行い一体化し、3mm×3mm〜20×20mmの大きさに切断した後、300℃以上で10時間の脱バインダを行い、1000〜1800℃において2時間本焼成を行い、積層型セラミック素子を得た。
【0059】
得られた焼結体の外観を加工しながら表面粗さRaを変化させ、さらに平面度を変化させた。尚、気孔率は、JISR1634に基づいて測定し、その値を記載した。
【0060】
作製した積層型セラミック素子を高周波探傷装置の基盤上に載置して、表2に示す周波数の高周波プローブを用いて、素子表面から表2に示す距離だけ離れた位置に焦点を合わせて測定を行った。抽出した全ての内部欠陥の欠陥エコーに対して、標準エコーのエコー高さに対して表2に示す高さ以上のエコーを抽出し、この欠陥エコーから理論上の欠陥サイズD1を求め、D1≦200μmの場合、実際に内在する欠陥サイズD2をD1/10〜D1/1.5として求め、D1>200μmの場合、欠陥サイズD2をD1/8〜D1/1.5として求めるとともに、測定後の積層型セラミック素子を、平面研削盤、微細研磨、鏡面研磨を行いながら2〜3μm間隔でクロスカットを行い、欠陥のサイズを調査した。その結果を記載した。
【0061】
【表1】

Figure 2004325266
【0062】
【表2】
Figure 2004325266
【0063】
これらの表1、2から、表面粗さが粗い試料No.4では、15μmの欠陥を検知できなかった。また、プローブの周波数が50MHzより小さい試料No.11では、9μmの欠陥を検知できなかった。気孔率が8%である試料No.6では、39μmの欠陥を検知できなかった。
【0064】
また、周波数の高周波プローブを用いて、素子表面から表2に示す距離だけ離れた位置に焦点を合わせて測定を行い、その全ての内部欠陥の欠陥エコーから理論上の欠陥サイズD1を求めた(標準試料を用いず)比較例の試料No.5では、検知サイズD1に対して、実際のサイズとの相違が大きいことが判る。
【0065】
一方、本発明の試料では、算出されたD2の欠陥サイズが、実際の欠陥サイズに近似していることが判る。
【0066】
【発明の効果】
以上詳述した通り、本発明の積層型セラミック素子の検査法では、微小な内部欠陥のサイズを精度よく算出することができ、検査精度を向上させ、使用中や駆動中の部品特性劣化を抑制でき、耐久性に優れ、信頼性の高い積層型セラミック素子を提供できる。
【図面の簡単な説明】
【図1】内部欠陥が存在する積層型セラミック素子を、高周波探傷により内部欠陥サイズを測定する状態を示す縦断面図である。
【図2】内部欠陥が存在する積層型セラミック素子の一部を拡大して示す縦断面図である。
【図3】高周波探傷装置の概略図を示す。
【図4】試料の入射面の表面粗さ並びに平面度が及ぼす高周波の散乱状態を示すもので、(a)は散乱が殆どない状態を示し、(b)は散乱している状態を示す説明図である。
【図5】試料における内部欠陥を測定する状態を示す説明図である。
【図6】試料の高周波入射面が及ぼす高周波の散乱状態を示すもので、(a)は散乱が小さく、(b)は散乱が大きくなる状態を示す説明図である。
【図7】標準試料のエコーから求めた理論上の欠陥サイズと、実際の欠陥サイズとの関係を示すグラフである。
【符号の説明】
1・・・積層型セラミック素子
2・・・セラミック層
3・・・導体層
4・・・内部欠陥
6・・・プローブ
D1・・・測定より求めた理論上の欠陥サイズ
D2・・・算出により求めた実際に内在する欠陥サイズ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for inspecting a multilayer ceramic element and a method for manufacturing a multilayer ceramic component.
[0002]
[Prior art]
A laminated ceramic element in which ceramic layers and conductor layers are alternately laminated is, for example, a plurality of green sheets on which an internal electrode pattern containing an internal electrode material is formed, and after pressing and integrating the green sheets, degreasing, It was produced by firing. The multilayer ceramic component has been configured by forming external electrodes connected to the conductor layers on the side surfaces of the multilayer ceramic element.
[0003]
In order to satisfy such various characteristics, such a laminated ceramic component is subjected to a characteristic inspection and a general inspection, and only non-defective products are packed and shipped. In particular, in order to inspect a defect inside a multilayer ceramic component, inspection using ultrasonic flaw detection has been conventionally performed to screen non-defective products (see Patent Document 1).
[0004]
In this inspection method, it is described that the presence or absence and size of an air layer (void) can be detected by applying a high frequency to the multilayer ceramic component and analyzing the reflected wave.
[0005]
[Patent Document 1]
JP-A-5-36567
[0006]
[Problems to be solved by the invention]
However, according to the inspection method of Patent Document 1, although the presence / absence, existence position, and size of the air layer can be detected to some extent, the defect size actually present inside the multilayer ceramic component cannot be obtained accurately. Strict quality judgment could not be performed.
[0007]
In other words, in recent years, with the thinning of ceramic layers, multi-layer lamination, high integration and miniaturization, the demand for higher quality of parts has become more and more strict, and more strict quality judgment has been required. However, in the conventional inspection method, irregular reflection of high frequency on the surface of the multilayer ceramic component and irregular reflection due to minute internal defects (voids) in the ceramic layer have caused a problem in the conventional inspection method. Although the defect size can be accurately obtained to some extent, the defect size of a small internal defect, for example, an internal defect whose size in a direction perpendicular to the laminating direction is 100 μm or less cannot be obtained accurately.
[0008]
An object of the present invention is to provide a method for inspecting a multilayer ceramic element and a method for manufacturing a multilayer ceramic component, which can accurately calculate the defect size of a minute internal defect.
[0009]
[Means for Solving the Problems]
The inventor of the present invention has determined that the size of a minute internal defect existing in a multilayer ceramic element in a direction perpendicular to the stacking direction is determined by the multilayer ceramic element having a porosity of 5% or less and a high frequency incident. The surface roughness of the ceramic element is set to 2 μm or less, and high-frequency wave can be incident on the surface of the multilayer ceramic element at almost right angles to be detected. There is a certain relationship between the defect size of the defect and the theoretical defect size D1 calculated from the defect echo, and the defect size D2 calculated based on the relationship is close to the actual internal defect size. This led to the present invention.
[0010]
That is, the inspection method of the multilayer ceramic element according to the present invention uses a probe having a frequency of 50 MHz or more provided above the multilayer ceramic element having a porosity of 5% or less and having a conductor layer inside. Into a position within a fixed distance from the surface of the multilayer ceramic element having a surface roughness Ra of 2 μm or less, and so as to be substantially perpendicular to the surface of the multilayer ceramic element, thereby causing artificial defects. A defect echo having a height of 5% or more with respect to a standard echo height of the built-in standard sample when focusing on the artificial defect is extracted, and a defect echo in a direction orthogonal to the stacking direction calculated from the defect echo is extracted. Based on the defect size D1 and the relationship between the defect size of the artificial defect obtained from the standard echo and the actual defect size of the artificial defect, the multilayer ceramic element is And calculates the direction of the defect size D2 orthogonal to the stacking direction present.
[0011]
According to such an inspection method, even in the case of a multilayer ceramic element having a conductor layer inside, a multilayer ceramic element having a porosity of 5% or less and a high frequency with a surface roughness Ra of 2 μm or less is used. By making the light incident from the element surface at a right angle to the surface of the multilayer ceramic element, diffuse reflection on the high-frequency incidence surface of the multilayer ceramic element and diffuse reflection inside the multilayer ceramic element can be sufficiently suppressed, and the Thus, a high-frequency reflected wave (defect echo) from an internal defect (void) whose length in the direction perpendicular to the direction is minute can be sufficiently detected. The inspection method of the present invention may be used for a multilayer ceramic component in which an external electrode is formed on a multilayer ceramic element, and can be suitably used as long as a conductor layer and a ceramic layer are laminated.
[0012]
In addition, a standard sample containing an artificial defect was prepared, a standard echo when focusing on the artificial defect was obtained, and a theoretical defect size in a direction orthogonal to the stacking direction of the artificial defect was obtained from the standard echo. Then, the defect size in the direction perpendicular to the stacking direction of the artificial defects actually present inside the sample is measured, and the relationship between the theoretical defect size and the actual defect size is determined.
[0013]
On the other hand, a defect echo having a height of 5% or more with respect to the standard echo height when focusing on the artificial defect of the standard sample is extracted, and the defect echo of the multilayer ceramic element is extracted from the defect echo of the multilayer ceramic element. The theoretical defect size D1 in the direction orthogonal to the stacking direction is obtained. Thereafter, from the relationship between the theoretical defect size and the actual defect size of the standard sample, the defect size D2 in the direction orthogonal to the stacking direction, which actually exists in the multilayer ceramic element, is calculated. The defect size of the minute internal defect (void) can be obtained with high accuracy.
[0014]
Further, in the inspection method of the multilayer ceramic element of the present invention, the ceramic layer of the multilayer ceramic element is made of PZT-based, Al 2 O 3 System, Si 3 N 4 System, BaTiO 3 When D1 ≦ 200 μm, the defect size D2 actually existing in the multilayer ceramic element is D1 / 10 to D1 / 1.5, and when D1> 200 μm, the defect size D2 is D1 / 8 to D1. /1.5.
[0015]
In such an inspection method, the ceramic layer of the multilayer ceramic element is made of PZT, 2 O 3 System, Si 3 N 4 System, BaTiO 3 In the case of a system, the defect size actually existing in the multilayer ceramic element can be obtained with high accuracy, the product can be sorted by the defect size, and strict quality judgment can be performed, thereby achieving high reliability. Can be provided.
[0016]
Further, in the method for inspecting a multilayer ceramic element according to the present invention, the multilayer ceramic element has a thickness in the stacking direction of 10 mm or more, or the number of conductor layers is 20 or more, and from the upper and lower surfaces in the stacking direction of the multilayer ceramic element. It is characterized in that a defect size D2 is calculated by injecting high frequency.
[0017]
In a laminated ceramic element having a thickness in the lamination direction of 10 mm or more, or a conductor layer number of 20 or more, it is difficult to focus only on high-frequency incidence from one side, or a clear reflected wave is obtained. However, according to the present invention, since high-frequency waves are incident from both sides in the stacking direction of the multilayer ceramic element and the defect size D2 existing from each surface to the central portion can be obtained, the entire defect size can be obtained. D2 can be calculated with high accuracy.
[0018]
Further, the inspection method of the multilayer ceramic element of the present invention is characterized in that an internal defect whose length in a direction orthogonal to the laminating direction of the multilayer ceramic element is 6 to 300 μm is detected. In such an inspection method, the yield of a product can be improved by accurately calculating the defect size of a fine internal defect, and a multilayer ceramic element having higher reliability can be provided.
[0019]
According to the method for manufacturing a multilayer ceramic component of the present invention, a high frequency surface roughness is applied to a multilayer ceramic element having a conductor layer inside and having a porosity of 5% or less by using a probe having a frequency of 50 MHz or higher provided above the stacking direction. A standard sample having an artificial defect built-in so as to focus on a position within a fixed distance from the surface of the multilayer ceramic element having a Ra of 2 μm or less and to be perpendicular to the surface of the multilayer ceramic element. A defect echo having a height of 5% or more with respect to a standard echo height when focusing on the artificial defect is extracted, and a defect size D1 in a direction orthogonal to the stacking direction calculated from the defect echo is obtained. The laminated ceramic element having a predetermined value or more is removed, and an external electrode connected to the conductor layer is formed on the non-defective laminated ceramic element.
[0020]
In such a method of manufacturing a multilayer ceramic component, as described above, the theoretical defect size D1 in the direction orthogonal to the stacking direction and the theoretical defect size in the standard sample are obtained from the defect echo of the multilayer ceramic element. From the relationship between the defect size and the actual defect size, it is possible to estimate the defect size in the direction perpendicular to the stacking direction, which is actually present in the multilayer ceramic element, so that the theoretical defect size D1 due to the defect echo is not less than a predetermined value. By removing the multilayer ceramic element, an external electrode connected to the conductor layer can be formed on the non-defective multilayer ceramic element, and the yield of the multilayer ceramic component can be improved.
[0021]
The method for manufacturing a multilayer ceramic component of the present invention is characterized in that the ceramic layer of the multilayer ceramic element is made of PZT, Al 2 O 3 System, Si 3 N 4 System, BaTiO 3 When D1 ≦ 200 μm, D1 / 10 is equal to or smaller than a predetermined value, and when D1> 200 μm, D1 / 8 is equal to or smaller than a predetermined value.
[0022]
In such a method for manufacturing a multilayer ceramic component, a multilayer ceramic component having high characteristics and high reliability can be provided by accurately separating a multilayer ceramic element having a defect of a predetermined size.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a longitudinal sectional view showing a state in which the multilayer ceramic element is subjected to high-frequency flaw detection. FIG. 2 is an enlarged view of a part of the multilayer ceramic element (hereinafter, sometimes referred to as a sample) in FIG. FIG. 3 is a schematic view of a high-frequency flaw detector.
[0024]
As shown in FIGS. 1 and 3, the defect size of an internal defect is measured by high-frequency flaw detection. As shown in FIGS. 1 and 3, a high-frequency wave converged by an acoustic lens is emitted from a probe 6 to which a pulse voltage is repeatedly applied. The reflected wave (reflected sound) reflected by the internal defect 4 of the immersed sample and returned as shown in FIG. 3 is output to the receiver as a voltage. The signal input to the receiver is amplified and output to the detector.
[0025]
In the detector, the peak value is output as a DC voltage via a detection circuit in order to process the reflected wave of the defective portion to be imaged. While the AD conversion of the DC voltage is performed during the operation, the converted value is subjected to arithmetic processing, stored in the memory, and the operation image is displayed. The display monitors the reflected wave, and can observe the echo of the internal defect in addition to the transmitted wave.
[0026]
As shown in FIG. 1, when the echo is focused on the reflection source due to the internal defect 4, a strong reflected echo is obtained.
[0027]
High-frequency waves are reflected by the surface of the sample, the difference in density, and conductor layers and foreign substances with different transmittances when they are incident on the sample. It becomes easier to detect the reflected wave due to the defect.
[0028]
The laminated ceramic element 1 as shown in FIG. 1 in which the ceramic layer 2 and the conductor layer 3 are laminated is a sample with large attenuation, and the reflection of high frequency is scattered and diffused as the number of voids of several μm or less exists. The attenuation of the wave increases, making it difficult to detect the reflected wave due to the defect.
[0029]
Such a multilayer ceramic element 1 is formed by alternately stacking a plurality of ceramic layers 2 and a plurality of conductor layers 3, and has an internal defect 4. It is desirable to use a laminated ceramic element (sample) having a porosity of 5% or less, preferably 3% or less. When the porosity is 5% or less, scattering of high-frequency reflected waves is suppressed, and reflected waves that become defects can be easily detected.
[0030]
The ceramics layer 2 may be made of any ceramics. For example, lead zirconate titanate Pb (Zr, Ti) O 3 (Hereinafter abbreviated as PZT), barium titanate BaTiO 3, Alumina Al 2 O 3 , Silicon nitride Si 3 N 4 A ceramic material or the like whose main component is is used, but is not limited thereto.
[0031]
The conductive layer 3 is made of, for example, a conductive paste, foil, plate, film, resin, or net-like material containing Ag, Al, Au, Cu, Ni, Pd, and W as main components, but is not limited thereto. It is not a thing and the resistivity is 10 -3 Any value may be used as long as it is Ωm or less.
[0032]
High-frequency waves are incident on such a sample from the surface toward the inside, and an internal defect size of, for example, 6 to 300 μm is obtained. The defect size to be measured is preferably 6 μm or more, particularly preferably 8 μm or more. Since the ceramic layer 2 and the conductor layer 3 having a large difference in density are laminated, high-frequency scattering is large, and furthermore, due to the multilayer wiring of the conductor layer and the formation of through holes, the attenuation is extremely large, and defects smaller than 6 μm are: This is because it is difficult to detect.
[0033]
As shown in FIG. 4A, the sample to be subjected to the present invention has a high-frequency incident surface having a surface roughness Ra of 2 μm or less and an incident surface having a flatness of 100 μm / mm. 2 It is desirable that:
[0034]
The surface roughness Ra is measured by the method shown in JIS B 1601. Ra is preferably 2 μm or less, particularly preferably 1 μm or less. Since the surface roughness Ra is 2 μm or less, high-frequency scattering on the surface is small, and the reflected wave of the internal defect 4 can be easily detected. The flatness of the end face in the stacking direction of the multilayer ceramic element indicates a shape deviation, and is measured by a method described in JIS B0621-1981. The flatness is preferably 100 μm or less, particularly preferably 80 μm or less. Since the flatness is 100 μm or less, high-frequency scattering on the surface is small, and the reflected wave of the internal defect 4 can be easily detected.
[0035]
FIG. 4B schematically shows a high-frequency scattering state when the surface roughness and flatness of the high-frequency sample surface are large.
[0036]
In the present invention, it is important to use the probe 6 to obtain a standard echo when the artificial defect of a standard sample containing an artificial defect of a certain defect size is focused on the artificial defect. The use of the standard sample containing the artificial defect is for correcting the deterioration of the probe 6 and the defect of the high-frequency flaw detector to control the variation in the size of the defect to be detected.
[0037]
It is preferable that the standard sample containing the artificial defect is made of the same material as the laminated ceramic layer 2, but SUS or a steel material may be used. The artificial defect is preferably as small as possible in order to increase the measurement accuracy, but it is sufficient that the maximum size of the size in the direction orthogonal to the incident direction of the high frequency (the surface direction of the ceramic layer) is 400 μm or less. The shape is preferably a flat plate shape, but may be a spherical shape. In addition, it is important to grasp the position (depth in the stacking direction from the surface) of the artificial defect existing in the standard sample, since it is possible to easily focus the high frequency on the artificial defect in a short time. That is, it is desirable to control the distance from the surface on which the high frequency is incident.
[0038]
An artificial defect is produced by introducing a defect source of a specified size into a position where a defect is caused in advance at the time of lamination, and scattering or eliminating the defect by binder removal or firing. The material of the artificial defect source can be made of an organic material such as a resin, but may be a carbon material.
[0039]
This makes it possible to obtain a standard echo for a certain defect size, and to obtain a standard echo corresponding to the defect size.
[0040]
Thereafter, the theoretical defect size D1 of the sample is determined. More specifically, as shown in FIG. 5, a probe 6 provided above the sample causes a high frequency to be incident from the sample surface toward the inside. The frequency of the probe 6 is preferably 50 MHz or more. Since the frequency is as high as 50 MHz or more, the converging beam diameter becomes smaller, the focus accuracy of the defect size can be increased, and it becomes easier to detect a minute-sized defect.
[0041]
The extraction of the internal defect 4 is desirably focused on the inside of 0.12 mm or more from the incident surface of the sample. Since the focus is set to 0.12 mm or more inside, it is hardly affected by the undulation and inclination of the surface shape, the scattering of the reflected wave is reduced, and the measurement accuracy of the defect size can be improved.
[0042]
After focusing on the inside of 0.12 mm or more from the sample incident surface, scanning is performed while moving the probe 6. If the pitch width at which the probe 6 moves is smaller than the converging beam diameter, the defect will not be overlooked. When the focused surface is completed, the probe is brought closer to the sample side and the measurement is performed. The distance for bringing the probe closer to the sample side is preferably 2 mm or less. The reason why the distance approaching the sample side is kept constant is to prevent a defect from being overlooked. There is no problem if the measurement is performed from the bottom side.
[0043]
It is important to use this probe 6 to extract a defect echo having an echo height of 5% or more of the standard echo height of the standard sample containing the artificial defect when focusing on the artificial defect. It is. Since the defect echo height is 5% or more of the standard echo height, the probability of picking up noise can be reduced. FIG. 5 shows an example of the defect echo.
[0044]
FIG. 6 schematically shows a scattering state of a reflected wave exerted by the curvature of the high-frequency sample incidence surface. (A) has small scattering, and (b) has large scattering. The measurement accuracy of the defect size can be improved by performing the measurement while applying a high frequency to the sample in the stacking direction. However, when the sample surface or the conductor layer is curved, the flatness of the incident surface is 100 μm / mm. 2 Preferably, the probe 6 is tilted three-dimensionally with respect to the surface of the sample to be irradiated with the high frequency so that the perpendicularity ≤ ± 0.5 °. At this time, it is preferable that the pitch width of the probe 6 to be scanned is measured at the beam diameter at the time of convergence or less, more preferably at 1/2 or less.
[0045]
The sample preferably has a thickness of 10 mm or less, or the number of conductor layers is 20 or less. When measuring a range where the thickness is larger than 10 mm, if there are many internal defects on the probe position side of the measurement range, high frequency attenuation may be large and measurement accuracy may be reduced. When the number of conductor layers is more than 20, the same problem as described above occurs.
[0046]
When the thickness is larger than 10 mm or the number of conductor layers is 20 or more, the measurement is performed from both sides of the sample. In other words, measurement accuracy can be maintained by detecting from the upper and lower surfaces of the sample to the center.
[0047]
Next, a theoretical defect size D1 in a direction orthogonal to the laminating direction of the ceramic layers is calculated from the defect echo. The theoretical defect size D1 is obtained, for example, from the length at which the defect echo occurs.
[0048]
Thereafter, from the standard echo, the defect size (theoretical defect size) in the direction orthogonal to the high-frequency incidence direction is determined, and the artificial defect size (the direction perpendicular to the high-frequency incidence direction) actually existing in the standard sample is determined. The defect size is determined by cutting the standard sample, and the relationship between the theoretical defect size and the actual defect size is determined.
[0049]
The present inventor prepared a ceramic layer of a standard sample in a PZT system and formed a conductor layer of Ag-Pd. 2 O 3 When the conductor layer is formed of Cu and the ceramic layer is formed of Si, 3 N 4 When the conductor layer is made of W and the ceramic layer is made of BaTiO 3 The theoretical defect size D11 and the actual defect size D21 were obtained for the case where the conductor layer was formed of Ni and the conductor layer was formed of Ni, and the plotted values were plotted as shown in FIG.
[0050]
From FIG. 7, the actual defect size D21 existing in the standard sample is smaller than the theoretical defect size D11 obtained from the standard echo when the theoretical defect size D11 is D1 ≦ 200 μm. It can be seen that when the size D21 is D11 / 10 to D11 / 1.5 and D11> 200 μm, the defect size D21 can be calculated as D11 / 8 to D11 / 1.5.
[0051]
This step may be performed when obtaining a theoretical standard defect echo in the standard sample.
[0052]
When the calculated theoretical defect size D1 is D1 ≦ 200 μm, the defect size D2 actually existing in the multilayer ceramic component is D1 / 10 to D1 / 1.5, and when D1> 200 μm, the defect size is The size D2 is calculated as D1 / 8 to D1 / 1.5. As a result, the size of a defect existing in an actual sample can be accurately obtained.
[0053]
Further, in the present invention, for example, in a ceramic substrate on which no electronic component or the like is mounted, a multilayer ceramic capacitor in which no external electrode is formed, and a multilayer piezoelectric actuator, the ceramic layer is made of PZT, Al 2 O 3 System, Si 3 N 4 System, BaTiO 3 If the detected theoretical defect size D1 is D1 ≦ 200 μm, the D1 / 10 value is, for example, 70 μm or less, and if D1> 200 μm, the D1 / 8 value is 70 μm or less. The other parts are removed as defective products, and electronic components and the like can be mounted only on non-defective products, or external electrodes can be formed, and subsequent mounting of electronic components and formation of external electrodes are not wasted. .
[0054]
The multilayer ceramic element in the present invention includes, for example, a ceramic substrate on which no electronic components are mounted, a multilayer ceramic capacitor without external electrodes, a multilayer piezoelectric actuator, and the like.
[0055]
Further, as shown in FIG. 7, since the material forming the ceramic layer has a specific relationship between the theoretical defect size D11 and the actual defect size D21, the relationship depends on the material forming the ceramic layer. By preparing an equation and calculating D2 from the relational equation, the D2 calculation accuracy can be further improved.
[0056]
【Example】
Lead zirconate titanate Pb (Zr, Ti) O as ceramic material 3 , Alumina Al 2 O 3 , Silicon nitride Si 3 N 4 , Barium titanate BaTiO 3 A slurry was prepared by mixing a ceramic powder, a binder made of an organic polymer, and a plasticizer, and a ceramic green sheet was prepared by a slip casting method.
[0057]
On one surface of the green sheet, a conductive paste mainly composed of silver-palladium, copper, tungsten and nickel serving as a conductive layer was screen-printed to form a conductive layer pattern. Green sheets on which the conductor layer pattern was formed were laminated, and 1 to 10 green sheets on which no conductive paste was applied were laminated on the upper and lower surfaces of the laminate. The number of laminations in Table 1 indicates the number of laminations of the ceramic layers sandwiched between the internal electrodes. Alumina Al 2 O 3 Material and silicon nitride Si 3 N 4 The materials were laminated while applying a contact liquid.
[0058]
Next, the laminated ceramic molded body was placed in a mold, and was heated at 100 ° C. while being pressed, or subjected to hot water CIP to be integrated, and cut into a size of 3 mm × 3 mm to 20 × 20 mm. Thereafter, binder removal was performed at 300 ° C. or higher for 10 hours, and main firing was performed at 1000 to 1800 ° C. for 2 hours to obtain a multilayer ceramic element.
[0059]
The surface roughness Ra was changed while processing the appearance of the obtained sintered body, and the flatness was further changed. In addition, the porosity was measured based on JISR1634, and the value was described.
[0060]
The prepared multilayer ceramic element was placed on the base of a high-frequency flaw detector, and the measurement was performed using a high-frequency probe having the frequency shown in Table 2 while focusing on a position shown in Table 2 at a distance from the element surface. went. With respect to the defect echoes of all the internal defects thus extracted, echoes having a height equal to or higher than the height of the standard echo shown in Table 2 are extracted, and a theoretical defect size D1 is obtained from the defect echo, and D1 ≦ In the case of 200 μm, the defect size D2 actually existing is determined as D1 / 10 to D1 / 1.5, and in the case of D1> 200 μm, the defect size D2 is determined as D1 / 8 to D1 / 1.5, and after the measurement, The laminated ceramic element was cross-cut at intervals of 2 to 3 μm while performing a surface grinder, fine polishing, and mirror polishing, and the size of a defect was investigated. The results are described.
[0061]
[Table 1]
Figure 2004325266
[0062]
[Table 2]
Figure 2004325266
[0063]
From these Tables 1 and 2, Sample No. having a rough surface roughness was obtained. In No. 4, a 15 μm defect could not be detected. Further, the sample No. having a probe frequency lower than 50 MHz was used. In No. 11, a 9 μm defect could not be detected. Sample No. having a porosity of 8%. In No. 6, a defect of 39 μm could not be detected.
[0064]
Further, using a high-frequency probe having a frequency, measurement was performed by focusing on a position away from the element surface by the distance shown in Table 2, and a theoretical defect size D1 was obtained from defect echoes of all the internal defects ( (No standard sample was used.) 5, it can be seen that the difference between the detected size D1 and the actual size is large.
[0065]
On the other hand, in the sample of the present invention, it can be seen that the calculated defect size of D2 is close to the actual defect size.
[0066]
【The invention's effect】
As described in detail above, the method for inspecting a multilayer ceramic element according to the present invention can accurately calculate the size of a minute internal defect, improve the inspection accuracy, and suppress the deterioration of component characteristics during use or driving. It is possible to provide a laminated ceramic element having excellent durability and high reliability.
[Brief description of the drawings]
FIG. 1 is a longitudinal sectional view showing a state in which the size of an internal defect is measured by high frequency flaw detection of a multilayer ceramic element having an internal defect.
FIG. 2 is an enlarged longitudinal sectional view showing a part of a multilayer ceramic element having an internal defect.
FIG. 3 shows a schematic diagram of a high-frequency flaw detector.
FIGS. 4A and 4B show a high-frequency scattering state exerted by the surface roughness and flatness of an incident surface of a sample, wherein FIG. 4A shows a state where there is almost no scattering and FIG. FIG.
FIG. 5 is an explanatory diagram showing a state of measuring an internal defect in a sample.
6A and 6B are diagrams illustrating a high-frequency scattering state exerted by a high-frequency incident surface of a sample, in which FIG. 6A is a state in which scattering is small and FIG. 6B is a state in which scattering is large.
FIG. 7 is a graph showing a relationship between a theoretical defect size obtained from an echo of a standard sample and an actual defect size.
[Explanation of symbols]
1 .... Laminated ceramic element
2 ・ ・ ・ Ceramic layer
3 ... conductor layer
4: Internal defect
6 ... Probe
D1 ... Theoretical defect size obtained from measurement
D2: actual defect size found by calculation

Claims (6)

内部に導体層を有する気孔率5%以下の積層型セラミック素子に、その積層方向上方に設けられた周波数50MHz以上のプローブを用いて、高周波を表面粗さRaが2μm以下の前記積層型セラミック素子表面から一定距離内部の位置に焦点をあわせるように、かつ前記積層型セラミック素子表面に対してほぼ直角となるように入射させ、人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して5%以上の高さの欠陥エコーを抽出し、該欠陥エコーから算出した積層方向に対して直交する方向の欠陥サイズD1、及び前記標準エコーから求めた人工欠陥の欠陥サイズと実際の人工欠陥の欠陥サイズとの関係に基づき、前記積層型セラミック素子内部に実際に存在する積層方向に対して直交する方向の欠陥サイズD2を算出することを特徴とする積層型セラミック素子の検査法。Using a probe having a porosity of 5% or less having a conductor layer inside and a probe having a frequency of 50 MHz or more provided above the laminating direction, applying a high frequency to the laminated ceramic element having a surface roughness Ra of 2 μm or less. When focused on a position within a fixed distance from the surface and incident so as to be substantially perpendicular to the surface of the multilayer ceramic element, and focused on the artificial defect of the standard sample incorporating the artificial defect , A defect echo having a height of 5% or more with respect to the standard echo height is extracted, a defect size D1 in a direction orthogonal to the stacking direction calculated from the defect echo, and an artificial defect obtained from the standard echo are determined. Based on the relationship between the defect size and the actual defect size of the artificial defect, a defect in a direction orthogonal to the lamination direction actually existing inside the multilayer ceramic element is obtained. Tests of the multilayer ceramic element and calculates a size D2. 積層型セラミック素子のセラミック層がPZT系、Al系、Si系、BaTiO系からなり、D1≦200μmの場合、前記積層型セラミック素子に実際に内在する欠陥サイズD2をD1/10〜D1/1.5とし、D1>200μmの場合、欠陥サイズD2をD1/8〜D1/1.5として算出することを特徴とする請求項1記載の積層型セラミック素子の検査法。When the ceramic layer of the multilayer ceramic element is made of PZT, Al 2 O 3 , Si 3 N 4 , or BaTiO 3 and D1 ≦ 200 μm, the defect size D2 actually existing in the multilayer ceramic element is D1 2. The method according to claim 1, wherein the defect size D2 is calculated as D1 / 8 to D1 / 1.5 when D1> 200 μm and D1> 200 μm. 積層型セラミック素子は、積層方向厚みが10mm以上、または導体層数が20層以上であり、前記積層型セラミック素子の積層方向における上下面から高周波を入射して、欠陥サイズD2を算出することを特徴とする請求項1又は2記載の積層型セラミック素子の検査法。The multilayer ceramic element has a thickness in the stacking direction of 10 mm or more, or the number of conductor layers is 20 or more, and calculates the defect size D2 by applying high frequency from upper and lower surfaces in the stacking direction of the multilayer ceramic element. The method for inspecting a multilayer ceramic element according to claim 1 or 2, wherein: 積層型セラミック素子の積層方向に対して直交する方向の長さが6〜300μmの内部欠陥を検出することを特徴とする請求項1乃至3のうちいずれかに記載の積層型セラミック素子の検査法。4. The method for inspecting a multilayer ceramic device according to claim 1, wherein an internal defect whose length in a direction perpendicular to the laminating direction of the multilayer ceramic device is 6 to 300 [mu] m is detected. . 内部に導体層を有する気孔率5%以下の積層型セラミック素子に、その積層方向上方に設けられた周波数50MHz以上のプローブを用いて、高周波を表面粗さRaが2μm以下の前記積層型セラミック素子表面から一定距離内部の位置に焦点をあわせるように、かつ前記積層型セラミック素子表面に対して直角となるように入射させ、人工欠陥を内蔵した標準試料の前記人工欠陥に焦点を合わせたときの標準エコー高さに対して5%以上の高さの欠陥エコーを抽出し、該欠陥エコーから算出した積層方向に対して直交する方向の欠陥サイズD1が所定値以上の前記積層型セラミック素子を除去し、良品のみの積層型セラミック素子に、前記導体層と接続する外部電極を形成することを特徴とする積層型セラミック部品の製法。Using a probe having a porosity of 5% or less having a conductor layer inside and a probe having a frequency of 50 MHz or more provided above the laminating direction, applying a high frequency to the laminated ceramic element having a surface roughness Ra of 2 μm or less. When focused on a position within a certain distance from the surface, and incident so as to be perpendicular to the surface of the multilayer ceramic element, when focusing on the artificial defect of a standard sample incorporating an artificial defect A defect echo having a height of 5% or more with respect to the standard echo height is extracted, and the multilayer ceramic element having a defect size D1 in a direction orthogonal to the lamination direction calculated from the defect echo that is equal to or more than a predetermined value is removed. And forming an external electrode to be connected to the conductor layer on a non-defective multilayer ceramic element. 積層型セラミック素子のセラミック層がPZT系、Al系、Si系、BaTiO系からなり、D1≦200μmの場合、D1/10の値が所定値以下を良品とし、D1>200μmの場合、D1/8の値が所定値以下を良品とすることを特徴とする請求項5記載の積層型セラミック部品の製法。When the ceramic layer of the multilayer ceramic element is made of PZT, Al 2 O 3 , Si 3 N 4 , or BaTiO 3 , and D1 ≦ 200 μm, the value of D1 / 10 is regarded as a non-defective product when the value of D1 / 10 is equal to or less than a predetermined value. 6. The method for producing a multilayer ceramic component according to claim 5, wherein, when the thickness is 200 [mu] m, the value of D1 / 8 is equal to or less than a predetermined value, which is regarded as a non-defective product.
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Publication number Priority date Publication date Assignee Title
CN104535661A (en) * 2014-10-24 2015-04-22 广西电网公司电力科学研究院 A manufacturing method of a special-purpose flaw simulation test block for a charged vibration flaw detector
KR20180085191A (en) * 2017-01-18 2018-07-26 한국전자통신연구원 Method for scanning laminated material using magnetism and apparatus using the same
CN111208195A (en) * 2018-11-22 2020-05-29 中国航发商用航空发动机有限责任公司 Detection structure and detection method for adhesive bonding quality
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104535661A (en) * 2014-10-24 2015-04-22 广西电网公司电力科学研究院 A manufacturing method of a special-purpose flaw simulation test block for a charged vibration flaw detector
CN104535661B (en) * 2014-10-24 2017-12-12 广西电网公司电力科学研究院 A kind of preparation method with the special defects simulation test block of electric oscillation defectoscope
KR20180085191A (en) * 2017-01-18 2018-07-26 한국전자통신연구원 Method for scanning laminated material using magnetism and apparatus using the same
KR102002800B1 (en) * 2017-01-18 2019-07-23 한국전자통신연구원 Method for scanning laminated material using magnetism and apparatus using the same
US10830733B2 (en) 2017-01-18 2020-11-10 Electronics And Telecommunications Research Institute Method for scanning multilayer material using magnetism and apparatus using the same
CN111208195A (en) * 2018-11-22 2020-05-29 中国航发商用航空发动机有限责任公司 Detection structure and detection method for adhesive bonding quality
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