JP2004320094A

JP2004320094A - Integration time stabilizing a/d converter

Info

Publication number: JP2004320094A
Application number: JP2003107223A
Authority: JP
Inventors: Koji Oguma; 耕二小熊; Masahito Nakada; 雅人中田
Original assignee: Tanita Corp
Current assignee: Tanita Corp
Priority date: 2003-04-11
Filing date: 2003-04-11
Publication date: 2004-11-11
Anticipated expiration: 2023-04-11
Also published as: JP4071665B2

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integration time stabilizing A/D converter for performing analog/digital processing while stabilizing the integration time. <P>SOLUTION: The converter repeats processing in which an integration voltage of this period based on a first input adjustment voltage VPP from an input adjustment voltage switching device and a detection voltage Vx from an amplifier A1 for amplification is output in an integrator, a rising gradient time THn in an integrating time Tmn of the next period of the integrating voltage outputted from the integrator is calculated in an operation section, the first input adjustment voltage VPP from the input adjustment voltage switching device is switched and controlled in a control section, and the rising gradient time THn in the integrating time Tmn in the next period is outputted from the integrator. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、積分時間を一定化しながらアナログ／デジタル変換処理をする積分時間一定化Ａ／Ｄ変換器に関する。
【０００２】
【従来の技術】
従来、秤その他の計測器に内蔵する二重積分型Ａ／Ｄ変換器は、この一部として構成する二重積分器にセンサから出力した検出電圧を入力し積分すると、図６（ａ）の検出電圧の大きさが小さいときの二重積分器出力の波形図、図６（ｂ）の検出電圧の大きさが中ぐらいのときの二重積分器出力の波形図、図６（ｃ）の検出電圧の大きさが大きいときの二重積分器出力の波形図に示すような出力電圧ＶＯＵＴが二重積分器から出力するというものであった。すなわち、二重積分型Ａ／Ｄ変換器は、積分基準電圧ＶＣＯＭからの波形の立上り勾配時間ＴＨについては予め決められているので常に一定であるが、立下り勾配時間ＴＬについては検出電圧の大きさに比例して変化するために、二重積分器から出力電圧ＶＯＵＴを出力する際の積分時間Ｔｍが検出電圧の大きさに従って変化するというものであった。
【０００３】
例えば、特許文献１に見られるような二重積分型Ａ／Ｄ変換器は、上記のように、検出電圧の大きさに比例して積分時間の立下り勾配時間（第２積分ステージＴｍ）が変化するものである。
【０００４】
【特許文献１】
特開平６−２２４７６６号公報
【０００５】
【発明が解決しようとする課題】
しかしながら、上述した二重積分型Ａ／Ｄ変換器は、重心動揺計その他の連続して等間隔の時系列データを取得する装置に利用する場合には、検出電圧の大きさに比例して積分時間の立下り勾配時間が変化するために、取得するデータ数が増減し、検出電圧の大きさに応じて結果の信頼度合いが異なるという問題があった。
【０００６】
そこで、本発明は、上記のような従来の問題点を解決することを目的とするもので、積分時間を一定化しながらアナログ／デジタル変換処理をする積分時間一定化Ａ／Ｄ変換器を提供することを課題とする。
【０００７】
【課題を解決するための手段】
上記課題を達成するために、本発明の積分時間一定化Ａ／Ｄ変換器は、異なる２段階の入力調整電圧を切替出力する入力調整電圧切替器と、前記入力調整電圧切替器で切替出力した異なる２段階の入力調整電圧と測定対象の状態を検出変換した検出電圧とを入力し積分電圧を出力する積分器と、前記積分器で出力した積分電圧を入力し比較基準電圧と比較して高低の一定電圧を出力する比較器と、前記比較器で出力した高低の一定電圧の変化に基因して、前記積分器で出力した積分電圧における立上り勾配時間と立下り勾配時間とから成る積分時間を計測する計時部と、前記積分器に入力調整電圧と検出電圧とを入力した際の今回周期の積分時間における立上り勾配時間と、前記計時部で計測した今回周期の積分時間と、前記積分器から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間とに基づいて、前記積分器に入力調整電圧と検出電圧とを入力する際の次回周期の積分時間における立上り勾配時間を演算すると共に、今回周期の積分時間における立上り勾配時間と今回周期の積分時間における立下り勾配時間とを変数とする演算式を用いて検出電圧の値を演算する演算部と、前記演算部で演算した次回周期の積分時間における立上り勾配時間に基づいて、前記入力調整電圧切替器に対して異なる２段階の入力調整電圧の切替制御をする制御部とを備えることを特徴とする。
【０００８】
また、異なる２段階の入力調整電圧を切替出力する入力調整電圧切替器と、前記入力調整電圧切替器で切替出力した異なる２段階の入力調整電圧と測定対象の状態を検出変換した検出電圧とを入力し積分電圧を出力する積分器と、前記積分器で出力した積分電圧を入力し比較基準電圧と比較して高低の一定電圧を出力する比較器と、前記比較器で出力した高低の一定電圧の変化に基因して、前記積分器で出力した積分電圧における立上り勾配時間と立下り勾配時間とから成る積分時間を計測する計時部と、前記積分器に入力調整電圧と検出電圧とを入力した際の今回周期前半の積分時間における立上り勾配時間と、前記計時部で計測した今回周期前半の積分時間と、前記積分器から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間とに基づいて、前記積分器に入力調整電圧と検出電圧とを入力する際の今回周期後半の積分時間における立上り勾配時間及び前記積分器に入力調整電圧と検出電圧とを入力する際の次回周期前半の積分時間における立上り勾配時間を演算すると共に、今回周期前半の積分時間における立上り勾配時間と今回周期後半の積分時間における立下り勾配時間、及び今回周期前半の積分時間における立下り勾配時間と今回周期後半の積分時間における立上り勾配時間を変数とする演算式を用いて検出電圧の値を演算する演算部と、前記演算部で演算した今回周期後半の積分時間における立上り勾配時間及び次回周期の積分時間における立上り勾配時間に基づいて、前記入力調整電圧切替器に対して前記異なる２段階の入力調整電圧の切替制御をする制御部とを備えることを特徴とする。
【０００９】
また、前記積分器は、入・出力端子を有する積分用アンプと、前記積分用アンプの入・出力端子間に接続する積分用コンデンサと、前記積分用コンデンサが接続する前記積分用アンプの入力端子に接続し、前記入力調整電圧切替器で出力した入力調整電圧を積分するための第１の積分用抵抗及び前記測定対象の状態を検出変換した検出電圧を積分するための第２の積分用抵抗とから成ることを特徴とする。
【００１０】
また、測定対象の状態を検出変換した検出電圧をサンプリングして一定に保持するサンプル・ホールド回路を更に備え、前記積分器は、前記サンプル・ホールド回路でサンプリングして一定に保持した検出電圧を入力することを特徴とする。
【００１１】
【発明の実施の形態】
以下、本発明の実施の形態について図面を用いて説明する。
【００１２】
第１に、一つの三角波形で一周期を成す積分電圧の積分時間を一定化しながらアナログ／デジタル変換処理をする態様（第１の実施の形態）について説明する。まず、第１の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の構成について、図１のブロック図、図２（ａ）の積分器出力の波形図、図２（ｂ）の入力調整電圧Ｖｒに係わるタイミングチャート、図２（ｃ）の比較器からの高低の一定電圧に係わるタイミングチャートを参照しながら詳述する。
【００１３】
第１の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器は、大別すると、入力調整電圧切替器１、積分器２、比較器３、計時部４、演算部５及び制御部６から構成する。
【００１４】
入力調整電圧切替器１は、制御部６からの制御信号に基づいて、異なる２段階の第１入力調整電圧ＶＰＰと第２入力調整電圧ＶＥＥとを切替えて入力調整電圧Ｖｒとして出力する。なお、本実施形態においては、第１入力調整電圧ＶＰＰについてはＶｄｄ、第２入力調整電圧ＶＥＥについては０Ｖとし、センサへの入力電圧Ｖｄｄ及び０Ｖと共用する。
【００１５】
積分器２は、＋（プラス）、−（マイナス）の２入力端子及び１出力端子を有する積分用アンプＡ２と、この積分用アンプＡ２の−入力端子と出力端子との間に接続する積分用コンデンサＣｆと、この積分用アンプＡ２の−入力端子と入力調整電圧切替器１との間に接続する第１の積分用抵抗Ｒｒと、この積分用アンプＡ２の−入力端子と、測定対象の状態を検出したセンサからの検出電圧を増幅する増幅用アンプＡ１の出力との間に接続する第２の積分用抵抗Ｒｘと、この積分用アンプＡ２の＋入力端子に積分基準電圧ＶＣＯＭを入力するラインとから成り、入力調整電圧切替器１で発生した異なる２段階の入力調整電圧ＶＰＰ（＝Ｖｄｄ）及びＶＥＥ（＝０Ｖ）と、測定対象の状態を検出変換した検出電圧（増幅用アンプＡ１で増幅した検出電圧）Ｖｘとを入力して積分電圧Ｖｏｕｔを出力する。なお、本実施形態においては、積分用アンプＡ２の＋入力端子へ入力する積分基準電圧ＶＣＯＭについてはＶｄｄ／２としている。
【００１６】
比較器３は、＋（プラス）、−（マイナス）の２入力端子及び１出力端子を有し、−入力端子には積分器２の出力ラインと接続し、＋入力端子には比較基準電圧ＶＥを入力し、積分器２から出力する積分電圧Ｖｏｕｔを比較基準電圧ＶＥと比較して高低の一定電圧を出力端子から出力する。
【００１７】
計時部４は、マイコン７とタイマ８とから成り、比較器３から出力した高低の一定電圧の変化に基因して、図３（ａ）の検出電圧の大きさが小さいときの積分器出力の波形図、図３（ｂ）の検出電圧の大きさが中ぐらいのときの積分器出力の波形図、図３（ｃ）の検出電圧の大きさが大きいときの積分器出力の波形図に示すような勾配時間ＴＨと及びＴＬから成る積分時間Ｔｍを計測する。
【００１８】
演算部５は、マイコン７（計時部４と共用）から成り、第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを積分器２に入力した際の今回周期の積分時間Ｔｍｔにおける立上り勾配時間ＴＨｔと、計時部４で計測した今回周期の積分時間Ｔｍｔと、積分器２から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間ＴＣとを、次の数１の式に代入して、第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを積分器２に入力する際の次回周期の積分時間Ｔｍｎにおける立上り勾配時間ＴＨｎを演算する。
【００１９】
【数１】

【００２０】
また、演算部５は、今回周期の積分時間Ｔｍｔにおける立上り勾配時間ＴＨｔと今回周期の積分時間Ｔｍｔにおける立下り勾配時間ＴＬｔとを変数とする次の数２の式から導かれる検出電圧Ｖｘの値を求める式（第１入力調整電圧ＶＰＰをＶｄｄ、第２入力調整電圧ＶＥＥを０Ｖ、積分基準電圧ＶＣＯＭをＶｄｄ／２とする場合には、次の数３の式）にて検出電圧Ｖｘの値を演算する。
【００２１】
【数２】

【数３】

【００２２】
制御部６は、マイコン７（計時部４と共用）から成り、今回周期の積分時間Ｔｍｔにおける立上り勾配時間ＴＨｔや次回周期の積分時間Ｔｍｎにおける立上り勾配時間ＴＨｎについて入力調整電圧切替器１に対して第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）に切替制御をし、今回周期の積分時間Ｔｍｔにおける立下り勾配時間ＴＬｔや次回周期の積分時間Ｔｍｎにおける立上り勾配時間ＴＬｎについて入力調整電圧切替器１に対して第２入力調整電圧ＶＥＥ（＝０Ｖ）に切替制御をする。
【００２３】
次に、第１の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の動作処理について詳述する。
【００２４】
まず、センサ９では、測定対象の状態を検出変換し、増幅用アンプＡ１では、増幅した検出電圧Ｖｘを出力する。また、制御部６では、計時部４で計測する積分時間を参照しながら入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）側への切替制御を行い、入力調整電圧切替器１では、第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）を出力する。
【００２５】
次いで、積分器２では、第２の積分用抵抗Ｒｘを介して積分用アンプＡ２の−入力端子に検出電圧Ｖｘを入力し、第１の積分用抵抗Ｒｒを介して積分用アンプＡ２の−入力端子に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）を入力し、積分用アンプＡ２の出力端子から立上り勾配波形ａを成す１回目周期の積分電圧Ｖｏｕｔを出力する。
【００２６】
次いで、制御部６では、計時部４で計測する積分時間が１回目周期の積分時間における立上り勾配時間として予め決めている時間ＴＨ１について経過すると、入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第２入力調整電圧ＶＥＥ（＝０Ｖ）への切替制御を行う。
【００２７】
次いで、積分器２では、第２の積分用抵抗Ｒｘを介して積分用アンプＡ２の−入力端子に検出電圧Ｖｘを引き続き入力し、第１の積分用抵抗Ｒｒを介して積分用アンプＡ２の−入力端子に第２入力調整電圧ＶＥＥ（＝０Ｖ）を入力し、積分用アンプＡ２の出力端子から立下り勾配波形ｂを成す１回目周期の積分電圧Ｖｏｕｔを出力する。
【００２８】
次いで、比較器３では、積分器２から−入力端子に入力した立下り勾配波形ｂを成す１回目周期の積分電圧Ｖｏｕｔが＋入力端子に入力した比較基準電圧ＶＥに達すると出力端子から低（Ｌ）の一定電圧を出力する。また、これと共に、制御部６では、入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）への切替制御を行う。
【００２９】
次いで、演算部５では、１回目周期の積分時間における立上り勾配時間として予め決めている時間ＴＨ１と、立上り勾配波形ａと立下り勾配波形ｂとにより一周期を成す１回目周期の積分電圧Ｖｏｕｔを出力する間について計時部４で計測した１回目周期の積分時間Ｔｍ１と、積分器２から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間ＴＣとを、上述した数１の式に代入して、積分器２に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを入力する際の次回（２回目）周期の積分時間Ｔｍｎ（Ｔｍ２）における立上り勾配時間ＴＨｎ（ＴＨ２）を演算して出力する。なお、数１の式に代入する際、１回目周期の積分時間における立上り勾配時間として予め決めている時間ＴＨ１については立上り勾配時間ＴＨｔに当てはめ、１回目周期の積分時間Ｔｍ１については積分時間Ｔｍｔに当てはめる。
【００３０】
また、演算部５では、入力電圧Ｖｄｄと、第１の積分用抵抗Ｒｒと、第２の積分用抵抗Ｒｘと、１回目周期の積分時間における立上り勾配時間として予め決めている時間ＴＨ１と、１回目周期の積分時間における立下り勾配時間ＴＬ１とを、上述した数３の式に代入して、検出電圧Ｖｘの値を演算する。なお、数３の式に代入する際、１回目周期の積分時間における立上り勾配時間として予め決めている時間ＴＨ１については立下り勾配時間ＴＨｔに当てはめ、１回目周期の積分時間における立下り勾配時間ＴＬ１については立下り勾配時間ＴＬｔに当てはめる。
【００３１】
次いで、制御部６では、計時部４で計測する積分時間が２回目周期の積分時間における立上り勾配時間ＴＨ２に達するまで入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）の切替状態の制御を維持する。また、比較器３では、制御部６において入力調整電圧切替器１に対して第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）を切替制御したことにより、積分器２から−入力端子に入力した立上勾配波形ｃを成す２回目周期の積分電圧Ｖｏｕｔが＋入力端子に入力した比較基準電圧ＶＥをすぐに下回って、出力端子から高（Ｈ）の一定電圧を出力する。
【００３２】
以降、積分器２による立上り勾配波形を成す積分電圧Ｖｏｕｔの出力、制御部６による第２入力調整電圧ＶＥＥ（＝０Ｖ）への切替制御、積分器２による立下り勾配波形を成す積分電圧Ｖｏｕｔの出力、比較器３による低（Ｌ）の一定電圧の出力、制御部６による第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）への切替制御といった処理を繰り返す。
【００３３】
上述したように、第１の実施の形態における積分時間一定化Ａ／Ｄ変換器は、演算部５により積分器２に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを入力する際の次回周期の積分時間Ｔｍｎにおける立上り勾配時間ＴＨｎを演算し、入力調整電圧切替器１から第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）をこの立上り勾配時間ＴＨｎ出力するといった処理を繰り返す。これによると、今回取得した検出電圧と次回取得した検出電圧とがほぼ同じであれば、変換時間は、常にほぼ目標積分時間での処理となる。したがって、時間的な変化の遅い検出電圧を取得する場合（例えば、体重計、重心動揺計）には、ほぼ一定時間で変換したデータを出力することができる。
【００３４】
第２に、第２の実施の形態として、二つの三角波形で一周期を成す積分電圧の積分時間を一定化しながらアナログ／デジタル変換処理をする態様（第２の実施の形態）について説明する。まず、第２の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の構成について、図１のブロック図、図４（ａ）の積分器出力の波形図、図４（ｂ）の入力調整電圧Ｖｒに係わるタイミングチャート、図４（ｃ）の比較器からの高低の一定電圧に係わるタイミングチャートを参照しながら詳述する。
【００３５】
第２の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器は、大別すると、一部の機能を異にしながら第１の実施の形態と同様に、入力調整電圧切替器１、積分器２、比較器３、計時部４、演算部５及び制御部６から構成する。入力調整電圧切替器１、積分器２、比較器３及び計時部４については、第１の実施の形態と機能を同じにするので第２の実施の形態に係わる構成においての詳述を省略し、機能を異にする演算部５及び制御部６について詳述する。
【００３６】
演算部５は、マイコン７（計時部４と共用）から成り、第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを積分器２に入力した際の今回周期前半の積分時間Ｔｍｆｔにおける立上り勾配時間ＴＨｆｔと、今回周期前半の積分時間Ｔｍｆｔにおける立下り勾配時間ＴＬｆｔと、積分器２から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間ＴＣとを、次の数４の式に代入して、積分器２に第２入力調整電圧ＶＥＥ（＝０Ｖ）と検出電圧Ｖｘとを入力する際の今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｔを演算する。
【００３７】
【数４】

【００３８】
また、演算部５は、今回周期前半の積分時間Ｔｍｆｔにおける立上り勾配時間ＴＨｆｔと、今回周期後半の積分時間Ｔｍｓｔにおける立下り勾配時間ＴＨｓｔと、今回周期前半の積分時間Ｔｍｆｔにおける立下り勾配時間ＴＬｆｔと、今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｔとを、次の数５の式に代入して、第１入力調整電圧ＶＰＰと検出電圧Ｖｘとを積分器２に入力する際の次回周期前半の積分時間Ｔｍｆｎにおける立上り勾配時間ＴＨｆｎを演算する。
【００３９】
【数５】

【００４０】
更に、演算部５は、今回周期前半の積分時間Ｔｍｆｔにおける立上り勾配時間ＴＨｆｔと、今回周期後半の積分時間Ｔｍｓｔにおける立下り勾配時間ＴＨｓｔと、今回周期前半の積分時間Ｔｍｆｔにおける立下り勾配時間ＴＬｆｔと、今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｔとを変数とする次の数６の式から導かれる検出電圧Ｖｘの値を求める式（第１入力調整電圧ＶＰＰをＶｄｄ、第２入力調整電圧ＶＥＥを０Ｖ、積分基準電圧ＶＣＯＭをＶｄｄ／２とする場合には、次の数７の式）にて検出電圧Ｖｘの値を演算する。
【００４１】
【数６】

【数７】

【００４２】
制御部６は、マイコン７（計時部４と共用）から成り、今回周期前半の積分時間Ｔｍｆｔにおける立上り勾配時間ＴＨｆｔや今回周期後半の積分時間Ｔｍｓｔにおける立下り勾配時間ＴＨｓｔや次回周期前半の積分時間Ｔｍｆｎにおける立上り勾配時間ＴＨｆｎや次回周期後半の積分時間Ｔｍｓｎにおける立下り勾配時間ＴＨｓｎについて入力調整電圧切替器１に対して第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）に切替制御をし、今回周期前半の積分時間Ｔｍｆｔにおける立下り勾配時間ＴＬｆｔや今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｔや次回周期前半の積分時間Ｔｍｆｎにおける立下り勾配時間ＴＬｆｎや今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｎについて入力調整電圧切替器１に対して第２入力調整電圧ＶＥＥ（＝０Ｖ）に切替制御をする。
【００４３】
次に、第２の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の動作処理について詳述する。
【００４４】
まず、センサ９では、測定対象の状態を検出変換し、増幅用アンプＡ１では、増幅した検出電圧Ｖｘが出力する。また、制御部６では、計時部４で計測する積分時間を参照しながら入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）側への切替制御を行い、入力調整電圧切替器１では、第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）を出力する。
【００４５】
次いで、積分器２では、第２の積分用抵抗Ｒｘを介して積分用アンプＡ２の−入力端子に検出電圧Ｖｘを入力し、第１の積分用抵抗Ｒｒを介して積分用アンプＡ２の−入力端子に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）を入力し、積分用アンプＡ２の出力端子から立上り勾配波形ａｆを成す１回目周期前半の積分電圧Ｖｏｕｔを出力する。
【００４６】
次いで、制御部６では、計時部４で計測する積分時間が１回目周期前半の積分時間における立上り勾配時間として予め決めている時間ＴＨｆ１について経過すると、入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第２入力調整電圧ＶＥＥ（＝０Ｖ）への切替制御を行う。
【００４７】
次いで、積分器２では、第２の積分用抵抗Ｒｘを介して積分用アンプＡ２の−入力端子に検出電圧Ｖｘを引き続き入力し、第１の積分用抵抗Ｒｒを介して積分用アンプＡ２の−入力端子に第２入力調整電圧ＶＥＥ（＝０Ｖ）を入力し、積分用アンプＡ２の出力端子から立下り勾配波形ｂｆを成す１回目周期後半の積分電圧Ｖｏｕｔを出力する。
【００４８】
次いで、比較器３では、積分器２から−入力端子に入力した立下り勾配波形ｂｓを成す１回目周期前半の積分電圧Ｖｏｕｔが＋入力端子に入力した比較基準電圧ＶＥに達する（上回る）と出力端子から低（Ｌ）の一定電圧を出力する。
【００４９】
次いで、演算部５では、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１と、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１と、積分器２から一周期における積分電圧を出力する際の積分時間として予め決めてある目標積分時間ＴＣとを、上述した次の数４の式に代入して、積分器２に第２入力調整電圧ＶＥＥ（＝０Ｖ）と検出電圧Ｖｘとを入力する際の今回（１回目）周期後半の積分時間Ｔｍｓｔ（Ｔｍｓ１）における立上り勾配時間ＴＬｓｎ（ＴＬｓ１）を演算する。なお、数４の式に代入する際、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１については立上り勾配時間ＴＨｆｔに当てはめ、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１については立下り勾配時間ＴＬｆｔに当てはめる。
【００５０】
次いで、制御部６では、計時部４で計測する積分時間が１回目周期後半の積分時間における立上り勾配時間ＴＬｓ１について経過すると、入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）への切替制御を行う。
【００５１】
次いで、比較器３では、積分器２から−入力端子に入力した立下り勾配波形ｂｓを成す１回目周期後半の積分電圧Ｖｏｕｔが比較基準電圧ＶＥに達する（下回る）と出力端子から高（Ｈ）の一定電圧を出力する。
【００５２】
次いで、演算部５では、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１と、１回目周期後半の積分時間Ｔｍｓｔにおける立下り勾配時間ＴＨｓ１と、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１と、１回目周期後半の積分時間における立上り勾配時間ＴＬｓ１とを、上述した次の数５の式に代入して、積分器２に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを入力する際の次回（２回目）周期前半の積分時間Ｔｍｆｎ（Ｔｍｆ２）における立上り勾配時間ＴＨｆｎ（Ｔｍｆｎ２）を演算する。なお、数５の式に代入する際、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１については立上り勾配時間ＴＨｆｔに当てはめ、１回目周期後半の積分時間における立下り勾配時間ＴＨｓ１については立下り勾配時間ＴＬｓｔに当てはめ、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１については立上り勾配時間ＴＬｆｔに当てはめ、１回目周期後半の積分時間における立上り勾配時間ＴＬｓ１については立上り勾配時間ＴＬｓｔに当てはめる。
【００５３】
また、演算部５では、入力電圧Ｖｄｄと、第１の積分用抵抗Ｒｒと、第２の積分用抵抗Ｒｘと、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１と、１回目周期後半の積分時間における立下り勾配時間ＴＨｓ１と、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１と、１回目周期後半の積分時間における立上り勾配時間ＴＬｓ１とを、上述した次の数７の式に代入して、検出電圧Ｖｘの値を演算する。なお、数７の式に代入する際、１回目周期前半の積分時間における立上り勾配時間ＴＨｆ１については立上り勾配時間ＴＨｆｔに当てはめ、１回目周期後半の積分時間における立下り勾配時間ＴＨｓ１については立下り勾配時間ＴＬｓｔに当てはめ、１回目周期前半の積分時間における立下り勾配時間ＴＬｆ１については立上り勾配時間ＴＬｆｔに当てはめ、１回目周期後半の積分時間における立上り勾配時間ＴＬｓ１については立上り勾配時間ＴＬｓｔに当てはめる。
【００５４】
次いで、制御部６では、計時部４で計測する積分時間が２回目周期前半の積分時間における立上り勾配時間ＴＨｆ２に達するまで入力調整電圧切替器１に対してマイコン７のＰｏｕｔから制御信号を送って第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）の切替状態の制御を維持する。
【００５５】
以降、積分器２による立上り勾配波形ａｆを成す積分電圧Ｖｏｕｔの出力、制御部６による第２入力調整電圧ＶＥＥ（＝０Ｖ）への切替制御、積分器２による立下り勾配波形ｂｆを成す積分電圧Ｖｏｕｔの出力、比較器３による低（Ｌ）の一定電圧の出力、積分器２による立上り勾配波形ａｓを成す積分電圧Ｖｏｕｔの出力、制御部６による第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）への切替制御、積分器２による立下り勾配波形ｂｓを成す積分電圧Ｖｏｕｔの出力、制御部６による第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）への切替制御といった処理を繰り返す。
【００５６】
上述したように、第２の実施の形態における積分時間一定化Ａ／Ｄ変換器は、演算部５により積分器２に第２入力調整電圧ＶＥＥ（＝０Ｖ）と検出電圧Ｖｘとを入力する際の今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｎを演算し、入力調整電圧切替器１から第２入力調整電圧ＶＥＥ（＝０Ｖ）をこの立上り勾配時間ＴＬｓｎ出力し、また、演算部５により積分器２に第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）と検出電圧Ｖｘとを入力する際の次回周期の積分時間Ｔｍｆｎにおける立上り勾配時間ＴＨｆｎを演算し、入力調整電圧切替器１から第１入力調整電圧ＶＰＰ（＝Ｖｄｄ）をこの立上り勾配時間ＴＨｆｎ出力するといった処理を繰り返す。これによると、今回取得した検出電圧と次回取得した検出電圧とがほぼ同じであれば、変換時間は、検出電圧の取得初期から常にほぼ目標積分時間での処理となる。したがって、時間的な変化の遅い検出電圧を取得する場合（例えば、体重計、重心動揺計）には、検出電圧の取得初期からほぼ一定時間で変換したデータを出力することができる。
【００５７】
なお、第２の実施の形態においては、積分基準電圧ＶＣＯＭ（＝比較基準電圧ＶＥ）を基準に三角波形が交互に積分器２から出力するものであったが、第１の実施の形態の三角波形が片側に積分器２から出力するようにしても実施可能である。
【００５８】
また、上述した第１及び第２の実施の形態においては、図５のブロック図に示すように、積分器２の第２の積分用抵抗Ｒｘの前段に、測定対象の状態を検出変換した検出電圧をサンプリングして一定に保持するサンプル・ホールド回路１０を設けて、積分器２にはサンプル・ホールド回路１０でサンプリングして一定に保持した検出電圧を入力するようにしてもよい。これによると、積分器２で積分処理中に検出電圧の変化を起こさないのでより積分時間が一定となる。
【００５９】
【発明の効果】
以上説明したように、本発明の積分時間一定化Ａ／Ｄ変換器は、演算部により積分器に第１入力調整電圧ＶＰＰと検出電圧Ｖｘとを入力する際の次回周期の積分時間Ｔｍｎにおける立上り勾配時間ＴＨｎを演算し、入力調整電圧切替器から第１入力調整電圧ＶＰＰをこの立上り勾配時間ＴＨｎ出力するといった処理を繰り返し、ほぼ一定時間で変換したデータを出力することができる。よって、連続して等間隔の時系列データを取得する装置に利用する場合には、結果の信頼度合いが高まる。
【００６０】
また、第２の実施の形態における積分時間一定化Ａ／Ｄ変換器は、演算部５により積分器に第２入力調整電圧ＶＥＥと検出電圧Ｖｘとを入力する際の今回周期後半の積分時間Ｔｍｓｔにおける立上り勾配時間ＴＬｓｎを演算し、入力調整電圧切替器から第２入力調整電圧ＶＥＥをこの立上り勾配時間ＴＬｓｎ出力し、また、演算部５により積分器に第１入力調整電圧ＶＰＰと検出電圧Ｖｘとを入力する際の次回周期の積分時間Ｔｍｆｎにおける立上り勾配時間ＴＨｆｎを演算し、入力調整電圧切替器から第１入力調整電圧ＶＰＰをこの立上り勾配時間ＴＨｆｎ出力するといった処理を繰り返し、検出電圧の取得初期からほぼ一定時間で変換したデータを出力することができる。よって、連続して等間隔の時系列データを取得する装置に利用する場合には、結果の信頼度合いが更に高まる。
【００６１】
また、積分器が、積分用アンプ、積分用コンデンサ、入力調整電圧切替器で発生する入力調整電圧を積分するための第１の積分用抵抗、測定対象の状態を検出変換した検出電圧を積分するための第２の積分用抵抗だけから構成するので、簡単に製作することができて廉価である。
【００６２】
また、積分器の第２の積分用抵抗Ｒｘの前段に、測定対象の状態を検出変換した検出電圧をサンプリングして一定に保持するサンプル・ホールド回路を設けて、積分器にはサンプル・ホールド回路でサンプリングして一定に保持した検出電圧を入力するので、より積分時間が一定となり、連続して等間隔の時系列データを取得する装置に利用する場合には、結果の信頼度合いが更により高まる。
【図面の簡単な説明】
【図１】本発明に係わる積分時間一定化Ａ／Ｄ変換器を示すブロック図である。
【図２】第１の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の積分動作の関係を示し、（ａ）は積分器出力の波形図、（ｂ）は入力調整電圧Ｖｒに係わるタイミングチャート、（ｃ）は比較器からの高低の一定電圧に係わるタイミングチャートである。
【図３】積分器出力の波形図を示し、（ａ）は検出電圧の大きさが小さいとき、（ｂ）は検出電圧の大きさが中ぐらいのとき、（ｃ）は検出電圧の大きさが大きいときである。
【図４】第２の実施の形態に係わる積分時間一定化Ａ／Ｄ変換器の積分動作の関係を示し、（ａ）は積分器出力の波形図、（ｂ）は入力調整電圧Ｖｒに係わるタイミングチャート、（ｃ）は比較器からの高低の一定電圧に係わるタイミングチャートである。
【図５】本発明に係わる別の積分時間一定化Ａ／Ｄ変換器を示すブロック図である。
【図６】従来の二重積分器出力の波形図を示し、（ａ）は検出電圧の大きさが小さいとき、（ｂ）は検出電圧の大きさが中ぐらいのとき、（ｃ）は検出電圧の大きさが大きいときである。
【符号の説明】
１入力調整電圧切替器
２積分器
３比較器
４計時部
５演算部
６制御部
１０サンプル・ホールド回路
Ａ２積分用アンプ
Ｃｆ積分用コンデンサ
Ｒｒ第１の積分用抵抗
Ｒｘ第２の積分用抵抗[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an A / D converter with constant integration time for performing analog / digital conversion processing while keeping integration time constant.
[0002]
[Prior art]
Conventionally, a double-integration type A / D converter built in a scale or other measuring instrument, when a detection voltage output from a sensor is input to a double integrator configured as a part thereof and integrated, is obtained as shown in FIG. FIG. 6B is a waveform diagram of the output of the double integrator when the magnitude of the detection voltage is small, FIG. 6B is a waveform diagram of the output of the double integrator when the magnitude of the detection voltage is medium, and FIG. The output voltage VOUT as shown in the waveform diagram of the output of the double integrator when the magnitude of the detection voltage is large is output from the double integrator. That is, in the double integration type A / D converter, the rising slope time TH of the waveform from the integration reference voltage VCOM is predetermined and is always constant, but the falling slope time TL is large in the detection voltage. Therefore, the integration time Tm for outputting the output voltage VOUT from the double integrator changes according to the magnitude of the detection voltage.
[0003]
For example, in a double integration type A / D converter as disclosed in Patent Document 1, as described above, the falling gradient time of the integration time (second integration stage Tm) is proportional to the magnitude of the detection voltage. Things that change.
[0004]
[Patent Document 1]
JP-A-6-224766
[0005]
[Problems to be solved by the invention]
However, when the above-described double-integration A / D converter is used for a center of gravity sway meter or other device that acquires continuous time-series data at equal intervals, the double integration A / D converter is integrated in proportion to the magnitude of the detection voltage. Since the falling slope time of the time changes, the number of data to be obtained increases and decreases, and there is a problem that the degree of reliability of the result differs depending on the magnitude of the detection voltage.
[0006]
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-mentioned conventional problems, and to provide an A / D converter with a constant integration time for performing analog / digital conversion processing while keeping the integration time constant. That is the task.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, an A / D converter for stabilizing the integration time according to the present invention has an input adjustment voltage switch for switching and outputting two different levels of input adjustment voltage, and has an output switched by the input adjustment voltage switch. An integrator that inputs an input adjustment voltage of two different stages and a detection voltage obtained by detecting and converting the state of a measurement target and outputs an integrated voltage; and inputs the integrated voltage output by the integrator and compares the input with the comparison reference voltage to determine whether the input voltage is higher or lower. A constant voltage output from the comparator, and an integration time including a rising gradient time and a falling gradient time in the integration voltage output from the integrator, based on a change in the high and low constant voltage output from the comparator. A timer to measure, a rising gradient time in an integration time of a current cycle when an input adjustment voltage and a detection voltage are input to the integrator, an integration time of a current cycle measured by the timer, and the integrator One round Calculates the rising gradient time in the integration time of the next cycle when inputting the input adjustment voltage and the detection voltage to the integrator based on the target integration time predetermined as the integration time when outputting the integration voltage in. And an arithmetic unit that calculates the value of the detected voltage using an arithmetic expression that uses the rising gradient time in the integration time of the current cycle and the falling gradient time in the integration time of the current cycle as variables. A control unit that controls the input adjustment voltage switch to switch between two different levels of the input adjustment voltage based on the rising gradient time in the integration time of the next cycle.
[0008]
Further, an input adjustment voltage switch that switches and outputs two different input adjustment voltages, a two-stage input adjustment voltage that is switched and output by the input adjustment voltage switch, and a detection voltage that detects and converts the state of the measurement target. An integrator that inputs and outputs an integrated voltage; a comparator that inputs the integrated voltage output by the integrator and outputs a constant high and low voltage by comparing with a comparison reference voltage; and a constant high and low voltage output by the comparator. And a time measuring unit for measuring an integration time composed of a rising gradient time and a falling gradient time in the integrated voltage output by the integrator, and an input adjustment voltage and a detection voltage input to the integrator. The rising gradient time in the integration time of the first half of the current cycle, the integration time of the first half of the current cycle measured by the timer, and the integration time when the integrated voltage is output from the integrator in one cycle. The input integration voltage and the detection voltage are input to the integrator based on the target integration time, and the rising slope time in the integration time in the latter half of the current cycle and the input adjustment voltage and the detection voltage are input to the integrator. In addition to calculating the rising gradient time in the integration time of the first half of the next cycle when inputting, the rising gradient time in the integration time of the first half of the current cycle, the falling slope time in the integration time of the second half of the current cycle, and the integration time of the first half of the current cycle A calculating unit that calculates the value of the detected voltage using a formula that uses the falling gradient time and the rising gradient time in the integration time of the second half of the current cycle as variables, and the rising gradient in the integration time of the second half of the current cycle calculated by the calculation unit Time and the two-stage input adjustment for the input adjustment voltage switch based on the rising gradient time in the integration time of the next cycle. Characterized in that it comprises a control unit for the switching control of the pressure.
[0009]
The integrator includes an integrating amplifier having input / output terminals, an integrating capacitor connected between the input / output terminals of the integrating amplifier, and an input terminal of the integrating amplifier connected to the integrating capacitor. And a second integrating resistor for integrating a detection voltage obtained by detecting and converting the state of the object to be measured, and a first integrating resistor for integrating the input adjusting voltage output from the input adjusting voltage switch. And characterized in that:
[0010]
The integrator further includes a sample-and-hold circuit that samples a detection voltage obtained by detecting and converting the state of the measurement target and holds the sampled voltage, and the integrator inputs the detected voltage that is sampled and held constant by the sample-and-hold circuit. It is characterized by doing.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0012]
First, an aspect (first embodiment) in which an analog / digital conversion process is performed while the integration time of an integration voltage that forms one cycle with one triangular waveform is fixed is described. First, regarding the configuration of the A / D converter for stabilizing the integration time according to the first embodiment, the block diagram of FIG. 1, the waveform diagram of the output of the integrator of FIG. 2A, and the input adjustment of FIG. This will be described in detail with reference to a timing chart relating to the voltage Vr and a timing chart relating to a constant high and low voltage from the comparator in FIG.
[0013]
The A / D converter for stabilizing the integration time according to the first embodiment is roughly divided into an input adjustment voltage switch 1, an integrator 2, a comparator 3, a timer 4, a calculator 5, and a controller 6. Constitute.
[0014]
The input adjustment voltage switch 1 switches between two different levels of the first input adjustment voltage VPP and the second input adjustment voltage VEE based on the control signal from the control unit 6 and outputs the input adjustment voltage Vr. In the present embodiment, the first input adjustment voltage VPP is set to Vdd, the second input adjustment voltage VEE is set to 0 V, and shared with the input voltages Vdd and 0 V to the sensor.
[0015]
The integrator 2 has an integrating amplifier A2 having two input terminals of + (plus) and-(minus) and one output terminal, and an integrating amplifier connected between the-input terminal and the output terminal of the integrating amplifier A2. A capacitor Cf, a first integrating resistor Rr connected between the negative input terminal of the integrating amplifier A2 and the input adjustment voltage switch 1, a negative input terminal of the integrating amplifier A2, and a state of a measuring object. , A second integrating resistor Rx connected between the output of an amplifier A1 for amplifying a detection voltage from the sensor that has detected the signal, and a line for inputting the integration reference voltage VCOM to a + input terminal of the integrating amplifier A2. And two different levels of input adjustment voltages VPP (= Vdd) and VEE (= 0 V) generated by the input adjustment voltage switch 1 and a detection voltage obtained by detecting and converting the state of the measurement target (amplified by the amplification amplifier A1). did Enter the output voltage) Vx outputs an integral voltage Vout. In the present embodiment, the integration reference voltage VCOM input to the + input terminal of the integrating amplifier A2 is set to Vdd / 2.
[0016]
The comparator 3 has two input terminals of + (plus) and-(minus) and one output terminal. The-input terminal is connected to the output line of the integrator 2, and the + input terminal is a comparison reference voltage VE. And compares the integrated voltage Vout output from the integrator 2 with the comparison reference voltage VE to output a constant high or low voltage from the output terminal.
[0017]
The timer section 4 includes a microcomputer 7 and a timer 8, and based on a change in the constant high and low voltage output from the comparator 3, the output of the integrator when the magnitude of the detected voltage in FIG. FIG. 3B shows a waveform diagram of the integrator output when the magnitude of the detected voltage is medium, and FIG. 3C shows a waveform diagram of the integrator output when the magnitude of the detected voltage is large. An integration time Tm composed of such a gradient time TH and TL is measured.
[0018]
The arithmetic unit 5 includes the microcomputer 7 (shared with the timer unit 4), and has a rising slope during the integration period Tmt of the present cycle when the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are input to the integrator 2. The time THt, the integration time Tmt of the current cycle measured by the timer 4 and the target integration time TC predetermined as the integration time for outputting the integration voltage in one cycle from the integrator 2 are expressed by the following equation (1). , The rising slope time THn in the integration time Tmn of the next cycle when the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are input to the integrator 2 is calculated.
[0019]
(Equation 1)

[0020]
The arithmetic unit 5 calculates the value of the detection voltage Vx derived from the following equation (2) using the rising gradient time THt at the integration time Tmt of the current cycle and the falling gradient time TLt at the integration time Tmt of the current cycle as variables. (When the first input adjustment voltage VPP is Vdd, the second input adjustment voltage VEE is 0 V, and the integration reference voltage VCOM is Vdd / 2, the value of the detection voltage Vx is calculated by the following equation (3). Is calculated.
[0021]
(Equation 2)

[Equation 3]

[0022]
The control unit 6 includes a microcomputer 7 (shared with the timer unit 4), and controls the input adjustment voltage switch 1 for the rising gradient time THt in the integration time Tmt of the current cycle and the rising gradient time THn in the integration time Tmn of the next cycle. The switching control is performed to the first input adjustment voltage VPP (= Vdd), and the falling slope time TLt in the integration time Tmt in the current cycle and the rising slope time TLn in the integration time Tmn in the next cycle are controlled by the input adjustment voltage switch 1. Switching control is performed to the second input adjustment voltage VEE (= 0 V).
[0023]
Next, the operation processing of the A / D converter for stabilizing the integration time according to the first embodiment will be described in detail.
[0024]
First, the sensor 9 detects and converts the state of the measurement target, and the amplification amplifier A1 outputs the amplified detection voltage Vx. Further, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 while referring to the integration time measured by the timer unit 4 to the first input adjustment voltage VPP (= Vdd) side. And the input adjustment voltage switch 1 outputs the first input adjustment voltage VPP (= Vdd).
[0025]
Next, in the integrator 2, the detection voltage Vx is input to the minus input terminal of the integrating amplifier A2 via the second integrating resistor Rx, and the minus input of the integrating amplifier A2 is given via the first integrating resistor Rr. A first input adjustment voltage VPP (= Vdd) is input to a terminal, and an integrated voltage Vout of a first cycle forming a rising gradient waveform a is output from an output terminal of the integrating amplifier A2.
[0026]
Next, when the integration time measured by the timer unit 4 elapses for a predetermined time TH1 as a rising gradient time in the integration time of the first cycle, the Pout of the microcomputer 7 instructs the input adjustment voltage switch 1 to the Pout of the microcomputer 7. To control the switching to the second input adjustment voltage VEE (= 0 V).
[0027]
Next, in the integrator 2, the detection voltage Vx is continuously input to the-input terminal of the integrating amplifier A2 via the second integrating resistor Rx, and the-of the integrating amplifier A2 is connected via the first integrating resistor Rr. The second input adjustment voltage VEE (= 0 V) is input to the input terminal, and the output voltage of the integration amplifier A2 outputs the integration voltage Vout of the first cycle forming the falling slope waveform b.
[0028]
Next, in the comparator 3, when the integrated voltage Vout of the first cycle forming the falling slope waveform b input from the integrator 2 to the − input terminal reaches the comparison reference voltage VE input to the + input terminal, the output terminal changes to low ( L) is output. At the same time, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 to control switching to the first input adjustment voltage VPP (= Vdd).
[0029]
Next, the arithmetic unit 5 calculates a predetermined time TH1 as the rising gradient time in the integration time of the first cycle, and the integrated voltage Vout of the first cycle forming one cycle by the rising slope waveform a and the falling slope waveform b. The integration time Tm1 of the first cycle measured by the timer unit 4 during the output and the target integration time TC predetermined as the integration time for outputting the integration voltage in one cycle from the integrator 2 are calculated by the above-described equation. Substituting into equation (1), the rising gradient time THn in the integration time Tmn (Tm2) of the next (second) cycle when the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are input to the integrator 2 (TH2) is calculated and output. When substituting into the equation (1), the time TH1 predetermined as the rising gradient time in the integration time of the first cycle is applied to the rising gradient time THt, and the integration time Tm1 of the first cycle is calculated as the integration time Tmt. Apply.
[0030]
In addition, in the arithmetic unit 5, the input voltage Vdd, the first integration resistor Rr, the second integration resistor Rx, and the time TH1, which is determined in advance as the rising gradient time in the integration time of the first cycle, and 1 The value of the detection voltage Vx is calculated by substituting the falling gradient time TL1 in the integration time of the third cycle into the above equation (3). When substituting into the equation (3), the time TH1 predetermined as the rising gradient time in the integration time of the first cycle is applied to the falling gradient time THt, and the falling slope time TL1 in the integration time of the first cycle is used. Is applied to the falling slope time TLt.
[0031]
Next, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 until the integration time measured by the timer unit 4 reaches the rising gradient time TH2 in the integration time of the second cycle. The control of the switching state of the one-input adjustment voltage VPP (= Vdd) is maintained. In the comparator 3, the control section 6 controls the input adjustment voltage switch 1 to switch the first input adjustment voltage VPP (= Vdd), so that the rising slope input from the integrator 2 to the minus input terminal is obtained. The integrated voltage Vout of the second cycle forming the waveform c immediately falls below the comparison reference voltage VE input to the + input terminal, and a high (H) constant voltage is output from the output terminal.
[0032]
Thereafter, the output of the integral voltage Vout having a rising gradient waveform by the integrator 2, the switching control to the second input adjustment voltage VEE (= 0 V) by the control section 6, the integration voltage Vout having the falling gradient waveform by the integrator 2 Processing such as output, output of a low (L) constant voltage by the comparator 3, and switching control to the first input adjustment voltage VPP (= Vdd) by the control unit 6 are repeated.
[0033]
As described above, the integration time constant A / D converter according to the first embodiment uses the arithmetic unit 5 to input the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx to the integrator 2. , The rising slope time THn in the integration time Tmn of the next cycle is calculated, and the input adjustment voltage switch 1 outputs the first input adjustment voltage VPP (= Vdd) as the rising slope time THn. According to this, if the detected voltage acquired this time and the detected voltage acquired next time are almost the same, the conversion time is almost always the processing of the target integration time. Therefore, when a detection voltage having a slow temporal change is acquired (for example, a weighing scale or a body sway meter), it is possible to output data converted in a substantially constant time.
[0034]
Secondly, as a second embodiment, an aspect (second embodiment) in which an analog / digital conversion process is performed while the integration time of an integration voltage forming one cycle with two triangular waveforms is fixed. First, with respect to the configuration of the A / D converter for stabilizing the integration time according to the second embodiment, the block diagram in FIG. 1, the waveform diagram of the output of the integrator in FIG. 4A, and the input adjustment in FIG. This will be described in detail with reference to a timing chart relating to the voltage Vr and a timing chart relating to a constant high and low voltage from the comparator in FIG.
[0035]
The integration time constant A / D converter according to the second embodiment can be roughly classified, similarly to the first embodiment, while partially changing the function, similarly to the first embodiment. 2, a comparator 3, a timing unit 4, a calculation unit 5, and a control unit 6. The functions of the input adjustment voltage switch 1, the integrator 2, the comparator 3, and the timer 4 are the same as those of the first embodiment, so that the detailed description of the configuration according to the second embodiment is omitted. The operation unit 5 and the control unit 6 having different functions will be described in detail.
[0036]
The arithmetic unit 5 is composed of the microcomputer 7 (shared with the timer unit 4), and rises at the integration time Tmft in the first half of the current cycle when the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are input to the integrator 2. The gradient time THft, the falling gradient time TLft in the integration time Tmft in the first half of the current cycle, and the target integration time TC predetermined as the integration time when the integrated voltage is output from the integrator 2 in one cycle are calculated as follows: The rising slope time TLst in the integration time Tmst in the latter half of the current cycle when the second input adjustment voltage VEE (= 0 V) and the detection voltage Vx are input to the integrator 2 is substituted into the equation (4).
[0037]
(Equation 4)

[0038]
The calculation unit 5 also calculates a rising gradient time THft in the integration time Tmft in the first half of the current cycle, a falling gradient time THst in the integration time Tmst in the second half of the current cycle, and a falling slope time TLft in the integration time Tmft in the first half of the current cycle. The rising slope time TLst in the integration time Tmst in the latter half of the current cycle is substituted into the following equation (5), so that the first input adjustment voltage VPP and the detection voltage Vx are input to the integrator 2 in the first half of the next cycle. The rising slope time THfn in the integration time Tmfn of the above is calculated.
[0039]
(Equation 5)

[0040]
Further, the calculation unit 5 calculates a rising gradient time THft in the integration time Tmft in the first half of the current cycle, a falling gradient time THst in the integration time Tmst in the second half of the current cycle, and a falling gradient time TLft in the integration time Tmft in the first half of the current cycle. A formula for obtaining the value of the detection voltage Vx derived from the following equation (6) using the rising gradient time TLst in the integration time Tmst in the latter half of the current cycle as a variable (the first input adjustment voltage VPP is Vdd, the second input adjustment voltage is When VEE is set to 0 V and the integration reference voltage VCOM is set to Vdd / 2, the value of the detection voltage Vx is calculated by the following equation (7).
[0041]
(Equation 6)

(Equation 7)

[0042]
The control unit 6 includes a microcomputer 7 (shared with the timer unit 4), and includes a rising gradient time THft in the integration time Tmft in the first half of the current cycle, a falling gradient time THst in the integration time Tmst in the second half of the current cycle, and an integration time in the first half of the next cycle. For the rising gradient time THfn in Tmfn and the falling gradient time THsn in the integration time Tmsn in the second half of the next cycle, the input adjustment voltage switch 1 is controlled to switch to the first input adjustment voltage VPP (= Vdd). The falling slope time TLft in the integration time Tmft, the rising slope time TLst in the integration time Tmst in the second half of the current cycle, the falling slope time TLfn in the integration time Tmfn in the first half of the next cycle, and the rising slope time TLsn in the integration time Tmst in the second half of the current cycle. The input adjustment voltage switch 1 The switching control to the input adjustment voltage VEE (= 0V).
[0043]
Next, an operation process of the A / D converter for stabilizing the integration time according to the second embodiment will be described in detail.
[0044]
First, the sensor 9 detects and converts the state of the measurement target, and the amplification amplifier A1 outputs the amplified detection voltage Vx. Further, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 while referring to the integration time measured by the timer unit 4 to the first input adjustment voltage VPP (= Vdd) side. And the input adjustment voltage switch 1 outputs the first input adjustment voltage VPP (= Vdd).
[0045]
Next, in the integrator 2, the detection voltage Vx is input to the minus input terminal of the integrating amplifier A2 via the second integrating resistor Rx, and the minus input of the integrating amplifier A2 is given via the first integrating resistor Rr. A first input adjustment voltage VPP (= Vdd) is input to a terminal, and an integrated voltage Vout in the first half of the first cycle forming a rising gradient waveform af is output from an output terminal of the integrating amplifier A2.
[0046]
Next, when the integration time measured by the timer unit 4 elapses for a predetermined time THf1 as the rising gradient time in the integration time of the first half of the first cycle, the control unit 6 sends the input adjustment voltage switch 1 the microcomputer 7 A control signal is transmitted from Pout to perform switching control to the second input adjustment voltage VEE (= 0 V).
[0047]
Next, in the integrator 2, the detection voltage Vx is continuously input to the-input terminal of the integrating amplifier A2 via the second integrating resistor Rx, and the-of the integrating amplifier A2 is connected via the first integrating resistor Rr. The second input adjustment voltage VEE (= 0 V) is input to the input terminal, and the output terminal of the integrating amplifier A2 outputs the integrated voltage Vout in the second half of the first cycle forming the falling slope waveform bf.
[0048]
Next, in the comparator 3, when the integrated voltage Vout of the first half of the first cycle, which forms the falling gradient waveform bs input from the integrator 2 to the-input terminal, reaches (exceeds) the comparison reference voltage VE input to the + input terminal. A low (L) constant voltage is output from the terminal.
[0049]
Next, the arithmetic unit 5 outputs the rising slope time THf1 in the integration time of the first half of the first cycle, the falling slope time TLf1 in the integration time of the first half of the first cycle, and the time when the integrator 2 outputs the integrated voltage in one cycle. When the target integration time TC predetermined as the integration time is substituted into the above-described equation (4), the second input adjustment voltage VEE (= 0V) and the detection voltage Vx are input to the integrator 2. The rising slope time TLsn (TLs1) in the integration time Tmst (Tms1) in the latter half of the current (first) cycle is calculated. Note that when substituting into the equation (4), the rising slope time THf1 in the integration time of the first half of the first cycle is applied to the rising slope time THft, and the falling slope time TLf1 in the integration time of the first half of the first cycle is falling. Apply to time TLft.
[0050]
Next, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 when the integration time measured by the timer unit 4 has elapsed for the rising gradient time TLs1 in the integration time in the latter half of the first cycle. Control to switch to the first input adjustment voltage VPP (= Vdd).
[0051]
Next, in the comparator 3, when the integrated voltage Vout in the second half of the first cycle forming the falling slope waveform bs input from the integrator 2 to the negative input terminal reaches (below) the comparison reference voltage VE, the output terminal goes high (H). Output a constant voltage.
[0052]
Next, in the calculation unit 5, the rising gradient time THf1 in the integration time of the first half of the first cycle, the falling gradient time THs1 in the integration time Tmst of the second half of the first cycle, and the falling slope time TLf1 in the integration time of the first half of the first cycle And the rising gradient time TLs1 in the integration time of the latter half of the first cycle are substituted into the following equation (5), and the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are supplied to the integrator 2. The rising slope time THfn (Tmfn2) in the integration time Tmfn (Tmf2) of the first half of the next (second) cycle at the time of input is calculated. When substituting into the equation (5), the rising slope time THf1 in the integration time of the first half of the first cycle is applied to the rising slope time THft, and the falling slope time THs1 in the integration time of the second half of the first cycle is falling. The falling slope time TLf1 in the integration time of the first half of the first cycle is applied to the rising slope time TLft, and the rising slope time TLs1 in the integration time of the second half of the first cycle is applied to the rising slope time TLst.
[0053]
In addition, in the arithmetic section 5, the input voltage Vdd, the first integration resistor Rr, the second integration resistor Rx, the rising gradient time THf1 in the integration time in the first half of the first cycle, and the integration in the second half of the first cycle The falling slope time THs1 in time, the falling slope time TLf1 in the integration time of the first half of the first cycle, and the rising slope time TLs1 in the integration time of the second half of the first cycle are substituted into the above-mentioned equation (7). Then, the value of the detection voltage Vx is calculated. In addition, when substituting into the equation (7), the rising slope time THf1 in the integration time in the first half of the first cycle is applied to the rising slope time THft, and the falling slope time THs1 in the integration time in the second half of the first cycle is falling. Applying to the time TLst, the falling slope time TLf1 in the integration time of the first half of the first cycle is applied to the rising slope time TLft, and the rising slope time TLs1 in the integration time of the second half of the first cycle is applied to the rising slope time TLst.
[0054]
Next, the control unit 6 sends a control signal from the Pout of the microcomputer 7 to the input adjustment voltage switch 1 until the integration time measured by the timer unit 4 reaches the rising gradient time THf2 in the integration time of the first half of the second cycle. The control of the switching state of the first input adjustment voltage VPP (= Vdd) is maintained.
[0055]
Thereafter, the output of the integrated voltage Vout forming the rising gradient waveform af by the integrator 2, the switching control to the second input adjustment voltage VEE (= 0 V) by the control unit 6, and the integration voltage forming the falling gradient waveform bf by the integrator 2 The output of Vout, the output of a low (L) constant voltage by the comparator 3, the output of the integrated voltage Vout forming the rising slope waveform as by the integrator 2, and the first input adjustment voltage VPP (= Vdd) by the control unit 6. Processing such as switching control, output of the integrated voltage Vout forming the falling gradient waveform bs by the integrator 2, and switching control to the first input adjustment voltage VPP (= Vdd) by the control unit 6 are repeated.
[0056]
As described above, in the A / D converter with constant integration time according to the second embodiment, when the second input adjustment voltage VEE (= 0V) and the detection voltage Vx are input to the integrator 2 by the arithmetic unit 5. , The rising slope time TLsn in the integration time Tmst in the latter half of the current cycle is calculated, the second input adjustment voltage VEE (= 0 V) is output from the input adjustment voltage switch 1 as the rising slope time TLsn, and the calculation unit 5 integrates The rising slope time THfn in the integration time Tmfn of the next cycle when the first input adjustment voltage VPP (= Vdd) and the detection voltage Vx are input to the switch 2 is calculated, and the input adjustment voltage switch 1 switches the first input adjustment voltage. The process of outputting VPP (= Vdd) as the rising gradient time THfn is repeated. According to this, if the detected voltage obtained this time and the detected voltage obtained next time are substantially the same, the conversion time is always the processing of the target integration time from the initial stage of obtaining the detected voltage. Therefore, when acquiring a detection voltage having a slow temporal change (for example, a weighing scale or a body sway meter), it is possible to output data converted in a substantially constant time from the initial stage of acquisition of the detection voltage.
[0057]
In the second embodiment, the triangular waveform is alternately output from the integrator 2 based on the integration reference voltage VCOM (= comparison reference voltage VE). The present invention can be implemented even if the waveform is output from the integrator 2 to one side.
[0058]
Further, in the first and second embodiments described above, as shown in the block diagram of FIG. 5, a state in which the state of the measurement target is detected and converted is provided before the second integrating resistor Rx of the integrator 2. It is also possible to provide a sample-and-hold circuit 10 for sampling the voltage and holding it constant, and to input a detection voltage sampled and held constant by the sample-hold circuit 10 to the integrator 2. According to this, since the detection voltage does not change during the integration process in the integrator 2, the integration time becomes more constant.
[0059]
【The invention's effect】
As described above, the A / D converter with a fixed integration time according to the present invention has a rise in the integration time Tmn of the next cycle when the first input adjustment voltage VPP and the detection voltage Vx are input to the integrator by the calculation unit. The process of calculating the gradient time THn and outputting the first input adjustment voltage VPP from the input adjustment voltage switch to the rising gradient time THn is repeated, and data converted in substantially constant time can be output. Therefore, when the present invention is used for a device that continuously obtains time-series data at equal intervals, the reliability of the result increases.
[0060]
Further, the integration time constant A / D converter according to the second embodiment includes an integration time Tmst in the latter half of the current cycle when the arithmetic unit 5 inputs the second input adjustment voltage VEE and the detection voltage Vx to the integrator. Is calculated, a second input adjustment voltage VEE is output from the input adjustment voltage switch to this rise gradient time TLsn, and the first input adjustment voltage VPP and the detection voltage Vx are output to the integrator by the calculation unit 5. Is calculated at the integration time Tmfn of the next cycle when the input voltage is input, and the process of outputting the first input adjustment voltage VPP from the input adjustment voltage switch to the rising gradient time THfn is repeated. Can be output in a substantially constant time. Therefore, when the apparatus is used for a device that continuously acquires time-series data at equal intervals, the reliability of the result is further increased.
[0061]
The integrator integrates an integration amplifier, an integration capacitor, a first integration resistor for integrating an input adjustment voltage generated by the input adjustment voltage switch, and a detection voltage obtained by detecting and converting a state of a measurement target. Therefore, it can be easily manufactured and is inexpensive.
[0062]
In addition, a sample-and-hold circuit for sampling a detection voltage obtained by detecting and converting a state of a measurement target and holding the sampled voltage constant is provided in a stage preceding the second integrating resistor Rx of the integrator. Since the detection voltage sampled and held at a constant value is input, the integration time becomes more constant, and the reliability of the result is further increased when the device is used for a device that acquires time series data at equal intervals continuously. .
[Brief description of the drawings]
FIG. 1 is a block diagram showing an A / D converter with a fixed integration time according to the present invention.
FIGS. 2A and 2B show a relation of an integration operation of an A / D converter with a fixed integration time according to the first embodiment, wherein FIG. 2A shows a waveform diagram of an integrator output, and FIG. FIG. 4C is a timing chart relating to a constant high and low voltage from the comparator.
3A and 3B show waveform diagrams of an integrator output, wherein FIG. 3A shows a case where the detected voltage is small, FIG. 3B shows a case where the detected voltage is medium, and FIG. 3C shows a detected voltage. Is when is large.
FIGS. 4A and 4B show a relationship of an integration operation of an A / D converter with a fixed integration time according to a second embodiment, wherein FIG. 4A is a waveform diagram of an integrator output, and FIG. FIG. 4C is a timing chart relating to a constant high and low voltage from the comparator.
FIG. 5 is a block diagram showing another A / D converter for stabilizing an integration time according to the present invention.
6A and 6B show waveform diagrams of a conventional double integrator output, wherein FIG. 6A shows a case where the detection voltage is small, FIG. 6B shows a case where the detection voltage is medium, and FIG. This is when the magnitude of the voltage is large.
[Explanation of symbols]
1 Input adjustment voltage switch
2 Integrator
3 Comparator
4 Timing section
5 Operation part
6 control unit
10 Sample and hold circuit
A2 Integrating amplifier
Cf Integrating capacitor
Rr First integrating resistor
Rx Second integrating resistor

Claims

An input adjustment voltage switch that switches and outputs two different input adjustment voltages;
An integrator that inputs an input adjustment voltage of two different stages switched and output by the input adjustment voltage switch and a detection voltage obtained by detecting and converting a state of a measurement target, and outputs an integrated voltage;
A comparator that receives the integrated voltage output by the integrator and outputs a constant high or low voltage as compared with a comparison reference voltage;
A timer for measuring an integration time consisting of a rising gradient time and a falling gradient time in the integrated voltage output by the integrator, based on a change in the constant high and low voltages output by the comparator;
The rising slope time in the integration time of the current cycle when the input adjustment voltage and the detection voltage are input to the integrator, the integration time of the current cycle measured by the timer, and the integrated voltage in one cycle from the integrator. Based on a predetermined target integration time as an integration time when outputting, a rising gradient time in an integration time of a next cycle when inputting the input adjustment voltage and the detection voltage to the integrator is calculated. A computing unit that computes the value of the detection voltage using an arithmetic expression that uses the rising gradient time in the integration time of the cycle and the falling gradient time in the integration time of the current cycle as variables,
A control unit that performs switching control of two different input adjustment voltages for the input adjustment voltage switch based on the rising gradient time in the integration time of the next cycle calculated by the arithmetic unit;
An integration time-stabilized A / D converter, comprising:

An input adjustment voltage switch that switches and outputs two different input adjustment voltages;
An integrator that inputs an input adjustment voltage of two different stages switched and output by the input adjustment voltage switch and a detection voltage obtained by detecting and converting a state of a measurement target, and outputs an integrated voltage;
A comparator that receives the integrated voltage output by the integrator and outputs a constant high or low voltage as compared with a comparison reference voltage;
A timer for measuring an integration time consisting of a rising gradient time and a falling gradient time in the integrated voltage output by the integrator, based on a change in the constant high and low voltages output by the comparator;
The rising slope time in the first half of the current cycle when the input adjustment voltage and the detection voltage are input to the integrator, the integration time in the first half of the current cycle measured by the timer, and the integration in one cycle from the integrator Based on a target integration time which is predetermined as an integration time when outputting a voltage, a rising gradient time and an integration in the latter half of the current cycle when inputting an input adjustment voltage and a detection voltage to the integrator. Calculates the rise gradient time in the first half of the next cycle when the input adjustment voltage and the detection voltage are input to the detector, and calculates the rise gradient time in the first half of the current cycle and the fall slope in the second half of the current cycle. Time and the fall slope time in the first half of the cycle and the rise slope time in the second half of the cycle A calculator for calculating the value of the detected voltage Te,
Based on the rising gradient time in the integration time of the second half of the current cycle and the rising gradient time in the integration time of the next cycle calculated by the calculation unit, the input control voltage switch controls the switching of the input control voltage switch in the different two stages. A control unit that performs
An integration time-stabilized A / D converter, comprising:

The integrator is connected to an integrating amplifier having input / output terminals, an integrating capacitor connected between the input / output terminals of the integrating amplifier, and an input terminal of the integrating amplifier connected to the integrating capacitor. A first integration resistor for integrating the input adjustment voltage output from the input adjustment voltage switch and a second integration resistor for integrating a detection voltage obtained by detecting and converting the state of the measurement target. 3. The A / D converter according to claim 1, wherein the A / D converter is configured to keep the integration time constant.

The apparatus further includes a sample-and-hold circuit that samples a detection voltage obtained by detecting and converting a state of a measurement target and holds the sampled voltage, and the integrator inputs the detection voltage sampled and held constant by the sample-and-hold circuit. The A / D converter according to any one of claims 1 to 3, wherein the A / D converter has a constant integration time.