JP2004274877A - Boosting chopper circuit - Google Patents

Boosting chopper circuit Download PDF

Info

Publication number
JP2004274877A
JP2004274877A JP2003061787A JP2003061787A JP2004274877A JP 2004274877 A JP2004274877 A JP 2004274877A JP 2003061787 A JP2003061787 A JP 2003061787A JP 2003061787 A JP2003061787 A JP 2003061787A JP 2004274877 A JP2004274877 A JP 2004274877A
Authority
JP
Japan
Prior art keywords
reactor
switch
diode
switching
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003061787A
Other languages
Japanese (ja)
Other versions
JP3710788B2 (en
Inventor
Tokuo Kawamura
篤男 河村
Masao Wada
正雄 和田
Tetsushi Iwakura
哲史 岩倉
Tomosuke Takagi
友亮 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyosan Electric Manufacturing Co Ltd
Yokohama TLO Co Ltd
Original Assignee
Kyosan Electric Manufacturing Co Ltd
Yokohama TLO Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyosan Electric Manufacturing Co Ltd, Yokohama TLO Co Ltd filed Critical Kyosan Electric Manufacturing Co Ltd
Priority to JP2003061787A priority Critical patent/JP3710788B2/en
Publication of JP2004274877A publication Critical patent/JP2004274877A/en
Application granted granted Critical
Publication of JP3710788B2 publication Critical patent/JP3710788B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Dc-Dc Converters (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a boosting chopper circuit which enables soft switching action with little switching loss, even when a reactor current is continuous, and also reduces the loss greatly by shortening the reverse recovery time of a diode connected in series with load. <P>SOLUTION: A first reactor L1, a first diode D1, and load R are connected in series to an input DC power source Ei, and a smoothing capacitor C1 is connected to the load R. A parallel circuit (having a second capacitor C2 connected between the emitter of a first switch Q11 and the cathode of a second diode D2), consisting of the series circuit composed of a second reactor L2, a first switch Q11, and a third diode D3 and the series circuit composed of a second diode D2 and a second switch Q12, is connected in parallel with the series circuit composed of the input DC power source Ei and the first reactor L1. Zero-current switching and zero-voltage switching are enabled, by turning on or turning off the first switch Q11 and the second switch Q12 at the same time under the condition of the current flowing continuously to the first reactor L1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【発明の属する技術分野】
【0001】
本発明は、昇圧チョッパ回路に関し、スイッチング特性を改善して損失を低減する昇圧チョッパ回路に関する。
【0002】
【従来の技術】
従来、入力直流を昇圧して昇圧直流電圧を得る昇圧回路としては、直流電圧を入力とし、リアクトルに電流を流し、このリアクトルに並列接続されたスイッチング素子を開閉動作させることにより、リアクトルに流れ、蓄えられた電磁エネルギーを負荷側に設けたコンデンサに充電させ、この動作を繰り返すことにより負荷側に昇圧電圧を得るように構成した昇圧チョッパ回路が一般的に用いられている。
【0003】
図2には、かかる昇圧チョッパ回路の代表的な例が示されている。図3において、直流電源Eiには、リアクトルL1、ダイオードD1及び負荷Rが直列接続されている。スイッチ(トランジスタ)Q1が直流電源EiとリアクトルL1の直列回路に並列接続され、また、負荷RにはコンデンサC1が並列接続されている。
【0004】
スイッチQ1をターンオン動作させると、リアクトルL1には電流IQ1が流れ、L1・(IQ1/2のエネルギーが蓄積される。次に、スイッチQ1がターンオフ動作させると、リアクトルL1に蓄えられたエネルギーがコンデンサC1に充電され、エネルギーL1・(VC1/2のエネルギーとして変換、蓄積される。このコンデンサC1に蓄積されているエネルギーにより充電電圧が上昇して昇圧直流電圧が負荷Rに供給されることになる。
【0005】
かかる構成の昇圧チョッパ回路は、スイッチQ1のターンオン/ターンオフ時にもリアクトルに電流が連続して流れる場合には、スイッチQ1の動作はハードスイッチング動作となり、スイッチング損失が発生するという問題がある。
【0006】
この問題を解消するための他の従来の昇圧チョッパ回路として、図3に示す昇圧チョッパ回路が提案されている。この昇圧チョッパ回路は、入力としての直流電源EiにリアクトルL1、ダイオードD1及び負荷Rが直列接続されており、図3のスイッチQ1の代わりに、スイッチ(トランジスタ)Q11とダイオードD3の直列回路と、ダイオードD2とスイッチ(トランジスタ)Q12の直列回路とが並列接続され、スイッチQ11のエミッタとダイオードD2のカソード間にコンデンサC2が接続されている構成を採用している。また、図2と同様に、負荷Rには並列にコンデンサC1が接続されている。
【0007】
図3の昇圧チョッパ回路では、スイッチQ11とQ12は同時にターンオン/ターンオフ動作するように構成される。スイッチQ11とQ12の動作に対し、リアクトルに流れる電流が不連続である場合には、スイッチQ11とQ12のターンオン動作を、リアクタルに流れる電流がゼロのときに行えば、ゼロ電流スイッチングとなる。その後、スイッチQ11とQ12のターンオフ動作を同時に行うと、電流がダイオードD2、コンデンサC2及びダイオードD3を流れ、コンデンサC2に電荷が蓄積され、充電される。このとき、スイッチQ11とスイッチQ12は、ダイオードD2とダイオードD3が導通状態でオフ動作するので、スイッチング動作はゼロ電圧スイッチングとなる。
【0008】
【発明が解決しようとする課題】
上述のように、図3に示すような昇圧チョッパ回路によれば、ゼロ電流スイッチング動作及びゼロ電圧スイッチング動作が得られ、いわゆるソフトスイッチング動作が可能となり、スイッチング損失も小さい。
【0009】
一方、リアクタルに流れる電流は、連続した状態であるほうが、スイッチ電流のピーク値が小さくて済むので、半導体スイッチが広く使用されている現状では、耐性の面で好ましい。
【0010】
しかしながら、図3に示す昇圧チョッパ回路では、リアクトル電流が連続の場合、スイッチQ11とQ12の動作はハードスイッチングになるという問題がある。
【0011】
また、ダイオードD1の逆回復時間の面でも問題がある。すなわち、ダイオードD1の逆回復特性の逆回復時間に起因するオーバーシュート電流による大きな損失が生じてしまうという問題である。
【0012】
そこで、本発明の目的は、リアクトル電流が連続の場合であってもスイッチング損失が少ないソストスイッチング動作を可能とする昇圧チョッパ回路を提供することにある。
【0013】
本発明の他の目的は、負荷に直列接続されるダイオードの逆回復時間を短縮化して損失を大幅に削減した昇圧チョッパ回路を提供することにある。
【0014】
【課題を解決するための手段】
前述の課題を解決するため、本発明による昇圧チョッパ回路は、次のような特徴的な構成を採用している。
【0015】
入力直流電源に第1のリアクトル、第1のダイオード及び負荷が直列接続され、
前記負荷には平滑コンデンサが並列接続され、
前記入力直流電源と第1のリアクトルの直列回路には並列に、第2のリアクトルと、第1のスイッチと第2のダイオードの並列回路と、第3のダイオードと第2のスイッチの並列回路とが接続され、前記第1のスイッチのエミッタと前記第2のダイオードのカソード間に第2のコンデンサが接続されて成り、
前記第1のリアクトルに電流が連続的に流れている状態で、
前記第1のスイッチと第2のスイッチを同時にターンオン動作及びターンオフ動作させてゼロ電流スイッチング及びゼロ電圧スイッチングさせる上記(1)の昇圧チョッパ回路。
【0016】
【発明の実施の形態】
以下、本発明による昇圧チョッパ回路の好適実施形態例について添付図を参照して説明する。
【0017】
図1は本発明の一実施形態による昇圧チョッパ回路図である。
本実施形態による昇圧チョッパ回路では、入力直流電源EiにリアクトルL1、ダイオードD1及び負荷Rが直列接続され、負荷Rには並列に平滑コンデンサC1が接続されている。また、入力直流電源EiとリアクトルL1の直列回路には、リアクトルL2と、図2に示すようなスイッチQ11,Q12とダイオードD2、D3から成るスイッチング回路とが並列接続されている。このスイッチング回路は、スイッチ(トランジスタ)Q11とダイオードD3の直列回路と、ダイオードD3とスイッチ(トランジスタ)Q12の直列回路とが並列接続され、スイッチQ11のエミッタとダイオードD2のカソード間に接続されているコンデンサC2を有する。
【0018】
図1において、リアクトルL1に電流が流れている状態で、スイッチQ11とQ12が同時にターンオンすると、コンデンサC2は、負荷Rに印加されている負荷電圧−Eoで充電されており、リアクトルL2、スイッチQ11、コンデンサC2、スイッチQ12を通して電流が流れ始める。このとき、リアクトルL2にはー2Eoが印加され、リアクトルL2とコンデンサC2の時定数により定める変化でコンデンサ2が放電を始める。また、ダイオードD1の逆回復電流によりスイッチに流れ込む電流も制限される。その結果、このターンオン動作は、ゼロ電流スイッチング動作で、ソフトスイッチングとなる。
【0019】
ターンオフ動作は、図3と同様に動作し、ゼロ電圧スイッチング動作で、ソフトスイッチングとなる。すなわち、ターンオフ動作時は、コンデンサC2によってスイッチに印加される電圧の微分値(瞬時変化値)を小さくできることと、スイッチQ11とスイッチQ12は、ダイオードD2とダイオードD3が導通状態でターンオフ動作することとにより、スイッチング動作はゼロ電圧スイッチングとなる。
【0020】
図1に示す昇圧チョッパ回路のスイッチングロスの低減効果を確認するため、シミュレーションを実行したところ、図3に示す昇圧チョッパ回路と比較して約40%のスイッチングロスの低減を確認した。
【0021】
以上、本発明の昇圧チョッパ回路の好適実施形態例を説明したが、これは単なる例示にすぎず、特定用途に応じて種々の変形変更が可能であることは勿論である。
【0022】
【発明の効果】
上述の如く、本発明の昇圧チョッパ回路によれば、直列リアクトルに流れる電流が連続状態であっても、スイッチング損失を理論的にはゼロ、実効的には損失低減することが可能となる。また、負荷に直列に接続されているダイオードの逆回復特性の逆回復時間に起因するオーバーシュート電流による損失も低減できる。こうしてスイッチング損失を大幅に低減することにより、回路の動作周波数を高くすることができ、回路部品の小型化が可能となり、最終製品としての装置の小型化、軽量化及び高効率化が可能になるというような格別顕著な効果が得られる。
【図面の簡単な説明】
【図1】本発明による昇圧チョッパ回路の一実施形態の回路図である。
【図2】従来の昇圧チョッパ回路の代表的な回路である。
【図3】図2に示す従来の昇圧チョッパ回路の問題点を解消した昇圧チョッパ回路である。
【符号の説明】
Ei 入力電源
L1、L2 リアクトル
Q11、Q12 スイッチ
D1、D2、D3 ダイオード
TECHNICAL FIELD OF THE INVENTION
[0001]
The present invention relates to a boost chopper circuit, and more particularly to a boost chopper circuit that improves switching characteristics and reduces loss.
[0002]
[Prior art]
Conventionally, as a booster circuit that obtains a boosted DC voltage by boosting an input DC, a DC voltage is input, a current flows through the reactor, and a switching element connected in parallel to the reactor is opened and closed to flow through the reactor. A step-up chopper circuit configured to charge a capacitor provided on the load side with the stored electromagnetic energy and obtain a step-up voltage on the load side by repeating this operation is generally used.
[0003]
FIG. 2 shows a typical example of such a boost chopper circuit. In FIG. 3, a reactor L1, a diode D1, and a load R are connected in series to a DC power supply Ei. A switch (transistor) Q1 is connected in parallel to a series circuit of a DC power supply Ei and a reactor L1, and a capacitor C1 is connected to the load R in parallel.
[0004]
When the switch Q1 turns on operation, the current I Q1 flows through the reactor L1, the energy of L1 · (I Q1) 2/ 2 is accumulated. Then, when the switch Q1 causes the turn-off operation, energy stored in the reactor L1 is charged in the capacitor C1, the conversion as the energy of the energy L1 · (V C1) 2/ 2, is accumulated. The charging voltage is increased by the energy stored in the capacitor C1, and the boosted DC voltage is supplied to the load R.
[0005]
The boost chopper circuit having such a configuration has a problem that when the current continuously flows through the reactor even when the switch Q1 is turned on / off, the operation of the switch Q1 becomes a hard switching operation, and a switching loss occurs.
[0006]
A boost chopper circuit shown in FIG. 3 has been proposed as another conventional boost chopper circuit for solving this problem. In this boost chopper circuit, a reactor L1, a diode D1, and a load R are connected in series to a DC power supply Ei as an input, and a series circuit of a switch (transistor) Q11 and a diode D3 instead of the switch Q1 of FIG. A configuration is adopted in which a diode D2 and a series circuit of a switch (transistor) Q12 are connected in parallel, and a capacitor C2 is connected between the emitter of the switch Q11 and the cathode of the diode D2. 2, a capacitor C1 is connected to the load R in parallel.
[0007]
In the step-up chopper circuit of FIG. 3, the switches Q11 and Q12 are configured to turn on / off at the same time. In contrast to the operation of the switches Q11 and Q12, if the current flowing through the reactor is discontinuous, if the turn-on operation of the switches Q11 and Q12 is performed when the current flowing through the reactor is zero, zero current switching is performed. Thereafter, when the switches Q11 and Q12 are simultaneously turned off, current flows through the diode D2, the capacitor C2, and the diode D3, and the capacitor C2 is charged and charged. At this time, since the switches Q11 and Q12 are turned off with the diodes D2 and D3 conducting, the switching operation is zero voltage switching.
[0008]
[Problems to be solved by the invention]
As described above, according to the boost chopper circuit as shown in FIG. 3, a zero current switching operation and a zero voltage switching operation are obtained, so-called soft switching operation becomes possible, and switching loss is small.
[0009]
On the other hand, the current flowing through the reactor is preferably in a continuous state, since the peak value of the switch current is small, and in the current situation where semiconductor switches are widely used, durability is high.
[0010]
However, the boost chopper circuit shown in FIG. 3 has a problem that when the reactor current is continuous, the operation of switches Q11 and Q12 is hard switching.
[0011]
There is also a problem in the reverse recovery time of the diode D1. That is, there is a problem that a large loss occurs due to an overshoot current caused by the reverse recovery time of the reverse recovery characteristic of the diode D1.
[0012]
Therefore, an object of the present invention is to provide a boost chopper circuit that enables a sost switching operation with small switching loss even when the reactor current is continuous.
[0013]
Another object of the present invention is to provide a boost chopper circuit in which the reverse recovery time of a diode connected in series to a load is shortened and the loss is greatly reduced.
[0014]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, the boost chopper circuit according to the present invention employs the following characteristic configuration.
[0015]
A first reactor, a first diode, and a load are connected in series to the input DC power supply;
A smoothing capacitor is connected in parallel to the load,
A second reactor, a parallel circuit of a first switch and a second diode, a parallel circuit of a third diode and a second switch, in parallel with the series circuit of the input DC power supply and the first reactor. Are connected, and a second capacitor is connected between an emitter of the first switch and a cathode of the second diode;
In a state where the current is continuously flowing through the first reactor,
The boost chopper circuit according to (1), wherein the first switch and the second switch are simultaneously turned on and turned off to perform zero current switching and zero voltage switching.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of a boost chopper circuit according to the present invention will be described with reference to the accompanying drawings.
[0017]
FIG. 1 is a boost chopper circuit diagram according to one embodiment of the present invention.
In the boost chopper circuit according to the present embodiment, a reactor L1, a diode D1, and a load R are connected in series to an input DC power supply Ei, and a smoothing capacitor C1 is connected to the load R in parallel. Also, a reactor L2 and a switching circuit including switches Q11 and Q12 and diodes D2 and D3 as shown in FIG. 2 are connected in parallel to a series circuit of the input DC power supply Ei and the reactor L1. In this switching circuit, a series circuit of a switch (transistor) Q11 and a diode D3 and a series circuit of a diode D3 and a switch (transistor) Q12 are connected in parallel, and are connected between the emitter of the switch Q11 and the cathode of the diode D2. It has a capacitor C2.
[0018]
In FIG. 1, when the switches Q11 and Q12 are simultaneously turned on while a current is flowing through the reactor L1, the capacitor C2 is charged by the load voltage −Eo applied to the load R, and the reactor L2 and the switch Q11 , The capacitor C2 and the switch Q12 begin to flow current. At this time, −2Eo is applied to reactor L2, and capacitor 2 starts discharging with a change determined by the time constant of reactor L2 and capacitor C2. Further, the current flowing into the switch due to the reverse recovery current of the diode D1 is also limited. As a result, the turn-on operation is a zero-current switching operation and is a soft switching.
[0019]
The turn-off operation operates in the same manner as in FIG. 3, and is a soft switching by a zero voltage switching operation. That is, during the turn-off operation, the differential value (instantaneous change value) of the voltage applied to the switch can be reduced by the capacitor C2, and the switches Q11 and Q12 are turned off with the diodes D2 and D3 conducting. Thus, the switching operation becomes zero voltage switching.
[0020]
When a simulation was performed to confirm the effect of reducing the switching loss of the boost chopper circuit shown in FIG. 1, it was confirmed that the switching loss was reduced by about 40% as compared with the boost chopper circuit shown in FIG.
[0021]
The preferred embodiment of the boost chopper circuit according to the present invention has been described above. However, this is merely an example, and it goes without saying that various modifications can be made in accordance with a specific application.
[0022]
【The invention's effect】
As described above, according to the boost chopper circuit of the present invention, even if the current flowing through the series reactor is in a continuous state, it is possible to theoretically reduce the switching loss to zero and effectively reduce the loss. Further, the loss due to the overshoot current due to the reverse recovery time of the reverse recovery characteristic of the diode connected in series to the load can be reduced. By thus greatly reducing the switching loss, the operating frequency of the circuit can be increased, the circuit components can be reduced in size, and the device as a final product can be reduced in size, weight, and efficiency. Such remarkable effects can be obtained.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of an embodiment of a boost chopper circuit according to the present invention.
FIG. 2 is a typical circuit of a conventional boost chopper circuit.
FIG. 3 is a boost chopper circuit which has solved the problems of the conventional boost chopper circuit shown in FIG.
[Explanation of symbols]
Ei Input power supply L1, L2 Reactor Q11, Q12 Switch D1, D2, D3 Diode

Claims (1)

入力直流電源に第1のリアクトル、第1のダイオード及び負荷が直列接続され、
前記負荷には平滑コンデンサが並列接続され、
前記入力直流電源と第1のリアクトルの直列回路には並列に、第2のリアクトルと、第1のスイッチと第2のダイオードの並列回路と、第3のダイオードと第2のスイッチの並列回路とが接続され、前記第1のスイッチのエミッタと前記第2のダイオードのカソード間に第2のコンデンサが接続されて成り、
前記第1のリアクトルに電流が連続的に流れている状態で、
前記第1のスイッチと第2のスイッチを同時にターンオン動作及びオフ動作させてゼロ電流スイッチング及びゼロ電圧スイッチングさせることを特徴とする請求項1に記載の昇圧チョッパ回路。
A first reactor, a first diode, and a load are connected in series to the input DC power supply;
A smoothing capacitor is connected in parallel to the load,
A second reactor, a parallel circuit of a first switch and a second diode, a parallel circuit of a third diode and a second switch, in parallel with the series circuit of the input DC power supply and the first reactor. Are connected, and a second capacitor is connected between the emitter of the first switch and the cathode of the second diode.
In a state where the current is continuously flowing through the first reactor,
The boost chopper circuit according to claim 1, wherein the first switch and the second switch are simultaneously turned on and off to perform zero current switching and zero voltage switching.
JP2003061787A 2003-03-07 2003-03-07 Boost chopper circuit Expired - Fee Related JP3710788B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003061787A JP3710788B2 (en) 2003-03-07 2003-03-07 Boost chopper circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003061787A JP3710788B2 (en) 2003-03-07 2003-03-07 Boost chopper circuit

Publications (2)

Publication Number Publication Date
JP2004274877A true JP2004274877A (en) 2004-09-30
JP3710788B2 JP3710788B2 (en) 2005-10-26

Family

ID=33123919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003061787A Expired - Fee Related JP3710788B2 (en) 2003-03-07 2003-03-07 Boost chopper circuit

Country Status (1)

Country Link
JP (1) JP3710788B2 (en)

Also Published As

Publication number Publication date
JP3710788B2 (en) 2005-10-26

Similar Documents

Publication Publication Date Title
US10651731B1 (en) Zero voltage switching of interleaved switched-capacitor converters
Bai et al. Eliminate reactive power and increase system efficiency of isolated bidirectional dual-active-bridge DC–DC converters using novel dual-phase-shift control
Koo et al. New zero-voltage-switching phase-shift full-bridge converter with low conduction losses
US7579814B2 (en) Power converter with snubber
Fujiwara et al. A novel lossless passive snubber for soft-switching boost-type converters
CN110034683B (en) LLC converter modulation method capable of realizing natural bidirectional power flow
CN110190752B (en) Bidirectional CLLLC-DCX resonant converter and control method thereof
KR20200086223A (en) Hybrid switched-capacitor converter
US7148662B2 (en) Electrical circuit for reducing switching losses in a switching element
US6906931B1 (en) Zero-voltage switching half-bridge DC-DC converter topology by utilizing the transformer leakage inductance trapped energy
JP6452226B2 (en) DC-DC converter auxiliary circuit and bidirectional buck-boost DC-DC converter using the auxiliary circuit
JP2000116120A (en) Power converter
JP4535492B2 (en) Buck-boost chopper circuit
AU2006232207B2 (en) Solid state switching circuit
US8558525B1 (en) Power supply circuit and reuse of gate charge
CN108322053A (en) A kind of Buck conversion circuit
JPH05328714A (en) Dc-dc converter
TWI501527B (en) High voltage ratio interleaved converter with soft-switching using single auxiliary switch
JP2001309647A (en) Chopper circuit
JPH09266665A (en) Switching regulator
CN115149809A (en) Non-isolated full-bridge cascaded converter circuit and control method thereof
JP7243838B2 (en) DC-DC converter
JP2004274877A (en) Boosting chopper circuit
JPH10210740A (en) Synchronous rectifier
JP2008017564A (en) Step-up chopper

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050426

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050510

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050610

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050727

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050810

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313117

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080819

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090819

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090819

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100819

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110819

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110819

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120819

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130819

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130819

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130819

Year of fee payment: 8

LAPS Cancellation because of no payment of annual fees