JP2004271875A - Plasma display device, plasma display panel, and driving method for the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display device which prevents failures of write discharge and prevents degradation of display quality. <P>SOLUTION: In the plasma display device which has display cells arranged at intersections between a plurality of scanning electrodes and a plurality of data electrodes and controls light emission of the display cells by data pulses applied to the data electrodes to display an image, a function is provided which makes write discharge making delay times different by the plurality of data electrodes or a plurality of data electrode groups into which the plurality of data electrodes are divided. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a plasma display device, a plasma display panel, and a driving method of a plasma display panel that achieve cost reduction and stabilization of driving characteristics.
[0002]
[Prior art]
The plasma display panel, which is one component of the plasma display device, has an AC (Alternate Current) type in which electrodes are covered with a dielectric layer and indirectly operates in an AC discharge state, and an electrode in which the electrodes are discharged. There is a DC (Direct Current) type that is exposed to a space and operates in a DC discharge state.
[0003]
Further, AC plasma display panels include a memory operation type using a memory function of a display cell and a refresh operation type not using a memory function of a display cell as driving methods.
[0004]
Note that the luminance of the plasma display panel is proportional to the number of discharges. The above-described refresh operation type is mainly used for a plasma display panel having a small display capacity because the luminance decreases as the display capacity increases.
[0005]
FIG. 27 is a perspective view illustrating the configuration of one display cell in an AC plasma display panel.
[0006]
The display cell includes a front substrate 101 based on an insulating substrate made of glass and a rear substrate 102 based on an insulating substrate made of glass. The insulating substrate has a thickness of, for example, about 0.5 to 5 mm.
[0007]
Transparent electrodes 103 and 104 are provided on the surface of the front substrate 101 facing the rear substrate 102. The transparent electrodes 103 and 104 are arranged side by side in the horizontal direction (lateral direction) of the present plasma display panel. The transparent electrodes 103 and 104 contain, for example, tin oxide or indium-tin oxide (ITO) as a main component, and have a thickness of about 100 to 500 nm.
[0008]
Bus electrodes 105 and 106 are formed so as to overlap the transparent electrodes 103 and 104. The bus electrodes 105 and 106 are made of, for example, a thick metal film such as silver, a multilayer thin film such as chromium / copper / chrome, or an aluminum thin film, and are electrodes having a thickness of about 1 to 10 μm and a width of about 30 to 80 μm. It is provided to reduce the electrode resistance between the transparent electrodes 103 and 104 and an external driving device (not shown).
[0009]
An electrode composed of the transparent electrode 103 and the bus electrode 105 is called a scanning electrode 115 (see FIG. 28) according to a difference in operation role, and an electrode composed of the transparent electrode 104 and the bus electrode 106 is a sustain electrode 116. (See FIG. 28).
[0010]
Further, a dielectric layer 110 covering the transparent electrodes 103 and 104 and the bus electrodes 105 and 106 is formed on the front substrate 101. The dielectric layer 110 is made of, for example, a low-melting-point lead glass paste and has a thickness of about 10 to 40 μm.
[0011]
Further, on the dielectric layer 110, a protective layer 112 made of magnesium oxide or the like for protecting the dielectric layer 110 from electric discharge is formed to a thickness of about 0.5 to 2 μm by vapor deposition or sputtering.
[0012]
A plurality of data electrodes 107 orthogonal to the scan electrodes 115 and the sustain electrodes 116 are provided on the surface of the rear substrate 102 facing the front substrate 101. The data electrode 107 is made of, for example, silver and has a thickness of about 2 to 4 μm.
[0013]
The data electrode 107 is covered with a dielectric layer 113 made of a thick film paste obtained by mixing a white pigment with low melting point lead glass. As the white pigment, a titanium oxide powder or an alumina powder is used. The thickness of the dielectric layer 113 is about 5 to 40 μm.
[0014]
Further, on the dielectric layer 113, a partition wall 109 extending parallel to the data electrode 107 and separating display cells is provided.
[0015]
On the side surfaces of the partition walls 109 and on the surface of the dielectric layer 113, a phosphor layer 111 for converting ultraviolet light generated by the discharge of the discharge gas into visible light is formed. The phosphor layer 111 is, for example, painted in three primary colors of light, red (R), green (G), and blue (B), for each display cell.
[0016]
The space formed by the front substrate 101 and the rear substrate 102 defines a discharge gas space 108, and the discharge gas space 108 is filled with a discharge gas composed of helium, neon, xenon, or a mixed gas thereof. ing. More specifically, after the front substrate 101 and the rear substrate 102 are bonded to each other and baked at 350 to 500 degrees Celsius, the discharge gas space 108 is evacuated, and the discharge gas is sealed at a pressure of about 200 to 700 Torr. You.
[0017]
FIG. 28 is a plan view showing the shape of each electrode in the conventional plasma display panel in more detail, and is a plan view when only the front substrate 101 is viewed from the display surface side.
[0018]
As shown in FIG. 28, a gap formed between the transparent electrode 103 forming the scan electrode 115 and the transparent electrode 104 forming the sustain electrode 116 is called a surface discharge gap 119, and is opposite to the surface discharge gap 119. Is referred to as a non-discharge gap 114. Further, the center line of the surface discharge gap 119 is referred to as a center line 118 of the surface discharge gap, and the center line of the non-discharge gap 114 is referred to as a center line 117 of the non-discharge gap.
[0019]
A discharge space surrounded by the center line 118 of the surface discharge gap, the center line 117 of the non-discharge gap, and the center line of the partition 109 is referred to as a display cell 120.
[0020]
In the plasma display panel configured as described above, the bus electrodes 105 and 106 are usually provided at positions farthest from the surface discharge gap 119 of the transparent electrodes 103 and 104.
[0021]
At this time, when a potential difference between the scan electrode 115 and the sustain electrode 116 sandwiching the surface discharge gap 119 exceeds a predetermined value, discharge is generated and ultraviolet rays are emitted. Thereby, the phosphor layer 111 is excited and emits light.
[0022]
Next, a basic operation of a memory operation type of the conventional plasma display panel configured as described above will be described.
[0023]
The plasma display panel performs brightness adjustment, that is, gradation expression, by controlling the number of discharges. For this purpose, one field (for example, 1/60 second), which is a period for displaying one screen, is divided into a plurality of subfields having different numbers of discharges.
[0024]
FIG. 29 shows an example of gradation display.
[0025]
In this example, one field FL is composed of eight subfields SF1 to SF8. As described above, these subfields SF1 to SF8 can select light emission or non-light emission independently of each other. In the subfields SF1 to SF8, the number of sustain pulses (or the length of the sustain period) is different, and is set to 1: 2: 4: 8: 16: 32: 64: 128. In this case, by selecting light emission or non-light emission of these eight subfields SF1 to SF8, 256 gradations from gradation 0 at which all subfields emit no light to gradation 255 at which all subfields emit light Display can be performed.
[0026]
For example, if the luminance ratio is 100 gradations, the third subfield SF3 (the number of sustain pulses is 4), the sixth subfield SF6 (the number of sustain pulses is 32), and the seventh subfield SF7 (the number of sustain pulses is 64) May be emitted in the sub-fields.
[0027]
In this example, eight subfields are used to produce 256 gradations, but it is also possible to combine nine or more subfields with redundancy.
[0028]
FIG. 30 is a plan view of an electrode structure in the above-described plasma display panel.
[0029]
In the above-described plasma display panel, scan electrodes (115) Si (i = 1, 2,..., M) having m independent inputs are formed in the row direction, and data having n independent inputs is formed. Electrodes (107) Dj (j = 1, 2,..., N) are formed in the column direction. Each display cell 120 is formed at the intersection of each scanning electrode Si and each data electrode Dj. The sustain electrode (116) C is paired with the scanning electrode Si, and both are arranged in parallel. As a method of arranging the scan electrodes Si and the sustain electrodes C, a method of alternately arranging the scan electrodes Si and the sustain electrodes C as shown in FIG. 31 and a method of alternately arranging two scan electrodes Si and the sustain electrodes C as shown in FIG. , There is. In either case, the number of display cells 120 that are formed by m scan electrodes Si and n data electrodes Dj is n × m.
[0030]
FIG. 32 is a timing chart showing a driving operation of one subfield in a conventional plasma display panel.
[0031]
Each subfield is composed of four periods: a priming period, an address period, a sustain period, and a sustain erase period, which are sequentially set.
[0032]
First, in the priming period, a priming pulse Ppr-s having a sawtooth waveform is applied to the scan electrode 115, and a priming pulse Ppr-c having a rectangular waveform is applied to the sustain electrode 116. The priming pulse Ppr-s is a positive pulse, and the priming pulse Ppr-c is a negative pulse.
[0033]
By the application of the priming pulses Ppr-s and Ppr-c, a priming discharge is generated in a discharge space near a gap between the scan electrode 115 and the sustain electrode 116, and active particles which facilitate the subsequent writing discharge of the cell are generated. As the generation is performed, negative wall charges adhere to the scan electrodes 115 and positive wall charges adhere to the sustain electrodes 116, respectively.
[0034]
Here, according to the IEICE Technical Report EID98-95 (January 1991, p. 91), the priming luminance is reduced by using a ramp voltage waveform of 7.5 V / μsec or less. It is said that it can be.
[0035]
Since the priming discharge occurs in all the display cells 120 irrespective of the presence or absence of display, the light emission due to the priming discharge corresponds to the background luminance, that is, the black luminance. The smaller the voltage gradient of the priming pulse Ppr-s is, the lower the black luminance is. However, if the voltage gradient is too small, the time required to reach the voltage required for the priming discharge becomes longer, and the priming period becomes longer. turn into. When the priming period becomes longer, the sustain period must be shortened. As a result, the number of sustain discharges decreases, the luminance of white display decreases, and the contrast decreases. Therefore, in order to balance these, a voltage gradient of about 4 V / μsec is usually used.
[0036]
Subsequently, the charge adjustment pulse Ppe-s is applied to the scan electrode 115.
[0037]
As a result, a weak discharge is generated between scan electrode 115 and sustain electrode 116, and the negative wall charges on scan electrode 115 and the positive wall charges on sustain electrode 116 are reduced. It is adjusted to perform well.
[0038]
The address period performed after the priming period is a period for selecting the display cell 120 to emit light. In this address period, scan electrode 115 is maintained at voltage Vbw except during the period in which scan pulse Psc-s is applied, and sustain electrode 116 is constantly maintained at voltage Vsw-c.
[0039]
In order to perform line-sequential scanning, usually, a scanning pulse Psc-s is applied to the scanning electrode 115 line-sequentially at a different timing for each line from the top of the screen. In the display cell 120 that emits light for display, a positive data pulse Pd is applied to the data electrode 107 in synchronization with the negative scan pulse Psc-s applied to the scan electrode 115. As a result, first, a counter discharge occurs between the scan electrode 115 and the data electrode 107. Next, the counter discharge is a trigger, and a surface discharge is generated between the scan electrode 115 and the sustain electrode 116. This series of discharges is called a write discharge, and the write discharge causes positive wall charges to adhere to the scan electrode 115 and positive wall charges to the sustain electrode 116, respectively.
[0040]
On the other hand, in the display cell 120 in which the write discharge has not occurred, the wall charges in the same state as the wall charges after the end of the application of the charge adjustment pulse Ppe-s are arranged on the scan electrodes 115 and the sustain electrodes 116 as they are. You.
[0041]
It takes a certain amount of time for this write discharge to occur, and this time is called a write discharge delay time (Tw).
[0042]
In the gas discharge, space charges such as electrons and ions existing in the discharge space move in the gap between the electrodes by the applied external voltage, and secondary electrons are generated by collision of the ions with the electrodes, It further collides with gas atoms and molecules in the discharge gas one after another and ionizes or excites the colliding gas atoms, thereby generating an exponential increase in space charge. Therefore, during the time until the discharge occurs, the space charges such as electrons and ions existing in the discharge space move in the gap between the electrodes due to the applied external voltage, and the ions collide with the electrodes. A time Ts and a time Tf from the time when the ions collide with the electrodes to the gas atoms and molecules in the discharge space one after another to increase the secondary electrons exponentially and to excite the collided gas atoms. And divided into
[0043]
Of these, the latter time Tf is called a formation delay time, and is determined by the type and pressure of the gas, the applied voltage, the cell structure, and the like. On the other hand, the former time Ts is called a statistical delay time, and has a value that varies depending on the number of excited molecules and atoms existing in the space. That is, the write discharge delay time Tw is
Tw = Tf + Ts
And the pulse width WPsc-s of the scan pulse Psc-s and the pulse width WPd of the data pulse Pd required for reliably generating the write discharge and forming the wall charges are as follows:
WPsc-s ≧ Ts + Tf and WPd ≧ Ts + Tf
Need to be satisfied.
[0044]
Note that the write discharge delay time Tw depends on the data pulse voltage Vd, and becomes shorter as the applied voltage becomes higher.
[0045]
The sustain period after the address period is a period for display light emission, and application of a pulse is started from the sustain electrode 116 side, and thereafter, sustain pulses Psus-s and Psus-c of negative polarity are applied to the scan electrode 115 and the sustain electrode, respectively. It is applied to the electrodes 116 alternately. At this time, since the amount of wall charges of the display cell 120 in which the address discharge has not been performed in the address period is extremely small, no sustain discharge occurs even if the sustain pulses Psus-s and Psus-c are applied to the display cell 120.
[0046]
On the other hand, in the display cell 120 in which the write discharge has occurred in the address period, a positive charge is attached to the scan electrode 115 and a negative charge is attached to the sustain electrode 116, so that the negative sustain pulse applied to the sustain electrode 116 is applied. The voltage of Psus-c and the wall charge voltage overlap each other, the voltage in the discharge space exceeds the discharge start voltage, and discharge occurs.
[0047]
Once the discharge occurs, the wall charges are arranged so as to cancel the voltage applied to each electrode. Therefore, negative charges adhere to the sustain electrodes 116 and positive charges adhere to the scan electrodes 115, and as a result, the discharge stops.
[0048]
When the next sustain pulses Psus-s and Psus-c are applied, the potentials of the scan electrode 115 and the sustain electrode 116 are applied so as to be opposite to the potential of the previous sustain pulse. As a result, the effective voltage applied to the discharge space exceeds the discharge start voltage, and discharge occurs again.
[0049]
Hereinafter, the discharge is maintained by repeating the same steps. The brightness is determined by the number of repetitions of this discharge, that is, the number of sustain pulses.
[0050]
In the sustain erase period after the sustain period, a negative sustain erase pulse Pse-s is applied to the scan electrode 115. The negative sustaining erase pulse Pse-s is a sawtooth pulse, whereby the wall charge attached to each electrode of the emitting display cell 120 is reduced, and all the display cells in the plasma display panel are exposed to the wall. It is uniformed to a state with little charge.
[0051]
FIG. 33 is a graph showing the frequency of occurrence of a write discharge with respect to the elapsed time from the application of the scanning pulse Psc-s to a certain display cell 120 in the conventional plasma display panel, and the horizontal axis represents the application of the scanning pulse Psc-s. The elapsed time from the start and the vertical axis indicate the frequency of occurrence of write discharge.
[0052]
FIG. 34A shows a write discharge current waveform flowing to the scan electrode 115 during application of the scan pulse Psc-s when all display cells of one horizontal line are selected in the conventional plasma display panel. FIG. 34B shows a voltage waveform of the scanning pulse Psc-s.
[0053]
Times tf and tp in FIGS. 33 and 34 are the same. In FIG. 33A, the charge / discharge current when the scan pulse Psc-s charges / discharges the capacitance component of the plasma display panel is excluded.
[0054]
As shown in FIG. 33, the frequency of occurrence of write discharge has a distribution having a peak at time tp. Although there is some variation depending on the display cells 120, all the display cells 120 show a distribution having a peak near the time tp. Therefore, when the scanning pulse Psc-s and the data pulse Pd are simultaneously applied to a large number of display cells 120 belonging to one horizontal display line, the distribution of the occurrence frequency of the writing discharge on the horizontal display line is also shown in FIG. Similarly to the above, the shape has a peak at time tp. Accordingly, at this time, the write discharge current flowing to the scan electrode 115 also has a peak at the time tp as shown in FIG. The peak value of the write discharge current increases as the panel size where the discharge current per display cell increases or the number of cells in the horizontal direction selected at a time increases.
[0055]
The scanning pulse Psc-s cannot maintain its voltage when the peak value of the writing discharge current increases, and a voltage drop Vdrop occurs at time tp in FIG. 34B. When the voltage drop Vdrop occurs in the scan pulse Psc-s, the effective voltage between the scan electrode 115 and the data electrode 107 decreases, so that it is difficult for a write discharge to occur.
[0056]
In order to stably generate the write discharge, the data pulse voltage Vd needs to be increased. However, increasing the data pulse voltage Vd requires the use of a data driver having a high breakdown voltage, which increases the cost. Further, there is a new problem that the power consumed by the data driver increases. In addition, when the data pulse voltage Vd is increased, the write discharge to each display cell is more likely to be concentrated, so that the effect of increasing the data pulse voltage Vd is negated.
[0057]
Japanese Patent No. 2953342 proposes a method for suppressing the peak value of the write discharge current.
[0058]
In this method, the data electrodes 109 are divided into two groups, and the timing for applying the data pulse Pd to the data electrodes 109 is set to be different for each data electrode group. According to this method, the frequency of occurrence of write discharge can be dispersed into two peaks, and the peak value of write discharge current can be reduced to half of the conventional drive ratio.
[0059]
[Patent Document 1]
Japanese Patent No. 2953342
[0060]
[Problems to be solved by the invention]
Since the plasma display panel is a capacitive load, a charge / discharge current flows when a pulse is applied. The power consumed by this charge / discharge current is useless power that is not directly related to light emission.
[0061]
In the conventional driving method, when continuous display cells 120 on the same data electrode 107 are both selected, the data pulse Pd is continuously applied, so that wasteful power due to the charging / discharging current does not increase. Absent.
[0062]
On the other hand, according to the driving method described in Japanese Patent No. 2953342, it is necessary to temporarily stop the application of the data pulse Pd for each display line and to apply it again. Therefore, wasteful power due to the charge / discharge current increases.
[0063]
The present invention has been made in view of such a problem, and reduces a peak value of a write discharge current flowing to a scan electrode at the time of a write discharge without increasing wasteful power. It is an object to provide a plasma display device, a plasma display panel, and a driving method of a plasma display that can be driven.
[0064]
[Means for Solving the Problems]
Generally, the discharge starting voltage differs depending on the phosphor material formed in the display cell. When the discharge start voltage is different, the formation delay time in the write discharge is also different. Therefore, in a plasma display panel in which phosphors of three colors of red, green and blue are separately applied, a formation delay time occurs due to a difference in a discharge starting voltage due to a difference in a phosphor for each color. However, actually, even if the discharge start voltages are different, the formation delay time of the write discharge caused by the discharge start voltages is very short. In addition, it is usual to select a phosphor material so that there is almost no difference in the discharge starting voltage due to the difference in the phosphor for each color, and the difference in the write discharge delay time due to the difference in the phosphor for each color is substantially. Does not occur. Further, even if a formation delay time occurs due to a difference in discharge start voltage due to a difference in phosphor for each color, reducing the peak value of the writing discharge current to half, which is the object of the present invention, is quite difficult. Insufficient. In the present invention, the difference between the shortest value and the longest value of the formation delay time in the display cell in which the phosphor of the same color is formed is determined by the difference in the formation delay time caused by the difference in the firing voltage due to the difference in the phosphor for each color. It is characterized by being larger.
[0065]
Specifically, according to the present invention, a display cell is arranged at an intersection of a plurality of scan electrodes and a plurality of data electrodes, and the light emission of the display cell is controlled by a data pulse applied to the data electrode, and a screen display is performed. In the plasma display device performing the above, a function of making the write discharge formation delay time different for each of the plurality of data electrodes or for each of the plurality of data electrode groups obtained by dividing the plurality of data electrodes into a plurality of data electrode groups. A plasma display device characterized by having:
[0066]
Further, the present invention provides a first insulating substrate provided with a plurality of electrode pairs consisting of a plurality of scan electrodes and sustain electrodes extending in parallel with each other, and a direction orthogonal to the scan electrodes and the sustain electrodes. A second insulating substrate provided with a plurality of extending data electrodes is opposed to each other across a partition for holding a gap, and a discharge formed by the gap between the first and second insulating substrates is formed. In a plasma display device in which a space is filled with a discharge gas and a display cell is defined at an intersection of the electrode pair and the data electrode, for each of the plurality of data electrodes, or for the plurality of data electrodes, There is provided a plasma display device having a function of making the write discharge formation delay time different for each of the plurality of data electrode groups divided into data electrode groups.
[0067]
A first insulating substrate on which a plurality of pairs of scan electrodes and sustain electrodes extending in parallel with each other are arranged, and a plurality of data electrodes extending in a direction orthogonal to the scan electrodes and the sustain electrodes; Are disposed opposite to each other with a partition wall for maintaining a gap therebetween, and discharge gas is discharged into a discharge space formed by the gap between the first and second insulation substrates. A plasma display that is filled, defines unit light emitting pixels at intersections of the electrode pairs and the data electrodes, and covers the scan electrodes and sustain electrodes formed on the first insulating substrate with a dielectric layer In the panel driving method, the data electrodes are divided into two or more groups before the address period and before the start of the address period after the start of the pulse accompanied by the discharge applied to the scan electrodes. To provide a driving method of a plasma display panel characterized in that it comprises the step of applying an auxiliary pulse to more than one group of divided data electrode group.
[0068]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a block diagram showing a structure of a plasma display device 10 according to one embodiment of the present invention.
[0069]
As shown in FIG. 1, the plasma display device 10 according to the present embodiment includes an analog interface 20 and a plasma display module 30.
[0070]
The analog interface 20 includes a Y / C separation circuit 21 including a chroma decoder, an A / D conversion circuit 22, a synchronization signal control circuit 23 including a PLL circuit, an image format conversion circuit 24, and an inverse γ conversion circuit 25. , A system control circuit 26, and a PLE control circuit 27.
[0071]
Schematically, after converting the received analog video signal into a digital video signal, the analog interface 20 supplies the digital video signal to the plasma display module 30.
[0072]
For example, an analog video signal transmitted from a television tuner is decomposed into luminance signals of RGB colors by a Y / C separation circuit 21 and then converted into a digital signal by an A / D conversion circuit 22.
[0073]
Thereafter, when the pixel configuration of the plasma display module 30 is different from the pixel configuration of the video signal, the image format conversion circuit 24 performs necessary conversion.
[0074]
The characteristics of the display luminance with respect to the input signal of the plasma display panel are linearly proportional, but ordinary video signals are corrected (γ-converted) in advance in accordance with the characteristics of the CRT. For this reason, after performing A / D conversion of the video signal in the A / D conversion circuit 22, the inverse γ conversion circuit 25 performs inverse γ conversion on the video signal, and converts the digital video signal restored to the linear characteristic. Generate. This digital video signal is output to the plasma display module 30 as an RGB video signal.
[0075]
Since the analog video signal does not include a sampling clock and a data clock signal for A / D conversion, the PLL circuit built in the synchronization signal control circuit 23 supplies a horizontal synchronization signal supplied simultaneously with the analog video signal. , A sampling clock and a data clock signal are generated and output to the plasma display module 30.
[0076]
The PLE control circuit 27 performs brightness control. Specifically, when the average luminance level is equal to or less than a predetermined value, the display luminance is increased, and when the average luminance level exceeds the predetermined value, the display luminance is limited.
[0077]
The system control circuit 26 outputs various control signals to the plasma display module 30.
[0078]
The plasma display module 30 further includes a digital signal processing / control circuit 31, a panel section 32, and an in-module power supply circuit 33 containing a DC / DC converter.
[0079]
The digital signal processing / control circuit 31 includes an input interface signal processing circuit 34, a frame memory 35, a memory control circuit 36, and a driver control circuit 37.
[0080]
The input interface signal processing circuit 34 includes various control signals transmitted from the system control circuit 26, an RGB video signal transmitted from the inverse γ conversion circuit 25, a synchronization signal transmitted from the synchronization signal control circuit 23, and a transmission from the PLL circuit. Received data clock signal.
[0081]
For example, the average luminance level of the video signal input to the input interface signal processing circuit 34 is calculated by an input signal average luminance level calculation circuit (not shown) in the input interface signal processing circuit 34 and output as, for example, 5-bit data. Is done. Further, the PLE control circuit 27 sets PLE control data according to the average luminance level and inputs the PLE control data to a luminance level control circuit (not shown) in the input interface signal processing circuit 34.
[0082]
The digital signal processing / control circuit 31 processes these various signals in the input interface signal processing circuit 34 and then sends a control signal to the panel unit 32.
[0083]
The panel unit 32 includes a plasma display panel 50, a scan driver 38 for driving scan electrodes, a data driver 39 for driving data electrodes, and a high-voltage pulse circuit 40 for supplying a pulse voltage to the plasma display panel 50 and the scan driver 38. And a power recovery circuit 41 for recovering surplus power from the high-voltage pulse circuit 40.
[0084]
In the plasma display panel 50, the scanning driver 38 controls the scanning electrodes and the data driver 39 controls the data electrodes, so that lighting or non-lighting of a predetermined display cell is controlled, and desired display is performed.
[0085]
The logic power supply supplies the digital signal processing / control circuit 31 and the panel unit 32 with logic power. Further, the in-module power supply circuit 33 is supplied with DC power from a display power supply, converts the DC power voltage into a predetermined voltage, and then supplies the predetermined voltage to the panel unit 32.
[0086]
Hereinafter, a structure and a driving method of a plasma display panel 50 which is a component of the plasma display device 10 according to an embodiment of the present invention will be described.
(First embodiment)
FIG. 2 is a schematic diagram showing the entire plasma display panel 51 according to the first embodiment of the present invention. 3 and 4 are diagrams showing the shapes of the scanning electrodes 115a and the sustain electrodes 116 in the plasma display panel 51 in more detail. FIG. 3 is an enlarged view of the portion 122 in FIG. 4A is a cross-sectional view taken along line AA ′ on the left side of the panel center line 121 in FIG. 3, and FIG. 4B is a right side view of the panel center line 121 in FIG. 13 is a cross-sectional view taken along line BB ′ of FIG. In the plasma display panel 51 according to the first embodiment of the present invention, the same components as those in the conventional plasma display panel shown in FIGS. 27 and 28 have the same reference numerals as those in FIGS. 27 and 28. Is used.
[0087]
As shown in FIG. 3, in the plasma display panel 51 according to the present embodiment, the locations of the bus electrodes 105a are different with respect to the panel center line 121 as a boundary.
[0088]
For example, when the cell pitch is 1.08 × 0.36 [mm] and the width of the bus electrodes 105a and 106 is 70 [μm], the bus electrode 105a of the scan electrode 115a is located on the left side of the panel center line 121 in FIG. , The center line of which is located at a distance of 340 [μm] from the discharge gap center line 118 toward the upper non-discharge gap 114, and on the right side of the panel center line 121, the bus electrode of the scan electrode 115 a 105a is arranged such that its center line is located at a distance of 170 [μm] from the surface discharge gap center line 118 toward the upper non-discharge gap 114.
[0089]
Sustain electrode 116 has a distance of 340 [μm] from discharge gap center line 118 toward upper non-discharge gap 114 regardless of panel center line 121, similarly to the conventional plasma display panel shown in FIG. The sustain electrode 116 is formed such that the center of the bus electrode 106 is located.
[0090]
The bus electrodes 105a and 106 and the transparent electrodes 103 and 104 having such a configuration are covered with a dielectric layer 110, and a protective layer 112 made of magnesium oxide or the like that protects the dielectric layer 110 from discharging is formed thereon. ing.
[0091]
In a region on the right side of the panel center line 121, the bus electrode 105a is provided substantially at the center of the scanning electrode 115a, whereas in a region on the left side, the bus electrode 106a is located near the non-discharge gap 114. Will be provided.
[0092]
Further, since the dielectric layer 110 is formed by printing, the dielectric layer 110 is formed to have a constant film thickness with respect to the surface of the front substrate 101. Therefore, the thickness of the dielectric layer 110 on the bus electrode 105a is smaller than the thickness of other portions. As shown in FIGS. 4A and 4B, a portion C where the thickness of the dielectric layer 110 on the bus electrode 105a is small differs between the right region and the left region of the plasma display panel 51. Become. The portion C of the bus electrode 105a where the thickness of the dielectric layer 112 is smaller has a larger capacitance with respect to the discharge space 108 than the other portions of the dielectric layer 112.
[0093]
The writing discharge often occurs almost at the center of the scanning electrode 115a. For this reason, by increasing the capacitance in a substantially central region of the scanning electrode 115a, a strong electric field can be generated in this region, so that writing discharge is likely to occur. That is, the write discharge delay time Tw can be shortened. When the write discharge delay time Tw becomes shorter, the time when the occurrence frequency peaks also approaches the time when the application of the scanning pulse Psc-s is started.
[0094]
FIG. 5 is a diagram illustrating the frequency of occurrence of write discharge when one horizontal display line is selected in the plasma display panel 51 according to the present embodiment, and the horizontal axis indicates the progress from the start of the application of the scanning pulse Psc-s. The time and the vertical axis show the frequency of occurrence of write discharge.
[0095]
In FIG. 5, the solid line F1 represents the frequency of writing discharge of the display cell 120 in the right region of the plasma display panel 51, and the solid line F2 represents the frequency of writing discharge of the display cell 120 in the left region of the plasma display panel 51. Show.
[0096]
In the display cell 120 located in the right area of the plasma display panel 51, the bus electrode 105a is formed substantially at the center of the scanning electrode 115a, and is compared with the display cell 120 located in the left area of the plasma display panel 51. Therefore, the occurrence of the write discharge is shifted earlier in time. At this time, the occurrence frequency F3 of the write discharge when all the display cells 120 of one horizontal display line are selected is equal to the sum of the occurrence frequencies F1 and F2, and has a distribution indicated by a dotted line in FIG.
[0097]
FIG. 5 shows a conventional plasma display panel, that is, one horizontal display in which the electrodes of all the display cells 120 are arranged similarly to the electrodes in the left region of the plasma display panel 51 according to the present embodiment. The frequency of occurrence of the write discharge in the line is indicated by a dashed-dotted line F4.
[0098]
The conventional plasma display panel shown in FIG. 27 has a peak at time tp since the left area of the plasma display panel 51 according to the present embodiment and the arrangement position of the bus electrode 105a are the same. On the other hand, in the plasma display panel 51 according to the present embodiment, as shown in FIG. 5, the frequency of occurrence of write discharge in one horizontal display line has two peaks at times tp1 and tp. As described above, in the plasma display panel 51 according to the present embodiment, since the peak of the frequency of the writing discharge in the right region is advanced to the time tp1, the frequency of occurrence at the time tp is the same as the frequency of the conventional writing discharge. It can be seen that the peak is reduced to about half of the peak.
[0099]
FIG. 6 shows a waveform of a write discharge current flowing through the scan electrode 115a when all the display cells 120 of one horizontal display line are selected in the plasma display panel 51 according to the present embodiment by a solid line Iw1. 13 is a graph showing the waveform of a write discharge current under a similar condition in a display panel by a broken line Iw2.
[0100]
As shown in FIG. 5, in the plasma display panel 51 according to the present embodiment, the occurrence frequency of the writing discharge has a peak at times tp1 and tp, and therefore the writing discharge current in FIG. It has a peak. Here, the higher peak is defined as Iwp1.
[0101]
On the other hand, in the conventional plasma display panel, the frequency of occurrence of write discharge has only one peak, and therefore, the write discharge current also has only a peak at time tp. This peak is defined as Iwp.
[0102]
Since the peak of the frequency of occurrence of write discharge in the plasma display panel 51 according to the present embodiment is about half that of the conventional plasma display panel, the peak value of the write discharge current is also small. As a result, the voltage drop Vdrop is reduced, and a stable write operation can be performed with a relatively low data pulse voltage Vd.
[0103]
According to an experiment conducted by the inventor, the center of the bus electrode 105a is located at a distance of 150 μm or more and 300 μm or less from the surface discharge gap center line 118 toward the upper non-discharge gap 114. When the bus electrode 105a is arranged at a position other than that, the experimental result is obtained that the write discharge delay time Tw is shorter than when the bus electrode 105a is arranged at other positions and a difference of about 500 ns appears at the maximum. Therefore, the peak value of the write discharge current can be reduced by dividing the formation position of the bus electrode 105a into two types, that is, a position in the above range and a position outside the above range.
[0104]
In this way, by making the position where the bus electrode 105a is formed in each scanning electrode 115a different between the left and right sides of the plasma display panel 51 in the main scanning direction, the write discharge occurs in the left and right regions of the plasma display panel 51 in the main scanning direction. Can be made different.
[0105]
However, the vicinity of the surface discharge gap 119 is the brightest part in the display cell 120. Therefore, when the bus electrode 105a is formed in the vicinity of the discharge gap 119, this bright portion is blocked by the bus electrode 105a, and the luminance is greatly reduced, and the display quality may be deteriorated. In order to avoid this, a position within a range of 150 [μm] or more and within 300 [μm] from the surface discharge gap center line 118 toward the non-discharge gap 114 above, and a non-discharge position higher than a position within this range. It is desirable to separate the formation position of the bus electrode 105a into two types near the gap 114.
[0106]
Further, the frequency of occurrence of the write discharge clearly has two peaks, and in order to obtain a sufficient effect of reducing the peak value of the write discharge current, in the region on the right side of the center line 112 of the plasma display panel 51, the surface discharge is performed. The bus electrode 105a is formed such that the center line of the bus electrode 105a is arranged at a position of 150 [μm] or more and 200 [μm] from the gap center line 118 toward the upper non-discharge gap 114, and the plasma is formed. In a region on the left side of the center line 112 of the display panel 51, the bus electrode is located at a position of 290 [μm] or more and within 340 [μm] from the surface discharge gap center line 118 toward the upper non-discharge gap 114. It is desirable to form the bus electrode 105a so that the center line of the bus electrode 105a is arranged.
(Second embodiment)
Next, a plasma display panel 52 according to a second embodiment of the present invention will be described with reference to FIG. FIG. 7 is a plan view in which the portion 122 in FIG. 2 is enlarged and only the front substrate 101 is viewed from the display surface, as in FIG.
[0107]
The case where the cell size in the present embodiment is 1.08 × 0.36 [mm] is described as an example.
[0108]
As shown in FIG. 7, in the plasma display panel 52 according to the present embodiment, the bus electrode 105A of the scanning electrode 115 is located at a position of 340 [μm] from the discharge gap center line 118 toward the upper non-discharge gap 114. The display cell 120 in which the bus electrode 105A is formed so that the center line is arranged, and the center line of the bus electrode 105A is arranged at a position of 170 [μm] from the surface discharge gap center line 118 toward the upper non-discharge gap 114. The display cells 120 on which the bus electrodes 105A are formed are alternately arranged.
[0109]
By forming the bus electrode 105A of the scanning electrode 115 in this manner, the position of a portion having a large capacitance is switched between the adjacent display cells 120. For this reason, the display cell 120 having the earlier peak occurrence time of the frequency of the writing discharge is divided into half the display cells 120 having the earlier peak generation time, and the same effect as the plasma display panel 51 according to the first embodiment can be obtained. .
[0110]
A feature of the plasma display panel 52 according to the present embodiment is that the positions of the bus electrodes 105A are alternately switched. In the plasma display panel 51 according to the first embodiment, since the positions of the bus electrodes 105 are different between the left and right regions of the plasma display panel 51, the positions where the bus electrodes 105 shield light are different. As a result, there was a difference in luminance between the left region and the right region of the plasma display panel 51. Due to this difference, the boundary line between the left and right regions of the plasma display panel 51 may be seen, but in the plasma display panel 52 according to the present embodiment, the positions of the bus electrodes 105A are alternately switched. As a whole, the boundary line between the left and right regions of the plasma display panel 52 is not seen, and the in-plane uniformity of the luminance is higher than that of the plasma display panel 51 according to the first embodiment. There are advantages that can be achieved.
(Third embodiment)
Next, a plasma display panel 53 according to a third embodiment of the present invention will be described with reference to FIG. FIG. 8 is a plan view in which the portion 122 in FIG. 2 is enlarged and only the front substrate 101 is viewed from the display surface, similarly to FIG.
[0111]
The case where the cell size in the present embodiment is 1.08 × 0.36 [mm] is described as an example.
[0112]
As shown in FIG. 8, in the plasma display panel 53 according to the present embodiment, the center line of the bus electrode 105B of the scan electrode 115B is aligned with the discharge gap center line 118 of the display cell 120 located on the leftmost side of the plasma display panel 53. From the surface discharge gap center line 118 of the display cell 120 located on the rightmost side of the plasma display panel 53 toward the upper non-discharge gap. It is a straight line connecting the position. That is, the bus electrode 105B of the scanning electrode 115B has a center line inclined with respect to the sustain electrode 106.
[0113]
By forming the bus electrode 105B in this manner, the position where the bus electrode 105B is formed is different in all the horizontal display cells 120, and the portion having a large capacitance is located from the left side of the plasma display panel 53. The position gradually approaches the discharge gap center line 118 toward the right side, and the position of the portion where the capacitance is large differs for each display cell 120.
[0114]
FIG. 9 shows a waveform of a write discharge current flowing through the scan electrode 115B when all the display cells 120 of one horizontal display line are selected in the plasma display panel 53 according to the present embodiment by a solid line Iw3. It is the graph which showed the waveform of the write discharge current under the same conditions in the panel by the broken line Iw2.
[0115]
In the plasma display panel 53 according to the present embodiment, unlike the first and second embodiments, a portion having a large capacitance gradually becomes closer to the discharge gap center line from the left side to the right side of the plasma display panel 53. 118, the peak of the writing discharge frequency indicated by each display cell 120 gradually approaches the time when the application of the scanning pulse Psc-s is started from the left side to the right side of the plasma display panel 53. Go. Therefore, the peak time of the occurrence frequency in one horizontal display line is also dispersed, and the peak value of the write discharge current in the plasma display panel 53 according to the present embodiment is set to be smaller than the peak value of the write discharge current in the conventional plasma display panel. Can be smaller.
[0116]
Further, in the plasma display panel 53 according to the present embodiment, the bus electrode 105B is formed so as not to change stepwise but to change continuously. Thus, the wiring length of the bus electrode 105B of the scanning electrode 115B can be shorter than that of the plasma display panel 52 according to the second embodiment, and the resistance value of the scanning electrode 115B can be reduced. As a result, it is possible to reduce the distortion of the voltage waveform due to the wiring resistance.
(Fourth embodiment)
Next, a plasma display panel 54 according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 10 is an enlarged plan view of the portion 122 in FIG. 2 and only the front substrate 101 viewed from the display surface, similarly to FIG.
[0117]
The case where the cell size in the present embodiment is 1.08 × 0.36 [mm] is described as an example.
[0118]
In the plasma display panel 54 according to the present embodiment, the center line of the bus electrode 106A of the sustain electrode 116A is positioned below the discharge gap center line 118 of the display cell 120 located on the rightmost side of the plasma display panel 54. And a straight line connecting a position of 340 [μm] toward the surface discharge gap center line 118 located on the leftmost side of the plasma display panel 54 and a position of 170 [μm] toward the lower non-discharge gap 114. The position where the bus electrode 105B of the scanning electrode 115B is formed is the same as that of the third embodiment. With such a configuration, bus electrode 105B of scan electrode 115B and bus electrode 106A of sustain electrode 116A are parallel to each other.
[0119]
In the plasma display panel 54 according to the present embodiment, a portion where the capacitance is large on the sustain electrode 116A also differs for each display cell 120. The write discharge is triggered by an opposing discharge generated between the data electrode 107 and the scan electrode 115B, and a surface discharge is generated between the scan electrode 115B and the sustain electrode 116A. That is, the frequency of occurrence of the write discharge depends on the distribution of the frequency of occurrence of the opposing discharge between the data electrode 107 and the scan electrode 115B. Therefore, in the plasma display panel 54 according to the present embodiment, the distribution of the frequency of occurrence of the write discharge is the same as that in the third embodiment described above, regardless of the position where the bus electrode 106A of the sustain electrode 116A is formed. And the effect of reducing the peak value of the write discharge current becomes the same.
[0120]
In the above-described third embodiment, the portion shielded by the bus electrode 105 </ b> B is closer to the discharge gap 119 as the display cell 120 is located on the right side of the plasma display panel 53. The distribution becomes darker toward the right side.
[0121]
On the other hand, in the plasma display panel 54 according to the present embodiment, the portion shielded by the bus electrode 106A of the sustain electrode 116A is opposite to the bus electrode 105B of the scan electrode 115B on the left side of the plasma display panel 54. The closer to the area, the closer to the discharge gap 119. Therefore, there is an advantage that the light-shielded portion is left-right symmetric, and the luminance distribution can be made more uniform than the plasma display panel 53 according to the third embodiment. That is, the bus electrode 105B of the scan electrode 115B and the scan electrode 115B are formed substantially parallel to the bus electrode 106A of the sustain electrode 116A that faces the discharge electrode 119 with the discharge gap 119 interposed therebetween. Are equally spaced, and the width in the sub-scanning direction of the opening, that is, the portion not shielded by the bus electrode, can be made substantially uniform.
(Fifth embodiment)
Next, a plasma display panel 55 according to a fifth embodiment of the present invention will be described with reference to FIG. FIG. 11 is a plan view in which the portion 122 in FIG. 2 is enlarged and only the front substrate 101 is viewed from the display surface, as in FIG.
[0122]
In the plasma display panel 55 according to the present embodiment, the bus electrode 105C is formed by reversing the arrangement of the bus electrode 105A of the scanning electrode 115A in the second embodiment, and the bus electrode 106B of the sustain electrode 116B is also connected to the bus. It is formed so as to have the same arrangement as the electrode 105C.
[0123]
Also in the plasma display panel 55 according to the present embodiment, since the interval between the bus electrode 105C and the bus electrode 106B is always constant, the uniformity of the area of the portion of the display cell 120 that is not shielded by the bus electrode is improved. The brightness distribution of the plasma display panel 55 can be made uniform.
(Sixth embodiment)
Next, a plasma display panel 56 according to a sixth embodiment of the present invention will be described with reference to FIG. FIG. 12 is a plan view in which the portion 122 in FIG. 2 is enlarged and only the front substrate 101 is viewed from the display surface, as in FIG.
[0124]
The case where the cell size in the present embodiment is 1.08 × 0.36 [mm] is described as an example.
[0125]
In the plasma display panel 56 according to the present embodiment, the display cells to which the red phosphor is applied are 121-R, the display cells to which the green phosphor is applied are 121-G, and the display cells to which the blue phosphor is applied. 121-B.
[0126]
In the plasma display panel 56 according to the present embodiment, as shown in FIG. 12, the center line of the bus electrode 105D of the scan electrode 115D is higher than the discharge gap center line 118 for the display cell on the display cell 120-B. At a distance of 340 [μm] toward the non-discharge gap 114, and at a distance of 255 [μm] from the discharge gap center line 118 toward the non-discharge gap 114 above the display cell on the display cell 120 -G. In the display cells on display cells 120-R, bus electrodes 105D of scan electrodes 115D are formed so as to be located at a distance of 170 [μm] from discharge gap center line 118 toward upper non-discharge gap 114, respectively. I do.
[0127]
As described above, the plasma display panel 56 according to the present embodiment is different from the plasma display panel 1155 according to the first to fifth embodiments in that the position where the bus electrode 105D of the scanning electrode 115D is formed for each color. They differ in that they differ. As a result, a portion where the capacitance is higher than other portions differs for each color.
[0128]
FIG. 13 shows a waveform of a write discharge current flowing through the scan electrode 115D when all the display cells 120 of one horizontal display line are selected in the plasma display panel 56 according to the present embodiment by a solid line Iw4. FIG. 11 is a graph showing a waveform of a write discharge current under a similar condition in a display panel by a dotted line Iw2.
[0129]
In the plasma display panel 56 according to the present embodiment, for the above-described reason, the peak frequency of the writing discharge is such that red occurs earliest and blue occurs latest. Green is halfway between red and blue. That is, the peak of the frequency of occurrence of the writing discharge is delayed in the order of red <green <blue. Here, the peak times of red, green, and blue are defined as tpr, tpg, and tpb.
[0130]
As shown in FIG. 13, the times at which the write discharge current peaks are in the order of tpr <tpg <tpb = tp, and have three peaks.
[0131]
tpb = tp because the position of the bus electrode 105D formed in the display cell 120-B is the same as that of the conventional plasma display panel.
[0132]
Also in the plasma display panel 56 according to the present embodiment, the frequency of occurrence of write discharge is dispersed into three, so that the peak value of the write discharge current can be smaller than that of the conventional plasma display panel.
[0133]
In the third embodiment (FIG. 8) and the fourth embodiment (FIG. 10) described above, even in the same color, there are display cells 120 in which the locations where the bus electrodes 105B are formed are different. Therefore, when viewed in a picture element unit (a unit displayed as a set of red, green and blue), there are two types of constituent elements. On the other hand, in the plasma display panel 56 according to the present embodiment, in the display cells 120 of the same color, the formation positions of the bus electrodes 105D are the same, so that all the picture element units have the same configuration, and the There is an advantage that display can be made uniform.
(Seventh embodiment)
Next, a plasma display panel 57 according to a seventh embodiment of the present invention will be described with reference to FIGS. FIG. 14 is a plan view in which the portion 122 in FIG. 2 is enlarged and only the front substrate 101 is viewed from the display surface, as in FIG. 3, and FIG. 15A is a view taken along line AA ′ in FIG. FIG. 15B is a cross-sectional view of the front substrate 101 taken along line BB ′ of FIG.
[0134]
The case where the cell size in the present embodiment is 1.08 × 0.36 [mm] is described as an example.
[0135]
In the plasma display panel 57 according to the present embodiment, the bus electrode 105E of the scan electrode 115E and the bus electrode 106C of the sustain electrode 116C are formed of thin film electrodes having a thickness of 1 [μm]. Further, a dielectric layer 110a having a high dielectric constant is provided on a part of the dielectric layer 110, and the dielectric layer 110 is formed so as to have a uniform thickness as a whole.
[0136]
For example, the high dielectric constant dielectric layer 110a is formed in a region where the bus electrode 105 is formed in the plasma display panel 51 according to the first embodiment. That is, in the region on the left side of the panel center line 121 in FIG. 2, the high dielectric constant dielectric layer 110a is disposed on the transparent electrode 103 of the scan electrode 115E from the surface discharge gap center line 58 toward the non-discharge gap 114 above. At the position of 340 [μm] (accordingly, overlapping with the bus electrode 105E of the scanning electrode 115E) (see FIG. 15A), in the area on the right side of the panel center line 121, Each is formed at a position of 170 [μm] toward the discharge gap 114 (see FIG. 15B). The side of the sustain electrode 116C is formed only of the dielectric layer 110, as in the conventional plasma display panel.
[0137]
In the plasma display panel 57 having such a structure, the thickness of the bus electrodes 105E and 106C is sufficiently thinner than the dielectric layer 110, and the thickness of the dielectric layer 110 on the bus electrodes 105E and 106C is further reduced. The change in capacitance due to the change hardly occurs. On the other hand, in the region where the high dielectric constant dielectric layer 110a is formed, the capacitance becomes larger with respect to the discharge gas space 108, and the effective voltage applied in the discharge gas space 108 is increased. be able to.
[0138]
Therefore, as in the case of the first embodiment described above, also in the plasma display panel 57 according to the present embodiment, the peak value of the write discharge current is smaller than the peak value of the conventional plasma display panel.
[0139]
In the plasma display panels 52 to 56 according to the second to sixth embodiments, the portion where the dielectric layer 110 becomes thinner according to the position where the bus electrodes 105A to 105E are formed, as in the present embodiment, The same effect can be obtained by changing the configuration using the high dielectric constant dielectric layer 110a as a part of the body layer 110.
[0140]
Further, it is not always necessary to form the entire dielectric layer 110 in the thickness direction as the high dielectric constant dielectric layer 110a.
[0141]
Further, in the plasma display panel 57 according to the present embodiment, since the high dielectric constant dielectric layer 110a is used, there is no light shielding unlike the bus electrodes 105E and 106C. Therefore, even if the high dielectric constant dielectric layer 110a is formed in the vicinity of the discharge gap 119, the brightness does not decrease due to light shielding, and the display quality does not decrease. As a result, the number of combinations of means for dispersing the occurrence frequency of the write discharge increases, and particularly when the cell size is large, the peak value of the write discharge current can be reduced by various means.
(Eighth embodiment)
Next, a plasma display panel 58 according to an eighth embodiment of the present invention will be described with reference to FIGS. FIG. 16A is a cross-sectional view of the front substrate 101 of the present embodiment taken along the line AA ′ in FIG. 14, and FIG. 16B is a front substrate 101 of the present embodiment taken along the line BB ′ in FIG. FIG.
[0142]
In the plasma display panel 58 according to the present embodiment, instead of forming the high dielectric constant dielectric layer 110a in the plasma display panel 57 according to the seventh embodiment, the dielectric layer 110 is partially formed as described below. The thickness is made thinner.
[0143]
In the plasma display panel 58 according to the present embodiment, the bus electrodes 105E and 106C are formed of thin-film electrodes having a thickness of 1 [μm]. Further, as shown in FIG. Are partially thinned to increase the capacitance. Even in such a structure, the peak value of the write discharge current can be reduced as in the plasma display panel 57 according to the seventh embodiment. That is, the position of the portion where the capacitance of the capacitance component formed by the dielectric layer sandwiched between the scan electrode and the discharge space is relatively high on the scan electrode 115E is determined for each data electrode or for each data electrode group. With a different configuration, the peak value of the write discharge current can be reduced.
[0144]
In the plasma display panels 52 to 56 according to the second to sixth embodiments, the thickness of a part of the dielectric layer 110 is reduced according to the formation positions of the bus electrodes 105A to 105E, as in the present embodiment. The same effect can be obtained even if the structure is changed to a thinner structure.
[0145]
Also in the present embodiment, unlike the first to sixth embodiments, no reduction in luminance due to light shielding occurs.
(Ninth embodiment)
Next, a plasma display panel 59 according to a ninth embodiment of the present invention will be described with reference to FIGS. FIG. 17A is a cross-sectional view of the front substrate 101 of the present embodiment taken along the line AA ′ of FIG. 14, and FIG. 17B is a front substrate 101 of the present embodiment taken along the line BB ′ of FIG. FIG.
[0146]
In the plasma display panel 59 according to the present embodiment, the bus electrodes 105E and 106C of the front substrate 101 are formed of thin film electrodes having a thickness of 1 [μm], and all the display cells 120 have the same structure.
[0147]
On the other hand, in the rear substrate 102, for example, when the cell pitch is 1.08 × 0.36 [mm], the high dielectric constant dielectric layer 113a is formed as follows. In the region on the left side of panel center line 121, high dielectric constant dielectric layer 113a is formed on data electrode 107 at a distance of 340 [μm] from surface discharge gap center line 118 toward non-discharge gap 114 above ( 17 (A), in a region on the right side of the panel center line 121, the data electrode 107 on the rear substrate 402 at a distance of 170 [μm] from the surface discharge gap center line 118 toward the upper non-discharge gap 114. A high dielectric constant dielectric layer 113a is formed thereon (see FIG. 17B). In other portions, the dielectric layer 110 is formed.
[0148]
In the above-described first to eighth embodiments, a region having a large capacitance is formed on a part of the scan electrode side, so that the scan electrode 115A-E and the data electrode 107 sandwich the discharge gas space 108. A part of the capacitance formed therebetween is different from other parts. Even when a portion having a large capacitance is formed on a part of the data electrode 107 as in the present embodiment, a part of the capacitance is different as in the first to eighth embodiments. And the effective voltage applied in the discharge gas space 108 can be partially increased. Therefore, as described above, also in the plasma display panel 59 according to the present embodiment, the peak value of the write discharge current is smaller than the peak value of the conventional plasma display panel.
(Tenth embodiment)
Next, a plasma display panel 60 according to a tenth embodiment of the present invention will be described with reference to FIGS. FIG. 18A is a cross-sectional view of the front substrate 101 of the present embodiment taken along the line AA ′ of FIG. 14, and FIG. 18B is a front substrate 101 of the present embodiment taken along the line BB ′ of FIG. FIG.
[0149]
In the plasma display panel 60 according to the present embodiment, the bus electrodes 105E and 106C of the front substrate 101 are formed of thin film electrodes having a thickness of 1 [μm], and all the display cells 120 have the same structure.
[0150]
On the other hand, on the rear substrate 102, for example, when the cell pitch is 1.08 × 0.36 [mm], the dielectric layer 113 is formed as follows.
[0151]
In the area on the left side of panel center line 121, dielectric layer 113 is thinner on data electrode 107 at a distance of 340 [μm] from surface discharge gap center line 118 toward non-discharge gap 114 above than other parts. In the area on the right side of the panel center line 121, a dielectric is formed on the data electrode 107 at a distance of 170 μm from the surface discharge gap center line 118 toward the non-discharge gap 114 (see FIG. 18A). The layer 113 is formed thinner than other portions.
[0152]
As described above, in the plasma display panel 60 according to the present embodiment, a portion having a large capacitance is formed by partially forming the dielectric layer 113 on the data electrode 107 to be thin. Thereby, also in the plasma display panel 60 according to the present embodiment, the peak value of the write discharge current becomes smaller than the peak value of the conventional plasma display panel.
[0153]
In the above-described eighth and ninth embodiments, the portion having a large capacitance formed on the data electrode 107 is also referred to as the capacitance on the scanning electrodes 115A-E in the first to seventh embodiments. A similar effect can be obtained by forming at a position corresponding to a portion where is larger. In other words, the position of the portion where the capacitance of the capacitance component formed by the dielectric layer sandwiched between the data electrode and the discharge space is relatively high on the data electrode is different for each data electrode or for each data electrode group. With this configuration, the peak value of the write discharge current can be reduced.
[0154]
In the above-described first to tenth embodiments, the example using the stripe-shaped partition wall 109 and the rectangular transparent electrode has been described. However, each embodiment is not limited to these, and other embodiments are not limited thereto. It is also possible to use a transparent electrode having a shape or a grid-like partition structure.
[0155]
As described above, according to the plasma display panels according to the first to tenth embodiments, the distribution of the capacitance of the capacitance component formed by the dielectric layer sandwiched between the scan electrode or the data electrode and the discharge space. Can be different for each data electrode or for each data electrode group, and thus, the formation delay time of the write discharge can be different for each data electrode or each data electrode group. Thus, it is possible to reduce the peak value of the write discharge current flowing to the scan electrode during the write discharge.
[0156]
Hereinafter, an embodiment will be described in which the state of the wall charge of each discharge cell at the start timing of the data pulse is made different for each data electrode group, so that the write discharge formation delay time differs for each data electrode group. . The following embodiment is an example as a driving method of a plasma display panel. It is assumed that the plasma display panel in the following embodiment has the same structure as the conventional plasma display panel shown in FIG. However, the plasma display panel to which the following embodiments are applied does not necessarily need to have the sustain electrodes, and may be any plasma display panel having at least the scan electrodes and the data electrodes.
(Eleventh embodiment)
FIG. 19 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the eleventh embodiment of the present invention.
[0157]
The difference from the conventional driving waveform shown in FIG. 32 is that the plurality of data electrodes 107 are divided into odd-numbered data electrodes 107A and even-numbered data electrodes 107B, and during application of the charge adjustment pulse Ppe-s, The point is that the auxiliary pulse 201 is applied to the odd-numbered data electrodes 107A. The other points are the same as the conventional driving method shown in FIG.
[0158]
Hereinafter, an operation of the plasma display panel driven by the plasma display panel driving method according to the present embodiment will be described.
[0159]
When the charge adjustment pulse Ppe-s is applied, the auxiliary pulse 201 is applied to the odd-numbered column data electrodes 107A. Therefore, the priming erase discharge occurs between the odd-numbered column display cells 120 and the even-numbered column display cells 120. The way of occurrence is different. For this reason, at the end of the application of the auxiliary pulse 201, since the arrangement of the wall charges is different between the odd-numbered display cells and the even-numbered display cells, the internal electric field generated by the wall charges is also different.
[0160]
In this case, since the auxiliary pulse 201 is a pulse of positive polarity, the internal electric field in the address period between the scan electrodes 115 and the data electrodes 107 of the display cells included in the odd columns is smaller than the internal electric field in the display cells of the even columns. Also tend to be smaller. As a result, even though the applied voltage is the same, the internal electric field acting at the time of the write discharge in the address period is different between the display cells included in the even columns and the display cells included in the odd columns. That is, since there are two types of internal electric fields, the write discharge delay time also varies.
[0161]
As described above, the write discharge delay time (Tw) refers to the time from when a voltage is applied to the discharge gas space 108 to when the discharge is observed as light emission (or current), and includes the display cell structure, gas type, and voltage. It is equal to the sum of the formation delay time Tf determined by the setting and the statistical delay time Ts determined stochastically.
[0162]
The fact that the statistical delay time Ts is a stochastic phenomenon means that when a discharge is observed many times in the same display cell under the same driving conditions, the discharge start time varies. The degree of the variation depends on the probability that the initial electrons appear in the discharge space and the probability that the initial electrons do not “discharge failure”. Here, “discharge failure” means that the initial electrons disappear because they cannot contribute to the occurrence of discharge.
[0163]
First, the probability that the initial electrons appear in the discharge gas space 108 largely depends on the discharge history up to that time. That is, if a discharge is generated as a pilot flame, the probability of appearance of initial electrons in the next discharge increases (this is called a "priming effect"). If the probability increases, the variation in the discharge start timing decreases, so that the scan pulse can be shortened. However, if the probability decreases, the variation in the discharge start timing increases, so that the scan pulse needs to be long. This is why the priming discharge must be generated periodically. That is, if there is no priming discharge, the scanning pulse and the data pulse must be long, and the time available for the sustain period is not enough. Therefore, it is necessary to generate the priming discharge in order to take a sufficient sustain period. .
[0164]
Note that the probability of appearance of the initial electrons is increased not only by the priming discharge but also by the sustain discharge. This means that the larger the number of illuminated pixels in the plasma display panel, the smaller the variation in writing discharge. The probability that the initial electrons do not “fail in discharge” increases as the voltage applied to the discharge gas space 108 increases. That is, as the applied voltage increases, the variation in the write discharge decreases.
[0165]
The formation delay time Tf is defined as a period from the time when initial electrons appear in the discharge gas space 108 (assuming that no discharge failure occurs) to the time when the discharge grows to such an extent that light emission (or current) can be observed in the discharge gas space 108. It is time to do.
[0166]
The formation delay time Tf depends on the time required for the initial electrons to be accelerated by the internal electric field of the display cell and reach the anode. That is, the stronger the internal electric field of the display cell, the shorter the formation delay time Tf. This internal electric field is the sum of the internal electric fields induced by the scan pulse voltage, the data pulse voltage, and the wall charges, respectively, in terms of the write discharge. Therefore, in order to realize the variation of the write discharge start timing by the formation delay time Tf, either the applied voltage is varied for each display cell, or the wall charge before writing is varied for each display cell. That is all that is required.
[0167]
Next, the relationship between the variation of the write discharge delay time (Tw) and the current will be described with reference to the schematic diagram of FIG.
[0168]
The current waveform corresponds to the frequency distribution of the occurrence of discharge. When a plurality of display cells start discharging at the same time, if the variation in the write discharge delay time (Tw) is large, the current waveform accompanying the discharge becomes broad. If the variation of the discharge delay time (Tw) is small, the waveform becomes steep, and the peak of the current becomes large. Therefore, if the variation in the discharge start timing is small, the peak current tends to increase, and the voltage drop tends to increase accordingly.
[0169]
For this reason, as employed in the driving method of the plasma display panel according to the present embodiment, by applying the auxiliary pulse 201 at the time of applying the charge adjustment pulse Ppe-s, an internal electric field having two types of intensities is generated. Accompanying this, the peak current can be reduced by making the distribution of the writing discharge two distributions. The situation is shown in FIG.
[0170]
In the driving method of the plasma display panel according to the present embodiment, the magnitude of the voltage of the auxiliary pulse 201 is set to the same voltage value as the data pulse voltage Vd. The voltage value can also be selected.
[0171]
In the driving method of the plasma display panel according to the present embodiment, the auxiliary pulse 201 is not applied to the even-numbered data electrodes 107B, but has a different voltage value from the auxiliary pulse 201 applied to the odd-numbered data electrodes 107A. The same effect can be expected by applying the auxiliary pulse to the data electrodes 107B of the even-numbered columns.
[0172]
For example, when the auxiliary pulse 201 having a voltage of 60 V is applied to the data electrodes 107A in the odd columns, an auxiliary pulse having a voltage of −20 V can be applied to the data electrodes 107B in the even columns.
[0173]
Further, in the method of driving the plasma display panel according to the present embodiment, the auxiliary pulse 201 is applied only to the odd-numbered data electrodes 107A, but the same applies when the auxiliary pulse 201 is applied only to the even-numbered data electrodes 107B. Effects can be obtained.
[0174]
Further, in the driving method of the plasma display panel according to the present embodiment, the data electrodes 107 are divided into even columns and odd columns, but other classification methods are also possible as long as the same effects can be obtained. . For example, the data electrode 107 may be divided into two data electrode groups at the left half and the right half of the screen with the center line of the screen as a boundary, or the data electrodes 107 may be divided into N data electrodes (N is a positive integer of 2 or more). It is also possible to apply the auxiliary pulse 201.
[0175]
In addition, as shown in FIG. 22, it is possible to change the waveform of the charge adjustment pulse Ppe-s. Since the auxiliary pulse 201 in the present embodiment has the same voltage value Vd as the data electrode pulse Pd, a strong discharge occurs between the charge adjustment pulse Ppe-s and the auxiliary pulse 201 with the waveform shown in FIG. Discharge may not occur. Therefore, as in the case of the charge adjustment pulse Ppe-s shown in FIG. 22, the value of the charge adjustment pulse Ppe-s is set to the base setting voltage Vbw of the scan electrode during the address period, and the auxiliary pulse 201 is set. In some cases, it may be effective to use a waveform that weakens the discharge between.
[0176]
Note that the value of the charge adjustment pulse Ppe-s does not necessarily need to be the base set voltage Vbw as long as the waveform can weaken the discharge between the auxiliary pulse 201 and the value.
[0177]
As described above, by employing the method for driving the plasma display panel according to the present embodiment, failure in writing discharge can be suppressed, and a plasma display panel with good display quality can be provided.
(Twelfth embodiment)
FIG. 23 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the twelfth embodiment of the present invention.
[0178]
In the eleventh embodiment, the auxiliary pulse 201 is applied to the odd-numbered data electrodes 107A during the application of the charge adjustment pulse Ppe-s. In the driving method, the auxiliary pulse 202 is applied to the odd-numbered data electrodes 107A after the application of the charge adjustment pulse Ppe-s. The other points are the same as in the eleventh embodiment.
[0179]
Immediately after the priming erase discharge ends, a certain amount of space charge remains in the discharge gas space 108 in the display cell. Therefore, by applying the auxiliary pulse 202 to the odd-numbered data electrodes 107A immediately after the application of the charge adjustment pulse Ppe-s, the remaining space charges can be rearranged. As a result, the internal electric field of the discharge gas space 108 differs between the odd-numbered display cells and the even-numbered display cells, and the discharge start timing of the write discharge can be varied.
[0180]
This auxiliary pulse 202 is desirably applied within 10 microseconds immediately after the end of the priming erase discharge. The reason is that if the time exceeds 10 microseconds, the remaining space charge is almost eliminated, and the effect of applying the auxiliary pulse 202 is reduced.
[0181]
In the present embodiment, the magnitude of the auxiliary pulse voltage 202 has the same voltage value as the data pulse voltage Vd, but any voltage value can be selected as long as the same effect can be expected. is there.
[0182]
In this embodiment, the auxiliary pulse 202 is not applied to the even-numbered column data electrode 107B, but the auxiliary pulse having a voltage value different from that of the auxiliary pulse 202 applied to the odd-numbered column data electrode 107A is applied to the even-numbered column. A similar effect can be expected even when the voltage is applied to the electrode 107B.
[0183]
For example, an auxiliary pulse 202 having a pulse voltage of 60 V may be applied to the odd-numbered data electrodes 107A, and an auxiliary pulse having a pulse voltage of −20 V may be applied to the even-numbered data electrodes 107B.
[0184]
In the present embodiment, the auxiliary pulse 202 is applied only to the odd-numbered data electrodes 107A. However, the same effect can be obtained by applying the auxiliary pulse 202 only to the even-numbered data electrodes 107B.
[0185]
Further, in the present embodiment, the data electrodes 107 are divided into the odd-numbered data electrodes 107A and the even-numbered data electrodes 107B. However, other methods of classification are possible as long as the same effects can be obtained. . For example, the data electrode 107 may be divided into two data electrode groups at the left half and the right half of the screen with the center line of the screen as a boundary, or the data electrodes 107 may be divided into N data electrodes (N is a positive integer of 2 or more). It is also possible to apply the auxiliary pulse 202.
[0186]
In the present embodiment, the auxiliary pulse 202 is applied after the application of the charge adjustment pulse Ppe-s. In the eleventh embodiment, the auxiliary pulse 201 is applied during the application of the charge adjustment pulse Ppe-s. I have. It is also possible to combine the two embodiments. That is, the application of the auxiliary pulse 201 may be started during the application of the charge adjustment pulse Ppe-s, and the application of the auxiliary pulse 202 may be continued even after the fall of the charge adjustment pulse Ppe-s. It is also effective to apply the auxiliary pulse 201 once during the application of the charge adjustment pulse Ppe-s and apply the auxiliary pulse 202 again after the application of the charge adjustment pulse Ppe-s.
[0187]
As described above, by employing the method for driving the plasma display panel according to the present embodiment, failure in writing discharge can be suppressed, and a plasma display panel with good display quality can be provided.
(Thirteenth embodiment)
FIG. 24 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the thirteenth embodiment of the present invention.
[0188]
In the driving method of the plasma display panel according to the embodiment, each of the data electrode 121R corresponding to red (R), the data electrode 121G corresponding to green (G), and the data electrode 121B corresponding to blue (B). Different auxiliary pulses are applied.
[0189]
As shown in FIG. 24, no auxiliary pulse is applied to the data electrode 121R. A 1 microsecond auxiliary pulse 203A is applied to the data electrode 121G during the application of the charge adjustment pulse Ppe-s. During the application of the charge adjustment pulse Ppe-s, an auxiliary pulse 203B of 5 microseconds is applied to the data electrode 121B. As described above, by applying auxiliary pulses having different pulse widths to the data electrodes corresponding to the respective colors of RGB, the arrangement of the wall charges after the priming discharge is erased is changed, and as a result, the internal electric field of the display cell is reduced. Can be different.
[0190]
In the present embodiment, the auxiliary pulses 203A and 203B are applied during the application of the charge adjustment pulse Ppe-s. However, as in the twelfth embodiment, the auxiliary pulses 203A and 203B are changed to the charge adjustment pulse Ppe-s. It is also possible to apply immediately after the application of -s.
[0191]
In the present embodiment, the pulse widths of the auxiliary pulses 203A and 203B are set to two types of 1 microsecond and 5 microseconds. However, other pulse widths may be selected as long as the same effect can be obtained. It is possible.
[0192]
Further, the number of pulse widths is not limited to two. For example, when data pulse voltages of data electrode groups are different from each other, auxiliary pulses having different pulse widths can be applied to each data electrode group. is there.
[0193]
Alternatively, auxiliary pulses having different pulse widths and different voltage values can be applied to each data electrode group.
[0194]
As described above, by employing the method for driving the plasma display panel according to the present embodiment, failure in writing discharge can be suppressed, and a plasma display panel with good display quality can be provided.
(14th embodiment)
FIG. 25 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the fourteenth embodiment of the present invention.
[0195]
In the thirteenth embodiment, auxiliary pulses 203A and 203B having different pulse widths are applied to the data electrodes 121R, 121G and 121B corresponding to the respective colors of RGB. This is because in the thirteenth embodiment, it is assumed that the discharge start voltages of the display cells corresponding to each of the RGB colors are all equal.
[0196]
However, in practice, the discharge starting voltage of the display cell corresponding to each color of RGB may be different due to the difference in the material of the RGB phosphor. As an extreme example, when the conventional driving method is adopted, the R display cell and the B display cell have a data pulse voltage of 50 V and write discharge occurs normally, while the G display cell has a data pulse voltage of 80 V or more. If not applied, writing discharge may not occur normally. In such a case, a data pulse voltage of 80 V or more must be applied to all the display cells, so that a relatively strong write voltage is applied to the R display cell and the B display cell. And discharge concentrates.
[0197]
In such a case, as shown in FIG. 25, a positive auxiliary pulse 204B is applied to the data electrode 121B corresponding to the B display cell, and a negative auxiliary pulse 204A is applied to the data electrode 121G corresponding to the G display cell. Is preferably applied.
[0198]
This is because the discharge start timing varies between the R display cell and the B display cell, and a negative auxiliary pulse 204A is applied to the data electrode 121G corresponding to the G display cell, so that the positive polarity is applied to the data electrode 121G. This is for accumulating wall charges. When positive wall charges are accumulated on the data electrode 121G, the wall charges are superimposed on the data pulse voltage to cause a writing discharge. Therefore, the data pulse voltage can be reduced as compared with the conventional example. By lowering the data pulse, the voltage at the time of writing in the R display cell and the B display cell is lowered, and the concentration of discharge in the writing discharge can be further dispersed.
[0199]
In this embodiment, a positive auxiliary pulse 204B is applied to the data electrode 121B corresponding to the B display cell, and a negative auxiliary pulse 204A is applied to the data electrode 121G corresponding to the G display cell. The polarity of the auxiliary pulse applied to each display cell can be switched between positive and negative according to the cell characteristics.
(Fifteenth embodiment)
In the present embodiment, the conventional drive waveform shown in FIG. 32 and the drive waveform in the eleventh embodiment are used together as the drive waveform. In the present embodiment, the area where light is emitted in one subfield of the plasma display panel is sensed, and if the light emitting area is smaller than a certain area, the conventional driving method is used to reduce the light emitting area to the certain area. If it exceeds, the driving method of the plasma display panel according to the eleventh embodiment is used.
[0200]
When the light emitting area exceeds a certain area, the average value of the number of lighted display cells per one scanning electrode increases, so that it is possible to apply the auxiliary pulse 201 only when necessary.
[0201]
The reason for such a configuration will be described below.
[0202]
As described in the eleventh embodiment, as the total number of light emitting display cells per field increases, the variation in the timing of the start of the write discharge decreases. Conversely, if the total number of light emitting display cells per field is small, the variation in write discharge start timing increases. Therefore, the scanning pulse width is determined by the pulse width when the total number of light emitting display cells per field is small. Here, when the auxiliary pulse 201 as described in the eleventh embodiment is applied when the total number of light emitting display cells per field is small, the write discharge start timing is delayed in the display cell to which the auxiliary pulse 201 is applied. turn into. Even when the variation in the discharge start timing does not change much, the required operation pulse width may be increased. On the other hand, if the total number of light emitting display cells per field increases, the variation in the write discharge decreases, so that there is no problem even if the formation delay is slightly increased by applying the auxiliary pulse 201.
[0203]
In other words, when the total number of light emitting display cells of the current screen or the total number of light emitting display cells of the previous screen is equal to or more than a predetermined value, the formation delay time of the writing discharge becomes relatively short, so that it is arranged on the scanning electrode. By controlling the state of the wall charges at the data pulse start timing of the write discharge of the light emitting display cell to be different for each data electrode group that drives the light emitting display cell, it is possible to lengthen the write discharge formation delay time as a whole. In addition, the peak current of the write discharge can be reduced. On the other hand, when the stated number of the light-emitting display cells on the current screen or the total number of the light-emitting display cells on the previous screen is less than a predetermined value, the write discharge formation delay time becomes relatively long, and therefore, it is disposed on the scan electrode. By controlling the state of the wall charge at the data pulse start timing of the write discharge of the light emitting display cell to be substantially the same in each light emitting display cell, the write delay is reduced by shortening the write discharge formation delay time. Can be prevented. Here, the total number of the light-emitting display cells on the current screen or the previous screen is considered, but from a microscopic viewpoint, the number of light-emitting display cells on the current subfield or the previous subfield and a plurality of subfields near the current subfield are considered. The same control can be performed according to whether or not the total number of the light emitting display cells is equal to or more than a predetermined value.
[0204]
Note that the drive waveform in the present embodiment uses the drive waveform shown in the eleventh embodiment, but any drive method that provides the same effect can be used. . For example, the drive waveforms described in the twelfth, thirteenth, or fourteenth embodiments can be used.
(Sixteenth embodiment)
FIG. 26 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the sixteenth embodiment of the present invention. 26 shows only the drive voltage waveforms of the m scan electrodes S1-Sm, the drive voltage waveforms of the odd-numbered column data electrodes 107A and the drive voltage waveforms of the even-numbered column data electrodes 107B. The waveform is omitted. The drive voltage waveform of the sustain electrode in the present embodiment is the same as the drive voltage waveform of the sustain electrode 116 shown in FIG. 19, for example.
[0205]
In the driving method of the plasma display panel according to the present embodiment, the number of display cells to be lit per scanning electrode is detected, and when the number of lit display cells is equal to or less than a predetermined fixed number, the data electrode 107A is detected. Are set to the scan electrodes so that no discharge occurs in accordance with the auxiliary pulse 201 applied to the scan electrodes (scan electrode S2 in FIG. 26). On the other hand, if the number of lighting display cells exceeds a predetermined fixed number, a voltage that causes a discharge in accordance with the auxiliary pulse 201 applied to the data electrode 107A is set to the scan electrode (see FIG. 26). Scanning electrodes S1, Sm).
[0206]
As described above, by changing the voltage set for each scan electrode, it is possible to cause the charge transfer by the auxiliary pulse to occur only in the display cells in the row where the current flowing during the write discharge is large.
[0207]
Note that the drive waveform in the present embodiment uses the drive waveform shown in the eleventh embodiment, but any drive method that provides the same effect can be used. . For example, the drive waveforms described in the twelfth, thirteenth, or fourteenth embodiments can be used.
[0208]
In the eleventh to fifteenth embodiments, the auxiliary pulses 201, 202, 203A, 203B, 204A, and 204B are applied during or after the application of the charge adjustment pulse Ppe-s. However, the same effect can be obtained by applying an auxiliary pulse during or immediately after the application of the pulse closest to the write discharge among the pulses applied before the write discharge. That is, for example, in a subfield without priming discharge, it is necessary to apply an auxiliary pulse during or after the application of the sustain erase pulse Pse-s. Thus, the timing of applying the auxiliary pulse changes according to the waveform of the pulse to be applied.
[0209]
Further, in the eleventh to fifteenth embodiments, the number of auxiliary pulses applied to the data electrode is only one. An auxiliary pulse configured in combination can also be applied.
[0210]
Although the example of the rectangular pulse is given as the auxiliary pulse, an auxiliary pulse other than the rectangular wave, for example, an inclined pulse may be applied to the data electrode as long as the pulse has the same effect as the above embodiment. Is also possible.
[0211]
By combining the first to tenth embodiments with the eleventh to sixteenth embodiments, finer control becomes possible. For example, by combining the above two methods, it is relatively easy to control the write discharge formation delay time for each data electrode.
[0212]
【The invention's effect】
As described above, according to the present invention, it is possible to make the peak value of the write discharge current smaller than the peak value of the conventional plasma display panel. For this reason, the voltage drop Vdrop generated in the scanning pulse Psc-s is smaller than the voltage drop Vdrop in the conventional plasma display panel. As a result, a decrease in the effective voltage between the scan electrode and the data electrode is suppressed, so that the plasma display panel can operate stably without increasing the data voltage, and the cost can be reduced. it can.
[0213]
Further, even in an image in which a data pulse is continuously applied to a continuous scanning line, it is not necessary to apply the data pulse again, so that an increase in useless power can be suppressed.
[0214]
Further, since the write discharge timing can be varied for each display cell, the current caused by the write discharge flowing through the scan driver does not concentrate, and the voltage drop can be suppressed. Therefore, it is possible to prevent the writing discharge from failing due to the voltage drop and prevent the display quality from deteriorating.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a structure of a plasma display device according to an embodiment of the present invention.
FIG. 2 is a schematic view showing the whole of the plasma display panel according to the first embodiment of the present invention.
FIG. 3 is a partially enlarged plan view of the plasma display panel according to the first embodiment.
FIG. 4A is a cross-sectional view taken along line AA ′ of FIG. 3, and FIG. 4B is a cross-sectional view taken along line BB ′ of FIG.
FIG. 5 is a graph showing the frequency of occurrence of write discharge when one horizontal display line is selected in the plasma display panel according to the first embodiment.
FIG. 6 shows a waveform of a write discharge current flowing through a scan electrode when all display cells of one horizontal display line are selected in the plasma display panel according to the first embodiment, and the same as in a conventional plasma display panel. 4 is a graph showing the waveform of a write discharge current under various conditions.
FIG. 7 is a partially enlarged plan view of a plasma display panel according to a second embodiment.
FIG. 8 is a partially enlarged plan view of a plasma display panel according to a third embodiment.
FIG. 9 shows a waveform of a write discharge current flowing to a scan electrode when all display cells of one horizontal display line are selected in the plasma display panel according to the third embodiment, and the same as in a conventional plasma display panel. 4 is a graph showing the waveform of a write discharge current under various conditions.
FIG. 10 is a partially enlarged plan view of a plasma display panel according to a fourth embodiment.
FIG. 11 is a partially enlarged plan view of a plasma display panel according to a fifth embodiment.
FIG. 12 is a partially enlarged plan view of a plasma display panel according to a sixth embodiment.
FIG. 13 shows a waveform of a write discharge current flowing to a scan electrode when all display cells of one horizontal display line are selected in the plasma display panel according to the sixth embodiment, and the same as in a conventional plasma display panel. 4 is a graph showing the waveform of a write discharge current under various conditions.
FIG. 14 is a partially enlarged plan view of a plasma display panel according to a seventh embodiment.
15A is a cross-sectional view taken along line AA ′ of FIG. 14, and FIG. 15B is a cross-sectional view taken along line BB ′ of FIG.
FIG. 16A is a cross-sectional view of the eighth embodiment taken along line AA ′ of FIG. 14, and FIG. 16B is an eighth embodiment taken along line BB ′ of FIG. FIG.
17A is a cross-sectional view of the ninth embodiment taken along line AA ′ of FIG. 14, and FIG. 17B is a ninth embodiment taken along line BB ′ of FIG. FIG.
18A is a cross-sectional view of the tenth embodiment taken along line AA ′ of FIG. 14, and FIG. 18B is a tenth embodiment taken along line BB ′ of FIG. FIG.
FIG. 19 is a signal waveform diagram showing a driving waveform in the driving method of the plasma display panel according to the eleventh embodiment of the present invention.
FIG. 20 is a schematic diagram showing a relationship between a variation in discharge start timing and a current waveform.
FIG. 21 is a schematic diagram showing a relationship between a variation in discharge start timing and a current waveform in the eleventh embodiment of the present invention.
FIG. 22 is a signal waveform diagram showing a driving waveform in a modification of the driving method of the plasma display panel according to the eleventh embodiment of the present invention.
FIG. 23 is a signal waveform diagram showing a driving waveform in a driving method of a plasma display panel according to a twelfth embodiment of the present invention.
FIG. 24 is a signal waveform diagram showing a driving waveform in a driving method of the plasma display panel according to the thirteenth embodiment of the present invention.
FIG. 25 is a signal waveform diagram showing a driving waveform in a driving method of a plasma display panel according to a fourteenth embodiment of the present invention.
FIG. 26 is a signal waveform diagram showing a driving waveform in a driving method of a plasma display panel according to a sixteenth embodiment of the present invention.
FIG. 27 is a perspective view illustrating the configuration of one display cell in a conventional plasma display panel.
FIG. 28 is a plan view showing the shape of each electrode in the conventional plasma display panel shown in FIG. 27 in more detail.
FIG. 29 is a schematic diagram showing an example of a gray scale display.
30 is a plan view of an electrode structure in the conventional plasma display panel shown in FIG.
FIG. 31 is a plan view showing another example of the electrode structure in the conventional plasma display panel shown in FIG. 27.
FIG. 32 is a timing chart showing a driving operation in one subfield in the conventional plasma display panel shown in FIG.
FIG. 33 is a graph showing the frequency of occurrence of write discharge with respect to the elapsed time from the application of a scanning pulse in a certain display cell in the conventional plasma display panel shown in FIG. 27;
FIG. 34 (A) shows a write discharge current waveform flowing to a scan electrode during application of a scan pulse when all display cells of one horizontal line are selected in a conventional plasma display panel. 34 (B) shows the voltage waveform of the scanning pulse.
[Explanation of symbols]
10. Plasma display device according to one embodiment of the present invention
20 Analog interface
30 Plasma display module 30
21 Y / C separation circuit
22 A / D conversion circuit 22
23 Synchronous signal control circuit
24 Image format conversion circuit
25 Inverse γ conversion circuit
26 System control circuit
27 PLE control circuit
31 Digital Signal Processing / Control Circuit
32 Panel
33 Power supply circuit in module
34 input interface signal processing circuit
35 frame memory
36 Memory control circuit
37 Driver control circuit
50 Plasma display panel
38 Scan Driver
39 Data Driver
40 High-voltage pulse circuit
41 Power recovery circuit
51 Plasma Display Panel According to First Embodiment
105a Bus Electrode of Scan Electrode in First Embodiment
115a Scanning Electrode in First Embodiment
52. Plasma display panel according to second embodiment
105A Bus Electrode of Scan Electrode in Second Embodiment
115A Scanning Electrode in Second Embodiment
53 Plasma Display Panel According to Third Embodiment
105B Bus Electrode of Scan Electrode in Third Embodiment
115B Scanning Electrode in Third Embodiment
54 Plasma Display Panel According to Fourth Embodiment
106A Bus electrode of sustain electrode in fourth embodiment
116A Sustain Electrode in Fourth Embodiment
55 Plasma Display Panel According to Fifth Embodiment
105C Bus Electrode of Scan Electrode in Fifth Embodiment
115C Scanning Electrode in Fifth Embodiment
106B Bus electrode of sustain electrode in fifth embodiment
116B Sustain Electrode in Fifth Embodiment
56 Plasma Display Panel According to Sixth Embodiment
105D Bus Electrode of Scan Electrode in Sixth Embodiment
115D Scanning Electrode in Sixth Embodiment
57 Plasma Display Panel According to Seventh Embodiment
105E Scan Electrode Bus Electrode in Seventh Embodiment
115E Scan Electrode in Seventh Embodiment
106C Bus electrode of sustain electrode in seventh embodiment
116C Sustain Electrode in Seventh Embodiment
58 Plasma Display Panel According to Eighth Embodiment
59 Plasma Display Panel According to Ninth Embodiment
60 Plasma display panel according to tenth embodiment
201, 202, 203A, 203B, 204A, 204B Auxiliary pulse

Claims (30)

In a plasma display device that arranges a display cell at an intersection of a plurality of scan electrodes and a plurality of data electrodes, controls light emission of the display cell by a data pulse applied to the data electrode, and performs screen display.
It has a function of making the write discharge formation delay time different for each of the plurality of data electrodes or for each of the plurality of data electrode groups obtained by dividing the plurality of data electrodes into a plurality of data electrode groups. Plasma display device. A first insulating substrate provided with a plurality of pairs of electrodes including a plurality of scan electrodes and sustain electrodes extending in parallel with each other, and a plurality of data electrodes extending in a direction orthogonal to the scan electrodes and the sustain electrodes; Are disposed opposite to each other with a partition wall for maintaining a gap therebetween, and discharge gas is discharged into a discharge space formed by the gap between the first and second insulation substrates. Filled, in a plasma display device in which a display cell is defined at the intersection of the electrode pair and the data electrode,
It has a function of making the write discharge formation delay time different for each of the plurality of data electrodes or for each of the plurality of data electrode groups obtained by dividing the plurality of data electrodes into a plurality of data electrode groups. Plasma display device. 3. The plasma display device according to claim 1, wherein timings and voltages of data pulses applied to the plurality of data electrodes or data electrode groups are substantially the same. The difference between the shortest value and the longest value of the formation delay time in the display cell on which the phosphor is formed is larger than the difference in the formation delay time caused by the difference in the firing voltage due to the difference in the phosphor for each color. The plasma display device according to claim 1. 5. The device according to claim 1, wherein a function of making a state of wall charges of each discharge cell at a start timing of the data pulse different for each of the data electrode groups driving each discharge cell. 6. 3. The plasma display device according to 1. The distribution of capacitance of a capacitance component formed by a dielectric layer sandwiched between the scanning electrode or the data electrode and a discharge space is different for each data electrode or for each data electrode. The plasma display device according to any one of claims 1 to 4. For each data electrode, the position of the relatively high capacitance portion of the capacitance component formed by the dielectric layer sandwiched between the scan electrode or data electrode and the discharge space is relatively high on the scan electrode or data electrode. The plasma display device according to claim 1, wherein the plasma display device is different for each data electrode group. The plasma display device according to claim 1, wherein a high-capacity region is formed on a part of the scan electrode or the data electrode. The scan electrode and the data electrode are covered with a dielectric layer, and the high-capacity region is formed by making the thickness of the dielectric layer corresponding to the high-capacity region smaller than other portions. The plasma display device according to claim 8, wherein: The portion where the thickness of the dielectric layer is made thinner than other portions is formed by making the thickness of a part of the scan electrode or the data electrode covered by the dielectric layer larger than other portions. The plasma display device according to claim 9, wherein: 11. The plasma display device according to claim 10, wherein a bus electrode of the scan electrode is formed at a portion where the thickness of a portion of the scan electrode is larger than that of another portion. The plasma display device of claim 11, wherein a bus electrode of a sustain electrode facing the scan electrode is formed substantially in parallel with the bus electrode of the scan electrode. 9. The plasma display device according to claim 8, wherein the high capacity region is formed by using a dielectric layer of a high dielectric constant material. 14. The high-capacity region has two types of distribution shapes, and these two types of distribution shapes are different for every N (N is an integer of 1 or more) display cells in the main scanning direction. A plasma display device according to claim 1. A plurality of types of phosphors are formed separately for each of the unit light-emitting pixels, and there are at least two types of distribution shapes of the high-capacity region. In the display cell where the same type of phosphor is formed, 14. The plasma display device according to claim 8, wherein the distribution shapes of the high-capacity regions are the same. The plasma display device according to any one of claims 8 to 15, wherein the distribution shape of the high-capacity region changes continuously in the main scanning direction. A function of applying an auxiliary pulse to at least one of the data electrode groups in a period before the address period and before the start of the address period after the start of the pulse accompanied by the discharge applied to the scan electrode. A plasma display device according to claim 5. The auxiliary pulse is applied to two or more of the data electrode groups, and the auxiliary pulse differs in at least one of a voltage value, a pulse width, an application start timing, a pulse number, and a pulse shape. Item 18. The plasma display device according to item 17. 19. The plasma display device according to claim 17, wherein the auxiliary pulse has the same polarity as the data pulse. 20. The plasma display device according to claim 17, wherein the auxiliary pulse has the same voltage value as the data pulse. 21. The plasma display device according to claim 17, wherein the data electrode group is divided into groups corresponding to red (R), green (G), and blue (B). The start timing of the application of the auxiliary pulse is as follows: during the priming erase pulse for erasing the wall charge formed by the priming discharge, or within 10 microseconds after the application, or the wall charge formed by the sustain discharge for luminous display. 22. The plasma display device according to claim 17, wherein the sustain erasing pulse for erasing is applied within 10 microseconds after application. The state of the wall charges at the data pulse start timing of the write discharge of the display cells arranged on the scan electrode according to the number of the display cells where the write discharge is performed by the same scan pulse applied to the same scan electrode. 6. The plasma display device according to claim 1, wherein the power supply voltage is different for each data electrode group driving the display cell. Prior to the address period, during the period from the start of the pulse accompanied by the discharge applied to the scan electrode to the start of the address period, an auxiliary pulse is applied to the data electrode, and the set voltage of the scan electrode at the time of applying the auxiliary pulse is 24. The plasma display device according to claim 23, wherein the plasma display device is varied according to the number of display cells where the write discharge is performed. 25. The method according to claim 23, wherein when the number of discharge cells in which the write discharge is performed is equal to or more than a predetermined value, a wall charge amount at a data pulse start timing of the write discharge is reduced as compared with a case where the number of discharge cells is less than a predetermined value. The plasma display device according to any one of the preceding claims. When the total number of the light emitting display cells in the current subfield or the current subfield and a predetermined plurality of subfields before the current subfield is a predetermined value or more, the data pulse start timing of the write discharge of the light emitting display cell arranged on the scan electrode. 26. The plasma display device according to claim 1, wherein the state of the wall charges in each of the data electrode groups for driving the light emitting display cells is different. When the total number of the light emitting display cells of the current screen or the previous screen is equal to or more than a predetermined value, the state of the wall charge at the data pulse start timing of the write discharge of the light emitting display cells arranged on the scan electrode drives the light emitting display cells. 26. The plasma display device according to claim 1, wherein the plasma display device is different for each data electrode group. A first insulating substrate provided with a plurality of pairs of electrodes including a plurality of scan electrodes and sustain electrodes extending in parallel with each other, and a plurality of data electrodes extending in a direction orthogonal to the scan electrodes and the sustain electrodes; Are disposed opposite to each other with a partition wall for maintaining a gap therebetween, and discharge gas is discharged into a discharge space formed by the gap between the first and second insulation substrates. A plasma display that is filled, defines a unit light emitting pixel at an intersection of the electrode pair and the data electrode, and covers the scan electrode and the sustain electrode formed on the first insulating substrate with a dielectric layer In the method of driving the panel,
An auxiliary pulse is applied to at least one data electrode group obtained by dividing the data electrode into two or more groups in a period before the address period and before the start of the address period after a pulse accompanied by a discharge applied to the scan electrode. A method for driving a plasma display panel, comprising: 29. The method according to claim 28, wherein the control is performed such that the formation delay time of the writing discharge by the scanning electrode in which the number of the display cells where the writing discharge is performed is a predetermined value or more is different for each data electrode or each data electrode group. 3. The method for driving a plasma display panel according to item 1. When the total number of the light emitting display cells of the current screen or the previous screen is equal to or more than a predetermined value, control is performed such that the state of the wall charge at the data pulse start timing of the writing discharge is different for each of the data electrode groups driving the light emitting display cells. The method for driving a plasma display panel according to claim 28, wherein:

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