JP2004246441A - Power supply device and power supply control method - Google Patents

Power supply device and power supply control method Download PDF

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Publication number
JP2004246441A
JP2004246441A JP2003033245A JP2003033245A JP2004246441A JP 2004246441 A JP2004246441 A JP 2004246441A JP 2003033245 A JP2003033245 A JP 2003033245A JP 2003033245 A JP2003033245 A JP 2003033245A JP 2004246441 A JP2004246441 A JP 2004246441A
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voltage
power supply
supply
trigger
power
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JP4138520B2 (en
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Shigeo Nagano
成夫 永野
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GE Medical Systems Global Technology Co LLC
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GE Medical Systems Global Technology Co LLC
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00Climate change mitigation technologies for sector-wide applications
    • Y02P80/10Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier
    • Y02P80/15On-site combined power, heat or cool generation or distribution, e.g. combined heat and power [CHP] supply

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply device that can accurately control and predict the time since one supply voltage reaches a desired voltage until other supply voltages reach the desired voltage in supplying a plurality of different supply voltages. <P>SOLUTION: When the power supply device 1 receives power-on instructions, a voltage control unit 11 raises a supply voltage V2 to a voltage VA 1, and also a voltage control unit 24 raises a supply voltage V3 to a reference voltage VB_STB which is lower than a reference voltage VB1. When the supply voltage V2 reaches the voltage VA1, a trigger signal TRG is generated and the voltage control unit 24 raises the supply voltage V3 from the reference voltage VB_STB to the reference voltage VB1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、複数の異なる供給電圧を供給する電源装置および電源制御方法に関する。
【0002】
【従来の技術】
近年、新しいデバイスが低電圧化し、低電圧で動作するデバイスと、従来の高電圧で動作するデバイスとが一つの基板上に混在する場合が多くなっている。
また、異電圧間の信号の送受信を可能にする目的で、一つのチップに異なる電圧を供給する複数の電源を備えている場合もある。
このようなチップの場合、各々の電源が供給する電圧の立ち上がり時間に、制約を設けている場合が多い。
例えば、図5に示すように、電源101から負荷103に電圧V101を供給し、電源102から負荷104に電圧V102を供給する場合を考える。
ここで、例えば、負荷103はCPUであり、負荷104はキャッシュメモリである。
この場合に、図6に示すように、先ず、電源101が立ち上がり、その後、タイミングt1で、電圧V101が電圧VA(例えば5V)に達すると、電源101がトリガー信号TRGをローレベル(L)からハイレベル(H)に立ち上げる。
電源102は、トリガー信号TRGのハイレベルへの立ち上がりを基に、タイミングt2で電圧V102の立ち上げを開始し、電圧V102がタイミングt3で電圧VB(例えば3.3V)に達する。
ところで、上述したように、負荷103がCPUであり、負荷104がキャッシュメモリである場合に、電圧電圧V101が電圧VAに達してCPUが起動した後に、CPUがキャッシュメモリにアクセスする場合に、CPUがキャッシュメモリが起動するまでのタイミング、すなわち、電源電圧V102が電圧VBに達するタイミングを正確に知る必要がある。
【0003】
【発明が解決しようとする課題】
しかしながら、電源が供給する電圧の立ち上がり時間は、その負荷に依存する。
例えば、図5および図6に示す例では、負荷104の特性により、電圧V102が立ち上がりを開始してから、電圧V102が電圧VBに達するまでの時間(t3−t2)は変動する。
従って、電圧V101が電圧VAに達してから電圧V102が電圧VBに達するまでの時間Tを正確に予測できないという問題がある。
【0004】
本発明はかかる事情に鑑みてなされたものであり、その目的は、異なる複数の供給電圧を供給する場合に、一つの供給電圧が所望の電圧に達してから、他の供給電圧が所望の電圧に達するまでの時間を高精度に制御および予測できる電源装置および電源制御方法を提供することにある。
【0005】
【課題を解決するための手段】
上述した目的を達成するために、第1の発明の電源装置は、第1の供給電圧および第2の供給電圧を供給する電源装置であって、前記第1の供給電圧が第1の電圧に達すると、トリガーを発する第1の電源手段と、前記第1の電源手段が前記トリガーを発するまで第2の電圧より低い第3の電圧の前記第2の供給電圧を供給し、前記第1の電源手段が前記トリガーを発すると、前記第2の供給電圧を前記第3の電圧から前記第2の電圧に上げる第2の電源手段とを有する。
【0006】
第1の発明の電源装置は、好ましくは、前記第2の電源手段は、前記第2の供給電圧と基準電圧との差分を減少させるように前記第2の供給電圧を制御し、前記第1の電源手段が前記トリガーを発するまで前記基準電圧を前記第3の電圧に設定し、前記第1の電源手段が前記トリガーを発すると、前記基準電圧を前記第2の電圧に設定する。
第1の発明の電源装置は、好ましくは、前記第1の電源手段は、電源投入指示を受けると、前記第1の供給電圧を前記第1の電圧に上げ、前記第2の電源手段は、電源投入指示を受けると、前記第2の供給電圧を前記第3の電圧に上げる。
【0007】
第2の発明の電源装置は、第1の供給電圧および第2の供給電圧を供給する電源装置であって、前記第1の供給電圧が第1の電圧に達すると第1のトリガーを発し、第2のトリガーが発生するまで、前記第1の電圧より低い第2の電圧の前記第1の供給電圧を供給し、前記第2のトリガーが発生すると、前記第1の供給電圧を前記第2の電圧から前記第1の電圧に上げる第1の電源手段と、前記第2の供給電圧が第3の電圧より低い第4の電圧に達すると前記第2のトリガーを発し、前記第1のトリガーが発生するまで、前記第4の電圧の前記第2の供給電圧を供給し、前記第1のトリガーが発生すると、前記第2の供給電圧を前記第4の電圧から前記第3の電圧に上げる第2の電源手段とを有する。
【0008】
第2の発明の電源装置は、好ましくは、前記第1の電源手段は、前記第1の供給電圧と第1の基準電圧との差分を減少させるように前記第1の供給電圧を制御し、前記第2の電源手段が前記第2のトリガーを発するまで前記第1の基準電圧を前記第2の電圧に設定し、前記第2の電源手段が前記第2のトリガーを発すると、前記第1の基準電圧を前記第1の電圧に設定し、前記第2の電源手段は、前記第2の供給電圧と第2の基準電圧との差分を減少させるように前記第2の供給電圧を制御し、前記第1の電源手段が前記第1のトリガーを発するまで前記基準電圧を前記第4の電圧に設定し、前記第1の電源手段が前記第1のトリガーを発すると、前記基準電圧を前記第3の電圧に設定する。
第2の発明の電源装置は、好ましくは、前記第1の電源手段は、電源投入指示を受けると、前記第1の供給電圧を前記第1の電圧に上げ、前記第2の電源手段は、電源投入指示を受けると、前記第2の供給電圧を前記第4の電圧に上げる。
【0009】
第1および第2の発明の電源装置は、好ましくは、相互に異なる前記第2の供給電圧を供給する複数の前記第2の電源手段を有する。
【0010】
第3の発明の電源制御方法は、第1の供給電圧を供給する第1の電源手段と第2の供給電圧を供給する第2の電源手段とを用いた電源制御方法であって、前記第1の電源手段が、前記第1の供給電圧を第1の電圧に向けて立ち上げる第1の工程と、前記第1の工程で立ち上げられた前記第1の供給電圧が前記第1の電圧に達したか否かを検出する第2の工程と、前記第2の工程で前記第1の供給電圧が前記第1の電圧に達したことをが検出されるまで、前記第2の電源手段が、第2の電圧より低い第3の電圧の前記第2の供給電圧を供給する第3の工程と、前記第1の工程で前記第1の供給電圧が前記第1の電圧に達したことをが検出されると、前記第2の電源手段が、前記第2の供給電圧を前記第3の電圧から前記第2の電圧に立ち上げる第4の工程とを有する。
【0011】
第4の発明の電源制御方法は、第1の供給電圧を供給する第1の電源手段と第2の供給電圧を供給する第2の電源手段とを用いた電源制御方法であって、前記第1の電源手段が、前記第1の供給電圧を第1の電圧より低い第2の電圧に立ち上げる第1の工程と、前記第2の電源手段が、前記第2の供給電圧を第3の電圧より低い第4の電圧に立ち上げる第2の工程と、前記第2の工程で立ち上げられた前記第2の供給電圧が前記第4の電圧に達したか否かを検出する第3の工程と、前記第3の工程で前記第2の供給電圧が前記第4の電圧に達したことをが検出されるまで、前記第1の電圧手段が、前記第2の電圧の前記第1の供給電圧を保持する第4の工程と、前記第3の工程で前記第2の供給電圧が前記第4の電圧に達したことをが検出されると、前記第1の電源手段が、前記第1の供給電圧を前記第2の電圧から前記第1の電圧に向けて立ち上げる第5の工程と、前記第5の工程で立ち上げられた前記第1の供給電圧が前記第1の電圧に達したか否かを検出する第6の工程と、前記第6の工程で前記第1の供給電圧が前記第1電圧に達したことをが検出されると、前記第2の電源手段が、前記第2の供給電圧を前記第4の電圧から前記第3の電圧に向けて立ち上げる第7の工程とを有する。
【0012】
【発明の実施の形態】
以下、本発明の実施形態に係わる電源装置について説明する。
〔第1実施形態〕
当該実施形態は、第1の発明および第3の発明に対応した実施形態である。
図1は本発明の第1実施形態に係わる電源装置1の構成図、図2は図1に示す電源装置1の供給電圧V2,トリガー信号TRG1,供給電圧V3の波形図である。
図1に示すように、電源装置1は、例えば、電源部2、電源部3および元電源部4を有する。
ここで、電源部2が本発明の第1の電源手段に対応し、電源部3が本発明の第2の電源手段に対応している。
電源部2は、負荷5に対して供給電圧V2を供給する。
負荷5は、例えば、CPUである。
電源部3は、負荷6に対して、供給電圧V2とは異なる供給電圧V3を供給する。
負荷6は、例えば、キャッシュメモリである。
元電源部4は、電源部2および電源部3に対して電圧V4を供給する。
【0013】
電源装置1は、電源投入指示を受けると、電圧制御部11が供給電圧V2を電圧VA1(第1の電圧、例えば、5V)に立ち上げると共に、電圧制御部24が供給電圧V3を基準電圧VB1(第2の電圧、例えば、3.3V)より低い基準電圧VB_STB(第3の電圧、例えば、2.8V)に立ち上げる。
そして、供給電圧V2が電圧VA1に達すると、トリガー信号TRG1が発生し、電圧制御部24が供給電圧V3を、基準電圧VB_STBから基準電圧VB1に立ち上げる。
【0014】
以下、図1に示す電源装置1の各構成要素について説明する。
〔電源部2〕
電源部2は、例えば、電圧制御部11およびトリガー発生部12を有する。
電圧制御部11は、例えば、電源投入指示を受けると、元電源部4からの電圧V4を基に、図2(A)に示すように、負荷5に供給する供給電圧V2を、0から電圧VA1に立ち上げる。
トリガー発生部12は、電圧制御部11が負荷5に供給する供給電圧V2を監視し、図2(B)に示すように、供給電圧V2が電圧VA1に達すると、トリガー信号TRG1をローレベル(L)からハイレベル(H)に立ち上げる。
トリガー信号TRG1は、デジタルおよびアナログの何れであってもよい。
トリガー発生部12は、例えば、負荷5が動作を介したタイミングで、供給電圧V2が電圧VA1に達したと判断する。
【0015】
〔電源部3〕
電源部3は、例えば、可変電圧部21、出力検出部22、比較部23および電圧制御部24を有する。
可変電圧部21は、トリガー発生部12からのトリガー信号TRG1がローレベルの場合には基準電圧VB_STBを比較部23に出力し、トリガー信号TRG1がハイレベルの場合には基準電圧VBを比較部23に出力する。
ここで、基準電圧VB_STBは、基準電圧VB1より低い電圧である。
【0016】
出力検出部22は、電圧制御部24が負荷6に供給する供給電圧V3を検出し、これを比較部23に出力する。
【0017】
比較部23は、出力検出部22が検出した電圧V3と、可変電圧部21からの基準電圧とを比較し、その差分電圧DIFを電圧制御部24に出力する。
【0018】
電圧制御部24は、電源投入指示を受けると、差分電圧DIFを小さくするように、元電源部4からの電圧V4(例えば、6V)を基に負荷6に供給する供給電圧V3を生成し、これを負荷6に供給する。
【0019】
以下、図1に電源装置1の動作例を説明する。
初期状態として、トリガー信号TRG1がローレベルになっており、可変電圧部21は、基準電圧VB_STBを比較部23に出力している。
例えば、図2に示すタイミングt11で電源投入指示が発生すると、図2(A),(C)に示すように、電圧制御部11が供給電圧V2を立ち上げると共に、電圧制御部24が供給電圧V3を立ち上げる。
そして、例えば、タイミングt12で、電圧制御部24が供給する供給電圧V3が基準電圧VB_STBに達し、差分電圧DIFが0になり、供給電圧V3が基準電圧VB_STBに保持される。
【0020】
その後、電圧制御部11が供給する供給電圧V2が電圧VA1に達すると、図2(B)に示すように、トリガー発生部12がトリガー信号TRG1をローレベルからハイレベルに立ち上げる。
可変電圧部21が、当該トリガー信号TRG1の立ち上がりを基に、比較部23に出力する基準電圧を基準電圧VB_STBから基準電圧VB1に切り換える。
そして、図2(C)に示すように、電圧制御部24が、差分電圧DIFを基に、供給電圧V3を基準電圧VB_STBから基準電圧VB1に立ち上げる。
これにより、タイミングt14で、供給電圧V3が基準電圧VB1に達する。
【0021】
以上説明したように、電源装置1では、電源投入指示を受けると、電圧制御部11が供給電圧V2を電圧VA1に立ち上げると共に、電圧制御部24が供給電圧V3を基準電圧VB1より低い基準電圧VB_STBに立ち上げる。そして、供給電圧V2が電圧VA1に達すると、トリガー信号TRG1が発生し、電圧制御部24が供給電圧V3を、基準電圧VB_STBから基準電圧VB1に立ち上げる。
そのため、図6に示した従来の電源装置のように、電圧V101が電圧VAに達した後に、電圧V102の立ち上げを開始する場合に比べて、供給電圧V2が電圧VA1に達してから供給電圧3が基準電圧VB1に達するまでの時間T1を高精度に予測かつ制御できる。すなわち、負荷6による影響を受ける時間が従来に比べて短くなり、その分、予測および制御の精度が向上する。
これにより、例えば、負荷5がCPUであり、負荷6がキャッシュメモリである場合に、電圧V2が基準電圧VA1に達してCPUが起動してから、電圧V3が基準電圧VB1に達してキャッシュメモリが起動するまでの時間を正確に特定でき、CPUがキャッシュメモリにアクセス可能なタイミングを正確に特定できる。
【0022】
〔第2実施形態〕
当該実施形態は、第2の発明および第4の発明に対応している。
図3は本発明の第1実施形態に係わる電源装置41の構成図、図4は図3に示す電源装置41の供給電圧V42,トリガー信号TRG1,供給電圧V43,トリガー信号TRG2の波形図である。
図3に示すように、電源装置41は、例えば、電源部42、電源部43および元電源部4を有する。
ここで、電源部42が本発明の第1の電源手段に対応し、電源部43が本発明の第2の電源手段に対応している。
図3に示す構成要素のうち、図1と同じ符号を付した構成要素は、第1実施形態で説明したものと同じである。
電源部42は、負荷5に対して供給電圧V42を供給する。
電源部43は、負荷6に対して、供給電圧V42とは異なる供給電圧V43を供給する。
元電源部4は、電源部42および電源部43に対して電圧V4を供給する。
【0023】
電源装置41は、電源投入指示を受けると、電圧制御部24が供給電圧V43を基準電圧VB1(第3の電圧、例えば、3.3V)より低い基準電圧VB_STB(第4の電圧,例えば、2.8V)に立ち上げる。
供給電圧43が基準電圧VB_STBに達すると、トリガー信号TRG2を発生する。
また、上記電源投入指示により、電圧制御部54が供給電圧V42を基準電圧VA1(第1の電圧、例えば5V)より低い基準電圧VA_STB(第2の電圧、例えば、4.5V)に立ち上げる。
そして、電圧制御部54が、トリガー信号TRG2を基に、供給電圧V42を基準電圧VA_STBから基準電圧VA1に立ち上げ、トリガー信号TRG1を発生する。
そして、電圧制御部24が、トリガー信号TRG1を基に、供給電圧V43を基準電圧VB_STBから基準電圧VB1に立ち上る。
【0024】
以下、図31に示す電源装置41の各構成要素について説明する。
〔電源部42〕
電源部42は、例えば、可変電圧部51、出力検出部52、比較部53、電圧制御部54およびトリガー発生部12を有する。
可変電圧部51は、トリガー発生部45からのトリガー信号TRG2がローレベルの場合には基準電圧VA_STBを比較部53に出力し、トリガー信号TRG2がハイレベルの場合には基準電圧VA1を比較部23に出力する。
ここで、基準電圧VA_STBは、基準電圧VA1より低い電圧である。
【0025】
出力検出部52は、電圧制御部54が負荷5に供給する供給電圧V42を検出し、これを比較部53に出力する。
【0026】
比較部53は、出力検出部52が検出した電圧V42と、可変電圧部51からの基準電圧とを比較し、その差分電圧DIF1を電圧制御部54に出力する。
【0027】
電圧制御部54は、電源投入指示を受けると、図4(A)に示すように供給電圧V42を立ち上げ、差分電圧DIF1を小さくするように、元電源部4からの電圧V4を基に負荷5に供給する供給電圧V42を生成し、これを負荷5に供給する。
【0028】
トリガー発生部12は、電圧制御部54が負荷5に供給する供給電圧V42を監視し、供給電圧V42が基準電圧VA1に達すると、図4(B)に示すように、トリガー信号TRG1をローレベル(L)からハイレベル(H)に立ち上げる。
【0029】
〔電源部43〕
電源部43は、例えば、可変電圧部21、出力検出部22、比較部23、電圧制御部24およびトリガー発生部45を有する。
可変電圧部21は、トリガー発生部12からのトリガー信号TRG1がローレベルの場合には基準電圧VB_STBを比較部23に出力し、トリガー信号TRGがハイレベルの場合には基準電圧VB1を比較部23に出力する。
ここで、基準電圧VB_STBは、基準電圧VB1より低い電圧である。
【0030】
出力検出部22は、電圧制御部24が負荷6に供給する供給電圧V43を検出し、これを比較部23に出力する。
【0031】
比較部23は、出力検出部22が検出した電圧V43と、可変電圧部21からの基準電圧とを比較し、その差分電圧DIF2を電圧制御部24に出力する。
【0032】
電圧制御部24は、電源投入指示を受けると、供給電圧V43を立ち上げ、差分電圧DIF2を小さくするように、元電源部4からの電圧V4を基に負荷6に供給する供給電圧V43を生成し、これを負荷6に供給する。
【0033】
以下、図3に電源装置41の動作例を説明する。
初期状態として、トリガー信号TRG1,2がローレベルになっており、可変電圧部21は基準電圧VB_STBを比較部23に出力し、可変電圧部51は基準電圧VA_STBを比較部53に出力している。
例えば、図4に示すタイミングt21で電源投入指示が発生すると、図2(A),(C)に示すように、電圧制御部54が供給電圧V42を立ち上げると共に、電圧制御部24が供給電圧V43を立ち上げる。
そして、例えば、タイミングt22で、電圧制御部24が供給する供給電圧V43が基準電圧VB_STBに達し、差分電圧DIF2が0になり、供給電圧V43が基準電圧VB_STBに保持される。
また、このとき、図4(D)に示すように、トリガー発生部45がトリガー信号TRG2をローレベルからハイレベルに立ち上げる。
【0034】
そして、可変電圧部51が、当該トリガー信号TRG2の立ち上がりを基に、比較部53に出力する基準電圧を基準電圧VA_STBから基準電圧VA1に切り換える。
そして、図4(A)に示すように、電圧制御部54が、差分電圧DIF1を基に、供給電圧V42を基準電圧VA_STBから基準電圧VA1に立ち上げる。これにより、タイミングt23で、供給電圧V42が基準電圧VA1に達する。
【0035】
供給電圧V42が基準電圧VA1に達すると、トリガー発生部12が、トリガー信号TRG1をローレベルからハイレベルに立ち上げる。
【0036】
そして、可変電圧部21が、当該トリガー信号TRG1の立ち上がりを基に、比較部23に出力する基準電圧を基準電圧VB_STBから基準電圧VB1に切り換える。
そして、図4(C)に示すように、電圧制御部24が、差分電圧DIF2を基に、供給電圧V43を基準電圧VB_STBから基準電圧VB1に立ち上げる。これにより、タイミングt24で、供給電圧V43が基準電圧VB1に達する。
【0037】
以上説明したように、電源装置41では、電源投入指示を受けると、電圧制御部54が供給電圧V42を基準電圧VA1より低い基準電圧VA_STBに立ち上げると共に、電圧制御部24が供給電圧V43を基準電圧VB1より低い基準電圧VB_STBに立ち上げる。
そして、供給電圧V43が基準電圧VB_STBに達した後に、電圧制御部54が、供給電圧V42を基準電圧VA_STBから基準電圧VA1に立ち上げる。
そのため、電源装置41によれば、供給電圧V43が基準電圧VB_STBに達する前に、供給電圧V42が基準電圧VA1に達してしまうことを回避でき、前述した第1実施形態の電源装置1よりも、供給電圧V42が基準電圧VA1に達してから供給電圧V43が基準電圧VB1に達するまでの時間T3をより安定して高精度に予測かつ制御できる。
【0038】
上述した実施形態の電源装置1,41では、デバイス変更に伴い、供給電圧が変わった場合でも基準電圧を変更することで対応できる。
本発明は上述した実施形態には限定されない。
例えば、デバイス変更に伴い、トリガー信号をアナログ的なものにしておき、その値を変更することで、電源部3、電源部42および電源部43の供給電圧を変更できる。
また、負荷5あるいは負荷6が誘導負荷の場合の電源のオーバーシュート対策としても本発明を適用可能である。
誘導負荷の場合、供給電圧を急激に上げると、オーバーシュートなどの問題が生じるが、電源装置1,42では、可変電圧部の基準電圧を段階的に上げることで、このような問題を解消できる。
【0039】
【発明の効果】
本発明によれば、異なる複数の供給電圧を供給する場合に、一つの供給電圧が所望の電圧に達してから、他の供給電圧が所望の電圧に達するまでの時間を高精度に制御および予測できる電源装置および電源制御方法を提供できる。
【図面の簡単な説明】
【図1】図1は、本発明の第1実施形態に係わる電源装置の構成図である。
【図2】図2は、図1に示す電源装置の供給電圧V2,トリガー信号TRG1,供給電圧V3の波形図である。
【図3】図3は、本発明の第2実施形態に係わる電源装置の構成図である。
【図4】図4は、図3に示す電源装置の供給電圧V42,トリガー信号TRG1,供給電圧V43,トリガー信号TRG2の波形図である。
【図5】図5は、従来の電源装置を説明するための図である。
【図6】図6は、従来の電源装置を説明するための図である。
【符号の説明】
1…電源装置、2…電源部、3…電源部、4…元電源部、11…電圧制御部、12…トリガー発生部、21…可変電圧部、22…出力検出部、23…比較部、24…電圧制御部、42…電源部、43…電源部、45…トリガー発生部、51…可変電圧部、52…出力検出部、53…比較部、54…電圧制御部
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power supply device and a power supply control method for supplying a plurality of different supply voltages.
[0002]
[Prior art]
In recent years, the voltage of new devices has been reduced, and devices that operate at low voltage and devices that operate at high voltage in the past have often been mixed on one substrate.
In some cases, a plurality of power supplies for supplying different voltages to one chip are provided for the purpose of enabling transmission and reception of signals between different voltages.
In the case of such a chip, there are many cases in which a rise time of a voltage supplied by each power supply is restricted.
For example, as shown in FIG. 5, a case is considered in which the voltage V101 is supplied from the power supply 101 to the load 103 and the voltage V102 is supplied from the power supply 102 to the load 104.
Here, for example, the load 103 is a CPU, and the load 104 is a cache memory.
In this case, as shown in FIG. 6, first, the power supply 101 rises, and thereafter, when the voltage V101 reaches the voltage VA (for example, 5 V) at timing t1, the power supply 101 changes the trigger signal TRG from low level (L). Start up to high level (H).
The power supply 102 starts raising the voltage V102 at timing t2 based on the rising of the trigger signal TRG to high level, and the voltage V102 reaches the voltage VB (for example, 3.3 V) at timing t3.
As described above, when the load 103 is a CPU and the load 104 is a cache memory, the CPU accesses the cache memory after the voltage voltage V101 reaches the voltage VA and the CPU is started. It is necessary to accurately know the timing until the cache memory starts, that is, the timing when the power supply voltage V102 reaches the voltage VB.
[0003]
[Problems to be solved by the invention]
However, the rise time of the voltage supplied by the power supply depends on the load.
For example, in the examples illustrated in FIGS. 5 and 6, the time (t3−t2) from when the voltage V102 starts rising to when the voltage V102 reaches the voltage VB varies depending on the characteristics of the load 104.
Therefore, there is a problem that the time T from when the voltage V101 reaches the voltage VA to when the voltage V102 reaches the voltage VB cannot be accurately predicted.
[0004]
The present invention has been made in view of the above circumstances, and an object of the present invention is to supply a plurality of different supply voltages, and after one supply voltage reaches a desired voltage, the other supply voltage becomes a desired voltage. It is an object of the present invention to provide a power supply device and a power supply control method capable of controlling and predicting the time until the power supply reaches a high accuracy.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, a power supply device of a first invention is a power supply device for supplying a first supply voltage and a second supply voltage, wherein the first supply voltage is reduced to a first voltage. Upon reaching the first power supply means for issuing a trigger, and supplying the second supply voltage at a third voltage lower than a second voltage until the first power supply means issues the trigger; And a second power supply means for raising the second supply voltage from the third voltage to the second voltage when the power supply means issues the trigger.
[0006]
In the power supply device according to the first invention, preferably, the second power supply means controls the second supply voltage so as to reduce a difference between the second supply voltage and a reference voltage, and Setting the reference voltage to the third voltage until the first power supply means issues the trigger, and setting the reference voltage to the second voltage when the first power supply means issues the trigger.
In the power supply device of the first invention, preferably, the first power supply means, upon receiving a power-on instruction, raises the first supply voltage to the first voltage, and the second power supply means Upon receiving a power-on instruction, the second supply voltage is increased to the third voltage.
[0007]
A power supply device according to a second aspect of the present invention is a power supply device that supplies a first supply voltage and a second supply voltage, and issues a first trigger when the first supply voltage reaches a first voltage. Until the second trigger occurs, the first supply voltage having a second voltage lower than the first voltage is supplied, and when the second trigger occurs, the first supply voltage is reduced to the second voltage. First power supply means for increasing the voltage from the first voltage to the first voltage, and the second trigger is issued when the second supply voltage reaches a fourth voltage lower than the third voltage, and the first trigger is provided. Supply the second supply voltage of the fourth voltage until the occurrence of the first trigger, and when the first trigger occurs, increase the second supply voltage from the fourth voltage to the third voltage Second power supply means.
[0008]
In the power supply device according to the second invention, preferably, the first power supply means controls the first supply voltage so as to reduce a difference between the first supply voltage and a first reference voltage, The first reference voltage is set to the second voltage until the second power source emits the second trigger, and when the second power source emits the second trigger, the first reference voltage is set to the first voltage. Is set to the first voltage, and the second power supply means controls the second supply voltage so as to reduce the difference between the second supply voltage and the second reference voltage. Setting the reference voltage to the fourth voltage until the first power supply unit issues the first trigger, and when the first power supply unit issues the first trigger, the reference voltage is set to the fourth voltage. Set to the third voltage.
In the power supply device according to the second invention, preferably, the first power supply means, upon receiving a power-on instruction, raises the first supply voltage to the first voltage, and the second power supply means Upon receiving a power-on instruction, the second supply voltage is increased to the fourth voltage.
[0009]
The power supply device according to the first and second inventions preferably has a plurality of the second power supply means for supplying the second supply voltages different from each other.
[0010]
A power control method according to a third aspect of the present invention is a power control method using a first power supply for supplying a first supply voltage and a second power supply for supplying a second supply voltage. A first power supply means for raising the first supply voltage toward a first voltage; and the first supply voltage raised in the first step is the first voltage. A second step of detecting whether the first power supply voltage has reached the first voltage, and a second step of detecting whether the first supply voltage has reached the first voltage in the second step. But a third step of supplying the second supply voltage of a third voltage lower than a second voltage, and the first supply voltage has reached the first voltage in the first step Is detected, the second power supply means raises the second supply voltage from the third voltage to the second voltage. And a fourth step.
[0011]
A power supply control method according to a fourth invention is a power supply control method using first power supply means for supplying a first supply voltage and second power supply means for supplying a second supply voltage. A first step in which one power supply means raises the first supply voltage to a second voltage lower than the first voltage, and wherein the second power supply means changes the second supply voltage to a third voltage. A second step of raising the voltage to a fourth voltage lower than a voltage, and a third step of detecting whether the second supply voltage raised in the second step has reached the fourth voltage. And a step until the third step detects that the second supply voltage has reached the fourth voltage, the first voltage means sets the first voltage of the second voltage to the first voltage. A fourth step of maintaining the supply voltage and detecting in the third step that the second supply voltage has reached the fourth voltage. Then, the fifth power supply means starts up the first supply voltage from the second voltage toward the first voltage, and the fifth power supply means starts up in the fifth step. A sixth step of detecting whether or not the first supply voltage has reached the first voltage; and a step of detecting that the first supply voltage has reached the first voltage in the sixth step. And a seventh step in which the second power supply means raises the second supply voltage from the fourth voltage to the third voltage when detected.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a power supply device according to an embodiment of the present invention will be described.
[First Embodiment]
This embodiment is an embodiment corresponding to the first invention and the third invention.
FIG. 1 is a configuration diagram of a power supply device 1 according to the first embodiment of the present invention, and FIG. 2 is a waveform diagram of a supply voltage V2, a trigger signal TRG1, and a supply voltage V3 of the power supply device 1 shown in FIG.
As shown in FIG. 1, the power supply device 1 includes, for example, a power supply unit 2, a power supply unit 3, and a main power supply unit 4.
Here, the power supply unit 2 corresponds to the first power supply unit of the present invention, and the power supply unit 3 corresponds to the second power supply unit of the present invention.
The power supply unit 2 supplies the load 5 with the supply voltage V2.
The load 5 is, for example, a CPU.
The power supply unit 3 supplies the load 6 with a supply voltage V3 different from the supply voltage V2.
The load 6 is, for example, a cache memory.
The main power supply unit 4 supplies a voltage V4 to the power supply unit 2 and the power supply unit 3.
[0013]
When the power supply device 1 receives the power-on instruction, the voltage control unit 11 raises the supply voltage V2 to a voltage VA1 (first voltage, for example, 5 V), and the voltage control unit 24 changes the supply voltage V3 to the reference voltage VB1. The voltage is raised to a reference voltage VB_STB (third voltage, for example, 2.8 V) lower than (second voltage, for example, 3.3 V).
Then, when the supply voltage V2 reaches the voltage VA1, a trigger signal TRG1 is generated, and the voltage control unit 24 raises the supply voltage V3 from the reference voltage VB_STB to the reference voltage VB1.
[0014]
Hereinafter, each component of the power supply device 1 shown in FIG. 1 will be described.
[Power supply unit 2]
The power supply unit 2 includes, for example, a voltage control unit 11 and a trigger generation unit 12.
For example, upon receiving a power-on instruction, the voltage control unit 11 changes the supply voltage V2 to be supplied to the load 5 from 0 to a voltage based on the voltage V4 from the original power supply unit 4 as shown in FIG. Start up at VA1.
The trigger generator 12 monitors the supply voltage V2 supplied to the load 5 by the voltage controller 11, and when the supply voltage V2 reaches the voltage VA1, as shown in FIG. 2B, sets the trigger signal TRG1 to low level ( It rises from L) to high level (H).
The trigger signal TRG1 may be either digital or analog.
The trigger generation unit 12 determines that the supply voltage V2 has reached the voltage VA1 at a timing when the load 5 is operated.
[0015]
[Power supply unit 3]
The power supply unit 3 includes, for example, a variable voltage unit 21, an output detection unit 22, a comparison unit 23, and a voltage control unit 24.
The variable voltage section 21 outputs the reference voltage VB_STB to the comparing section 23 when the trigger signal TRG1 from the trigger generating section 12 is at a low level, and outputs the reference voltage VB to the comparing section 23 when the trigger signal TRG1 is at a high level. Output to
Here, the reference voltage VB_STB is a voltage lower than the reference voltage VB1.
[0016]
The output detection unit 22 detects the supply voltage V3 supplied to the load 6 by the voltage control unit 24, and outputs this to the comparison unit 23.
[0017]
The comparing unit 23 compares the voltage V3 detected by the output detecting unit 22 with the reference voltage from the variable voltage unit 21 and outputs the difference voltage DIF to the voltage control unit 24.
[0018]
Upon receiving the power-on instruction, the voltage control unit 24 generates a supply voltage V3 to be supplied to the load 6 based on the voltage V4 (for example, 6 V) from the main power supply unit 4 so as to reduce the difference voltage DIF, This is supplied to the load 6.
[0019]
Hereinafter, an operation example of the power supply device 1 will be described with reference to FIG.
As an initial state, the trigger signal TRG1 is at a low level, and the variable voltage unit 21 outputs the reference voltage VB_STB to the comparison unit 23.
For example, when a power-on instruction is issued at a timing t11 shown in FIG. 2, the voltage control unit 11 raises the supply voltage V2 and the voltage control unit 24 supplies the supply voltage V2 as shown in FIGS. Start V3.
Then, for example, at timing t12, the supply voltage V3 supplied by the voltage control unit 24 reaches the reference voltage VB_STB, the difference voltage DIF becomes 0, and the supply voltage V3 is held at the reference voltage VB_STB.
[0020]
Thereafter, when the supply voltage V2 supplied by the voltage control unit 11 reaches the voltage VA1, as shown in FIG. 2B, the trigger generation unit 12 raises the trigger signal TRG1 from a low level to a high level.
The variable voltage unit 21 switches the reference voltage output to the comparison unit 23 from the reference voltage VB_STB to the reference voltage VB1 based on the rising of the trigger signal TRG1.
Then, as shown in FIG. 2C, the voltage control unit 24 raises the supply voltage V3 from the reference voltage VB_STB to the reference voltage VB1 based on the difference voltage DIF.
As a result, at timing t14, the supply voltage V3 reaches the reference voltage VB1.
[0021]
As described above, in the power supply device 1, when receiving the power-on instruction, the voltage controller 11 raises the supply voltage V2 to the voltage VA1, and the voltage controller 24 raises the supply voltage V3 to the reference voltage VB1 lower than the reference voltage VB1. Start up to VB_STB. Then, when the supply voltage V2 reaches the voltage VA1, a trigger signal TRG1 is generated, and the voltage control unit 24 raises the supply voltage V3 from the reference voltage VB_STB to the reference voltage VB1.
Therefore, compared to the case where the rising of the voltage V102 is started after the voltage V101 reaches the voltage VA as in the conventional power supply device shown in FIG. It is possible to predict and control the time T1 until 3 reaches the reference voltage VB1 with high accuracy. That is, the time affected by the load 6 is shorter than before, and the accuracy of prediction and control is improved accordingly.
Thereby, for example, when the load 5 is a CPU and the load 6 is a cache memory, the voltage V3 reaches the reference voltage VB1, the voltage V3 reaches the reference voltage VB1, and the cache memory It is possible to accurately specify the time until activation, and accurately specify the timing at which the CPU can access the cache memory.
[0022]
[Second embodiment]
This embodiment corresponds to the second invention and the fourth invention.
FIG. 3 is a configuration diagram of the power supply device 41 according to the first embodiment of the present invention, and FIG. 4 is a waveform diagram of the supply voltage V42, the trigger signal TRG1, the supply voltage V43, and the trigger signal TRG2 of the power supply device 41 shown in FIG. .
As illustrated in FIG. 3, the power supply device 41 includes, for example, a power supply unit 42, a power supply unit 43, and the main power supply unit 4.
Here, the power supply unit 42 corresponds to the first power supply unit of the present invention, and the power supply unit 43 corresponds to the second power supply unit of the present invention.
3, the components denoted by the same reference numerals as those in FIG. 1 are the same as those described in the first embodiment.
The power supply unit 42 supplies the supply voltage V42 to the load 5.
The power supply unit 43 supplies the load 6 with a supply voltage V43 different from the supply voltage V42.
The main power supply unit 4 supplies a voltage V4 to the power supply unit 42 and the power supply unit 43.
[0023]
When the power supply device 41 receives the power-on instruction, the voltage control unit 24 sets the supply voltage V43 to the reference voltage VB_STB (fourth voltage, for example, 2 V) lower than the reference voltage VB1 (third voltage, for example, 3.3 V). .8V).
When the supply voltage 43 reaches the reference voltage VB_STB, a trigger signal TRG2 is generated.
Further, in response to the power-on instruction, the voltage control unit 54 raises the supply voltage V42 to a reference voltage VA_STB (second voltage, for example, 4.5 V) lower than the reference voltage VA1 (first voltage, for example, 5 V).
Then, based on the trigger signal TRG2, the voltage control unit 54 raises the supply voltage V42 from the reference voltage VA_STB to the reference voltage VA1, and generates the trigger signal TRG1.
Then, the voltage control unit 24 raises the supply voltage V43 from the reference voltage VB_STB to the reference voltage VB1 based on the trigger signal TRG1.
[0024]
Hereinafter, each component of the power supply device 41 shown in FIG. 31 will be described.
[Power supply unit 42]
The power supply unit 42 includes, for example, a variable voltage unit 51, an output detection unit 52, a comparison unit 53, a voltage control unit 54, and the trigger generation unit 12.
The variable voltage section 51 outputs the reference voltage VA_STB to the comparing section 53 when the trigger signal TRG2 from the trigger generating section 45 is at a low level, and outputs the reference voltage VA1 to the comparing section 23 when the trigger signal TRG2 is at a high level. Output to
Here, the reference voltage VA_STB is a voltage lower than the reference voltage VA1.
[0025]
The output detection section 52 detects the supply voltage V42 supplied to the load 5 by the voltage control section 54 and outputs this to the comparison section 53.
[0026]
The comparison unit 53 compares the voltage V42 detected by the output detection unit 52 with the reference voltage from the variable voltage unit 51, and outputs the difference voltage DIF1 to the voltage control unit 54.
[0027]
Upon receiving the power-on instruction, the voltage control unit 54 raises the supply voltage V42 as shown in FIG. 4A, and sets the load based on the voltage V4 from the original power supply unit 4 so as to reduce the difference voltage DIF1. A supply voltage V42 to be supplied to the load 5 is generated and supplied to the load 5.
[0028]
The trigger generator 12 monitors the supply voltage V42 supplied to the load 5 by the voltage controller 54, and when the supply voltage V42 reaches the reference voltage VA1, as shown in FIG. 4B, sets the trigger signal TRG1 to low level. It rises from (L) to high level (H).
[0029]
[Power supply unit 43]
The power supply unit 43 includes, for example, a variable voltage unit 21, an output detection unit 22, a comparison unit 23, a voltage control unit 24, and a trigger generation unit 45.
The variable voltage section 21 outputs the reference voltage VB_STB to the comparing section 23 when the trigger signal TRG1 from the trigger generating section 12 is at a low level, and outputs the reference voltage VB1 to the comparing section 23 when the trigger signal TRG is at a high level. Output to
Here, the reference voltage VB_STB is a voltage lower than the reference voltage VB1.
[0030]
The output detection unit 22 detects the supply voltage V43 supplied to the load 6 by the voltage control unit 24 and outputs this to the comparison unit 23.
[0031]
The comparing unit 23 compares the voltage V43 detected by the output detecting unit 22 with the reference voltage from the variable voltage unit 21 and outputs the difference voltage DIF2 to the voltage control unit 24.
[0032]
Upon receiving the power-on instruction, the voltage control unit 24 raises the supply voltage V43 and generates the supply voltage V43 to be supplied to the load 6 based on the voltage V4 from the original power supply unit 4 so as to reduce the difference voltage DIF2. Then, this is supplied to the load 6.
[0033]
Hereinafter, an operation example of the power supply device 41 will be described with reference to FIG.
As an initial state, the trigger signals TRG1 and TRG2 are at a low level, the variable voltage unit 21 outputs the reference voltage VB_STB to the comparison unit 23, and the variable voltage unit 51 outputs the reference voltage VA_STB to the comparison unit 53. .
For example, when a power-on instruction is generated at timing t21 shown in FIG. 4, as shown in FIGS. 2A and 2C, the voltage control unit 54 raises the supply voltage V42 and the voltage control unit 24 Start V43.
Then, for example, at timing t22, the supply voltage V43 supplied by the voltage control unit 24 reaches the reference voltage VB_STB, the difference voltage DIF2 becomes 0, and the supply voltage V43 is held at the reference voltage VB_STB.
At this time, as shown in FIG. 4D, the trigger generation section 45 raises the trigger signal TRG2 from a low level to a high level.
[0034]
Then, the variable voltage unit 51 switches the reference voltage output to the comparison unit 53 from the reference voltage VA_STB to the reference voltage VA1 based on the rising of the trigger signal TRG2.
Then, as shown in FIG. 4A, the voltage controller 54 raises the supply voltage V42 from the reference voltage VA_STB to the reference voltage VA1 based on the difference voltage DIF1. As a result, at timing t23, the supply voltage V42 reaches the reference voltage VA1.
[0035]
When the supply voltage V42 reaches the reference voltage VA1, the trigger generator 12 raises the trigger signal TRG1 from a low level to a high level.
[0036]
Then, the variable voltage unit 21 switches the reference voltage output to the comparison unit 23 from the reference voltage VB_STB to the reference voltage VB1 based on the rising of the trigger signal TRG1.
Then, as shown in FIG. 4C, the voltage control unit 24 raises the supply voltage V43 from the reference voltage VB_STB to the reference voltage VB1 based on the difference voltage DIF2. Thus, at timing t24, the supply voltage V43 reaches the reference voltage VB1.
[0037]
As described above, in the power supply device 41, when receiving the power-on instruction, the voltage control unit 54 raises the supply voltage V42 to the reference voltage VA_STB lower than the reference voltage VA1, and the voltage control unit 24 sets the supply voltage V43 to the reference voltage VA_STB. The voltage rises to a reference voltage VB_STB lower than the voltage VB1.
Then, after the supply voltage V43 reaches the reference voltage VB_STB, the voltage control unit 54 raises the supply voltage V42 from the reference voltage VA_STB to the reference voltage VA1.
Therefore, according to the power supply device 41, it is possible to prevent the supply voltage V42 from reaching the reference voltage VA1 before the supply voltage V43 reaches the reference voltage VB_STB, which is smaller than the power supply device 1 according to the first embodiment described above. The time T3 from when the supply voltage V42 reaches the reference voltage VA1 to when the supply voltage V43 reaches the reference voltage VB1 can be more stably and accurately predicted and controlled.
[0038]
In the power supply devices 1 and 41 of the above-described embodiment, even when the supply voltage changes due to the device change, it can be handled by changing the reference voltage.
The present invention is not limited to the embodiments described above.
For example, the supply voltage of the power supply unit 3, the power supply unit 42, and the power supply unit 43 can be changed by changing the value of the trigger signal to an analog signal in accordance with the device change.
Further, the present invention can be applied as a measure against overshoot of the power supply when the load 5 or the load 6 is an inductive load.
In the case of an inductive load, if the supply voltage is rapidly increased, a problem such as overshoot occurs. However, in the power supply devices 1 and 42, such a problem can be solved by gradually increasing the reference voltage of the variable voltage unit. .
[0039]
【The invention's effect】
According to the present invention, when supplying a plurality of different supply voltages, the time from when one supply voltage reaches a desired voltage to when the other supply voltage reaches a desired voltage is accurately controlled and predicted. A power supply device and a power supply control method that can be provided.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a power supply device according to a first embodiment of the present invention.
FIG. 2 is a waveform diagram of a supply voltage V2, a trigger signal TRG1, and a supply voltage V3 of the power supply device shown in FIG.
FIG. 3 is a configuration diagram of a power supply device according to a second embodiment of the present invention.
FIG. 4 is a waveform diagram of a supply voltage V42, a trigger signal TRG1, a supply voltage V43, and a trigger signal TRG2 of the power supply device shown in FIG.
FIG. 5 is a diagram for explaining a conventional power supply device.
FIG. 6 is a diagram for explaining a conventional power supply device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Power supply device, 2 ... Power supply part, 3 ... Power supply part, 4 ... Original power supply part, 11 ... Voltage control part, 12 ... Trigger generation part, 21 ... Variable voltage part, 22 ... Output detection part, 23 ... Comparison part, Reference numeral 24: voltage control unit, 42: power supply unit, 43: power supply unit, 45: trigger generation unit, 51: variable voltage unit, 52: output detection unit, 53: comparison unit, 54: voltage control unit

Claims (9)

第1の供給電圧および第2の供給電圧を供給する電源装置であって、
前記第1の供給電圧が第1の電圧に達すると、トリガーを発する第1の電源手段と、
前記第1の電源手段が前記トリガーを発するまで第2の電圧より低い第3の電圧の前記第2の供給電圧を供給し、前記第1の電源手段が前記トリガーを発すると、前記第2の供給電圧を前記第3の電圧から前記第2の電圧に上げる第2の電源手段と
を有する電源装置。
A power supply for supplying a first supply voltage and a second supply voltage,
First power supply means for generating a trigger when the first supply voltage reaches the first voltage;
The first power supply means supplies the second supply voltage having a third voltage lower than the second voltage until the first power supply means emits the trigger, and when the first power supply means emits the trigger, the second power supply means supplies the second supply voltage. Power supply means for increasing a supply voltage from the third voltage to the second voltage.
前記第2の電源手段は、前記第2の供給電圧と基準電圧との差分を減少させるように前記第2の供給電圧を制御し、前記第1の電源手段が前記トリガーを発するまで前記基準電圧を前記第3の電圧に設定し、前記第1の電源手段が前記トリガーを発すると、前記基準電圧を前記第2の電圧に設定する
請求項1に記載の電源装置。
The second power supply means controls the second supply voltage so as to reduce a difference between the second supply voltage and a reference voltage, and controls the reference voltage until the first power supply means issues the trigger. 2. The power supply device according to claim 1, wherein the reference voltage is set to the third voltage, and the reference voltage is set to the second voltage when the first power supply unit issues the trigger.
前記第1の電源手段は、電源投入指示を受けると、前記第1の供給電圧を前記第1の電圧に上げ、
前記第2の電源手段は、電源投入指示を受けると、前記第2の供給電圧を前記第3の電圧に上げる
請求項1または請求項2に記載の電源装置。
Upon receiving a power-on instruction, the first power supply unit increases the first supply voltage to the first voltage,
3. The power supply device according to claim 1, wherein the second power supply unit increases the second supply voltage to the third voltage when receiving a power-on instruction. 4.
第1の供給電圧および第2の供給電圧を供給する電源装置であって、
前記第1の供給電圧が第1の電圧に達すると第1のトリガーを発し、第2のトリガーが発生するまで、前記第1の電圧より低い第2の電圧の前記第1の供給電圧を供給し、前記第2のトリガーが発生すると、前記第1の供給電圧を前記第2の電圧から前記第1の電圧に上げる第1の電源手段と、
前記第2の供給電圧が第3の電圧より低い第4の電圧に達すると前記第2のトリガーを発し、前記第1のトリガーが発生するまで、前記第4の電圧の前記第2の供給電圧を供給し、前記第1のトリガーが発生すると、前記第2の供給電圧を前記第4の電圧から前記第3の電圧に上げる第2の電源手段と
を有する電源装置。
A power supply for supplying a first supply voltage and a second supply voltage,
A first trigger is issued when the first supply voltage reaches the first voltage, and the first supply voltage of a second voltage lower than the first voltage is supplied until a second trigger occurs. And when the second trigger occurs, first power supply means for increasing the first supply voltage from the second voltage to the first voltage;
The second trigger is issued when the second supply voltage reaches a fourth voltage lower than the third voltage, and the second supply voltage of the fourth voltage is generated until the first trigger occurs. And a second power supply means for increasing the second supply voltage from the fourth voltage to the third voltage when the first trigger occurs.
前記第1の電源手段は、前記第1の供給電圧と第1の基準電圧との差分を減少させるように前記第1の供給電圧を制御し、前記第2の電源手段が前記第2のトリガーを発するまで前記第1の基準電圧を前記第2の電圧に設定し、前記第2の電源手段が前記第2のトリガーを発すると、前記第1の基準電圧を前記第1の電圧に設定し、
前記第2の電源手段は、前記第2の供給電圧と第2の基準電圧との差分を減少させるように前記第2の供給電圧を制御し、前記第1の電源手段が前記第1のトリガーを発するまで前記基準電圧を前記第4の電圧に設定し、前記第1の電源手段が前記第1のトリガーを発すると、前記基準電圧を前記第3の電圧に設定する
請求項4に記載の電源装置。
The first power supply controls the first supply voltage so as to reduce a difference between the first supply voltage and a first reference voltage, and the second power supply controls the second trigger. The first reference voltage is set to the second voltage until the second trigger is issued, and when the second power supply means issues the second trigger, the first reference voltage is set to the first voltage. ,
The second power supply controls the second supply voltage so as to reduce a difference between the second supply voltage and a second reference voltage, and the first power supply controls the first trigger. 5. The method according to claim 4, wherein the reference voltage is set to the fourth voltage until the first voltage is issued, and when the first power supply unit issues the first trigger, the reference voltage is set to the third voltage. Power supply.
前記第1の電源手段は、電源投入指示を受けると、前記第1の供給電圧を前記第1の電圧に上げ、
前記第2の電源手段は、電源投入指示を受けると、前記第2の供給電圧を前記第4の電圧に上げる
請求項4または請求項5に記載の電源装置。
Upon receiving a power-on instruction, the first power supply unit increases the first supply voltage to the first voltage,
The power supply device according to claim 4, wherein the second power supply unit increases the second supply voltage to the fourth voltage when receiving a power-on instruction.
相互に異なる前記第2の供給電圧を供給する複数の前記第2の電源手段
を有する
請求項1〜6のいずれかに記載の電源装置。
The power supply device according to any one of claims 1 to 6, further comprising a plurality of the second power supply units that supply the different second supply voltages.
第1の供給電圧を供給する第1の電源手段と第2の供給電圧を供給する第2の電源手段とを用いた電源制御方法であって、
前記第1の電源手段が、前記第1の供給電圧を第1の電圧に向けて立ち上げる第1の工程と、
前記第1の工程で立ち上げられた前記第1の供給電圧が前記第1の電圧に達したか否かを検出する第2の工程と、
前記第2の工程で前記第1の供給電圧が前記第1の電圧に達したことをが検出されるまで、前記第2の電源手段が、第2の電圧より低い第3の電圧の前記第2の供給電圧を供給する第3の工程と、
前記第1の工程で前記第1の供給電圧が前記第1の電圧に達したことをが検出されると、前記第2の電源手段が、前記第2の供給電圧を前記第3の電圧から前記第2の電圧に立ち上げる第4の工程と
を有する電源制御方法。
A power supply control method using first power supply means for supplying a first supply voltage and second power supply means for supplying a second supply voltage,
A first step in which the first power supply means raises the first supply voltage toward a first voltage;
A second step of detecting whether or not the first supply voltage started in the first step has reached the first voltage;
Until it is detected in the second step that the first supply voltage has reached the first voltage, the second power supply means operates the third power supply of the third voltage lower than the second voltage. A third step of providing a second supply voltage;
When it is detected in the first step that the first supply voltage has reached the first voltage, the second power supply means changes the second supply voltage from the third voltage. A fourth step of raising the voltage to the second voltage.
第1の供給電圧を供給する第1の電源手段と第2の供給電圧を供給する第2の電源手段とを用いた電源制御方法であって、
前記第1の電源手段が、前記第1の供給電圧を第1の電圧より低い第2の電圧に立ち上げる第1の工程と、
前記第2の電源手段が、前記第2の供給電圧を第3の電圧より低い第4の電圧に立ち上げる第2の工程と、
前記第2の工程で立ち上げられた前記第2の供給電圧が前記第4の電圧に達したか否かを検出する第3の工程と、
前記第3の工程で前記第2の供給電圧が前記第4の電圧に達したことをが検出されるまで、前記第1の電圧手段が、前記第2の電圧の前記第1の供給電圧を保持する第4の工程と、
前記第3の工程で前記第2の供給電圧が前記第4の電圧に達したことをが検出されると、前記第1の電源手段が、前記第1の供給電圧を前記第2の電圧から前記第1の電圧に向けて立ち上げる第5の工程と、
前記第5の工程で立ち上げられた前記第1の供給電圧が前記第1の電圧に達したか否かを検出する第6の工程と、
前記第6の工程で前記第1の供給電圧が前記第1電圧に達したことをが検出されると、前記第2の電源手段が、前記第2の供給電圧を前記第4の電圧から前記第3の電圧に向けて立ち上げる第7の工程と
を有する電源制御方法。
A power supply control method using first power supply means for supplying a first supply voltage and second power supply means for supplying a second supply voltage,
A first step in which the first power supply means raises the first supply voltage to a second voltage lower than the first voltage;
A second step in which the second power supply means raises the second supply voltage to a fourth voltage lower than a third voltage;
A third step of detecting whether or not the second supply voltage started in the second step has reached the fourth voltage;
Until it is detected in the third step that the second supply voltage has reached the fourth voltage, the first voltage means changes the first supply voltage of the second voltage. A fourth step of holding;
When it is detected in the third step that the second supply voltage has reached the fourth voltage, the first power supply means changes the first supply voltage from the second voltage. A fifth step of raising the voltage toward the first voltage;
A sixth step of detecting whether or not the first supply voltage started in the fifth step has reached the first voltage;
When it is detected in the sixth step that the first supply voltage has reached the first voltage, the second power supply means changes the second supply voltage from the fourth voltage to the fourth voltage. A power supply control method including: a seventh step of starting up to a third voltage.
JP2003033245A 2003-02-12 2003-02-12 Power supply apparatus and power supply control method Expired - Fee Related JP4138520B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007011709A (en) * 2005-06-30 2007-01-18 Ricoh Co Ltd System power unit and its operation control method
US10720844B2 (en) 2018-01-29 2020-07-21 Fanuc Corporation Power supply control device and control method for power supply control device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007011709A (en) * 2005-06-30 2007-01-18 Ricoh Co Ltd System power unit and its operation control method
JP4745734B2 (en) * 2005-06-30 2011-08-10 株式会社リコー System power supply device and operation control method thereof
US10720844B2 (en) 2018-01-29 2020-07-21 Fanuc Corporation Power supply control device and control method for power supply control device

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