JP2004233969A - Driving method for electrooptical device, electrooptical device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve display quality by improving gradation characteristics in subfield driving. <P>SOLUTION: One frame is divided into a plurality of subfields SF1 to SF3, and voltage values V corresponding to gradation data D0 to D5 are selected out of voltage values V0 to V9 and set as voltage data to be supplied to pixels by the subfields SF. Then the voltage values V which are set by the subfields SF are supplied to pixels and gradation display of the pixels is carried out. When the voltage values V are set, such voltage values that voltage variation quantities between adjacent subfields are one step level or less are selected. Consequently, the voltage variation quantities between adjacent subfields are minimized. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a driving method of an electro-optical device, an electro-optical device, and an electronic apparatus, and more particularly to gradation control by subfield driving.

    Conventionally, in order to take advantage of both the pulse width modulation and the voltage modulation, a gray scale display technique using these modulation methods in combination has been proposed. For example, Patent Literature 1 discloses a technique in which in an active matrix type electro-optical device, the width and height of a voltage pulse are variably set in accordance with grayscale data and supplied to pixels. Patent Document 2 discloses that, in subfield driving, which is a type of pulse width modulation, two or more types of ON voltages for setting a pixel to an ON state are provided, and the level of the ON voltage is variably set. A technique for weighting a field is disclosed.

JP-A-5-100629 JP 2001-100700 A.

    Incidentally, the gray scale actually displayed is not determined only by the temporal ratio (duty ratio) of the voltage level in a predetermined period, but is also affected by the amount of voltage change between adjacent subfields. That is, even if the duty ratio is the same, a difference may occur in the actual display gradation between the case where the change amount of the voltage level between adjacent subfields is large and the case where the change amount is small. As a result, there is a problem that inversion and crushing of the gradation become remarkable, particularly when the number of gradations is increased, and it is difficult to perform high-quality display.

  The present invention has been made in view of such circumstances, and an object of the present invention is to further improve display quality by improving gradation characteristics in subfield driving.

  In order to solve such a problem, the first invention uses a plurality of sub-fields defined by dividing a predetermined period and suppresses the amount of change in data between adjacent sub-fields while reducing the pixel variation. Provided is a method for driving an electro-optical device that performs a grayscale display. This driving method includes a first step of selecting and setting a level value according to gradation data from among three or more level values having different values as data to be supplied to a pixel for each subfield; Supplying the data set for each field to the pixel, thereby performing a gradation display of the pixel. Here, in the first step, a level value is selected such that the absolute value of the change amount of data between adjacent subfields is equal to or less than a predetermined change amount. For example, if the predetermined change amount is set to one step level corresponding to a change amount between adjacent level values, the change amount of data between adjacent subfields can be minimized.

  A second invention provides a method for driving an electro-optical device that performs pixel gray scale display using a plurality of subfields defined by dividing a predetermined period. This driving method includes a first step of selecting and setting a level value according to gradation data from among three or more level values having different values as data to be supplied to a pixel for each subfield; Supplying the data set for each field to the pixel, thereby performing a gradation display of the pixel. Here, in the first step, attention is paid to how to set each level value in a series of subfields, and level values whose values are adjacent to each other are selected.

  A third invention provides a method for driving an electro-optical device that performs pixel gray scale display using a plurality of subfields defined by dividing a predetermined period. This driving method includes a first step of selecting a level value corresponding to gradation data from among three or more level values having different values as data to be supplied to pixels for each subfield, Supplying the set data to the pixels to perform a gray scale display of the pixels. Here, in the first step, attention is paid to a change in the level value accompanying the gradation change, and as the gradation value specified by the gradation data increases, the level value is changed between the adjacent level values. Change it.

  Here, in any of the first to third inventions, the data may be a data voltage, and the level value may be set by a voltage value. Further, the data may be a data current, and the level value may be set by a current value.

  A fourth invention provides a method for driving an electro-optical device that performs pixel gray scale display using a plurality of subfields defined by dividing a predetermined period. The present invention relates to subfield driving of an electro-optical device in which data is written to a pixel having a current-driven electro-optical element such as an organic EL element by a current program method. Specifically, this driving method selects and sets a level value as data to be supplied to a pixel for each subfield from a plurality of level values having different values in accordance with gradation data. A second step of writing data to the pixel by supplying the data set at the current level to the pixel at the step and the subfield, and setting a drive current according to the data written to the pixel, Supplying the generated drive current to an electro-optical element that emits light at a luminance corresponding to the drive current, thereby performing a gray scale display of the pixel.

  According to a fifth aspect, there is provided an electro-optical device which performs a gray scale display of a pixel by using a plurality of sub-fields defined by dividing a predetermined period and suppressing an amount of change in data between adjacent sub-fields. provide. The electro-optical device outputs a plurality of scanning lines, a plurality of data lines, a plurality of pixels provided corresponding to intersections of the scanning lines and the data lines, and outputs a scanning signal to the scanning lines to generate data. A scanning line driving circuit for selecting a scanning line corresponding to a pixel to be written, a data conversion circuit for generating data for each subfield by converting gradation data, and a scanning line driving circuit. And a data line driving circuit for outputting data for each subfield generated by the data conversion circuit to a data line corresponding to a pixel to be written. Here, the data conversion circuit determines, as data for each subfield, a level value such that a change amount of data between adjacent subfields is equal to or less than a predetermined change amount from three or more level values having different values. Select and set. For example, if the predetermined change amount is set to one step level corresponding to a change amount between adjacent level values, the change amount of data between adjacent subfields can be minimized.

  A sixth aspect of the present invention provides an electro-optical device that performs gradation display of pixels by using a plurality of subfields defined by dividing a predetermined period. The electro-optical device outputs a plurality of scanning lines, a plurality of data lines, a plurality of pixels provided corresponding to intersections of the scanning lines and the data lines, and outputs a scanning signal to the scanning lines to generate data. A scanning line driving circuit for selecting a scanning line corresponding to a pixel to be written, a data conversion circuit for generating data for each subfield by converting gradation data, and a scanning line driving circuit. And a data line driving circuit for outputting data for each subfield generated by the data conversion circuit to a data line corresponding to a pixel to be written. Here, the data conversion circuit pays attention to the setting method of each level value in a series of subfields as data for each subfield, and selects three or more different level values having different values from each other. Select and set the level value.

  A seventh aspect of the present invention provides an electro-optical device that performs gradation display of pixels using a plurality of subfields defined by dividing a predetermined period. The electro-optical device outputs a plurality of scanning lines, a plurality of data lines, a plurality of pixels provided corresponding to intersections of the scanning lines and the data lines, and outputs a scanning signal to the scanning lines to generate data. A scanning line driving circuit for selecting a scanning line corresponding to a pixel to be written, a data conversion circuit for generating data for each subfield by converting gradation data, and a scanning line driving circuit. And a data line driving circuit for outputting data for each subfield generated by the data conversion circuit to a data line corresponding to a pixel to be written. Here, the data conversion circuit selects the data for each subfield from three or more level values having different values, and the values become adjacent as the gradation value specified by the gradation data increases. The level value is changed between the set level values.

  Here, in any one of the fifth to seventh inventions, the data line drive circuit may output data for each subfield to the data line at a voltage level. In this case, for example, the pixel may include a switching element whose conduction is controlled by a scanning signal of a scanning line, and an electro-optical element. This electro-optical element is composed of a pair of electrodes and a liquid crystal sandwiched between these electrodes, and has a transmittance or a reflectance according to voltage level data supplied from a data line via a switching element. Changes. Further, for example, the pixel is held by a switching element that is controlled to be conductive by a scanning signal of a scanning line, holding means for holding data of a voltage level supplied from the data line via the switching element, and holding means. A driving element that generates a driving current in accordance with data and an electro-optical element that emits light at a luminance corresponding to the driving current may be included.

  Further, in any one of the fifth to seventh inventions, the data line drive circuit may output data for each subfield to the data line at a current level. In this case, for example, the pixel is a switching element that is controlled to be conductive by a scanning signal of a scanning line, and a holding unit that holds data of a current level supplied from the data line as data of a voltage level via the switching element. It may include a driving element that generates a driving current in accordance with the data held by the holding unit, and an electro-optical element that emits light at a luminance corresponding to the driving current.

  An eighth aspect of the present invention provides an electro-optical device that performs grayscale display of pixels using a plurality of subfields defined by dividing a predetermined period. The present invention relates to subfield driving of an electro-optical device in which data is written to a pixel having a current-driven electro-optical element such as an organic EL element by a current program method. Specifically, the electro-optical device outputs a plurality of scanning lines, a plurality of data lines, a plurality of pixels provided corresponding to intersections of the scanning lines and the data lines, and outputs a scanning signal to the scanning lines. By doing so, a scanning line driving circuit for selecting a scanning line corresponding to a pixel to which data is to be written, and a plurality of level values having different voltage values as data to be supplied to the pixel for each subfield, A data conversion circuit for selecting and setting a level value in accordance with the grayscale data, and cooperating with the scanning line driving circuit, and converting the data of the voltage level for each subfield generated in the data conversion circuit into the current level. A data line driving circuit for converting the data into data and outputting the data at a current level to a data line corresponding to a pixel to be written. Each of the pixels includes a holding unit that holds data, a driving element that sets a driving current in accordance with the data held in the holding unit, and an electro-optical element that emits light at a luminance corresponding to the set driving current. Have.

  A ninth invention provides an electronic apparatus mounted with the electro-optical device according to any one of the fifth to eighth inventions.

[First Embodiment]
Prior to a specific description of the electro-optical device according to the present embodiment, an outline of the subfield driving will be described. FIG. 1 is an explanatory diagram of sub-field driving for a liquid crystal element. FIG. 3 is a diagram showing how a voltage applied to a certain pixel changes depending on gradation data for each subfield. Generally, when a liquid crystal element is used as an electro-optical element in a pixel, data is supplied to the pixel at a voltage level. Further, the life of the liquid crystal is improved by performing AC driving in which the voltage polarity is inverted every predetermined period (for example, one frame).

  The grayscale data defining the display grayscale of the pixel is, for example, 64 grayscale data composed of 6 bits D0 to D5. One frame (1f) is divided into three subfields SF1 to SF3. In relation to the gradation to be displayed, each of the subfields SF1 to SF3 is set to a length (display period) for giving a weighting of 1: 2: 4. However, the weights of the subfields SF1 to SF3 may be appropriately adjusted according to the characteristics of the liquid crystal, for example, 1.0: 2.1: 3.9.

  As the supply data to the pixels in each subfield SF, one of three or more level values having different values is set. When the data is set at the voltage level, the level value is also set at the voltage value. In the present embodiment, as shown in FIG. 2, ten discrete voltage values V0 to V9 having different values are prepared. These voltage values V0 to V9 are set such that the optical characteristics (relative transmittance (or relative reflectance)) of the liquid crystal operating in the normally black mode change at substantially regular intervals. The relative transmittance is normalized by setting the minimum value of the transmitted light amount to 0% and the maximum value to 100%. As shown in the figure, the transmittance becomes 0% in a region where the effective voltage is lower than the threshold voltage Vth1. Therefore, the voltage value V0, which is a complete off-voltage, is set to a value lower than the threshold voltage Vth1, but a value that minimizes the amount of voltage change between the voltage value V1 and the voltage value V1 adjacent thereto may be set. preferable. On the other hand, in a region where the effective voltage is higher than the saturation voltage Vth2, the transmittance becomes 100%. Therefore, the voltage value V9, which is a complete ON voltage, is set to a value higher than the saturation voltage Vth2, but it is possible to set a value that minimizes the amount of voltage change between the voltage value V8 and the adjacent voltage value V8. preferable. Further, in a region equal to or higher than the threshold voltage Vth1 and equal to or lower than the saturation voltage Vth2, the transmittance increases nonlinearly as the effective voltage increases. Therefore, the intermediate voltage values V1 to V8 are set so that the transmittance changes substantially at regular intervals between the voltages Vth1 and Vth2, but are set so that the transmittance changes nonlinearly. Is also good. This makes it possible to flexibly cope with various liquid crystals depending on how the level value (voltage value) is set.

  FIG. 3 is a voltage setting table for subfields SF1 to SF3. The voltage value V for each subfield SF is uniquely specified according to the gradation data D0 to D5. Therefore, when viewing the entire one frame including the three subfields SF1 to SF3, the combination of the three voltage values V selected from the voltage values V0 to V9 is also uniquely determined by the grayscale data D0 to D5. Specified. The display gradation of the pixel is determined by the combination of the voltage values V in consideration of the weighting of the subfields SF1 to SF3. For example, when the gradation value (D5D4D3D2D1D0) is "000011", the voltage value of the first subfield SF1 is V1, the voltage value of the next subfield SF2 is V1, and the voltage value of the last subfield SF3 is V0. As a result, the ratio (duty ratio) of the set time of the two voltage values V0 and V1 in one frame period is specified, and the gray scale display of the pixel is performed with the effective voltage according to the time density.

  The number of divisions of the subfield SF and the set number of the voltage values V should be appropriately set according to the number of gradations to be displayed, but in the latter case, three or more voltage values V having different values are used. Must be set.

  The feature of this subfield driving is that the voltage value V is selected such that the data change amount (voltage change amount) in the adjacent subfields (for example, SF1 and SF2) is equal to or less than a predetermined change amount (step level). It is in the point. As a result, it is possible to effectively prevent a grayscale shift, grayscale inversion, or crushing due to the magnitude of the voltage change amount. Here, the “step level” refers to a step interval allowed at discrete voltage values V0 to V9. For example, the step level of adjacent voltage values (for example, V0, V1) is "1", and the step level of one skipped voltage value (for example, V0, V2) is "2". In the present embodiment, the “predetermined change amount” is set to “1 step level or less” in order to minimize the voltage change amount between adjacent subfields. Therefore, the condition is that the two voltage values V for the adjacent subfields are the same value or adjacent values. From the voltage setting table in FIG. 3, it can be seen that the voltage change between adjacent subfields is less than one step level for all gradation values. In addition, as shown in FIG. 2, since the adjacent intervals of the voltage values V0 to V9 are different, for example, between V0 and V1 and between V1 and V2, although the value of the voltage difference itself is different, It should be noted that when viewed at the step level, both become the same “1”.

  When this subfield driving is viewed from another viewpoint, three voltage values V in a series of subfields SF1 to SF3 are selected from the voltage values V0 to V9 so that the values are adjacent to each other. There are features. However, it should be noted that the voltage values V need only be selected so as to be adjacent to each other, and it is not necessary to select a plurality of voltage values V. For example, with respect to “000000” to “000111”, basically, a gradation value is defined by a combination of two adjacent voltage values V0 and V1, but a single value is defined for “000000” (or “000111”). Is used only for the voltage value V0 (or V1).

  Further, taking this subfield driving from a different viewpoint, as the gradation value defined by the gradation data D0 to D5 increases, the voltage value V between adjacent voltage values (for example, V0-V1) is increased. The feature is that is changed. For example, when the value increases from "001000" to "001001", the voltage changes from V2 to V1 in the subfield SF1 and from V1 to V2 in the subfield SF2, and the change in the voltage value V is between adjacent ones. You can see that it is being done. Thus, regardless of the gradation value, the smaller the change amount of the gradation value, the smaller the change amount of the voltage value V. Therefore, it is possible to improve the gradation characteristics in moving image display on the premise of a time-series gradation change. Can be planned.

  FIG. 4 is a block diagram of the electro-optical device according to the present embodiment. The display unit 1 is, for example, an active matrix type display panel in which a liquid crystal element is driven by a switching element such as an FET (field effect transistor). In the display unit 1, pixels 2 of M dots × N lines are arranged in a matrix (in a two-dimensional plane). The display unit 1 also includes N scanning lines Yn (n = 1 to N) each extending in the horizontal direction (row direction) and each of the N scanning lines Yn extending in the vertical direction (column direction). M data lines Xm (m = 1 to M) are provided, and the pixels 2 are arranged corresponding to the intersections.

  FIG. 5 is an equivalent circuit diagram of the pixel 2 using liquid crystal. One pixel 2 includes a switching transistor 21 which is a switching element, a liquid crystal element 22 whose transmittance changes according to an applied voltage, and a capacitor 23. The source of the switching transistor 21 is connected to one data line Xm, and the gate is connected to one scanning line Yn. Regarding the plurality of pixels 2 located on the same pixel column, the sources of the respective switching transistors 21 are commonly connected to the data line Xm. Further, for the plurality of pixels 2 located on the same pixel row, the gates of the respective switching transistors 21 are commonly connected to the scanning line Yn. The drain of the switching transistor 21 is commonly connected to a liquid crystal element 22 and a capacitor 23 provided in parallel. The liquid crystal element 22 includes a pixel electrode 24, a counter electrode 25, and a liquid crystal sandwiched between these electrodes 24,25. Data supplied from the data line Xm is applied at a voltage level to the pixel electrode 24 and one electrode of the capacitor 23 via the switching transistor 21. Further, a drive voltage LCOM is applied to the opposite electrode 25 and the other electrode of the capacitor 23. In the data writing period of each subfield SF, when data is supplied to the pixel 2 at a voltage level, the liquid crystal element 22 and the capacitor 23 are charged and discharged. Thereby, the transmittance of the liquid crystal is set according to the potential difference between the pixel electrode 24 and the counter electrode 25, and the gradation display of the pixel 2 is performed.

  Based on external signals such as a vertical synchronizing signal Vs, a horizontal synchronizing signal Hs, and a dot clock signal DCLK input from a higher-level device (not shown), the timing signal generating circuit 5 Synchronous control with the conversion circuit 7 is performed. Under this synchronous control, the scanning line driving circuit 3 and the data line driving circuit 4 control the display of the display unit 1 in cooperation with each other.

The oscillating circuit 6 generates a basic clock RCLK for the read timing and supplies it to the timing signal generating circuit 5. Based on the external signals Vs, Hs, and DCLK, the timing signal generation circuit 5 generates an AC signal FR, a drive voltage LCOM, a start pulse DY, a clock signal CLY, a latch pulse LP, a clock signal CLX, a start signal ST, and a subfield signal. Various internal signals including SFI and the like are generated.
Here, the alternating signal FR is a signal whose polarity is inverted every frame. The drive voltage LCOM is a voltage applied to the counter electrode 25 formed on the counter substrate of the display unit 1, and is set to 0 [V] in the present embodiment. If the pixel voltage shifts slightly lower due to the influence of the falling of the scanning signal G1, G2, G3,..., GN, the driving voltage LCOM is set to the negative side, so that the DC voltage is applied to the liquid crystal. Ensure that no components are applied. The start pulse DY is a pulse signal output at the start timing of each subfield SF, and the switching of each subfield SF is controlled by this pulse DY. The clock signal CLY is a signal that defines a horizontal scanning period (1H) on the scanning side (Y side). The latch pulse LP is a pulse signal output at the beginning of the horizontal scanning period, and is output at the time of the level transition of the clock signal CLY, that is, at the time of rising and falling. The clock signal CLX is a dot clock signal for writing data to the pixel 2. The start signal ST is a timing signal that specifies the start timing of capturing data for one pixel row. The subfield signal SFI is a signal that specifies the number of the subfield SF and defines the start timing.

The scanning line driving circuit 3 mainly includes a shift register, an output circuit, and the like.
The drive circuit 3 transfers a start pulse DY supplied at the beginning of each sub-field SF in accordance with a clock signal CLY, and supplies scan signals G1, G2, G3,. Are sequentially set exclusively to the H level. Thus, in a predetermined period, line-sequential scanning in which pixel rows for one scanning line are sequentially selected in a predetermined order (generally from the top to the bottom) is performed.

  The data conversion circuit 7 converts the input 6-bit gradation data D0 to D5 and outputs 4-bit subfield data Ds defining the voltage value V for each subfield SF to the data line driving circuit 4. . FIG. 6 is a block diagram of the data conversion circuit 7. The data conversion circuit 7 includes a frame memory 71, a memory control circuit 72, and a conversion unit 73. The frame memory 71 has at least a memory space of M × N bits corresponding to the resolution of the display unit 1, and stores and holds gradation data D0 to D5 input from a higher-level device in frame units. The memory control circuit 72 controls writing of data to the frame memory 71 based on the write system signals Vs, Hs, and DCLK. That is, under the control of the two synchronization signals Vs and Hs, the dot clock signal DCLK is counted up, and the gradation data D0 to D5 are sequentially stored in the address corresponding to the count value. This count value is reset every time the next vertical synchronization signal Vs is input, and a new count-up is started. Further, the memory control circuit 72 controls the reading of data from the frame memory 71 based on the reading system signals DY, LP, CLX. That is, under the control of the two pulses DY and LP, the clock signal CLX is counted up, and the gradation data D0 to D5 are sequentially read from the address corresponding to the count value. The gradation data D0 to D5 read from the frame memory 71 are serially transferred to the conversion unit 73. The conversion unit 73 selects a combination of the voltage values V corresponding to the gradation data D0 to D5 according to the voltage setting table shown in FIG. Then, the conversion unit 73 serially outputs the subfield data Ds specifying the selected voltage value V for each subfield SF in the order of the subfield SF indicated by the subfield signal SFI.

  The data line driving circuit 4 simultaneously outputs 4-bit subfield data Ds for a pixel row to which data is to be written this time in one horizontal scanning period (1H), and outputs subfield data for a pixel row to which data is to be written in the next horizontal scanning period. Ds point-sequential latching is performed in parallel. In a certain horizontal scanning period, M subfield data Ds corresponding to the number of data lines Xm are sequentially latched. Then, in the next horizontal scanning period, the latched M sub-field data Ds are converted into any one of the voltage values V0 to V9, and then the data signals d1, d2, d3,. Are simultaneously output to the data lines X1 to XM.

FIG. 7 is a block diagram of the data line driving circuit 4. The data line driving circuit 4 includes an X shift register 41, a first latch circuit 42, a second latch circuit 43, a decoder 44, and a voltage selector 45. The X shift register 41 transfers the start signal ST supplied at the beginning of the horizontal scanning period according to the clock signal CLX, and sequentially and exclusively supplies the latch signals S1, S2, S3,.
The first latch circuit 42 sequentially latches 4-bit subfield data Ds, which is serial data, when the latch signals S1, S2, S3,..., SM fall. The second latch circuit 43 latches the subfield data Ds latched by the first latch circuit 42 when the latch pulse LP falls, and outputs the subfield data Ds to the decoder 44 in parallel. The decoder 44 generates selection signals SEL0 to SEL9 for selecting one of the voltage values V0 to V9 (-V0 to -V9) based on the subfield data Ds from the second latch circuit 43, and 45. The voltage selection section 45 is composed of a plurality of voltage selection circuits 45 'provided for each data line Xm. The voltage selection section 45 applies one of the voltage values V0 to V9 with polarity inversion based on the selection signals SEL0 to SEL9 and the like. (That is, any one of the voltage values V0 to V9 or any one of -V0 to -V9), and outputs the selected voltage value V as a data signal dm to the corresponding data line Xm.

  Note that the present invention can be applied to a configuration in which data is input line-sequentially from a frame memory or the like directly to the data line driving circuit 4. However, in such a case, the operation of the main part of the present invention is the same. Description is omitted. In this case, it is not necessary to provide the data line driving circuit 4 with the X shift register 41.

  FIG. 8 is a configuration diagram of one voltage selection circuit 45 'corresponding to a certain data line Xm. The voltage selection circuit 45 'includes three switch groups 45a to 45c. Each of the switch groups 45a to 45c includes, for example, a plurality of analog switches provided in parallel. The first switch group 45a is selectively turned on in accordance with the level of the selection signals SEL0 to SEL9, and outputs one of the positive voltage values V0 to V9 to the third switch group 45c. The second switch group 45b also selectively turns on in accordance with the levels of the selection signals SEL0 to SEL9, and outputs one of the negative voltage values (−V0) to (−V9) to the third switch group 45c. I do. The voltage values V and -V selected by the preceding switch groups 45a and 45b have different polarities but the same absolute value. The third switch group 45c at the subsequent stage is selectively turned on in response to the AC signal FR and its inverted signal / FR, and uses either the positive voltage V or the negative voltage -V as the data signal dm. Output.

  Next, display control of the display unit 1 by line-sequential scanning will be described with reference to a timing chart shown in FIG. First, in one frame (1f) in which the alternating signal FR becomes L level, a start pulse DY instructing the start of the first subfield SF1 is supplied to the scanning line drive circuit 3. In response to this, the scanning line drive circuit 3 performs data transfer according to the clock signal CLY, and exclusively sets the scanning signals G1, G2, G3,. As a result, the scanning lines Y1 to YN are sequentially selected from top to bottom in FIG.

  Each of the scan signals G1, G2, G3,... GN has a pulse width corresponding to a half cycle of the clock signal CLY. The scanning signal G1 output to the uppermost scanning line Y1 is output with a delay of at least a half cycle of the clock signal CLY after the clock signal CLY first rises after the start pulse DY is supplied. Therefore, one shot (G0) of the latch pulse LP is supplied to the data line driving circuit 4 from the supply of the start pulse DY to the output of the scanning signal G1. In response, the data line driving circuit 4 performs data transfer according to the clock signal CLX during one horizontal scanning period, and sequentially and exclusively outputs the latch signals S1, S2, S3,..., SM. Each of the latch signals S1, S2, S3,..., SM has a pulse width corresponding to a half cycle of the clock signal CLX.

  The first latch circuit 42 shown in FIG. 7 outputs the subfield data signal Ds to the pixel 2 corresponding to the intersection between the uppermost scanning line Y1 and the leftmost data line X1 at the falling timing of the latch signal S1. Latch. Next, at the falling timing of the latch signal S2, the subfield data Ds to the pixel 2 corresponding to the intersection of the uppermost scanning line Y1 and the second data line X2 from the left is latched. Subsequent processing is the same, and at the falling timing of the latch signal Sm, the subfield data Ds to the pixel 2 corresponding to the intersection of the uppermost scanning line Y1 and the mth data line Xm from the left is sequentially latched. . As a result, the subfield data Ds for the pixel row (M) corresponding to the uppermost scanning line Y1 is latched by the first latch circuit 42 in a dot-sequential manner.

  Next, when the clock signal CLY falls, the scanning signal G1 goes high, and the uppermost scanning line Y1 is selected. As a result, all the switching transistors 21 are simultaneously turned on for the uppermost pixel row corresponding to the scanning line Y1. On the other hand, the next latch pulse LP is output in synchronization with the falling of the clock signal CLY. At the falling timing of the latch pulse LP, the second latch circuit 43 outputs to the decoder 44 the M subfield data Ds latched by the first latch circuit 42 in a dot-sequential manner. Also, at this timing, the decoder 44 generates M sets of the selection signals SEL0 to SEL9 from the M subfield data Ds, and outputs them all to the corresponding voltage selection circuit 45 'all at once. When the AC conversion signal FR is at the L level, each of the voltage selection circuits 45 ′ simultaneously sets the negative voltage value (−V) as the data signal dm to the corresponding data line Xm according to the selection signals SEL0 to SEL9. Supply. As a result, the voltage value V as data is applied to and held by the liquid crystal element 22 and the capacitor 23 connected to the subsequent stage via the on-state switching transistor 21 in the uppermost pixel row (data writing).

  The above operation is repeated line by line until the scanning line driving circuit 3 selects the bottom scanning line YN. When the selection of the bottom scanning line YN is completed, the first subfield The data writing period in SF1 ends. In the subfield SF1, the data once written in each pixel 2 is held until the data writing in the next subfield SF2 is performed again. In the subsequent subfields SF2 and SF3, data is written line-sequentially in the same process as in the first subfield SF1. The data writing period in each subfield period is set to be the same.

  According to the subfield drive according to the present embodiment, there is an effect that display quality can be improved. This is because in the subfields SF1 to SF3 forming one frame, the combination of the voltage values V is selected such that the data change amount (voltage change amount) between adjacent subfields is one step level or less. . As a result, it is possible to suppress a gradation shift due to the magnitude of the voltage change amount, and it is possible to effectively prevent the inversion and collapse of the gradation even when the number of gradations is increased. As a result, it is possible to further improve the display quality by improving the gradation characteristics.

  In this embodiment, in order to minimize the data change amount between adjacent subfields, the change amount is set to be equal to or less than one step level. Level or lower).

  Further, according to the present embodiment, the setting of the subfield SF is achieved by using three or more voltage values V, as compared with the conventional subfield driving using only two voltage values (ON voltage and OFF voltage). Further multi-tone display can be realized without increasing the number (the number of divisions per frame). At the same time, multi-gradation display can be realized without shortening the period of the subfield SF, so that the time constraint on writing data to the pixel 2 is relaxed.

In the above-described embodiment, the liquid crystal is AC-driven by setting the drive voltage LCOM to 0 V (constant voltage) and inverting the polarity of the data voltage. However, the AC drive method of the liquid crystal is not limited to this, and AC drive can be performed by variably setting (two levels) the drive voltage LCOM.
Also, here, an example is described in which the polarity inversion is performed for each frame period. However, the AC drive may be performed in a certain cycle. For example, the polarity inversion may be performed for each subfield. May be performed for each scanning period. When the polarity inversion is performed for each subfield, a combination of the voltage values V is selected such that the absolute value of the data change amount (voltage change amount) between adjacent subfields is equal to or less than a predetermined change amount. This is the same for the second embodiment and the third embodiment described later.

In the above-described embodiment, an example in which a liquid crystal element is used as the electro-optical element has been described. As the liquid crystal, for example, in addition to a TN (Twisted Nematic) type, it has a memory property such as an STN (Super Twisted Nematic) type having a twist orientation of 180 ° or more, a BTN (Bi-stable Twisted Nematic) type, and a ferroelectric type. A wide variety of well-known types including a bistable type, a polymer dispersion type, a guest host type and the like can be used (the same applies to the second and third embodiments).
[Second embodiment]
FIG. 10 is an explanatory diagram of subfield driving according to the present embodiment. FIG. 3 is a diagram showing how a voltage applied to a certain pixel changes depending on gradation data for each subfield. In this subfield driving, 64-gradation display is performed by using five subfields SF1 to SF5 and five voltage values V0 to V4. One frame (1f) is divided into five subfields SF1 to SF5. In relation to the gradation to be displayed, the subfields SF1 to SF5 are basically set to lengths (display periods) for giving a weighting of 1: 1: 2: 4: 8. It may be appropriately adjusted according to the characteristics. As shown in the voltage setting table of FIG. 11, the combination of the voltage values V in the series of subfields SF1 to SF5 is selected from among five voltage values V0 to V4 according to the 6-bit gradation data D0 to D5. Selected. The voltage value V0 is a complete off voltage, and the voltage value V4 is a complete on voltage. Further, the intermediate voltage values V1 to V3 are set such that the transmittance changes substantially at regular intervals between the voltages Vth1 and Vth2 shown in FIG. 2, as in the first embodiment. . (The transmittance may be set to change non-linearly. This makes it possible to flexibly cope with various liquid crystals depending on how the level value (voltage value) is set.)
Also in this subfield driving, a combination of voltage values V is selected so that the amount of voltage change between adjacent subfields is one step level or less. Therefore, as in the first embodiment, the display quality can be further improved by improving the gradation characteristics. At the same time, multi-gradation display can be realized without shortening the period of the subfield SF, and the time constraint of data writing is also eased. Further, the same number of display gradations as in the first embodiment can be realized with the set number of the voltage values V smaller than that in the first embodiment. In addition, in order to perform the AC drive as in the first embodiment, the drive is performed by the voltages of the positive polarity voltages V0 to V4 and the negative polarity voltages -V0 to -V4.
[Third embodiment]
FIG. 12 is an explanatory diagram of subfield driving according to the present embodiment. FIG. 3 is a diagram showing how a voltage applied to a certain pixel changes depending on gradation data for each subfield. In this subfield driving, 64-gradation display is performed by using seven subfields SF1 to SF7 and five voltage values V0 to V4. One frame (1f) is divided into seven subfields SF1 to SF7. In relation to the gradation to be displayed, each of the subfields SF1 to SF7 is basically set to a length (display period) giving a weighting of 1: 1: 1: 1: 4: 4: 4. However, it may be appropriately adjusted according to the characteristics of the liquid crystal. As shown in the voltage setting table of FIG. 13, the combinations of the voltage values V in the series of subfields SF1 to SF7 are set in the same manner as in the second embodiment according to the 6-bit gradation data D0 to D5. It is selected from five voltage values V0 to V4.

Also in this subfield driving, a combination of voltage values V is selected so that the amount of voltage change between adjacent subfields is one step level or less. Therefore, as in the first embodiment, the display quality can be further improved by improving the gradation characteristics. At the same time, multi-gradation display can be realized without shortening the period of the subfield SF, and the time constraint of data writing is also eased. In addition, in order to carry out AC driving similarly to the first embodiment, driving is performed by voltages of positive polarity voltages V0 to V4 and negative polarity voltages -V0 to -V4.
[Fourth embodiment]
In the present embodiment, an example of application to an organic EL (Electronic Luminescence) element, which is a typical example of a current-driven element driven by a current flowing through the element, will be described.
Even when an organic EL element is used, the basic configuration of the electro-optical device is the same as that in FIG. Driving methods of an active matrix display using an organic EL element are roughly classified into a voltage programming method and a current programming method. Here, the voltage programming method will be described. Here, the “voltage programming method” refers to a method of supplying data to the data lines on a voltage basis.

  FIG. 14 is an equivalent circuit diagram illustrating an example of the voltage-programmed pixel 2 using the organic EL element according to the present embodiment. One pixel 2 includes an organic EL element OLED, two transistors T1 and T4, and a capacitor C for holding data. The gate of the switching transistor T1 is connected to the scanning line Yn to which the scanning signal SEL is supplied, and the drain is connected to the data line Xm to which the data voltage Vdata is supplied. The data voltage Vdata is the voltage value V set according to the above-described embodiment. The source of the switching transistor T1 is commonly connected to one electrode of the capacitor C and the gate of the driving transistor T4, which is a form of the driving element. The potential Vss is applied to the other electrode of the capacitor C, and the drain of the drive transistor T4 is connected to the first power supply line L1 set to the power supply voltage Vdd. The source of the driving transistor T4 is connected to the anode (anode) of the organic EL element OLED. The cathode (cathode) of the organic EL element OLED is connected to a second power supply line L2 set to a voltage Vss lower than the power supply voltage Vdd.

  The control process of the pixel 2 shown in FIG. 14 is as follows. While the scanning signal SEL is at the H level, the data voltage Vdata supplied to the data line Xm is applied to one electrode of the capacitor C, and charges corresponding to the data voltage Vdata are accumulated in the capacitor C. Then, since the equivalent of the gate voltage Vg is applied to the gate of the driving transistor T4 by the accumulated charge of the capacitor C, the driving transistor T4 flows a driving current according to the gate voltage Vg to its own channel. As a result, the organic EL element OLED provided in the current path of the driving current emits light at a luminance corresponding to the driving current, and the gradation of the pixel 2 is displayed.

As described above, in the present embodiment, the same effect as in each of the above-described embodiments can be obtained in the electro-optical device in which the pixel 2 includes the organic EL element OLED and data is written to the pixel 2 by the voltage program method. Can be.
[Fifth Embodiment]
In the present embodiment, an organic EL element is used as an electro-optical element, and data writing to the pixel 2 is performed by a current program method. Here, the “current programming method” refers to a method of supplying data to data lines on a current basis. The configuration of the electro-optical device according to the present embodiment is also basically the same as that in FIG. However, the data line driving circuit 4 includes a variable current source 46 (see FIG. 15) for converting a voltage value V (data voltage Vdata) set for each subfield SF into a data current Idata, and converts the converted data current Idata is output to the data line Xm. Since such conversion is performed, three or more level values (voltage values V) result in current values, and data supply to the pixel 2 is performed at the current level.

  FIG. 15 is an equivalent circuit diagram illustrating an example of the current-programmed pixel 2 using the organic EL element according to the present embodiment. One pixel 2 includes an organic EL element OLED, three transistors T1, T2, T4 and a capacitor C. The gate of the first switching transistor T1 is connected to the scanning line Yn to which the scanning signal SEL is supplied, and the source thereof is connected to the data line Xm to which the data current Idata is supplied. The drain of the first switching transistor T1 is commonly connected to the source of the second switching transistor T2, the drain of the driving transistor T4, and the anode of the organic EL element OLED. The gate of the second switching transistor T2 is connected to the scanning line Yn to which the scanning signal SEL is supplied, similarly to the first switching transistor T1. The drain of the second switching transistor T2 is commonly connected to one electrode of the capacitor C and the gate of the driving transistor T4. The other electrode of the capacitor C and the source of the drive transistor T4 are commonly connected to a first power supply line L1 set to the power supply voltage Vdd. On the other hand, the cathode of the organic EL element OLED is connected to the power supply line L2 set to the voltage Vss.

The control process of the pixel 2 shown in FIG. 15 is as follows. While the scanning signal SEL is at the H level, the switching transistors T1 and T2 are both turned on.
As a result, the data line Xm is electrically connected to the drain of the drive transistor T4, and the drive transistor T4 has a diode connection in which its own gate and its own drain are electrically connected. The drive transistor T4, which also functions as a programming transistor, causes the data current Idata supplied from the data line Xm to flow through its own channel, and generates a gate voltage Vg corresponding to the data current Idata at its own gate. As a result, charges corresponding to the generated gate voltage Vg are accumulated in the capacitor C connected to the gate of the driving transistor T4, and data is written. Thereafter, when the scanning signal SEL falls to the L level, both of the switching transistors T1 and T2 are turned off. As a result, the data line Xm and the drain of the driving transistor T4 are electrically disconnected. However, since a gate voltage Vg equivalent is applied to the gate of the driving transistor T4 by the accumulated charge of the capacitor C, the driving transistor T4 continues to flow a driving current corresponding to the gate voltage Vg to its own channel. As a result, the organic EL element OLED provided in the current path of the driving current emits light at a luminance corresponding to the driving current, and the gradation of the pixel 2 is displayed.

  As described above, in the present embodiment, an effect similar to that of each of the above-described embodiments can be obtained in the electro-optical device in which the pixel 2 includes the organic EL element OLED and data is written to the pixel 2 by the current programming method. Can be. Since voltage-current conversion is performed in the data line driving circuit 4, three or more level values are eventually set as current values, and data supply to the pixels 2 is performed at the current level. In this case, the current value as the level value may be set so that changes in the optical characteristics (luminance) of the organic EL element OLED are substantially at equal intervals, but may be nonlinear.

  Further, the present driving method itself for performing data writing to the pixel 2 including the organic EL element OLED by the current programming method is novel. Therefore, the subfield driving according to the present embodiment is a novel configuration even when the level value serving as the data supplied to the pixel 2 is binary (on value and off value). In this case, on the assumption that the voltage-current conversion is performed, by setting the level value by the voltage level, it is not necessary to largely change the data conversion system and the data line drive system of each of the above-described embodiments. There are advantages.

  In each of the embodiments described above, the liquid crystal element and the organic EL element have been described as examples. However, the present invention is not limited to this. For example, a digital micromirror device (DMD), plasma emission, or electron emission may be used. The present invention can be widely applied to various electro-optical elements using fluorescent light or the like.

  Further, the electro-optical device according to each embodiment described above can be mounted on various electronic devices including, for example, a television, a projector, a mobile phone, a mobile terminal, a mobile computer, a personal computer, and the like. If the above-described electro-optical device is mounted on these electronic devices, the commercial value of the electronic devices can be further increased, and the product appeal of the electronic devices in the market can be improved.

  According to the present invention, three or more level values (voltage values or current values) are selected from among three or more level values (voltage values or current values) so that the change amount of data (data voltage or data current) between adjacent subfields is equal to or less than a predetermined change amount. You have selected a combination. As a result, it is possible to suppress a tone shift due to the magnitude of the data change amount, and it is possible to effectively prevent the inversion and the collapse of the tone. As a result, it is possible to further improve the display quality by improving the gradation characteristics.

FIG. 4 is an explanatory diagram of subfield driving according to the first embodiment. FIG. 3 is a characteristic diagram showing a relationship between an effective voltage and a relative transmission (reflection) rate. 3 is a voltage setting table of a subfield according to the first embodiment. FIG. 2 is a block configuration diagram of the electro-optical device according to the first embodiment. FIG. 3 is an equivalent circuit diagram of a pixel using a liquid crystal element. FIG. 3 is a block diagram of a data conversion circuit. FIG. 3 is a block diagram of a data line driving circuit. FIG. 2 is a block diagram of a voltage selection circuit. 6 is a timing chart of display control by line sequential scanning. FIG. 9 is an explanatory diagram of subfield driving according to the second embodiment. 9 is a voltage setting table of a subfield according to the second embodiment. FIG. 13 is an explanatory diagram of subfield driving according to the third embodiment. 9 is a voltage setting table of a subfield according to the third embodiment. FIG. 14 is an equivalent circuit diagram of a pixel according to a fourth embodiment. FIG. 14 is an equivalent circuit diagram of a pixel according to a fifth embodiment.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 Display part 2 Pixel 3 Scan line drive circuit 4 Data line drive circuit 5 Timing signal generation circuit 6 Oscillation circuit 7 Data conversion circuit 21 Switching transistor 22 Liquid crystal element 23 Capacitor 24 Pixel electrode 25 Counter electrode 41 X shift register 42 First latch Circuit 43 Second latch circuit 44 Decoder 45 Voltage selection unit 45 'Voltage selection circuits 45a to 45c Switch group 46 Variable current source 71 Frame memory 72 Memory control circuit 73 Conversion unit

Claims (17)

Using a plurality of subfields defined by dividing a predetermined period, a method of driving an electro-optical device that performs grayscale display of pixels,
As data to be supplied to the pixel for each sub-field, an absolute value of a data change amount between adjacent sub-fields is predetermined according to gradation data from among three or more level values having different values. A first step of selecting and setting the level value so as to be equal to or less than a change amount;
Supplying the data set for each of the sub-fields to the pixel, thereby performing a gray scale display of the pixel. Using a plurality of subfields defined by dividing a predetermined period, a method of driving an electro-optical device that performs grayscale display of pixels,
As data to be supplied to the pixel for each subfield, a level value is selected and set from among three or more level values having different values according to grayscale data so that the values are adjacent to each other. Steps and
Supplying the data set for each of the sub-fields to the pixel, thereby performing a gray scale display of the pixel. Using a plurality of subfields defined by dividing a predetermined period, a method of driving an electro-optical device that performs grayscale display of pixels,
As data to be supplied to the pixel for each subfield, a level value corresponding to the grayscale data is selected from three or more level values having different values, and a grayscale value defined by the grayscale data is selected. A first step of changing the level value between the adjacent level values in accordance with the increase of
Supplying the data set for each of the sub-fields to the pixel, thereby performing a gray scale display of the pixel.   4. The method of driving an electro-optical device according to claim 1, wherein the data is a data voltage, and the level value is set by a voltage value.   4. The method according to claim 1, wherein the data is a data current, and the level value is set as a current value. Using a plurality of subfields defined by dividing a predetermined period, a method of driving an electro-optical device that performs grayscale display of pixels,
A first step of selecting and setting the level value according to gradation data from among a plurality of level values having different values as data to be supplied to the pixel for each subfield;
A second step of writing data to the pixel by supplying the data set for each subfield to the pixel at a current level;
A drive current is set according to the data written to the pixel, and the set drive current is supplied to an electro-optical element that emits light at a luminance corresponding to the drive current, thereby performing gradation display of the pixel. A method for driving an electro-optical device, the method comprising: Using a plurality of subfields defined by dividing a predetermined period, in an electro-optical device that performs gradation display of pixels,
Multiple scan lines,
Multiple data lines,
A plurality of pixels provided corresponding to the intersection of the scanning line and the data line,
A scanning line driving circuit that outputs a scanning signal to the scanning line to select the scanning line corresponding to the pixel to which data is to be written;
As the data for each subfield generated by converting the gradation data, the change amount of the data between the adjacent subfields is not more than a predetermined change amount among three or more level values having different values. A data conversion circuit for selecting and setting the level value such that
A data line driving circuit that cooperates with the scanning line driving circuit, and outputs data for each subfield generated in the data conversion circuit to the data line corresponding to the pixel to be written; An electro-optical device comprising:   The electro-optical device according to claim 7, wherein the predetermined change amount is a one-step level corresponding to a change amount between the adjacent level values. Using a plurality of subfields defined by dividing a predetermined period, in an electro-optical device that performs gradation display of pixels,
Multiple scan lines,
Multiple data lines,
A plurality of pixels provided corresponding to the intersection of the scanning line and the data line,
A scanning line driving circuit that outputs a scanning signal to the scanning line to select the scanning line corresponding to the pixel to which data is to be written;
A data conversion circuit for selecting and setting, as the data for each subfield generated by converting the gradation data, the level values adjacent to each other from three or more level values having different values. When,
A data line driving circuit that cooperates with the scanning line driving circuit, and outputs data for each subfield generated in the data conversion circuit to the data line corresponding to the pixel to be written; An electro-optical device comprising: Using a plurality of subfields defined by dividing a predetermined period, in an electro-optical device that performs gradation display of pixels,
Multiple scan lines,
Multiple data lines,
A plurality of pixels provided corresponding to the intersection of the scanning line and the data line,
A scanning line driving circuit that outputs a scanning signal to the scanning line to select the scanning line corresponding to the pixel to which data is to be written;
The data for each sub-field generated by converting the gradation data is selected from three or more level values having different values, and according to the increase in the gradation value defined by the gradation data. A data conversion circuit that changes the level value between the adjacent level values,
A data line driving circuit that cooperates with the scanning line driving circuit, and outputs data for each subfield generated in the data conversion circuit to the data line corresponding to the pixel to be written; An electro-optical device comprising:   The electro-optical device according to any one of claims 7 to 10, wherein the data line drive circuit outputs the data for each subfield at a voltage level to the data line. The pixel is
A switching element whose conduction is controlled by a scanning signal of the scanning line,
A pair of electrodes, and a liquid crystal interposed between the pair of electrodes, and the transmittance or the reflectance changes according to voltage level data supplied from the data line via the switching element. The electro-optical device according to claim 11, further comprising an electro-optical element. The pixel is
A switching element whose conduction is controlled by a scanning signal of the scanning line,
Via the switching element, holding means for holding data of the voltage level supplied from the data line,
A drive element that generates a drive current according to the data held by the holding unit;
The electro-optical device according to claim 11, further comprising: an electro-optical element that emits light at a luminance according to the drive current.   The electro-optical device according to any one of claims 7 to 10, wherein the data line driving circuit outputs data for each of the subfields to the data line at a current level. The pixel is
A switching element whose conduction is controlled by a scanning signal of the scanning line,
Via the switching element, holding means for holding current level data supplied from the data line as voltage level data,
A drive element that generates a drive current according to the data held by the holding unit;
The electro-optical device according to claim 14, further comprising: an electro-optical element that emits light at a luminance according to the drive current. Using a plurality of subfields defined by dividing a predetermined period, in an electro-optical device that performs gradation display of pixels,
Multiple scan lines,
Multiple data lines,
A plurality of pixels provided corresponding to intersections of the scanning lines and the data lines, each of the pixels being driven in accordance with holding means for holding data, and data held in the holding means; A plurality of pixels each including a driving element for setting a current, an electro-optical element for emitting light at a luminance corresponding to the set driving current, and a scan signal output to the scan line to be a data write target. A scanning line driving circuit for selecting the scanning line corresponding to the pixel;
A data conversion circuit that selects and sets the level value according to grayscale data from among a plurality of level values having different voltage values as data to be supplied to the pixel for each subfield;
In cooperation with the scanning line drive circuit, and after converting the data of the voltage level for each sub-field generated in the data conversion circuit to the data of the current level, the pixel to be written to the pixel An electro-optical device, comprising: a data line driving circuit for outputting a current level to the corresponding data line.   An electronic apparatus comprising the electro-optical device according to any one of claims 7 to 16.

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