JP2004213896A - Magnetic disk drive of vertical magnetic recording system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a magnetic disk drive capable of normally reading a PLL synchronization signal and avoiding the deterioration of data format efficiency in a vertical magnetic recording method. <P>SOLUTION: A read/write gate generation circuit 100 has a function for adjusting the output timing of a write gate WG and a read gate RG on the basis of: an interval between read/write heads; and a data format. A CPU 10 sets the amount of respective delays of: a DSP (Data Sector Pulse) generation circuit 91; a delay circuit 101 for adjusting the timing of the read gate RG; and a delay circuit 102 for adjusting the timing of the write gate WG. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention generally relates to a perpendicular magnetic recording type magnetic disk drive, and more particularly to a read / write gate control technique in a magnetic disk drive using a composite magnetic head.

  2. Description of the Related Art In recent years, in the field of magnetic disk devices represented by hard disk drives, a perpendicular magnetic recording system has attracted attention as a technique for exceeding the recording density limit of a longitudinal magnetic recording (in-plane magnetic recording) system. The perpendicular magnetic recording system has a relatively high signal resolution and a small attenuation of the signal amplitude even at a high linear recording density, so that a high surface recording density can be realized.

  In a perpendicular magnetic recording type disk drive, a composite magnetic head in which a read head and a write head are separately mounted on a slider is employed as a basic structure, similarly to the longitudinal magnetic recording type. The read head is composed of a magnetoresistive element (MR element or GMR element). The write head is formed of a single-pole inductive thin film head. Such a magnetic head of the perpendicular magnetic recording system has a distance (distance) between the read head and the write head in the circumferential direction of the disk of about 7 to 8 μm as compared with the longitudinal magnetic recording system. It is wider than about 3 to 4 μm.

  In a disk drive using such a composite magnetic head, it is necessary to adjust the timing of the read operation by the read head and the timing of the write operation by the write head. Hereinafter, a specific description will be given with reference to FIGS.

  As shown schematically in FIG. 7, the disk drive comprises a composite magnetic head 2 as described above, a head amplifier circuit 7, a read / write (R / W) channel 8, a disk controller (HDC) 9 and a microprocessor (CPU) 10. The head amplifier circuit 7 has a read amplifier for amplifying a read signal output from the read head and a write amplifier for converting a write data signal into a write current signal. The R / W channel 8 is a signal processing IC for processing a read / write data signal (including a servo data signal), and has a function of generating a servo sector pulse SSP from a servo data signal described later.

  The HDC 9 has a read / write gate generation circuit 90 for generating read / write gates (RG, WG) related to the present invention, together with an interface function between the drive and a host system (not shown). The CPU 10 is a main control device of the drive, and controls the read / write gate generation circuit 90.

  Here, a disk recording medium (hereinafter simply referred to as a disk) provided in the disk drive has a plurality of data areas called data tracks in the radial direction. Each data track has a data format as shown in FIG. That is, the data format includes the servo areas 50 arranged at predetermined regular intervals in the circumferential direction, and the data areas 51 arranged between the servo areas.

  The servo area 50 is an area in which a servo data signal is recorded by a dedicated device called a servo track writer during manufacture of the drive, and data recording is prohibited during a normal read / write operation. The servo data signal is servo information used for positioning control of the magnetic head 2 (executed by the CPU 10). On the other hand, the data area 51 is divided into a plurality of data sectors in which user data (DATA) is recorded.

  Here, since the length of the data area 51 is not always an integral multiple of the length of the data sector, one data sector may be divided into two sectors with the servo area 50 interposed.

  When a data write operation is performed on the data area 51 by the write head, as shown in FIG. 8B, gaps 52 (PA1, PA2) for absorbing rotation fluctuations are recorded and continuously recorded. A PLL synchronization signal (PLL) 53 is recorded. The PLL is a synchronization signal for synchronizing a read clock used for a read operation (reproduction operation) with data. Further, after the synchronization byte (sync byte SB) 54 for detecting the starting point of the data (DATA) is recorded, the user data (DATA) is recorded.

  As shown in FIG. 8A, when the HDC 9 activates the read gate RG (read permission signal) for the R / W channel 8, a read operation is performed. Here, the read / write gate generation circuit 90 has a data sector pulse (DSP) generation circuit 91 and a delay circuit 92, and the read gate RG and the write gate WG are determined based on the DSP generated by the DSP generation circuit 91. Generate. The DSP generation circuit 91 generates a DSP based on a servo sector pulse (SSP) output from the R / W channel 8 (described later). The SSP is generated at the timing of the servo gate (SG) output from the HDC 9.

  In the write operation, the write gate WG is activated by the DSP. Here, immediately after the servo area 50, the DSP is generated with a delay of the interval between read / write heads (GN) from the timing at the end of the servo area 50 (see FIG. 8B). That is, when the end of the servo area 50 is detected with reference to the read head, the write head is still located within the range of the servo area 50. Therefore, if data is written at that timing, the servo data signal recorded in the servo area 50 will be destroyed, which can be avoided by the above-described delay processing.

  On the other hand, in the read operation, as shown in FIG. 8A, the read gate RG needs to be activated at the center of the rotation fluctuation gap 52 (the boundary between the lengths PA1 and PA2). That is, the delay circuit 92 activates the read gate RG at a timing delayed by a predetermined delay time DT from the DSP. The delay time DT is set by the CPU 10. This allows the read head to reliably read the PLL synchronizing signal (PLL) 53 even when the rotation of the disk fluctuates during the read / write operation. Here, a PLL synchronization signal is recorded in the rotation fluctuation gap 52. That is, the PLL area 53 is an area for securing a minimum necessary PLL synchronization signal.

  In the longitudinal magnetic recording system, as described above, the interval between the read / write heads is about 3 μm. Here, assuming that the rotation speed of the disk is, for example, 4200 rpm ± 0.2%, the time (GN) corresponding to the interval changes depending on the position of the head 2 and is 0.32 μs (outer circumference) to 0.64 μs (inner circumference). ). Therefore, normally, the CPU 10 sets the delay time (GN) in the DSP generation circuit 91 for each zone on the disk. The zone means a range obtained by dividing all track groups on the disk by a predetermined number of tracks. On the other hand, the length (PA1 and PA2) of the rotation fluctuation gap 52 is constant regardless of the location. When the rotation accuracy is, for example, ± 0.2%, the time of the rotation fluctuation gap 52 is 1.27 μs, and the delay time DT of the read gate RG is “(1.27 / 2−0.32) on the outer peripheral side. = 0.315 μs ”, which is almost 0 on the inner peripheral side.

  The magnetic head of the perpendicular magnetic recording system (sometimes referred to as an SPT head) has a read / write head interval of about 7 to 8 μm, which is wider than that of the longitudinal magnetic recording system. Therefore, as shown in FIG. 9A, it is necessary to relatively delay the generation timing of the DSP. Therefore, even if the delay time is set to 0, the timing of the read gate RG approaches the PLL region 53 side from the center of the rotation fluctuation gap 52 as shown in FIG. In such a state, the PLL synchronization signal may not be normally read from the PLL area 53 by the read head at the timing of the read gate RG in consideration of the fluctuation in the rotation of the disk.

  In order to solve such a problem, as shown in FIG. 9C, it is necessary to increase the area of the rotation fluctuation gap 52 (the PA1 side is increased by PA3) to absorb the rotation fluctuation. However, when the area of the rotation fluctuation gap 52 that is not the data recording area increases, the efficiency of the data format decreases.

  Here, the decrease in the data format efficiency will be specifically described.

  Assuming that the interval between the read / write heads is 8 μm and the number of revolutions of the disk is, for example, 4200 rpm ± 0.2%, the time (GN) corresponding to the interval changes depending on the position of the head 2 and is 0.86 μs (outer circumference) １1.71 μs (inner circumference). On the other hand, when the rotation accuracy is, for example, ± 0.2% and the delay time DT of the read gate RG is 0, the length of the rotation fluctuation gap 52 is 0.225 μs on the outer peripheral side of the portion PA1 (PA3). It is necessary to increase by 1.075 μs on the inner peripheral side. When this time is converted into the number of bytes of a 2.5-inch HDD having a transfer speed of 300 Mbps, they become 8.4 bytes and 20.1 bytes, respectively, which are 1.3% and 3.2% of one data sector. In short, the data format efficiency is reduced by the same percentage.

  Conventionally, there has been proposed a magnetic disk device having a delay time control means so that recording data is delayed by a time corresponding to an interval (distance) between read / write heads and recorded by the read head so as to be normally reproduced. (See, for example, JP-A-6-176486). However, simply lowering the recording data timing and recording cannot avoid the above-described decrease in data format efficiency.

  Therefore, an object of the present invention is to enable a PLL synchronization signal to be read normally and a decrease in data format efficiency even when a magnetic head having a wide interval between read / write heads applied to a perpendicular magnetic recording system is used. It is an object of the present invention to provide a magnetic disk device capable of avoiding the problem.

  A magnetic disk device according to an aspect of the present invention can perform magnetic recording of a data signal by a perpendicular magnetic recording method, and is disposed between a plurality of servo areas where a servo data signal is recorded and includes a rotation fluctuation gap region. A disk recording medium having a recording area composed of a data format, a write head for writing a data signal to the disk recording medium, and a read for reading a data signal including the servo data signal from the disk recording medium A magnetic head having a head, a gap between the write head and the read head in a circumferential direction on the disk recording medium, a write gate for determining a timing of a write operation by the write head, and a read by the read head A read that generates a read gate that determines the timing of the operation Write gate generating means; and read / write means for executing a write operation at an output timing of the write gate and executing a read operation at an output timing of the read gate, wherein the read / write gate generating means comprises: At the time of a write operation, the write gate is output on the rotation fluctuation gap region based on a time corresponding to an interval between the write head and the read head, based on a servo sector pulse read from the servo area by the read head. In the read operation, based on the data format on the disk recording medium, the write gate and the read gate are output so as to output the read gate on a central area of the rotation fluctuation gap area with reference to the servo sector pulse. Timing to adjust the gate output timing And it is configured to include a grayed adjusting means.

  According to the present invention, a function of adjusting a read / write gate for determining the timing of a read / write operation is realized, particularly when a magnetic head having a wide interval between read / write heads applied to a perpendicular magnetic recording system is used. By doing so, the PLL synchronizing signal required for the read operation can be read normally, and the increase in the rotation fluctuation gap region can be suppressed to avoid a decrease in data format efficiency. Therefore, it is effective to apply the present invention to a magnetic disk device with a high recording density especially employing a perpendicular magnetic recording system.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a main part of a read / write gate generation circuit according to the embodiment, and FIG. 2 is a block diagram showing a main part of a disk drive according to the embodiment.

(Disk drive configuration)
The disk drive of the embodiment is assumed to be a hard disk drive (HDD) of a perpendicular magnetic recording system. As shown in FIG. 2, this drive has a disk 1 as a data recording medium, and a magnetic head 2 for performing a data read / write operation on the disk 1. The disk 1 is rotated at a high speed by a spindle motor (SPM) 3. As will be described later, the disk 1 has a large number of track groups (TR0 to TRn) having a predetermined data format configured concentrically (see FIGS. 5 and 6).

  The magnetic head 2 is an SPT head having a structure in which a read head (MR element or GMR element) and a write head (single-pole inductive thin film head) are mounted on a slider. As described above, the interval (distance) between the read / write heads in the circumferential direction of the magnetic head 2 is, for example, about 7 to 8 μm, which is wider than that of the longitudinal magnetic recording method.

  The magnetic head 2 is mounted on an actuator 4 driven by a voice coil motor (VCM) 5. The VCM 5 is a controlled object (plant) in a narrow sense in the head positioning control system (servo system), and a driving current is supplied by a VCM driver 6A included in the motor driver IC 6. The motor driver IC 6 includes an SPM driver 6B that supplies a drive current to the SPM 3 together with the VCM driver 6A, and is controlled by the CPU 10.

  The disk drive includes a circuit system including a head amplifier circuit 7, an R / W channel 8, a disk controller (HDC) 9, a CPU 10, and a memory 11, together with the above-described head / disk assembly.

  The head amplifier circuit 7 has a read amplifier for amplifying a read signal output from the read head and a write amplifier for converting a write data signal into a write current signal. The R / W channel 8 is a signal processing IC for processing a read / write data signal (including a servo data signal), and has a function of generating a servo sector pulse SSP from the servo data signal read by the read head.

  The HDC 9 has a read / write gate generation circuit 100 that generates read / write gates (RG, WG) according to the present invention, together with an interface function between the drive and a host system (not shown). The CPU 10 is a main control device of the drive, and controls the read / write gate generation circuit 100. The memory 11 is a rewritable nonvolatile memory such as a flash EEPROM, and stores various data necessary for controlling the CPU 10.

(Configuration of read / write gate generation circuit)
The HDC 9 includes a DSP generation circuit 91 and a read / write gate generation circuit 100 having delay circuits 101 and 102, as shown in FIG. The amounts of delay (delay times) Da to Dc of the DSP generation circuit 91 and the delay circuits 101 and 102 are set by the CPU 10. The DSP generation circuit 91 generates a DSP based on a servo sector pulse (SSP) output from the R / W channel 8.

  Here, when the servo gate (SG) output from the HDC 9 becomes active, the R / W channel 8 executes a process of detecting a servo sector mark 501 from a read signal from a read head. The servo sector mark 501 is a signal for detecting a servo area included in the servo area 50 as shown in FIG. In addition, in the servo area 50, in addition to the mark 501, AGC data 500, a track address code 502 and servo burst signal 503, which are servo data in a narrow sense, are recorded as is well known. The R / W channel 8 generates an SSP in response to the detection of the servo sector mark 501 and sends it to the HDC 9 (servo sector mark detection notification processing).

  Each of the delay circuits 101 and 102 outputs the read gate RG and the write gate WG to the R / W channel 8 at timings based on the delay amounts Db and Dc from the CPU 10 with reference to the DSP (see also FIG. 2). The R / W channel 8 executes a read operation (read signal processing) at the timing of the read gate RG, and executes a write operation (write signal processing) at the timing of the write gate WG.

(data format)
As shown in FIG. 5A, the disk 1 has a large number of track groups (TR0 to TRn) formed concentrically. As shown in FIG. 5B, each track is composed of servo areas 50 arranged at predetermined regular intervals in the circumferential direction, and data areas 51 arranged between the servo areas. The data area 51 is divided into a plurality of data sectors in which user data (DATA) is recorded. Here, since the length of the data area 51 is not always an integral multiple of the length of the data sector, one data sector is divided into two sectors via the servo area 50 as shown in FIG. In some cases.

  When a write operation is performed by the write head, in each data sector, a PLL synchronization signal is recorded in a rotation fluctuation gap 52 and a PLL area 53 for absorbing rotation fluctuation as shown in FIG. The PLL area 53 is an area for ensuring a PLL synchronization signal. Further, a synchronization byte (sync byte SB) 54 for detecting the starting point of the data (DATA) 55, user data (DATA) 55, ECC (error correction) information 56, and a pad 57 for a write path delay are recorded. You.

(Read / write gate generation operation)
As described above, in the disk drive, when the HDC 9 activates the read gate RG for the R / W channel 8, the read operation for the data area 51 is executed. In a read operation, the R / W channel 8 processes a read signal read by a read head to reproduce (decode) user data. At this time, in order to obtain a synchronization pulse necessary for the read operation, it is necessary to reliably read the PLL synchronization signal from the PLL area 53 by the read head. On the other hand, when the HDC 9 activates the write gate WG for the R / W channel 8, a write operation for the data area 51 is performed. In a write operation, the R / W channel 8 processes a write data signal and sends it to the head amplifier circuit 7 in order to supply a write signal to the write head. At this time, it is necessary to adjust the timing so that the data write operation is not performed on the servo area 51.

  Hereinafter, the generation operation of the read / write gate of the embodiment will be described with reference to the timing chart of FIG.

  The R / W channel 8 outputs the SSP to the HDC 9 in response to the detection of the servo area 50 (the detection of the servo mark 501). The DSP generation circuit 91 generates a DSP indicating the starting point of the data sector as shown in FIG. At this time, the DSP generation circuit 91 generates a DSP at a timing of a predetermined delay time (T2) from the end of the servo area 50 according to the delay amount (Da) set by the CPU 10, as shown in FIG. I do. Further, the DSP generation circuit 91 generates a plurality of DSPs at a predetermined interval according to the number of data sectors included in the servo sector from the first DSP. In short, the DSP generation circuit 91 generates the DSP at the timing at the head position of each data sector included in the data area 51, based on the three parameters set by the CPU 10, as shown in FIG. . That is, the three parameters are the time (T2) from the end of the servo area 50 to the first DSP, the length of each data sector, and the number of data sectors in one servo sector.

  Next, during a write operation, the read / write gate generation circuit 100 sends a predetermined delay time (T3) from the DSP to the delay circuit 102 according to the delay amount (Dc) set by the CPU 10 as shown in FIG. The write gate WG is generated at the timing of ()). Here, the time (T1) from the end of the servo area 50 to the generation of the write gate WG has a relationship of “T1 = T2 + T3”, and corresponds to the interval between the read head and the write head (a distance of about 7 to 8 μm). It is a delay time.

  On the other hand, in the read operation, as shown in FIG. 3A, the read / write gate generation circuit 100 outputs the timing of the predetermined delay time from the DSP to the delay circuit 101 in accordance with the delay amount (Db) set by the CPU 10. Then, a read gate RG is generated. At this time, the generation timing of the read gate RG is set to be at the center of the rotation fluctuation gap 52 (boundary between PA1 and PA2), as shown in FIG.

  As described above, according to the read / write gate generation circuit 100 of the embodiment, at the time of the write operation, the timing of the predetermined delay time (T3) from the DSP, that is, the interval between the read head and the write head from the end of the servo area 50 The write gate WG is generated at the timing of the delay time (T1) corresponding to (the distance is about 7 to 8 μm). In this case, in other words, the DSP generation circuit 91 generates the DSP at the timing of the delay time (T2) shorter than the delay time (T1) corresponding to the interval between the read head and the write head (the distance is about 7 to 8 μm). Generate.

  Therefore, the timing at which the write operation is started is from the area corresponding to the rotation gap 52, as shown in FIG. Be avoided. Further, in the read operation, since the read gate RG can be generated at a timing of a predetermined delay time from the DSP, as shown in FIG. 3B, the read operation starts from the center of the rotation fluctuation gap 52 (the boundary between PA1 and PA2). Can be started. Therefore, the PLL synchronization signal can be normally read from the PLL area 53 without increasing the area of the rotation fluctuation gap 52. Thus, it is possible to avoid a decrease in data format efficiency due to an increase in the area of the rotation fluctuation gap 52.

  As a specific example, the time (T2) from the end of the servo area 50 to the generation of the DSP is 0.4 μs, the delay time of the read gate RG is 0.235 μs, and the delay time (T3) of the write gate WG is the outer peripheral side. Is preferably set to 0.46 μs, and 1.31 μs on the inner peripheral side. In short, it is desirable that the CPU 10 adjust the delay amount (Da, Db, Dc) with respect to the read / write gate generation circuit 100 for each zone where the magnetic head 2 is located on the disk 1 during the read / write operation.

(Modification)
FIG. 4 is a block diagram showing a read / write gate generation circuit according to a modification of the embodiment. This modification is a read / write gate generation circuit including a DSP generation circuit 91, a delay circuit 103, and switching circuits 104 and 105. The switching circuits 104 and 105 are controlled by the CPU 10.

  In the circuit of this modification, the relationship between the delay time (T1) corresponding to the interval between the read head and the write head (distance of about 7 to 8 μm) and the time (T4) corresponding to the rotation fluctuation gap 52 is as follows. When the condition “T1> T4 / 2” is satisfied, the delay circuit 103 is used only when the write gate WG is generated. Here, “T4 / 2” is a time corresponding to the center of the rotation fluctuation gap 52 (the boundary between PA1 and PA2).

  Specifically, under the control of the switching circuits 104 and 105 by the CPU 10, the read / write gate generation circuit activates the read gate RG at substantially the same timing as that of the DSP, and the write gate WG at the timing of the delay time by the delay circuit 103. Generate At this time, the DSP generation circuit 91 generates a DSP at the center timing of the rotation fluctuation gap 52 according to the delay amount (Da) from the CPU 10.

  When the above condition is not satisfied, specifically, when the condition of “T1 <T4 / 2” is satisfied on the outer peripheral side of the disc 1 and the condition of “T1> T4 / 2” is satisfied on the inner peripheral side, the CPU 10 Under the control of the switching circuits 104 and 105, the delay circuit 103 is used on the outer peripheral side when the read gate RG is generated. Conversely, on the inner circumference side, the delay circuit 103 is used when the write gate WG is generated, as described above.

  As described above, according to the configuration of the present modification, the delay circuit 103 can be used for generating the read / write gate based on the control by the CPU 10, so that the number of delay circuits can be reduced.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying constituent elements in an implementation stage without departing from the scope of the invention. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the above embodiments. For example, some components may be deleted from all the components shown in the embodiment. Further, components of different embodiments may be appropriately combined.

FIG. 1 is a block diagram showing a main part of a read / write gate generation circuit according to an embodiment of the present invention. FIG. 2 is an exemplary block diagram showing a main part of the disk drive according to the embodiment; 4 is a timing chart for explaining the operation of the read / write gate generation circuit according to the first embodiment; FIG. 9 is a block diagram showing a modification of the embodiment. FIG. 2 is an exemplary view showing a configuration of a disk used in the disk drive according to the embodiment. FIG. 2 is a view showing a data format of the disk. FIG. 9 is a block diagram showing a main part of a conventional disk drive. 9 is a timing chart for explaining the operation of a conventional read / write gate generation circuit. 9 is a timing chart for explaining the operation of a conventional read / write gate generation circuit.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 ... Disk, 2 ... Magnetic head, 3 ... Spindle motor, 4 ... Actuator,
5 voice coil motor, 6 motor driver IC, 7 head amplifier circuit,
8 read / write channel, 9 disk controller (HDC), 10 CPU
11 memory, 90 read / write gate generation circuit, 91 DSP generation circuit,
92: delay circuit, 100: read / write gate generation circuit, 101: delay circuit,
102 ... Delay circuit.

Claims (9)

A magnetic recording of a data signal is possible by a perpendicular magnetic recording method, and a disk recording is provided between a plurality of servo areas where a servo data signal is recorded and has a recording area composed of a data format including a rotation fluctuation gap area. Medium,
A write head for writing a data signal to the disk recording medium and a read head for reading a data signal including the servo data signal from the disk recording medium; A magnetic head having an interval between the write head and the read head,
Read / write gate generating means for generating a write gate for determining a timing of a write operation by the write head and a read gate for determining a timing of a read operation by the read head;
Read / write means for executing a write operation at an output timing of the write gate and executing a read operation at an output timing of the read gate;
The read / write gate generation means includes:
At the time of the write operation, based on a servo sector pulse generated based on data read from the servo area by the read head, the data format and a time corresponding to an interval between the write head and the read head, Outputting the write gate so that a write operation is started from the recording area based on a time longer than a time corresponding to half of the rotation fluctuation gap area,
The read operation includes timing adjustment means for adjusting output timings of the write gate and the read gate so as to output the read gate on a central region of the rotation fluctuation gap region based on the servo sector pulse. A magnetic disk device characterized by the above-mentioned. The timing adjusting means includes:
The write operation is performed by the write head from the rotation fluctuation gap area based on the time corresponding to the interval between the write head and the read head, longer than the time corresponding to half of the rotation fluctuation gap area, and the data format. 2. The magnetic disk drive according to claim 1, wherein the output timing of the write gate is adjusted so as to start. Based on the servo sector pulse, a data sector pulse generating means for generating a data sector pulse for identifying each data sector arranged between the servo areas,
3. The timing adjustment unit according to claim 1, wherein the timing adjustment unit is configured to adjust output timings of the write gate and the read gate based on the data sector pulse. 3. The magnetic disk drive according to claim 1.   During the write operation, the timing adjusting means performs recording on the rotation fluctuation gap area or in the rotation fluctuation gap area after a lapse of time corresponding to an interval between the write head and the read head from the end position of the servo area. 4. The magnetic disk drive according to claim 1, wherein output timing is adjusted so that the write gate is output on a region. 5. Based on the servo sector pulse, comprising a data sector pulse generating means for outputting a data sector pulse for identifying each data sector arranged between the servo areas,
The timing adjusting means includes:
At the time of the read operation, based on the time from the end position of the servo area to the center area of the rotation fluctuation gap area with reference to the data sector pulse, output timing such that the read gate is output on the center area. 2. The magnetic disk drive according to claim 1, wherein the value is adjusted. On the disk recording medium, the configuration is divided and managed for each data zone corresponding to a predetermined range in the radial direction,
6. The timing adjustment unit according to claim 1, wherein the timing adjustment unit is configured to adjust output timing of the write gate and the read gate for each of the data zones. Magnetic disk unit.   6. The timing adjusting means according to claim 3, further comprising a delay circuit for adjusting each output timing of the read gate and the write gate based on the data sector pulse. The magnetic disk device according to the paragraph.   8. The magnetic disk drive according to claim 1, further comprising a disk controller having the read / write gate generation unit including the timing adjustment unit.   8. The magnetic disk drive according to claim 1, further comprising: a disk controller having the read / write gate generation unit including the timing adjustment unit and the data sector pulse generation unit. .

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