JP2004207362A

JP2004207362A - Photoelectric transducer

Info

Publication number: JP2004207362A
Application number: JP2002372365A
Authority: JP
Inventors: Jun Fukuda; 潤福田; Hisao Arimune; 久雄有宗
Original assignee: Kyocera Corp
Current assignee: Kyocera Corp
Priority date: 2002-12-24
Filing date: 2002-12-24
Publication date: 2004-07-22

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive photoelectric transducer ensuring higher efficiency and reliability without lowering the electricity collecting efficiency at the second electrode side. <P>SOLUTION: The photoelectric transducer has the structure that many first conductivity crystal semiconductor particles 4 are allocated on one surface of a conductive substrate 1 as a first electrode, an insulation substance 3 is provided between the first conductivity crystal semiconductor particles 4, a second conductor conductive layer 5 is formed on the first conductivity crystal conductor particles 4, and a transparent second electrode layer 6 is formed to the entire surface. On the other surface of the substrate 1, a third electrode 7 is formed via an insulation layer 10, and a plurality of connection holes 8 provided through the substrate 1 and insulation substance 3 are provided between the first conductivity semiconductor particles 4. In addition, the second electrode layer 6 and the third electrode 7 are electrically connected with a conductor 9 which is substantially insulated from the substrate 1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は太陽光発電に使用される光電変換装置に関し、特に結晶半導体粒子を用いた光電変換装置に関する。
【０００２】
【従来の技術】
一般的な結晶板系光電変換素子は、ｐ形シリコン基板の一主面側にｎ形半導体領域を形成してｐｎ接合部を形成し、さらにその上に透明電極を全面に形成し、この基板の一主面側の透明電極上と基板の裏面側にそれぞれ電極を形成したものである。透明電極上には、光の入射を極力妨げないように並列ライン状に形成された集電用のフィンガーと、各フィンガーが電気的に接続されて、各フィンガーからの電流を集合させる金属製のバスバーとが設けられているのが通常であり、これによって集電効率の向上が図られている。フィンガーとしては、通常、導電物質として銀（Ａｇ）を含有する熱硬化型導電性ペーストをライン状にスクリーン印刷して形成したものが用いられている。
【０００３】
また、ｐ形シリコン基板内に貫通孔を形成するとともに、このシリコン基板の受光面側と貫通孔内にｎ形半導体領域を連続して形成し、裏面側のｐ^＋領域と貫通孔部分の裏面側のｎ形半導体領域部分にそれぞれ電極を形成することによって受光面のデッドスペースを減少させるようにした結晶板系光電変換素子も提案されている（例えば特許文献１参照）。
【０００４】
また、絶縁性基板の一方の面上に第一電極と半導体層と第二電極とを順次積層した薄膜太陽電池素子においては、基板の一方の面上に第一電極を設けた後、両者を貫通する多数の貫通孔を設け、その後基板の一方の面側に半導体層と第二電極を順次積層し、さらに基板の他方の面上に第三電極を設けることによって、第二電極と第三電極をこの貫通孔を介して電気的に接続した光電変換素子とすることも知られている。この光電変換素子において、多数の貫通孔を介して行われている第二電極と第三電極との電気的接続はいわばフィンガーの代わりをなすものであって、高いシート抵抗の第２電極を流れる電流の経路を短縮することによって集電効率を向上させようとするものであり、第三電極はいわばバスバーの代わりをなすものである（例えば特許文献２参照）。
【０００５】
また、導電性基板を用いた薄膜太陽電池素子においては、第一電極をなす導電性の基板の表面上に半導体層と第二電極層を順次形成する。次いで積層された基板と半導体層と第二電極層とを貫通する貫通孔を形成した後、貫通孔内壁に絶縁層を形成する。第二電極層の上にグリット電極を設けるとともに、基板の裏面に絶縁層を介して第三電極層を形成し、少なくとも半導体層、基板及び絶縁層を貫通する貫通孔を介してグリッド電極と第三電極層とを電気的に接続する薄膜太陽電池素子も提案されている（例えば特許文献３参照）
〔特許文献１〕
特開平１−５１２８２号公報
〔特許文献２〕
特許第２７５５２８１号公報
〔特許文献３〕
特開２０００−１５０９２９号公報
【０００６】
【発明が解決しようとする課題】
しかしながら、フィンガーとバスバーとを備えた従来の結晶板系光電変換素子においては、受光面側に電極があるために、この受光面側電極によって入射光が遮られて影によるデッドスペースが発生するという問題がある。一般的な結晶板系光電変換素子がこのような電極構造をとる理由は、透明電極中でのジュール熱損失を低減する目的である。すなわち、直列接続電極構造を形成しない光電変換素子では、発生したキャリアが透明電極および裏面の電極中を光電変換素子端部に設けられるリード線取り出し部まで長い距離にわたって移動することになる。裏面の電極には金属電極が用いられるのが一般的であり、抵抗が小さく、したがって金属電極中を電流が流れることによるジュール熱損失は無視することができる。しかしながら、透明電極材料薄膜のシート抵抗は通常５〜３０Ω／□と比較的大きいため、ジュール熱による電力損失が発生する。
【０００７】
一方、貫通孔を介して電気的に第二電極に接続された第三電極を有する従来の結晶板系光電変換素子と薄膜太陽電池素子においては、フィンガーとバスバーが不要であるため、これらによるデッドスペースの発生がない利点がある。
【０００８】
しかしながら、結晶板系光電変換素子と絶縁性基板を用いた薄膜太陽電池素子は、シリコンあるいは一般的に脆性材料である絶縁性基板に貫通孔加工を行う必要があり、製造コストを大幅に増大させる問題がある（例えば特許文献１、２参照）。
【０００９】
また、従来の貫通孔を介して電気的に第二電極に接続された第三電極を有する結晶板系光電変換素子と導電性基板を用いた薄膜太陽電池素子においては、半導体部分に機械的ダメージを伴う貫通穴加工を行う必要があり、半導体品質の低下の恐れがあり、変換効率低下の原因ともなる（例えば特許文献１、３参照）。
【００１０】
また、貫通孔を介して第二電極と第三電極を電気的に接続し、シート抵抗の高い第二電極を流れる電流の経路を短縮して集電効率を向上させるには、多数の貫通孔を密に形成して各貫通孔を介して良好な導電性をもって第二電極と第三電極を電気的に接続する必要があるが、多数の貫通孔を密に形成し、しかもこの貫通孔を介して良好な導電性をもって第二電極と第三電極を接続するには多大な手間を要し、製造コストが増大する。また、貫通孔部分は発電に寄与し得ないデッドスペースであることから、径の大きな多数の貫通孔を密に配した場合、この貫通孔による起電力ロスが無視できなくなるという問題もある。
【００１１】
貫通孔を径の小さなものにすることも考えられるが、この場合、第二電極における電力損失が大きくなって初期の目的を達成できなくなる。貫通孔を径の小さなものにし、第二電極における電力損失を小さくするためにグリッド電極を付加した場合も、グリッド電極によるデッドスペースが増大して初期の目的を達成できなくなる（例えば特許文献３参照）。また、貫通孔の径を小さくすればするほど良好な導電性をもって第二電極と第三電極を電気的に接続する作業が困難になり、製造コストを増大させるとともに、第二電極と第三電極間の確実な電気的接続が行いにくくなって接続不良を生じる原因ともなる。
【００１２】
本発明は上記課題に鑑みてなされたものであり、第二電極側の集電効率を低下させることなく、フィンガーとバスバーを有する従来の光電変換素子よりもシャドウロスを軽減し、またシリコン半導体に貫通孔を設けないので、光起電力特性や信頼性に悪影響することなく低抵抗の配線の引き出しが容易になるとともに、脆性材料に貫通孔を設けないので製造コストの増大を抑え、高効率で高信頼性でかつ安価な光電変換装置を提供することを目的とする。
【００１３】
【課題を解決するための手段】
上記目的を達成するために、請求項１に係る光電変換装置によれば、第１の電極となる導電性基板の一方の面上に、第１導電形結晶半導体粒子を多数配設し、前記第１導電形結晶半導体粒子間に絶縁物質を介在させ、前記第１導電形結晶半導体粒子上に第２導電形半導体層を形成し、さらに透明な第２の電極層を全面に形成した光電変換装置において、前記基板の他方の面上に絶縁層を介して第３の電極を形成するとともに、前記第１導電形結晶半導体粒子間で前記基板と前記絶縁物質を貫通する複数の接続孔を設け、この接続孔で前記第２の電極層と第３の電極とが前記基板と実質的に絶縁された導体で電気的に接続されていることを特徴とする。
【００１４】
また、上記光電変換装置では、前記接続孔の径が前記第１導電形結晶半導体粒子の径よりも大きいことが望ましい。
【００１５】
また、上記光電変換装置では、前記接続孔の内壁に前記第２の電極層と第３の電極とを電気的に接続する導体と前記基板とを実質的に絶縁する短絡防止層が前記絶縁物質と同一の絶縁材料で形成されていることが望ましい。
【００１６】
また、上記光電変換装置では、前記基板が少なくとも表面にアルミニウム層を有する単層もしくは複合の導電性材料であることが望ましい。
【００１７】
また、上記光電変換装置では、前記第１導電形結晶半導体粒子の径が０．１ｍｍから０．６ｍｍであることが望ましい。
【００１８】
【発明の実施の形態】
以下、図面に基づいて本発明を詳細に説明する。
図１は、本発明の光電変換装置の一実施形態を示す図であり、１は導電性基板、２はアルミニウム（Ａｌ）と珪素（Ｓｉ）の合金層であり、導電性基板１と合金層２とを併せて第１の電極となる。３は絶縁物質、４は第１導電形結晶半導体粒子、５は第２導電形半導体層、６は第二電極、７は第三電極、８は接続孔、９は充填材、１０は絶縁層、１１は短絡防止層である。
【００１９】
基板１はアルミニウム（Ａｌ）またはアルミニウム（Ａｌ）を表層とする複合の導電性材料を用いることができる。複合材料の下地基板としては、アルミニウム（Ａｌ）の融点以上の融点を有する金属であればよく、例えば鉄（Ｆｅ）、ニッケル（Ｎｉ）もしくはステンレス等、またはインバー、Ｆｅ−Ｎｉ−Ｃｏ等を主成分とする低熱膨張合金等が用いられる。表層のアルミニウム（Ａｌ）の厚みは０．０１ｍｍ以上が望ましい。
【００２０】
アルミニウム（Ａｌ）と珪素（Ｓｉ）を主成分とする合金層２と基板１の境界には、アルミニウム（Ａｌ）と珪素（Ｓｉ）との合金層２の生成を制御するためのバリア層として任意の薄肉中間層（不図示）を設けることも可能である。薄肉中間層として、例えばニッケル（Ｎｉ）等を用いることが可能で、厚みは０．００１ｍｍ以上が好ましい。また、基板１が複合材料の場合、熱負荷等によって発生する熱膨張差に起因する基板１の反りを抑える目的で第１導電形結晶半導体粒子４を配設する反対の面に任意の表層（不図示）を設けることも可能である。
【００２１】
絶縁物質３は、正極と負極の分離を行うための絶縁材料からなる。例えば酸化珪素（ＳｉＯ_２）、酸化アルミニウム（Ａｌ_２Ｏ_３）、酸化鉛（ＰｂＯ）、酸化硼素（Ｂ_２Ｏ_３）、酸化亜鉛（ＺｎＯ）等を任意な成分とするガラス、耐熱性高分子材料もしくは耐熱性高分子材料と無機フィラーとの混合体、珪素（Ｓｉ）を含有する有機無機複合材料、または珪素（Ｓｉ）を含有する有機無機複合材料と無機フィラーとの混合体等からなる。絶縁層３の厚みは絶縁材料の絶縁抵抗によって異なるが、珪素（Ｓｉ）を含有する有機無機複合材料と無機フィラーとの混合体の場合、０．００１ｍｍ以上であることが望ましい。
【００２２】
第１導電形結晶半導体粒子４は、珪素（Ｓｉ）にｐ形を呈する硼素（Ｂ）、アルミニウム（Ａｌ）、ガリウム（Ｇａ）等、またはｎ形を呈するリン（Ｐ）、砒素（Ａｓ）等が微量元素含まれているものである。結晶半導体粒子４の粒径としては０．１〜０．６ｍｍがよく、０．６ｍｍを越えると従来型の結晶板系の光電変換素子の珪素（Ｓｉ）使用量と変わらなくなり、結晶半導体粒子を用いるメリットが少なくなる。また、０．１ｍｍよりも小さいと光透過等の光エネルギーロスが大きくなり、光電変換効率が低下する。また、結晶半導体粒子４の形状としては多角形のもの、曲面を持つもの等がある。
【００２３】
第２導電形結晶半導体層５は例えば珪素（Ｓｉ）から成り、気相成長法等で例えばシラン化合物の気相にｎ形を呈するリン系化合物の気相、またはｐ形を呈する硼素系化合物の気相を微量導入して形成する。膜厚は１０ｎｍ以上が好ましく、膜質としては結晶質、非晶質、または結晶質と非晶質とが混在するのいずれでもよいが、光透過率を考慮すると結晶質または結晶質と非晶質とが混在するものがよい。
【００２４】
更に、第２導電形結晶半導体層５は第１導電形結晶半導体粒子４の表面に沿って形成し、第１導電形結晶半導体粒子４の凸曲面形状に沿って形成されることが望ましい。第１導電形結晶半導体粒子４は凸曲面状の表面に沿って形成されることによってｐｎ接合の面積を広く稼ぐことができ、第１導電形結晶半導体粒子４の内部で発生した電子を効率よく収集することができる。また、第２導電形結晶半導体層５は短絡防止層１１上に形成されても構わない。
【００２５】
なお、第１導電形結晶半導体粒子４の外郭にｎ形を呈するリン（Ｐ）、砒素（Ａｓ）等、またはｐ形を呈する硼素（Ｂ）、アルミニウム（Ａｌ）、ガリウム（Ｇａ）等が微量含まれている第１導電形結晶半導体粒子４を用いる場合には、第２導電形結晶半導体層５はなくてもよく、第１導電形結晶半導体粒子４上に直接第二電極６を形成してもよい。
【００２６】
第二電極６は、第１導電形半導体粒子４で発生したキャリアを取り出すために、光入射側に設けられる透明な電極である。第二電極６の膜厚は抵抗値ができるだけ低く、しかも透明性が損なわれないように設計される。そのような特性を備えた好適な材料としては、例えば、酸化錫（ＳｎＯ_２）、酸化インジウム（Ｉｎ_２Ｏ_３）、酸化亜鉛（ＺｎＯ）、酸化カドミウム（ＣｄＯ）、ＩＴＯ（Ｉｎ_２Ｏ_３＋ＳｎＯ_２）等の金属酸化物が挙げられる。この第二電極６の形成方法としては、例えば蒸着法、スパッタ法、反応性スパッタ法等の成膜方法が用いられる。第二電極６は第２導電形結晶半導体層５と同様に短絡防止層１１上に形成されても構わない。
【００２７】
第二電極６の上には保護層（不図示）を形成してもよい。このような保護層としては透明誘電体の特性を持つものがよく、例えば酸化珪素（ＳｉＯ_２）、酸化セシウム（Ｃｓ_２Ｏ）、酸化アルミニウム（Ａｌ_２Ｏ_３）、窒化珪素（Ｓｉ_３Ｎ_４）、酸化チタン（ＴｉＯ_２）、酸化タンタル（Ｔａ_２Ｏ_５）、酸化イットリウム（Ｙ_２Ｏ_３）等を単一組成または複数組成で単層または組み合わせてＣＶＤ法やＰＶＤ法等で第二電極６上に形成する。保護層は光の入射面に接しているために透明性が必要であり、またリーク防止のために誘電体であることが必要である。保護層の膜厚は任意で選択可能であるが、保護層の膜厚を最適化すれば反射防止膜としての機能も期待できる。
【００２８】
第三電極７は、少なくとも接続孔８の直下にあればよく、前記基板１の裏面全面を覆う大きさの層でもよいが、幅の狭い帯状に形成することもできる。第三電極７の材料は電気抵抗が小さいことが望ましく、１×１０^−６Ωｃｍ以下であることが好ましい。第三電極７の形成には、例えばスクリーン印刷、ディスペンサー塗布等を用いることができる。
【００２９】
接続孔８は第二電極６と第三電極７を接続する経路を形成するための貫通孔である。接続孔８は基板１内に一定間隔で配列されることが望ましく、あらかじめ一定間隔で配列された接続孔８を有する基板１を使用することがより好ましい。基板１上に第１導電形結晶半導体粒子４を一定の規則性をもって整列させる場合は、接続孔８は第１導電形結晶半導体粒子４が配設されない、もしくは第１導電形結晶半導体粒子４を配設することによって発生するデッドスペース部、詳しくは第１導電形結晶半導体粒子４を最密六方に配置した場合に発生する第１導電形結晶半導体粒子３個に囲まれた領域に接続孔８を配置することが可能となり、接続孔８が存在することによるデッドスペースの増加を抑制することができる。また、接続孔８は第２導電形半導体層５と第二電極６および第三電極７を貫通している必要はなく、少なくとも基板１と絶縁物質３を貫通すればよい。接続孔８の孔径は第１導電形結晶半導体粒子４の径よりも大きいことが望ましい。接続孔８の孔径が第１導電形結晶半導体粒子４より小さいと、第１導電形結晶半導体粒子４が接続孔８を塞いでしまう可能性があり、集電効率を低下させてしまう恐れがある。
【００３０】
充填材９は、第二電極６と第三電極７を電気的に接続する役目を担うものである。充填材９は電気抵抗が小さいことが望ましく１×１０^−６Ωｃｍ以下であることが好ましい。より好ましくは、第三電極７と同一の材料で形成することがよい。同一の材料で形成することで、充填材９と第三電極７との信頼性のより高い電気的接合が得られる。充填材９の接続孔８への充填方法としては、スクリーン印刷やディスペンサー塗布等があり、一度の印刷や塗布で接続孔８を十分に満たせない場合には印刷や塗布を複数回繰り返すことで必要量の充填材９を充填することができる。ただし、第二電極６と充填材９との電気的に良好な接続が得られれば、接続孔８を完全に充填材９で埋める必要はない。また、第三電極７の形成のみで第二電極６と第三電極７との電気的な接続を得ることができれば、充填材９は不要であっても構わない。
【００３１】
絶縁層１０は基板１および合金層２と第三電極７とを分離し、また短絡防止層１１は基板１および合金層２と充填材９を正極と負極とを分離するための絶縁材料からなる。例えば酸化珪素（ＳｉＯ_２）、酸化アルミニウム（Ａｌ_２Ｏ_３）、酸化鉛（ＰｂＯ）、酸化硼素（Ｂ_２Ｏ_３）、酸化亜鉛（ＺｎＯ）等を任意な成分とするガラス、耐熱性高分子材料もしくは耐熱性高分子材料と無機フィラーとの混合体、珪素（Ｓｉ）を含有する有機無機複合材料、または珪素（Ｓｉ）を含有する有機無機複合材料と無機フィラーとの混合体等からなる。本発明では、絶縁物質３、絶縁層１０、短絡防止層１１を同一の材料で形成する。同一材料でそれぞれを形成することによって絶縁物質３と短絡防止層１１、および短絡防止層１１と絶縁層１０の接続部分に絶縁不良を起こす欠陥の発生を抑えることができる。また、同一材料であるために同一の工程で同時に形成することも可能となる。絶縁層１０の形成方法としては、例えばスクリーン印刷、ディスペンサー塗布、ディッピング等を用いることができる。短絡防止層１１の形成方法としては、例えばディスペンサー塗布、ディッピング等を用いて貫通孔を閉鎖させることなく形成される。
【００３２】
【実施例】
次に、本発明の光電変換装置の実施例を説明する。
あらかじめ３ｍｍ間隔でφ０．５ｍｍ、φ０．７ｍｍ、φ１．０ｍｍの各貫通孔を全面に有する１５０ｍｍ□のアルミニウム基板に直径約０．５ｍｍのｐ形シリコン粒子を上記アルミニウム基板上に多数配列して、６００〜６３０℃の温度で１〜１０分加熱してシリコン粒子を基板に接合させ、アルミニウム（Ａｌ）と珪素（Ｓｉ）を主成分とする合金層とアルミニウム（Ａｌ）質層を有する基板を作製した。
【００３３】
シリコン粒子間に約５０μｍの厚みになるようにポリイミドを用いて絶縁物質を形成するとともに、基板裏面の絶縁層と貫通孔内壁の短絡防止層も同様の厚みになるようにディッピングして形成し、３５０℃で１時間焼成して絶縁物質、絶縁層および短絡防止層を形成した。
【００３４】
次に、シランガスと微量のリン（Ｐ）化合物からなる混合ガスを用いたプラズマＣＶＤ法でｐ形シリコン粒子と絶縁物質上にｎ形の結晶質と非晶質の混晶のシリコン層を約１０〜２０ｎｍの厚みに成膜し、ｐｎ−ｊｕｎｃｔｉｏｎを有するシリコン半導体を形成した。更にその上にスパッタリング法で厚み約１００ｎｍの第二電極であるＩＴＯ膜を形成した。
【００３５】
さらに、基板の裏面側全面に絶縁層を介して導電物質として銀（Ａｇ）を含有する熱硬化型導電性ペーストをスクリーン印刷で厚み５０μｍになるように印刷すると同時に、貫通孔への充填材の埋め込みも同一工程で同一材料で同時に行った。その後、約２００℃で３０分焼成して第三電極と短絡防止層を介して充填材が充填された接続孔を形成した。
【００３６】
比較例として、貫通孔のない１５０ｍｍ□のアルミニウム基板に、直径約０．５ｍｍのｐ形シリコン粒子を上記アルミニウム基板上に多数配列して、６００〜６３０℃の温度で１〜１０分加熱してシリコン粒子を基板に接合させ、アルミニウム（Ａｌ）と珪素（Ｓｉ）を主成分とする合金層とアルミニウム（Ａｌ）質層を有する基板を作製した。次に、ポリイミドを用いてシリコン粒子間に約５０μｍの厚みになるように絶縁物質を塗布して焼成した。次に、シランガスと微量のリン（Ｐ）化合物からなる混合ガスを用いたプラズマＣＶＤ法でｐ形シリコン粒子と絶縁物質上にｎ形の結晶質と非晶質の混晶のシリコン層を約１０〜２０ｎｍの厚みに成膜し、ｐｎ−ｊｕｎｃｔｉｏｎを有するシリコン半導体を形成した。更にその上にスパッタリング法で厚み約１００ｎｍの第二電極であるＩＴＯ膜を形成した。その後、ＩＴＯ膜上に導電物質として銀を含有する熱硬化型導電性ペーストを３ｍｍ間隔で並列ライン状に幅０．１５ｍｍ、厚み５０μｍでディスペンサー塗布でフィンガーを形成し、フィンガーと直交する方向に２本の幅３ｍｍの銅板でバスバーを形成した。
【００３７】
本発明の光電変換装置と比較例の光電変換装置の特性評価結果を表１に示す。
【００３８】
【表１】

【００３９】
表１からわかるように、本発明の光電変換装置は良好な光電変換効率を得ることができ、とくにデッドスペース低減による効果でもある短絡電流の増加が著しい。ここで、本発明の光電変換装置の貫通孔による受光面積ロスはφ０．７ｍｍの接続孔品で約４％であり、比較例の光電変換装置のフィンガー、バスバーによる受光面積ロスは約９％であった。
【００４０】
【発明の効果】
以上のように、請求項１に係る光電変換装置によれば、第１の電極となる導電性基板の一方の面上に、第１導電形結晶半導体粒子を多数配設し、上記第１導電形結晶半導体粒子間に絶縁物質を介在させ、上記第１導電形結晶半導体粒子上に第２導電形半導体層を形成し、さらに透明な第２の電極層を全面に形成した光電変換装置において、上記基板の他方の面上に絶縁層を介して第３の電極を形成するとともに、上記第１導電形結晶半導体粒子間に位置し、上記基板と上記絶縁物質を貫通する複数の接続孔を設け、上記第２の電極層と上記第３の電極とが上記基板と実質的に絶縁された導体で電気的に接続されていることから、第二電極側の集電効率を低下させることなく、フィンガーとバスバーを有する従来の光電変換素子よりもシャドウロスを軽減し、またシリコン半導体に貫通孔を設けないので、光起電力特性や信頼性に悪影響することなく低抵抗の配線引き出しが容易になるとともに、脆性材料に貫通孔を設けないので製造コストの増大を抑え、高効率で高信頼性で、かつ安価な光電変換装置を提供することができる。
【図面の簡単な説明】
【図１】本発明の光電変換装置の実施の形態の一例を示す断面図である。
【図２】本発明の光電変換装置の製造手順の一例を示す断面図である。
【図３】本発明の光電変換装置の製造手順の他の例を示す断面図である。
【符号の説明】
１・・・・基板（第１の電極）
２・・・・合金層（第１の電極）
３・・・・絶縁物質
４・・・・第１導電形結晶質半導体粒子
５・・・・第２導電形半導体層
６・・・・第二電極
７・・・・第三電極
８・・・・接続孔
９・・・・充填材
１０・・・絶縁層
１１・・・短絡防止層[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a photoelectric conversion device used for solar power generation, and more particularly, to a photoelectric conversion device using crystalline semiconductor particles.
[0002]
[Prior art]
In a general crystal plate-based photoelectric conversion element, an n-type semiconductor region is formed on one principal surface side of a p-type silicon substrate to form a pn junction, and a transparent electrode is further formed on the pn junction. Are formed on the transparent electrode on one main surface side and on the back surface side of the substrate, respectively. On the transparent electrode, a current-collecting finger formed in a parallel line shape so as not to hinder the incidence of light as much as possible, and each finger is electrically connected and is made of a metal that collects current from each finger. Usually, a bus bar is provided to improve the current collection efficiency. As the finger, a finger formed by screen-printing a thermosetting conductive paste containing silver (Ag) as a conductive substance is usually used.
[0003]
Further, to form a through hole in the p-type silicon substrate, the back surface of the n-type semiconductor region on the light-receiving surface side and the through-hole of the silicon substrate to form continuously through hole portion and the back surface side of the p ⁺ region A crystal plate-based photoelectric conversion element in which an electrode is formed in each of the n-type semiconductor regions on the side to reduce the dead space on the light receiving surface has also been proposed (for example, see Patent Document 1).
[0004]
Further, in a thin-film solar cell element in which a first electrode, a semiconductor layer, and a second electrode are sequentially stacked on one surface of an insulating substrate, after providing the first electrode on one surface of the substrate, By providing a large number of through holes that penetrate, then sequentially laminating the semiconductor layer and the second electrode on one surface side of the substrate, and further providing a third electrode on the other surface of the substrate, the second electrode and the third electrode It is also known to use a photoelectric conversion element in which electrodes are electrically connected via the through holes. In this photoelectric conversion element, the electrical connection between the second electrode and the third electrode through a large number of through holes is a substitute for a finger, and flows through the second electrode having a high sheet resistance. The current collection efficiency is to be improved by shortening the current path, and the third electrode serves as a so-called bus bar (see, for example, Patent Document 2).
[0005]
Further, in a thin film solar cell element using a conductive substrate, a semiconductor layer and a second electrode layer are sequentially formed on the surface of the conductive substrate forming the first electrode. Next, after forming a through hole penetrating the laminated substrate, the semiconductor layer, and the second electrode layer, an insulating layer is formed on the inner wall of the through hole. A grid electrode is provided on the second electrode layer, a third electrode layer is formed on the back surface of the substrate via an insulating layer, and the grid electrode and the third electrode layer are formed via a through hole penetrating at least the semiconductor layer, the substrate and the insulating layer. A thin-film solar cell element for electrically connecting the three electrode layers has also been proposed (for example, see Patent Document 3).
[Patent Document 1]
JP-A-1-51282 [Patent Document 2]
Japanese Patent No. 2755281 [Patent Document 3]
JP 2000-150929 A
[Problems to be solved by the invention]
However, in a conventional crystal plate-based photoelectric conversion element including a finger and a bus bar, since there is an electrode on the light receiving surface side, incident light is blocked by the light receiving surface side electrode, and a dead space due to shadow occurs. There's a problem. The reason why a general crystal plate-based photoelectric conversion element has such an electrode structure is to reduce Joule heat loss in the transparent electrode. That is, in the photoelectric conversion element in which the series connection electrode structure is not formed, the generated carrier moves in the transparent electrode and the electrode on the back surface over a long distance to the lead wire take-out portion provided at the end of the photoelectric conversion element. In general, a metal electrode is used for the electrode on the back surface, and the resistance is small. Therefore, the Joule heat loss due to the current flowing through the metal electrode can be ignored. However, since the sheet resistance of the transparent electrode material thin film is relatively large, usually 5 to 30 Ω / □, power loss occurs due to Joule heat.
[0007]
On the other hand, in the conventional crystal plate-based photoelectric conversion element and the thin-film solar cell element having the third electrode electrically connected to the second electrode through the through-hole, the finger and the bus bar are unnecessary, and thus the There is an advantage that no space is generated.
[0008]
However, a thin-film solar cell element using a crystal plate-based photoelectric conversion element and an insulating substrate requires through-hole processing in silicon or an insulating substrate that is generally a brittle material, which significantly increases the manufacturing cost. There is a problem (for example, see Patent Documents 1 and 2).
[0009]
In a conventional thin film solar cell device using a crystal plate-based photoelectric conversion device having a third electrode electrically connected to a second electrode through a through-hole and a conductive substrate, the semiconductor portion is mechanically damaged. It is necessary to perform through-hole processing accompanied by the above, and there is a possibility that semiconductor quality may be deteriorated, which may cause a reduction in conversion efficiency (for example, see Patent Documents 1 and 3).
[0010]
Further, in order to electrically connect the second electrode and the third electrode via the through-holes and shorten the path of the current flowing through the second electrode having a high sheet resistance to improve the current collection efficiency, a large number of through-holes are required. The second electrode and the third electrode need to be densely formed and electrically connected to the second electrode and the third electrode with good conductivity through each through hole. Connecting the second electrode and the third electrode with good electrical conductivity through the intermediary requires a great deal of trouble and increases the manufacturing cost. In addition, since the through-hole portion is a dead space that cannot contribute to power generation, when a large number of large-diameter through-holes are densely arranged, there is a problem that electromotive force loss due to the through-holes cannot be ignored.
[0011]
It is conceivable that the diameter of the through-hole is small, but in this case, the power loss in the second electrode becomes large and the initial purpose cannot be achieved. Even when the through-hole has a small diameter and a grid electrode is added in order to reduce the power loss in the second electrode, the dead space due to the grid electrode increases and the initial purpose cannot be achieved (for example, see Patent Document 3). ). In addition, the smaller the diameter of the through hole, the more difficult it becomes to perform the work of electrically connecting the second electrode and the third electrode with good conductivity, increasing the manufacturing cost and increasing the cost of the second electrode and the third electrode. It is difficult to make reliable electrical connection between them, which may cause poor connection.
[0012]
The present invention has been made in view of the above problems, without reducing the current collection efficiency on the second electrode side, to reduce shadow loss than a conventional photoelectric conversion element having a finger and a bus bar, and also to a silicon semiconductor Since no through-holes are provided, it is easy to draw out low-resistance wiring without adversely affecting photovoltaic characteristics and reliability.In addition, since there is no through-hole in brittle materials, increase in manufacturing cost is suppressed, and high efficiency is achieved. An object is to provide a highly reliable and inexpensive photoelectric conversion device.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, according to the photoelectric conversion device of claim 1, a large number of first conductivity type crystalline semiconductor particles are provided on one surface of a conductive substrate serving as a first electrode, Photoelectric conversion in which an insulating material is interposed between first conductive type crystalline semiconductor particles, a second conductive type semiconductor layer is formed on the first conductive type crystalline semiconductor particles, and a transparent second electrode layer is formed on the entire surface. In the apparatus, a third electrode is formed on the other surface of the substrate via an insulating layer, and a plurality of connection holes are provided between the first conductive type crystalline semiconductor particles so as to penetrate the substrate and the insulating material. The connection hole electrically connects the second electrode layer and the third electrode with a conductor substantially insulated from the substrate.
[0014]
In the above-mentioned photoelectric conversion device, it is desirable that the diameter of the connection hole is larger than the diameter of the first conductive type crystalline semiconductor particles.
[0015]
In the above-mentioned photoelectric conversion device, a short-circuit preventing layer that substantially insulates the substrate from a conductor that electrically connects the second electrode layer and the third electrode to the inner wall of the connection hole includes the insulating material. It is desirable to be formed of the same insulating material as that described above.
[0016]
In the above photoelectric conversion device, it is preferable that the substrate is a single-layer or composite conductive material having an aluminum layer on at least the surface.
[0017]
In the above-mentioned photoelectric conversion device, it is preferable that the diameter of the first conductive type crystalline semiconductor particles is 0.1 mm to 0.6 mm.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the drawings.
FIG. 1 is a view showing an embodiment of a photoelectric conversion device according to the present invention, wherein 1 is a conductive substrate, 2 is an alloy layer of aluminum (Al) and silicon (Si), and the conductive substrate 1 and the alloy layer 2 together form a first electrode. Reference numeral 3 denotes an insulating material, 4 denotes a first conductive type crystalline semiconductor particle, 5 denotes a second conductive type semiconductor layer, 6 denotes a second electrode, 7 denotes a third electrode, 8 denotes a connection hole, 9 denotes a filler, and 10 denotes an insulating layer. , 11 are short-circuit prevention layers.
[0019]
The substrate 1 can be made of aluminum (Al) or a composite conductive material having aluminum (Al) as a surface layer. The base substrate of the composite material may be any metal having a melting point equal to or higher than the melting point of aluminum (Al), such as iron (Fe), nickel (Ni), stainless steel, or the like, or Invar, Fe-Ni-Co, or the like. A low thermal expansion alloy or the like as a component is used. The thickness of the surface aluminum (Al) is desirably 0.01 mm or more.
[0020]
A boundary layer between the alloy layer 2 containing aluminum (Al) and silicon (Si) as a main component and the substrate 1 is optionally provided as a barrier layer for controlling generation of the alloy layer 2 of aluminum (Al) and silicon (Si). It is also possible to provide a thin intermediate layer (not shown). As the thin intermediate layer, for example, nickel (Ni) can be used, and the thickness is preferably 0.001 mm or more. In the case where the substrate 1 is a composite material, an arbitrary surface layer (an opposite surface) on which the first conductivity type crystalline semiconductor particles 4 are disposed for the purpose of suppressing the warpage of the substrate 1 due to a difference in thermal expansion caused by a thermal load or the like. (Not shown) can also be provided.
[0021]
The insulating material 3 is made of an insulating material for separating a positive electrode and a negative electrode. For example, glass, heat-resistant polymer containing silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), lead oxide (PbO), boron oxide (B ₂ O ₃ ), zinc oxide (ZnO) or the like as an optional component It is composed of a mixture of a material or a heat-resistant polymer material and an inorganic filler, an organic-inorganic composite material containing silicon (Si), or a mixture of an organic-inorganic composite material containing silicon (Si) and an inorganic filler. The thickness of the insulating layer 3 depends on the insulation resistance of the insulating material, but is preferably 0.001 mm or more in the case of a mixture of an organic-inorganic composite material containing silicon (Si) and an inorganic filler.
[0022]
The first conductivity type crystalline semiconductor particles 4 are made of silicon (Si) such as boron (B), aluminum (Al), gallium (Ga), or the like, or n-type phosphorus (P), arsenic (As), or the like. Contains trace elements. The particle size of the crystal semiconductor particles 4 is preferably 0.1 to 0.6 mm, and when it exceeds 0.6 mm, the amount of silicon (Si) used in a conventional crystal plate-based photoelectric conversion element is the same as that of conventional crystal plate-based photoelectric conversion elements. There is less merit to use. On the other hand, if it is smaller than 0.1 mm, light energy loss such as light transmission increases, and the photoelectric conversion efficiency decreases. The shape of the crystalline semiconductor particles 4 may be polygonal, curved, or the like.
[0023]
The second-conductivity-type crystal semiconductor layer 5 is made of, for example, silicon (Si), and is made of, for example, a vapor phase of a silane compound, a vapor phase of a phosphorus-based compound exhibiting an n-type, or a vapor-phase growth method or the like. It is formed by introducing a small amount of a gas phase. The film thickness is preferably 10 nm or more, and the film may be crystalline, amorphous, or a mixture of crystalline and amorphous. However, in consideration of light transmittance, the film may be crystalline or crystalline and amorphous. And a mixture of
[0024]
Further, the second conductivity type crystal semiconductor layer 5 is preferably formed along the surface of the first conductivity type crystal semiconductor particles 4, and is preferably formed along the convex curved shape of the first conductivity type crystal semiconductor particles 4. Since the first conductivity type crystalline semiconductor particles 4 are formed along the surface of the convex curved surface, the area of the pn junction can be widened, and electrons generated inside the first conductivity type crystalline semiconductor particles 4 can be efficiently emitted. Can be collected. Further, the second conductivity type crystalline semiconductor layer 5 may be formed on the short circuit prevention layer 11.
[0025]
In addition, n-type phosphorus (P), arsenic (As), or the like, or p-type boron (B), aluminum (Al), gallium (Ga), or the like, is traced on the outer periphery of the first conductivity type crystalline semiconductor particles 4. When the first conductive type crystalline semiconductor particles 4 included are used, the second conductive type crystalline semiconductor layer 5 may be omitted, and the second electrode 6 is formed directly on the first conductive type crystalline semiconductor particles 4. You may.
[0026]
The second electrode 6 is a transparent electrode provided on the light incident side for taking out carriers generated in the first conductive type semiconductor particles 4. The thickness of the second electrode 6 is designed so that the resistance value is as low as possible and the transparency is not impaired. Suitable materials having such characteristics include, for example, tin oxide (SnO ₂ ), indium oxide (In ₂ O ₃ ), zinc oxide (ZnO), cadmium oxide (CdO), and ITO (In ₂ O ₃ + SnO). ₂ ) and the like. As a method for forming the second electrode 6, for example, a film forming method such as a vapor deposition method, a sputtering method, and a reactive sputtering method is used. The second electrode 6 may be formed on the short-circuit prevention layer 11 similarly to the second conductivity type crystalline semiconductor layer 5.
[0027]
A protective layer (not shown) may be formed on the second electrode 6. Such a protective layer preferably has a property of a transparent dielectric, such as silicon oxide (SiO ₂ ), cesium oxide (Cs ₂ O), aluminum oxide (Al ₂ O ₃ ), and silicon nitride (Si ₃ N _4). ), Titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), yttrium oxide (Y ₂ O ₃ ), etc., in a single layer or in a single layer or in a combination of a plurality of compositions by a CVD method, a PVD method or the like. 6 is formed. The protective layer needs to be transparent because it is in contact with the light incident surface, and needs to be a dielectric to prevent leakage. The thickness of the protective layer can be arbitrarily selected, but if the thickness of the protective layer is optimized, a function as an antireflection film can be expected.
[0028]
The third electrode 7 may be at least immediately below the connection hole 8 and may be a layer having a size covering the entire back surface of the substrate 1, but may be formed in a narrow band shape. The material of the third electrode 7 desirably has a low electric resistance, and preferably 1 × 10 ⁻⁶ Ωcm or less. For forming the third electrode 7, for example, screen printing, dispenser application, or the like can be used.
[0029]
The connection hole 8 is a through hole for forming a path connecting the second electrode 6 and the third electrode 7. The connection holes 8 are desirably arranged at regular intervals in the substrate 1, and it is more preferable to use the substrate 1 having the connection holes 8 arranged at regular intervals in advance. When the first conductive type crystalline semiconductor particles 4 are aligned on the substrate 1 with a certain regularity, the connection holes 8 are provided with no first conductive type crystalline semiconductor particles 4 or the first conductive type crystalline semiconductor particles 4 The connection hole 8 is formed in a dead space portion generated by the disposition, specifically, in a region surrounded by three first conductivity type crystal semiconductor particles generated when the first conductivity type crystal semiconductor particles 4 are arranged in the closest density hexagon. Can be arranged, and an increase in dead space due to the presence of the connection hole 8 can be suppressed. Further, the connection hole 8 does not need to penetrate the second conductivity type semiconductor layer 5, the second electrode 6, and the third electrode 7, but may penetrate at least the substrate 1 and the insulating material 3. It is desirable that the diameter of the connection hole 8 is larger than the diameter of the first conductivity type crystalline semiconductor particles 4. If the hole diameter of the connection hole 8 is smaller than the first conductivity type crystalline semiconductor particles 4, the first conductivity type crystal semiconductor particles 4 may block the connection holes 8, and the current collection efficiency may be reduced. .
[0030]
The filler 9 serves to electrically connect the second electrode 6 and the third electrode 7. The filler 9 desirably has a small electric resistance and preferably 1 × 10 ⁻⁶ Ωcm or less. More preferably, the third electrode 7 is formed of the same material. By using the same material, a more reliable electrical connection between the filler 9 and the third electrode 7 can be obtained. The filling method of the filler 9 into the connection holes 8 includes screen printing and dispenser application. If the connection holes 8 cannot be sufficiently filled by a single printing or application, it is necessary to repeat printing and application a plurality of times. A quantity of filler 9 can be filled. However, as long as an electrically good connection between the second electrode 6 and the filler 9 is obtained, it is not necessary to completely fill the connection hole 8 with the filler 9. The filler 9 may not be necessary as long as the electrical connection between the second electrode 6 and the third electrode 7 can be obtained only by forming the third electrode 7.
[0031]
The insulating layer 10 separates the substrate 1 and the alloy layer 2 from the third electrode 7, and the short circuit prevention layer 11 includes the substrate 1 and the alloy layer 2 and the filler 9 made of an insulating material for separating the positive electrode and the negative electrode. . For example, glass, heat-resistant polymer containing silicon oxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), lead oxide (PbO), boron oxide (B ₂ O ₃ ), zinc oxide (ZnO) or the like as an optional component It is composed of a mixture of a material or a heat-resistant polymer material and an inorganic filler, an organic-inorganic composite material containing silicon (Si), or a mixture of an organic-inorganic composite material containing silicon (Si) and an inorganic filler. In the present invention, the insulating material 3, the insulating layer 10, and the short-circuit prevention layer 11 are formed of the same material. By using the same material, it is possible to suppress the occurrence of defects that cause insulation failure in the insulating material 3 and the short-circuit prevention layer 11, and the connection portion between the short-circuit prevention layer 11 and the insulating layer 10. In addition, since they are made of the same material, they can be formed simultaneously in the same step. As a method for forming the insulating layer 10, for example, screen printing, dispenser application, dipping, or the like can be used. As a method for forming the short-circuit prevention layer 11, the short-circuit prevention layer 11 is formed without closing the through hole using, for example, dispenser coating, dipping or the like.
[0032]
【Example】
Next, an embodiment of the photoelectric conversion device of the present invention will be described.
A large number of p-type silicon particles having a diameter of about 0.5 mm are arranged on a 150 mm square aluminum substrate having through holes of φ 0.5 mm, φ 0.7 mm, and φ 1.0 mm at an interval of 3 mm in advance on the aluminum substrate. The silicon particles are bonded to the substrate by heating at a temperature of 600 to 630 ° C. for 1 to 10 minutes to produce a substrate having an alloy layer containing aluminum (Al) and silicon (Si) as main components and an aluminum (Al) layer. did.
[0033]
An insulating material is formed using polyimide so as to have a thickness of about 50 μm between the silicon particles, and the insulating layer on the back surface of the substrate and the short-circuit prevention layer on the inner wall of the through hole are formed by dipping so as to have the same thickness. The resultant was fired at 350 ° C. for 1 hour to form an insulating material, an insulating layer, and a short-circuit preventing layer.
[0034]
Next, an n-type mixed crystalline and amorphous silicon layer of about 10 nm is formed on the p-type silicon particles and the insulating material by a plasma CVD method using a mixed gas composed of silane gas and a trace amount of a phosphorus (P) compound. A film was formed to a thickness of about 20 nm to form a silicon semiconductor having pn-junction. Further, an ITO film as a second electrode having a thickness of about 100 nm was formed thereon by a sputtering method.
[0035]
Further, a thermosetting conductive paste containing silver (Ag) as a conductive material is printed on the entire rear surface side of the substrate through an insulating layer so as to have a thickness of 50 μm by screen printing, and at the same time, a filler is filled into the through holes. The embedding was performed simultaneously with the same material in the same process. After that, firing was performed at about 200 ° C. for 30 minutes to form a connection hole filled with a filler via the third electrode and the short-circuit prevention layer.
[0036]
As a comparative example, a large number of p-type silicon particles having a diameter of about 0.5 mm were arrayed on a 150 mm square aluminum substrate having no through hole, and heated at a temperature of 600 to 630 ° C. for 1 to 10 minutes. Silicon particles were bonded to the substrate to produce a substrate having an alloy layer containing aluminum (Al) and silicon (Si) as main components and an aluminum (Al) layer. Next, an insulating material was applied between the silicon particles using polyimide so as to have a thickness of about 50 μm, and baked. Next, an n-type mixed crystalline and amorphous silicon layer of about 10 nm is formed on the p-type silicon particles and the insulating material by a plasma CVD method using a mixed gas composed of silane gas and a trace amount of a phosphorus (P) compound. A film was formed to a thickness of about 20 nm to form a silicon semiconductor having pn-junction. Further, an ITO film as a second electrode having a thickness of about 100 nm was formed thereon by a sputtering method. Thereafter, a thermosetting conductive paste containing silver as a conductive substance is formed on the ITO film in parallel lines at intervals of 3 mm in a width of 0.15 mm and a thickness of 50 μm to form fingers by dispenser application, and two fingers are formed in a direction perpendicular to the fingers. A bus bar was formed of a 3 mm wide copper plate.
[0037]
Table 1 shows the characteristic evaluation results of the photoelectric conversion device of the present invention and the photoelectric conversion device of the comparative example.
[0038]
[Table 1]

[0039]
As can be seen from Table 1, the photoelectric conversion device of the present invention can obtain good photoelectric conversion efficiency, and particularly has a remarkable increase in short-circuit current, which is also an effect of reducing dead space. Here, the light receiving area loss due to the through hole of the photoelectric conversion device of the present invention is about 4% for the connection hole product of φ0.7 mm, and the light receiving area loss due to the finger and the bus bar of the photoelectric conversion device of the comparative example is about 9%. there were.
[0040]
【The invention's effect】
As described above, according to the photoelectric conversion device of the first aspect, a large number of first conductivity type crystalline semiconductor particles are provided on one surface of the conductive substrate serving as the first electrode, and In a photoelectric conversion device, an insulating material is interposed between the crystalline semiconductor particles, a second conductive semiconductor layer is formed on the first conductive crystalline semiconductor particles, and a transparent second electrode layer is formed on the entire surface. A third electrode is formed on the other surface of the substrate via an insulating layer, and a plurality of connection holes are provided between the first conductive type crystalline semiconductor particles and penetrate the substrate and the insulating material. Since the second electrode layer and the third electrode are electrically connected by a conductor substantially insulated from the substrate, without lowering the current collection efficiency on the second electrode side, Shadows better than conventional photoelectric conversion elements with fingers and bus bars In addition, since through holes are not provided in the silicon semiconductor, it is easy to draw out low-resistance wiring without adversely affecting photovoltaic characteristics and reliability, and manufacturing costs are eliminated because no through holes are provided in brittle materials. It is possible to provide a high-efficiency, high-reliability, and inexpensive photoelectric conversion device.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating an example of an embodiment of a photoelectric conversion device of the present invention.
FIG. 2 is a cross-sectional view illustrating an example of a procedure for manufacturing the photoelectric conversion device of the present invention.
FIG. 3 is a cross-sectional view illustrating another example of the procedure for manufacturing the photoelectric conversion device of the present invention.
[Explanation of symbols]
1... Substrate (first electrode)
2 .... alloy layer (first electrode)
3 Insulating substance 4 First-conductivity-type crystalline semiconductor particles 5 Second-conductivity-type semiconductor layer 6 Second electrode 7 Third electrode 8 ..Connection hole 9 Filler 10 Insulating layer 11 Short circuit prevention layer

Claims

On one surface of a conductive substrate serving as a first electrode, a large number of first conductivity type crystal semiconductor particles are provided, and an insulating material is interposed between the first conductivity type crystal semiconductor particles. In a photoelectric conversion device in which a second conductive type semiconductor layer is formed on crystalline semiconductor particles and a transparent second electrode layer is formed on the entire surface, a third electrode is provided on the other surface of the substrate via an insulating layer. And a plurality of connection holes penetrating the substrate and the insulating material between the first conductive type crystalline semiconductor particles, and the second electrode layer and the third electrode are connected to the substrate by the connection holes. A photoelectric conversion device, wherein the photoelectric conversion device is electrically connected with a conductor substantially insulated from the photoelectric conversion device.

2. The photoelectric conversion device according to claim 1, wherein a diameter of the connection hole is larger than a diameter of the first conductive type crystalline semiconductor particle. 3.

On the inner wall of the connection hole, a conductor for electrically connecting the second electrode layer and the third electrode and a short-circuit prevention layer for substantially insulating the substrate are formed of the same insulating material as the insulating material. The photoelectric conversion device according to claim 1, wherein:

4. The photoelectric conversion device according to claim 1, wherein the substrate is a single-layer or composite conductive material having an aluminum layer on at least the surface.

5. The photoelectric conversion device according to claim 1, wherein the diameter of the first conductive type crystalline semiconductor particles is 0.1 mm to 0.6 mm. 6.