JP2004172179A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method, which are capable of surely and easily replacing silicon that forms a silicon wiring layer and a silicon contact plug with metal without more complicating a manufacturing process. <P>SOLUTION: The semiconductor device is equipped with a gate electrode 22' of substituting metal formed on a semiconductor substrate 10, an impurity diffusion region 28n formed inside the semiconductor substrate 10, an insulating film 30 with an opening 32 reaching the impurity diffusion region 28n, and a contact plug 38 which is formed inside the opening 30 and equipped with a barrier metal layer 34 formed at least on the bottom of the opening 30 and a substituting metal film 62 formed on the barrier metal layer 34. Material forming the gate electrode and the contact plug is substituted with aluminum, so that contact resistance is reduced so as to enable a transistor to operate at a higher speed. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device and a method for manufacturing the same that can easily and reliably replace a wiring layer or contact plug made of silicon with a metal without complicating the manufacturing process. I do.
[0002]
[Prior art]
As the integration and capacity of semiconductor devices increase, the design rules (lines / spaces) are becoming stricter. As a result, the width of wiring layers is becoming narrower, and contact plugs for connecting upper and lower wiring layers are required. The diameter of via holes to be formed has been reduced. Therefore, it is necessary to use a material having a lower resistance as a material for forming the wiring layer and the contact plug.
[0003]
Heretofore, polycrystalline silicon has been used as a gate electrode material of a MIS transistor as a material capable of forming a source / drain diffusion layer in a self-aligned manner, that is, a material that can withstand activation heat treatment for forming a source / drain diffusion layer. Has been widely used. However, since the specific resistance of polycrystalline silicon is about two orders of magnitude higher than that of metal, it has been desired to reduce the resistance of the gate electrode.
[0004]
In recent years, a technique for replacing polycrystalline silicon with aluminum has been proposed, and there is a movement to apply this technique to a semiconductor device manufacturing process. The inventor of the present application forms an MIS transistor having a gate electrode made of polycrystalline silicon, and then performs aluminum substitution using the above-described technique of substituting polycrystalline silicon with aluminum, thereby forming an MIS transistor having a gate electrode made of aluminum. Patent Document 1 proposes a forming method.
[0005]
Next, a conventional method for manufacturing a semiconductor device described in Patent Document 1 will be described with reference to FIGS. 22 and 23 are process cross-sectional views along the direction perpendicular to the gate electrode, and FIGS. 24 and 25 are process cross-sectional views along the direction in which the gate electrode extends.
[0006]
First, an element isolation film 102 for defining an element region is formed on a silicon substrate 100 by STI (Shallow Trench Isolation).
[0007]
Next, a P well 104 is formed in the silicon substrate 100 by ion implantation.
[0008]
Next, on the silicon substrate 100 on which the element isolation film 102 and the P well 104 are formed, a gate electrode 106 made of a polycrystalline silicon film and silicon on both sides of the gate electrode 106 are formed in the same manner as in a normal MOS transistor formation method. A MOS transistor having the source / drain diffusion layer 108 formed in the substrate 100 is formed (FIG. 22A).
[0009]
Next, a silicon oxide film is deposited on the silicon substrate 100 on which the MOS transistors are formed by a CVD method.
[0010]
Next, the silicon oxide film is flattened by the CMP method, and an interlayer insulating film 110 made of the silicon oxide film having a flattened surface is formed.
[0011]
Next, a contact hole 112 reaching the source / drain diffusion layer 108 is formed in the interlayer insulating film 110 by photolithography and dry etching (FIGS. 22B and 24A).
[0012]
Next, after depositing a polycrystalline silicon film by the CVD method, the polycrystalline silicon film is removed flat by the CMP method until the surface of the interlayer insulating film 110 is exposed, and the polycrystalline silicon film is selectively placed in the contact hole 112. To remain. Thus, a contact plug 114 made of a polycrystalline silicon film is formed in the contact hole 112 (FIG. 22C).
[0013]
Next, a titanium (Ti) film as a contact metal and a titanium nitride (TiN) film as a barrier metal are deposited by a CVD method.
[0014]
Next, a photoresist film 118 that selectively covers the contact plugs 114 is formed by photolithography.
[0015]
Next, the titanium nitride film and the titanium film are dry-etched using the photoresist film 118 as a mask. Thus, a pad 116 having a TiN / Ti structure covering the contact plug 114 is formed (FIG. 22D).
[0016]
Next, a silicon oxide film is deposited on the interlayer insulating film 110 on which the pads 116 are formed by a CVD method.
[0017]
Next, the silicon oxide film is flattened by the CMP method to form an interlayer insulating film 120 made of the silicon oxide film having a flattened surface.
[0018]
Next, by photolithography and dry etching, a contact hole 122 reaching the pad 116 is formed in the interlayer insulating film 120, and a contact hole 124 reaching the gate electrode 106 is formed in the interlayer insulating films 120 and 110, respectively (FIG. 23A, FIG. 24 (b).
[0019]
Next, an aluminum film 126 and a titanium film 128 are deposited on the interlayer insulating film 120 by a sputtering method (FIGS. 23B and 24C). When the contact holes 122 and 124 have a large aspect ratio, it is difficult to completely fill the contact holes 122 and 124 by film formation by sputtering, and a void 142 may remain in the center.
[0020]
Next, heat treatment at about 400 ° C. is performed in a nitrogen atmosphere. Due to this heat treatment, a reaction proceeds from the interface between the gate electrode 106 and the aluminum film 126, and silicon atoms forming the gate electrode 106 diffuse in the direction of the aluminum film 126, and aluminum atoms forming the aluminum film 126 It diffuses in the direction of the electrode 106 (FIG. 25A). Thus, the polycrystalline silicon forming gate electrode 106 is replaced with aluminum. Thus, a gate electrode 106 'made of aluminum is formed.
[0021]
At this time, since the pad 116 functioning as a barrier metal is formed between the aluminum film 126 and the contact plug 114, the contact plug 114 and the silicon substrate 100 are not replaced with aluminum. Therefore, it is possible to prevent problems such as breakage of the junction between the source / drain diffusion layers 108.
[0022]
Next, the aluminum film 126 and the titanium film 128 on the interlayer insulating film 120 are removed by, for example, a CMP method. At this time, a contact plug 130 made of an aluminum film remains in the contact hole 122, and a contact plug 132 formed integrally with the gate electrode 106 'remains in the contact hole 124 (FIG. 23C, FIG. 25). (B)).
[0023]
Next, a titanium nitride film 134 and an aluminum film 136 are deposited on the interlayer insulating film 120 by, for example, a sputtering method.
[0024]
Next, the titanium nitride film 134 and the aluminum film 136 are patterned by photolithography and dry etching, and are made of the titanium nitride film 134 and the aluminum film 136. The source / drain diffusion layers are formed through the contact plug 130, the pad 116, and the contact plug 114. The wiring layer 138 connected to the gate electrode 108 'and the wiring layer 140 connected to the gate electrode 106' via the contact plug 132 are formed (FIGS. 23D and 25C).
[0025]
[Patent Document]
JP-A-11-097535
[Non-patent literature]
International Electron Devices Meeting 96, p. 946-94
[0026]
[Problems to be solved by the invention]
However, in the above-described conventional method of manufacturing a semiconductor device, the contact plug 114 connecting the source / drain diffusion layer 108 and the wiring layer 138 is formed of a polycrystalline silicon film. Resistance was desired.
[0027]
Further, in the above-described conventional method of manufacturing a semiconductor device, an aluminum film 126 is formed on the interlayer insulating film 120 in which the contact hole 124 exposing the gate electrode 106 is formed, and the gate electrode 106 and the aluminum film are in contact with each other at the bottom of the contact hole 124. A reaction for aluminum substitution proceeds from the interface with 126. However, if the aspect ratio of the contact hole 124 is increased due to the miniaturization of the element, it becomes difficult to sufficiently deposit the aluminum film 126 to the bottom of the contact hole 124, and there is a concern that the subsequent aluminum replacement cannot be sufficiently performed.
[0028]
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device and a method of manufacturing the same, which can easily and surely reduce the resistance of a wiring layer and a contact plug without complicating a manufacturing process.
[0029]
[Means for Solving the Problems]
The above object is achieved by providing a first gate electrode made of a substitution metal formed on a semiconductor substrate, an impurity diffusion region formed in the semiconductor substrate, and a first gate electrode formed on the semiconductor substrate on which the first gate electrode is formed. This is achieved by a semiconductor device having an insulating film formed and having an opening reaching the impurity diffusion region, and a contact plug formed in the opening and made of a barrier metal.
[0030]
In addition, the object is to provide a first gate electrode made of a substitution metal formed on a semiconductor substrate, an impurity diffusion region formed in the semiconductor substrate, and a semiconductor substrate on which the first gate electrode is formed. An insulating film formed thereon and having an opening reaching the impurity diffusion region, a barrier metal layer formed in the opening and formed at least at a bottom of the opening, and formed on the barrier metal layer The present invention is also achieved by a semiconductor device having a contact plug having a film made of a substituted metal.
[0031]
In addition, the object is to provide a first gate electrode made of a substitution metal formed on a semiconductor substrate, an impurity diffusion region formed in the semiconductor substrate, and a semiconductor substrate on which the first gate electrode is formed. The invention is also attained by a semiconductor device having an insulating film formed thereon and having an opening reaching the first gate electrode, and a contact plug made of a replacement metal formed in the opening. You.
[0032]
Further, the object is to form a first gate electrode made of a material to be replaced with a metal on a semiconductor substrate, and to form an insulating film on the semiconductor substrate on which the first gate electrode is formed. Forming a first opening reaching the semiconductor substrate in the insulating film; forming a barrier metal layer in the first opening; forming the first opening in the insulating film; Forming a second opening exposing at least a part of the first gate electrode, forming a metal film on the insulating film, and performing a heat treatment to form the first gate electrode; Replacing the constituent material to be formed with a metal material forming the metal film.
[0033]
BEST MODE FOR CARRYING OUT THE INVENTION
[First Embodiment]
The semiconductor device according to the first embodiment of the present invention and the method for fabricating the same will be described with reference to FIGS.
[0034]
FIG. 1 is a schematic sectional view showing the structure of the semiconductor device according to the present embodiment, and FIGS. 2 to 6 are process sectional views showing the method for manufacturing the semiconductor device according to the present embodiment.
[0035]
First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG. 1A is a cross-sectional view in a direction perpendicular to the gate electrode, and FIG. 1B is a cross-sectional view along the line AA ′ in FIG. In FIG. 1A, the element region on the left side of the drawing defined by the element isolation film 12 at the center is an N-type transistor formation region, and the element region on the right side of the drawing is a P-type transistor formation region.
[0036]
An element isolation film 12 for defining an element region is formed on a silicon substrate 10. A P well 14 is formed in the silicon substrate 10 in the N-type transistor formation region. On the silicon substrate 10 in the N-type transistor formation region, a gate electrode 22n 'made of aluminum is formed via a gate insulating film 18. Source / drain diffusion layers 28n are formed in the silicon substrate 10 on both sides of the gate electrode 22n '. Thus, an N-type transistor having the gate electrode 22n 'and the source / drain diffusion layers 28n is formed in the N-type transistor formation region.
[0037]
An N well 16 is formed on the silicon substrate 10 in the P-type transistor formation region. On the silicon substrate 10 in the P-type transistor formation region, a gate electrode 22p made of a P-type polysilicon film is formed via a gate insulating film 18. Source / drain diffusion layers 28p are formed in the silicon substrate 10 on both sides of the gate electrode 22p. Thus, a P-type transistor having the gate electrode 22p and the source / drain diffusion layers 28p is formed in the P-type transistor formation region.
[0038]
An interlayer insulating film 30 is formed on the silicon substrate 10 on which the N-type transistor and the P-type transistor are formed. In the interlayer insulating film 30, a contact plug 38 electrically connected to the source / drain diffusion layers 28n and 28p and a contact plug 50 made of aluminum connected to the gate electrode 22n 'are embedded. The contact plug 38 is a tungsten plug composed of a barrier metal and a tungsten film.
[0039]
On the interlayer insulating film 30 in which the contact plugs 38 and 50 are buried, a wiring layer 56 electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38 and a gate via the contact plug 50 A wiring layer 58 electrically connected to the electrode 22n 'is formed.
[0040]
As described above, the semiconductor device according to the present embodiment is characterized mainly in that the gate electrode 22n 'of the N-type transistor is made of aluminum and the contact plug 38 is a tungsten plug made of a barrier metal and a tungsten film. .
[0041]
When the gate electrode 22n 'of the N-type transistor is made of aluminum, the resistance of the gate wiring can be reduced, and the speed of the transistor can be increased. Note that the work function of aluminum is also suitable for a gate electrode of an N-type transistor.
[0042]
Here, the material constituting the gate electrode 22n 'and the contact plug 50 is, strictly speaking, a conductor mainly containing aluminum. In the present invention, the gate electrode 22n 'and the contact plug 50 are formed by using a technique of replacing polycrystalline silicon with aluminum. For this reason, the gate electrode 22n 'and the contact plug 50 contain silicon according to the temperature of the heat treatment at the time of replacement. That is, the concentration of silicon in aluminum converges to a state where the atomic structure of the material is kept stable at the heat treatment temperature (on the line between the phases in the phase diagram). When the heat treatment is performed, about 0.2% of silicon is included. When the heat treatment is performed at about 400 ° C., about 0.3% of silicon is included. % Of silicon, and when heat treatment at about 500 ° C. is performed, about 0.7% of silicon is contained. However, in this specification, for convenience, a conductor formed by replacing polycrystalline silicon with aluminum is also referred to as “aluminum”.
[0043]
Titanium, titanium nitride, and tungsten constituting the tungsten plug are more thermally stable with respect to aluminum than silicon, and are different from aluminum at a heat treatment temperature (about 350 to 500 ° C.) for replacing silicon with aluminum. no response. That is, even if the aluminum replacement is performed in a state where the aluminum film is directly deposited on the contact plug 38, the contact plug 38 is not affected.
[0044]
Therefore, since the contact plug 38 in the semiconductor device according to the present embodiment has the same function as the pad 116 in the conventional semiconductor device shown in FIGS. 22 to 25, the pad covering the contact plug 38 in the semiconductor device according to the present embodiment. It is not necessary to provide. Therefore, the manufacturing process can be shortened, and the manufacturing cost can be reduced. In addition, a tungsten plug having higher conductivity than a polycrystalline silicon plug can reduce contact resistance, which greatly contributes to speeding up of a transistor.
[0045]
In the present embodiment, a film having a TiN / Ti structure is referred to as a barrier metal. However, from the viewpoint of preventing a reaction between aluminum and silicon, all of titanium, titanium nitride, and tungsten are regarded as barrier metals. You can think. The barrier metal referred to in this specification means a conductive material that can prevent a reaction between aluminum and silicon.
[0046]
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. 2 to 4 are process cross-sectional views in the cross section of FIG. 1A, and FIGS. 5 and 6 are process cross-sectional views in the cross section of FIG. 1B.
[0047]
First, an element isolation film 12 for defining an element region is formed on a p-type silicon substrate 10 by, for example, the STI method. 2 to 4, the element region on the left side of the drawing defined by the central element isolation film 12 is an N-type transistor formation region, and the element region on the right side of the drawing is a P-type transistor formation region.
[0048]
Next, a P-well 14 is formed in the N-type transistor formation region by ion implantation, and an N-well 16 is formed in the P-type transistor formation region (FIG. 2A). Note that, along with the formation of the well, ion implantation for controlling a threshold value and ion implantation for forming an impurity region for preventing punch-through may be performed.
[0049]
Next, the surface of the silicon substrate 10 is thermally oxidized by a thermal oxidation method to form a gate insulating film 18 made of, for example, a silicon oxide film on the element region (FIG. 2B). Note that the gate insulating film 18 may be formed of a silicon oxynitride film, an alumina film, a high dielectric constant film, or another insulating film.
[0050]
Next, a polycrystalline silicon film 20 having a thickness of, for example, 100 nm is deposited on the entire surface by, for example, a CVD method. Silicon is a material to be replaced that can be replaced by a metal material such as aluminum. Instead of the polycrystalline silicon film, another material that can be replaced with aluminum, such as a germanium (Ge) film, a SiGe film, a carbon (C) film, a silicon carbide (SiC) film, or a Co film _x Si _y Film, Ni _x Si _y Film, Ti _x Si _y A silicide film such as a film may be formed.
[0051]
Next, boron (B) ions are implanted into the polycrystalline silicon film in the P-type transistor formation region. As a result, the polycrystalline silicon film 20 in the P-type transistor formation region is changed to a P-type doped polycrystalline silicon film 20p (FIG. 2C). Instead of forming a non-doped polycrystalline silicon film and ion-implanting a P-type impurity, a doped polycrystalline silicon film to which a P-type impurity is added may be formed directly.
[0052]
Next, the polycrystalline silicon film 20 and the doped polycrystalline silicon film 20p are patterned by photolithography and dry etching, a gate electrode 22n made of the polycrystalline silicon film 20 is formed in the N-type transistor forming region, and a P-type transistor forming region is formed. Then, a gate electrode 22p made of the doped polycrystalline silicon film 20p is formed.
[0053]
Then, using the gate electrode 22n as a mask, for example, arsenic (As) ions are ion-implanted into the N-type transistor formation region, and the low concentration impurity region having the LDD structure or the extension source / drain is formed in the silicon substrate 10 on both sides of the gate electrode 22n. An impurity diffusion region 24n that becomes an extension region of the structure is formed.
[0054]
Similarly, using the gate electrode 22p as a mask, for example, boron ions are ion-implanted into the P-type transistor formation region, and a low-concentration impurity region having an LDD structure or an extension source / drain structure is formed in the silicon substrate 10 on both sides of the gate electrode 22p. An impurity diffusion region 24p to be an extension region is formed (FIG. 2D).
[0055]
Next, after depositing a silicon oxide film having a thickness of, for example, 100 nm by, for example, the CVD method, the silicon oxide film is etched back, and a sidewall insulating film 26 made of the silicon oxide film is formed on sidewall portions of the gate electrodes 22n and 22p. .
[0056]
Next, for example, arsenic (As) ions are ion-implanted into the N-type transistor formation region using the gate electrode 22n and the side wall insulating film 26 as a mask, and a high concentration Is formed.
[0057]
Similarly, using the gate electrode 22p and the side wall insulating film 26 as a mask, for example, boron fluoride (BF) ₂ Ion is implanted to form high-concentration source / drain impurity regions in the silicon substrate 10 on both sides of the gate electrode 22p and the side wall insulating film 26.
[0058]
Next, a predetermined heat treatment is performed to activate the implanted impurities, and an N-type source / drain diffusion layer 28n having an LDD structure or an extension S / D structure is formed in the silicon substrate 10 on both sides of the gate electrode 22n. A P-type source / drain diffusion layer 28p having an LDD structure or an extension S / D structure is formed in the silicon substrate 10 on both sides of 22p (FIG. 3A).
[0059]
Next, after depositing a silicon oxide film having a thickness of, for example, 500 nm by, for example, a CVD method, the silicon oxide film is flattened by, for example, a CMP (Chemical Mechanical Polishing) method, and the silicon oxide film having a flattened surface is formed. An interlayer insulating film 30 made of a film is formed.
[0060]
Next, contact holes 32 reaching the source / drain diffusion layers 28n and 28p are formed in the interlayer insulating film 30 by photolithography and dry etching.
[0061]
Next, a titanium film (Ti) having a thickness of, for example, 5 nm and a titanium nitride (TiN) film having a thickness of, for example, 20 nm are deposited by, for example, a CVD method to form a barrier metal having a TiN / Ti structure (FIG. b)).
[0062]
Next, a 300 nm-thickness tungsten film 36 is formed on the barrier metal 34 by, for example, a sputtering method (FIGS. 3C and 5A).
[0063]
Next, the tungsten film 36 and the barrier metal 34 are flatly removed by, for example, a CMP method until the surface of the interlayer insulating film 30 is exposed, and the barrier metal 34 and the tungsten film 36 are selectively left in the contact holes 32. Thus, a contact plug 38 composed of the barrier metal 34 and the tungsten film 36 is formed in the contact hole 32 (FIGS. 3D and 5B).
[0064]
The material forming the contact plug 38 may be a conductive material that does not react with the aluminum film in the heat treatment when the gate electrode 22n is replaced with aluminum in a later step. As the barrier metal layer 34, for example, a tungsten nitride (WN) film, a niobium nitride (NbN) film, a tantalum nitride (TaN) film, or the like may be used instead of the upper titanium nitride film. Instead of the tungsten film 36, a titanium nitride film, a titanium film, a molybdenum (Mo) film, a ruthenium (Ru) film, a nickel (Ni) film, a tungsten nitride film, a copper (Cu) film, a platinum (Pt) film, A silver (Ag) film or the like may be used.
[0065]
Next, a photoresist film 40 having an opening 42 on the gate electrode 22n is formed on the interlayer insulating film 30 in which the contact plug 38 is buried by photolithography (FIGS. 4A and 5C). .
[0066]
Next, the interlayer insulating film 30 is anisotropically etched using the photoresist film 40 as a mask to form a contact hole 44 reaching the gate electrode 22n in the interlayer insulating film 30.
[0067]
Next, the photoresist film 40 is removed by ashing using, for example, oxygen plasma (FIG. 5D).
[0068]
Next, on the interlayer insulating film 30 in which the contact plug 38 is embedded and the contact hole 44 reaching the gate electrode 22n is formed, for example, a 400-nm-thick aluminum (Al) film 46, for example, a 200-nm-thick film by a sputtering method. (FIG. 4B, FIG. 6A). Thereby, the gate electrode 22n and the aluminum film 46 are in direct contact in the contact hole 44.
[0069]
Next, heat treatment is performed in a nitrogen atmosphere at 350 to 500 ° C., for example, 400 ° C., for 30 minutes, for example. By this heat treatment, a reaction proceeds from the interface between the gate electrode 22n and the aluminum film 46, and silicon atoms forming the gate electrode 22n diffuse in the direction of the aluminum film 46, and aluminum atoms forming the aluminum film 46 It diffuses in the direction of the electrode 22n (FIG. 4B). In the case where a gate electrode made of a polycrystalline silicon film having a gate length of 0.1 μm and a height of 0.15 μm is replaced with aluminum, a heat treatment at 400 ° C. for 30 minutes in a nitrogen atmosphere may result in a region of about 10 μm in the gate width direction. Can be replaced with aluminum. It is desirable that the heat treatment time be appropriately selected depending on the shape of the gate electrode, the heat treatment temperature, and the like.
[0070]
As a result, the gate electrode 22n and the aluminum film 46 are replaced with an aluminum film containing silicon at a concentration corresponding to the heat treatment temperature. Excess silicon is sucked into the titanium film 48. Thus, a gate electrode 22n 'made of aluminum is formed.
[0071]
The contact plug 38 is in contact with the aluminum film 46 on the upper surface as shown in FIG. 4B, but the contact plug 38 is constituted by the barrier metal 34 of TiN / Ti and the tungsten film 36. Therefore, they do not react in the heat treatment for replacing the polycrystalline silicon film with the aluminum film. Therefore, it is not necessary to provide a barrier layer on contact plug 38 for preventing silicon substrate 10 from being replaced with aluminum. Further, the reaction at the time of aluminum replacement is stopped by the contact plug 38 and does not reach the silicon substrate 10. Therefore, a problem such as breakage of the junction between the source / drain diffusion layers 28n and 28p does not occur.
[0072]
The heat treatment for replacing aluminum is desirably performed in the range of 350 to 500 ° C. as described above. If the temperature is lower than 350 ° C., no reaction occurs between polycrystalline silicon and aluminum, and if the temperature is higher than 500 ° C., aluminum reacts with the interlayer insulating film.
[0073]
Next, the aluminum film 46 and the titanium film 48 on the interlayer insulating film 30 are removed by, eg, CMP (FIGS. 4C and 6C). At this time, a contact plug 50 made of aluminum and formed integrally with the gate electrode 22n 'remains in the contact hole 44.
[0074]
Next, for example, a titanium nitride film 52 and an aluminum film 54 are deposited on the interlayer insulating film 30 by, for example, a sputtering method.
[0075]
Next, the titanium nitride film 52 and the aluminum film 54 are patterned by photolithography and dry etching to be composed of the titanium nitride film 52 and the aluminum film 54 and electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38. The connected wiring layer 56 and the wiring layer 58 electrically connected to the gate electrode 22n 'via the contact plug 50 are formed (FIGS. 4D and 6D).
[0076]
As described above, according to the present embodiment, in a semiconductor device in which a gate electrode made of aluminum is formed by replacing polycrystalline silicon with aluminum, a contact plug connected to a source / drain diffusion layer is formed by a tungsten plug. In addition, there is no need to form a barrier metal layer for preventing the contact plug from being replaced with aluminum. Therefore, the manufacturing process can be shortened, and the manufacturing cost can be reduced. Further, by using a tungsten plug having higher conductivity than a polycrystalline silicon plug, contact resistance can be reduced and the speed of the transistor can be increased.
[0077]
In the above embodiment, only the gate electrode of the N-type transistor is replaced with aluminum. However, the gate electrode of the P-type transistor may be replaced with aluminum.
[0078]
[Second embodiment]
The semiconductor device according to the second embodiment of the present invention and the method for fabricating the same will be described with reference to FIGS. The same components as those in the semiconductor device and the method for fabricating the semiconductor device according to the first embodiment shown in FIGS. 1 to 6 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
[0079]
FIG. 7 is a schematic sectional view showing the structure of the semiconductor device according to the present embodiment, and FIGS. 8 and 9 are process sectional views showing the method of manufacturing the semiconductor device according to the present embodiment.
[0080]
First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG.
[0081]
The semiconductor device according to the present embodiment has the same basic structure as the semiconductor device according to the first embodiment shown in FIG. The main feature of the semiconductor device according to the present embodiment is that the contact plug 38 is constituted by the barrier metal 34 and the aluminum film 62.
[0082]
Titanium nitride constituting the barrier metal 34 is thermally stable with respect to aluminum, and does not react with aluminum at a heat treatment temperature (about 350 to 500 ° C.) for replacing silicon with aluminum. That is, the barrier metal 34 has the same function as the pad 116 in the conventional semiconductor device shown in FIGS. Therefore, even if the aluminum film 62 is formed on the barrier metal 34, a problem such as breakage of the junction between the source / drain diffusion layers 28n and 28p does not occur.
[0083]
As described above, the contact plug 38 in the semiconductor device according to the present embodiment has the same function as the pad 116 in the conventional semiconductor device shown in FIGS. There is no need to provide a covering pad. Therefore, the manufacturing process can be shortened, and the manufacturing cost can be reduced.
[0084]
Also, when formed by the CVD method, the specific resistance of tungsten is about 10 [μΩcm], the specific resistance of titanium nitride is about 50 [μΩcm], and the specific resistance of the polycrystalline silicon film is about 600 [μΩcm]. The specific resistance of aluminum is about 2.75 [μΩcm]. Therefore, by forming the contact plug 38 using aluminum having higher conductivity than tungsten, the contact resistance can be further reduced as compared with the semiconductor device according to the first embodiment, and the speed of the transistor can be increased. .
[0085]
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS.
[0086]
First, an N-type transistor, a P-type transistor, an interlayer insulating film 30, a barrier metal 34, and the like are formed in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in, for example, FIGS. 2A to 3B. I do.
[0087]
Next, a polycrystalline silicon film 60 having a thickness of, for example, 300 nm is formed on the barrier metal 34 by, for example, the CVD method (FIG. 8A).
[0088]
Next, the polycrystalline silicon film 60 and the barrier metal 34 are flatly removed by, for example, a CMP method until the surface of the interlayer insulating film 30 is exposed, and the barrier metal 34 and the polycrystalline silicon film 60 are selectively placed in the contact hole 32. It is left (FIG. 8B).
[0089]
Next, a contact hole 44 reaching the gate electrode 22n is formed, for example, in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in FIGS. 5C to 5D.
[0090]
Next, an aluminum (Al) film 46 having a thickness of, for example, 400 nm and a titanium film 48 having a thickness of, for example, 200 nm are deposited on the interlayer insulating film 30 by, for example, a sputtering method. As a result, the polycrystalline silicon film 60 and the aluminum film are in direct contact, and the gate electrode 22n and the aluminum film 46 are in direct contact in the contact hole 44 (FIG. 8C).
[0091]
Next, heat treatment is performed in a nitrogen atmosphere at 350 to 500 ° C., for example, 400 ° C., for 30 minutes, for example. Due to this heat treatment, a reaction proceeds from the interface between the gate electrodes 22n, 22p and the polycrystalline silicon film 60 and the aluminum film 46, and the gate electrode 22n is replaced by the gate electrode 22n 'made of aluminum. The film 60 is replaced with an aluminum film 62 (FIG. 9A).
[0092]
At this time, since the barrier metal 34 is formed below the polycrystalline silicon film 60, the reaction of aluminum substitution is stopped by the barrier metal 34 and does not reach the silicon substrate 10. Therefore, a problem such as breakage of the junction between the source / drain diffusion layers 28n and 28p does not occur.
[0093]
Next, the aluminum film 62 and the titanium film 48 on the interlayer insulating film 30 are removed by, for example, a CMP method. Thus, a contact plug 38 composed of the barrier metal 34 and the aluminum film 62 is formed in the contact hole 32 (FIG. 9B).
[0094]
Next, for example, in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in FIGS. 4D and 6D, the semiconductor device is electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38. Wiring layer 56 and wiring layer 58 electrically connected to gate electrode 22n 'via contact plug 50 are formed.
[0095]
In the process of forming the contact plug 38, an aluminum film may be deposited by a sputtering method without using the above-described aluminum substitution. However, as described above, it is not easy to bury a contact hole having a high aspect ratio by sputtering an aluminum film. The use of aluminum substitution has an advantage that the contact hole can be reliably filled.
[0096]
As described above, according to the present embodiment, the contact plug is replaced with aluminum in addition to the gate electrode, so that the contact resistance can be further reduced and the speed of the transistor can be increased. Further, since the gate electrode and the contact plug are simultaneously replaced with aluminum, it is possible to prevent an increase in manufacturing cost due to an increase in the number of steps.
[0097]
In the above embodiment, only the gate electrode of the N-type transistor is replaced with aluminum. However, the gate electrode of the P-type transistor may be replaced with aluminum.
[Third embodiment]
The method for fabricating the semiconductor device according to the third embodiment of the present invention will be explained with reference to FIGS. The same components as those in the semiconductor device according to the first and second embodiments and the method of manufacturing the same shown in FIGS. 1 to 9 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
[0098]
10 and 11 are process sectional views showing the method for fabricating the semiconductor device according to the present embodiment.
[0099]
In the present embodiment, another method of manufacturing the semiconductor device according to the second embodiment shown in FIG. 7 will be described.
[0100]
First, an N-type transistor, a P-type transistor, an interlayer insulating film 30, a barrier metal 34, and the like are formed in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in, for example, FIGS. 2A to 3B. I do.
[0101]
Next, a photoresist film 40 having an opening 42 on the gate electrode 22n is formed on the barrier metal 34 by photolithography.
[0102]
Next, using the photoresist film 40 as a mask, the barrier metal 34 and the interlayer insulating film 30 are anisotropically etched to form a contact hole 44 reaching the gate electrode 22n in the barrier metal 34 and the interlayer insulating film 30 (FIG. 10A). , FIG. 11 (a))
Next, the photoresist film 40 is removed by, for example, ashing using oxygen plasma.
[0103]
Next, a polycrystalline silicon film 60 having a thickness of, for example, 300 nm is formed on the barrier metal 34 by, for example, the CVD method (FIGS. 10B and 11B).
[0104]
Next, the polycrystalline silicon film 60 and the barrier metal 34 are flatly removed by, eg, CMP until the surface of the interlayer insulating film 30 is exposed, and the barrier metal 34 and the polycrystalline silicon film 60 are selected in the contact holes 32 and 44. (FIG. 10 (c), FIG. 11 (c)).
[0105]
Since the polycrystalline silicon film 60 formed by the CVD method has excellent surface coverage, it can be easily filled even when the aspect ratio of the contact holes 32 and 44 is large. Also, the polycrystalline silicon film 60 buried in the contact hole 44 is formed simultaneously with the polycrystalline silicon film 60 buried in the contact hole 32. Does not increase.
[0106]
Next, an aluminum film 46 having a thickness of, for example, 400 nm and a titanium film 48 having a thickness of, for example, 200 nm are deposited on the interlayer insulating film 30 by, for example, a sputtering method. As a result, the polycrystalline silicon film 60 and the aluminum film 46 come into direct contact on the contact holes 32 and 44 (FIGS. 10D and 11D).
[0107]
The contact holes 32 and 44 are filled with a polycrystalline silicon film 60, and the surface on which the aluminum film 46 is formed is flattened. Therefore, the aspect ratio of the contact holes 32 and 44 does not affect the process of forming the aluminum film 46.
[0108]
Next, in the same manner as in the method for fabricating the semiconductor device according to the second embodiment shown in FIGS. 9A to 9C, for example, the polycrystalline silicon film 60 is formed by replacing the gate electrode 22n with the aluminum gate electrode 22n '. After replacement with an aluminum film 62, respectively, the wiring layer 56 electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38, and the gate electrode 22n 'via the contact plug 50. The formed wiring layer 58 and the like are formed.
[0109]
In the process of forming the contact plugs 38 and 50, it is conceivable to deposit an aluminum film by a sputtering method without using the above-described aluminum substitution. However, as described above, it is not easy to bury a contact hole having a high aspect ratio by sputtering an aluminum film. The use of aluminum substitution has an advantage that the contact hole can be reliably filled.
[0110]
As described above, according to the present embodiment, the contact plug is replaced with aluminum in addition to the gate electrode, so that the contact resistance can be further reduced and the speed of the transistor can be increased. Further, since the gate electrode and the contact plug are simultaneously replaced with aluminum, it is possible to prevent an increase in manufacturing cost due to an increase in the number of steps.
[0111]
Also, since a polycrystalline silicon film is filled in the contact hole connected to the gate electrode and the surface on which the aluminum film used for replacing aluminum is formed is flattened, it is not necessary to form an aluminum film in the contact hole. Therefore, even when the gate electrode is replaced with aluminum via a contact hole having a large aspect ratio, the aluminum can be easily and reliably replaced. Since the polycrystalline silicon film filling the contact hole connected to the gate electrode is formed simultaneously with the polycrystalline silicon film filling the contact hole connected to the silicon substrate, the number of manufacturing steps does not increase.
[0112]
In the above embodiment, only the gate electrode of the N-type transistor is replaced with aluminum. However, the gate electrode of the P-type transistor may be replaced with aluminum.
[0113]
[Fourth embodiment]
The semiconductor device and the method for fabricating the same according to the fourth embodiment of the present invention will be explained with reference to FIGS. The same components as those of the semiconductor device according to the first to third embodiments and the method for fabricating the same shown in FIGS. 1 to 11 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
[0114]
FIG. 12 is a schematic sectional view showing the structure of the semiconductor device according to the present embodiment, and FIGS. 13 to 16 are process sectional views showing the method for manufacturing the semiconductor device according to the present embodiment.
[0115]
First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG. FIG. 12A is a cross-sectional view in a direction perpendicular to the gate electrode, and FIG. 12B is a cross-sectional view along the line AA ′ in FIG. In FIG. 12A, an element region on the left side of the drawing defined by the element isolation film 12 at the center is an N-type transistor formation region, and an element region on the right side of the drawing is a P-type transistor formation region.
[0116]
An element isolation film 12 for defining an element region is formed on a silicon substrate 10. A P well 14 is formed in the silicon substrate 10 in the N-type transistor formation region. On the silicon substrate 10 in the N-type transistor formation region, a gate electrode 22n 'made of aluminum is formed via a gate insulating film 18. Source / drain diffusion layers 28n are formed in the silicon substrate 10 on both sides of the gate electrode 22n '. Thus, an N-type transistor having the gate electrode 22n 'and the source / drain diffusion layers 28n is formed in the N-type transistor formation region.
[0117]
An N well 16 is formed on the silicon substrate 10 in the P-type transistor formation region. On the silicon substrate 10 in the P-type transistor formation region, a gate electrode 22p 'made of aluminum is formed via a gate insulating film 18. Source / drain diffusion layers 28p are formed in the silicon substrate 10 on both sides of the gate electrode 22p '. Thus, a P-type transistor having the gate electrode 22p 'and the source / drain diffusion layers 28p is formed in the P-type transistor formation region.
[0118]
An interlayer insulating film 30 is formed on the silicon substrate 10 on which the N-type transistor and the P-type transistor are formed. In the interlayer insulating film 30, a contact plug 38 made of a barrier metal 34 and an aluminum film 62 and electrically connected to the source / drain diffusion layers 28n and 28p is embedded. An aluminum film 62 having a pattern substantially equal to that of the gate electrodes 22n 'and 22p' is embedded in the interlayer insulating film 30 on the gate electrodes 22n 'and 22p'.
[0119]
On the interlayer insulating film 30 in which the contact plug 38 and the aluminum film 62 are buried, the wiring layer 56 electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38 and the gate electrodes 66n and 66p And a wiring layer 58 connected to the wiring layer 58 are formed.
[0120]
As described above, in the semiconductor device according to the present embodiment, the gate electrode 22n 'of the N-type transistor and the gate electrode 22p' of the P-type transistor are replaced with aluminum, and the interlayer insulating film is formed on the upper surfaces of the gate electrodes 22n 'and 22p'. The main feature is that an aluminum film 62 having a height substantially equal to 30 is formed.
[0121]
Incidentally, if the gate electrode 22n 'and the aluminum film 62 formed on the upper surface thereof and the gate electrode 22p' and the aluminum film 62 formed on the upper surface thereof are regarded as one body, respectively, the gate electrode 66n and the aluminum film 62 It can be considered as the gate electrode 66p.
[0122]
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. 13 and 14 are process cross-sectional views in the cross section of FIG. 12A, and FIGS. 15 and 16 are process cross-sectional views in the cross section of FIG.
[0123]
First, an N-type transistor, a P-type transistor, an interlayer insulating film 30, a barrier metal 34, and the like are formed in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in, for example, FIGS. 2A to 3B. I do. In the method of manufacturing the semiconductor device according to the present embodiment, it is not always necessary to introduce impurities into the polycrystalline silicon film 20 as in the first to third embodiments.
[0124]
Next, a photoresist film 40 having an opening 42 on the polycrystalline silicon film 20 of the gate electrodes 22n and 22p is formed on the barrier metal 34 by photolithography. As shown in FIGS. 13A and 15A, the opening 42 has a pattern substantially equal to the gate electrodes 22n and 22p.
[0125]
Next, using the photoresist film 40 as a mask, the barrier metal 34 and the interlayer insulating film 30 are anisotropically etched to form openings 64 reaching the gate electrodes 22n and 22p in the barrier metal 34 and the interlayer insulating film 30 (FIG. 13 ( a), FIG. 15 (a)).
[0126]
Next, the photoresist film 40 is removed by, for example, ashing using oxygen plasma (FIGS. 13B and 15B).
[0127]
Next, a polycrystalline silicon film 60 having a thickness of, for example, 300 nm is formed on the barrier metal 34 by, for example, the CVD method (FIGS. 13C and 15C).
[0128]
Next, the polycrystalline silicon film 60 and the barrier metal 34 are flatly removed by, eg, CMP until the surface of the interlayer insulating film 30 is exposed, and the barrier metal 34 and the polycrystalline silicon film 60 are formed in the contact hole 32 by opening. The polycrystalline silicon films 60 are selectively left in the respective regions 64 (FIGS. 13D and 15D).
[0129]
Since the polycrystalline silicon film 60 formed by the CVD method has excellent surface coverage, it can be easily filled even when the aspect ratio of the contact hole 32 and the opening 64 is large. Further, since the polycrystalline silicon film 60 buried in the opening 64 is formed simultaneously with the polycrystalline silicon film 60 buried in the contact hole 32, the number of manufacturing steps is smaller than that of the method of manufacturing the semiconductor device according to the second embodiment. Does not increase.
[0130]
Next, an aluminum film 46 having a thickness of, for example, 400 nm and a titanium film 48 having a thickness of, for example, 20 nm are deposited on the interlayer insulating film 30 by, for example, a sputtering method. As a result, the polycrystalline silicon film 60 and the aluminum film 46 come into direct contact on the contact hole 32 and the opening 64 (FIGS. 14A and 16A).
[0131]
The contact hole 32 and the opening 64 are filled with a polycrystalline silicon film 60, and the surface on which the aluminum film 46 is formed is flattened. Therefore, the aspect ratio of the contact hole 32 and the opening 64 does not influence during the process of forming the aluminum film 46.
[0132]
Next, heat treatment is performed in a nitrogen atmosphere at 350 to 500 ° C., for example, 400 ° C. for 1 to 48 hours, for example, 6 hours. Due to this heat treatment, a reaction proceeds from the interface between the polycrystalline silicon film 60 and the aluminum film 46, replacing the polycrystalline silicon film 60 with the aluminum film 62, and forming the gate electrodes 22n, 22p of the gate electrode made of aluminum. 22n 'and 22p' (FIGS. 14 (b) and 16 (b)).
[0133]
At this time, since the polycrystalline silicon film 62 buried in the opening 64 has a pattern substantially equal to the gate electrodes 22n and 22p, the aluminum replacement proceeds from above the upper surfaces of the gate electrodes 22n and 22p. Therefore, even when the gate width of the gate electrodes 22n and 22p is long, the heat treatment for replacing aluminum can be performed in a short time.
[0134]
Next, the aluminum film 62 and the titanium film 48 on the interlayer insulating film 30 are removed by, for example, a CMP method. Thus, a contact plug 38 buried in the contact hole 32 and formed of the barrier metal 34 and the aluminum film 62 and the gate electrodes 22n 'and 22p' made of aluminum having the aluminum film 62 formed on the upper surface are formed.
[0135]
The gate electrodes 22n 'and 22p' and the aluminum film 62 formed on the upper surfaces thereof can be considered as the gate electrodes 66n and 66p. In this case, it can be said that the gate electrodes 66n and 66p have substantially the same height as the interlayer insulating film 30 (FIGS. 14C and 16C).
[0136]
Next, for example, in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in FIGS. 4D and 6D, the semiconductor device is electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38. The wiring layer 56 thus formed and the wiring layer 58 electrically connected to the gate electrode 66n are formed (FIGS. 14D and 16D).
[0137]
As described above, according to the present embodiment, the contact plug is replaced with aluminum in addition to the gate electrode, so that the contact resistance can be further reduced and the speed of the transistor can be increased. Further, since the gate electrode and the contact plug are simultaneously replaced with aluminum, it is possible to prevent an increase in manufacturing cost due to an increase in the number of steps.
[0138]
In addition, since the polycrystalline silicon film is filled in the opening connected to the gate electrode and the surface on which the aluminum film used for replacing aluminum is formed is flattened, it is not necessary to form the aluminum film in the contact hole. Therefore, even when the gate electrode is replaced with aluminum through the opening having a large aspect ratio, aluminum replacement can be performed easily and reliably. Since the polycrystalline silicon film filling the opening connected to the gate electrode is formed simultaneously with the polycrystalline silicon film filling the contact hole connected to the silicon substrate, the number of manufacturing steps does not increase.
[0139]
Further, since the opening connected to the gate electrode has a pattern substantially equal to that of the gate electrode, the replacement of the gate electrode with aluminum can proceed from above the upper surface of the gate electrode. Thus, even when the gate width of the gate electrode is long, heat treatment for replacing aluminum can be performed in a short time.
[0140]
In the above embodiment, the gate electrode of the P-type transistor is also replaced with aluminum. However, similarly to the first to third embodiments, only the gate electrode of the N-type transistor may be replaced with aluminum. Aluminum has a preferable work function as a gate electrode of an N-type transistor, but is not necessarily preferable as a gate electrode of a P-type transistor. Thus, for example, p ⁺ When the desired characteristics of the P-type transistor can be obtained by the polysilicon gate, only the gate electrode of the N-type transistor may be replaced with aluminum.
[0141]
In the above embodiment, the opening 64 having a pattern substantially equal to that of the gate electrodes 22n and 22p is formed in the interlayer insulating film 30, and aluminum is replaced from the upper surface of the gate electrodes 22n and 22p. A plurality of openings may be provided along the electrodes 22n and 22p, and replacement of aluminum may proceed simultaneously from these openings.
[0142]
[Fifth Embodiment]
The semiconductor device and the method for fabricating the same according to the fifth embodiment of the present invention will be explained with reference to FIGS. The same components as those in the semiconductor device according to the first to fourth embodiments and the method for fabricating the same shown in FIGS. 1 to 16 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
[0143]
FIG. 17 is a schematic sectional view illustrating the structure of the semiconductor device according to the present embodiment, and FIGS. 18 to 21 are process sectional views illustrating the method of manufacturing the semiconductor device according to the present embodiment.
[0144]
First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG. 17A is a cross-sectional view in a direction perpendicular to the gate electrode, and FIG. 17B is a cross-sectional view along the line AA ′ in FIG. In FIG. 12A, an element region on the left side of the drawing defined by the element isolation film 12 at the center is an N-type transistor formation region, and an element region on the right side of the drawing is a P-type transistor formation region.
[0145]
An element isolation film 12 for defining an element region is formed on a silicon substrate 10. A P well 14 is formed in the silicon substrate 10 in the N-type transistor formation region. On the silicon substrate 10 in the N-type transistor formation region, a gate electrode 22n 'made of aluminum is formed via a gate insulating film 18. Source / drain diffusion layers 28n are formed in the silicon substrate 10 on both sides of the gate electrode 22n '. Thus, an N-type transistor having the gate electrode 22n 'and the source / drain diffusion layers 28n is formed in the N-type transistor formation region.
[0146]
An N well 16 is formed on the silicon substrate 10 in the P-type transistor formation region. On the silicon substrate 10 in the P-type transistor formation region, a gate electrode 22p 'made of aluminum is formed via a gate insulating film 18. Source / drain diffusion layers 28p are formed in the silicon substrate 10 on both sides of the gate electrode 22p '. Thus, a P-type transistor having the gate electrode 22p 'and the source / drain diffusion layers 28p is formed in the P-type transistor formation region.
[0147]
On the silicon substrate 10 on which the N-type transistor and the P-type transistor are formed, an interlayer insulating film 30 having substantially the same height as the gate electrodes 22n 'and 22p' is formed. In the interlayer insulating film 30, a contact plug 38 made of a barrier metal 34 and an aluminum film 62 and connected to the source / drain diffusion layers 28n and 28p is embedded.
[0148]
On the interlayer insulating film 30 in which the contact plug 38 and the aluminum film 62 are buried, the wiring layer 56 electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38, and the gate electrode 22n ', A wiring layer 58 connected to 22p 'is formed.
[0149]
As described above, in the semiconductor device according to the present embodiment, the gate electrode 22n 'of the N-type transistor and the gate electrode 22p' of the P-type transistor are replaced with aluminum, and the interlayer insulating film 30 is replaced with the gate electrodes 22n 'and 22p'. The main feature is that they have approximately equal heights.
[0150]
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. 18 and 19 are process cross-sectional views in the cross section of FIG. 17A, and FIGS. 20 and 21 are process cross-sectional views in the cross section of FIG. 17B.
[0151]
First, an N-type transistor, a P-type transistor, and the like are formed in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in, for example, FIGS. In the method of manufacturing the semiconductor device according to the present embodiment, it is not always necessary to introduce an impurity into the polycrystalline silicon film 20 as in the first to third embodiments.
[0152]
Next, a silicon oxide film having a thickness of, for example, 500 nm is deposited on the silicon substrate 10 on which the N-type transistor and the P-type transistor are formed by, for example, a CVD method, and an interlayer insulating film 30 made of a silicon oxide film is formed.
[0153]
Next, the interlayer insulating film 30 is flatly removed by, for example, a CMP method until the upper surfaces of the gate electrodes 22n and 22p are exposed (FIGS. 18A and 20B. Thereby, the height of the interlayer insulating film 30). Is substantially equal to the height of the gate electrodes 22n and 22p.
[0154]
Next, contact holes 32 reaching the source / drain diffusion layers 28n and 28p are formed in the interlayer insulating film 30 by photolithography and dry etching.
[0155]
Next, a titanium film having a thickness of, for example, 5 nm and a titanium nitride film having a thickness of, for example, 20 nm are deposited by, for example, a CVD method to form a barrier metal 34 having a TiN / Ti structure (FIGS. 18B and 20B). )).
[0156]
Next, a polycrystalline silicon film 60 having a thickness of, for example, 300 nm is formed on the barrier metal 34 by, for example, the CVD method (FIGS. 18C and 20C).
[0157]
Next, the polycrystalline silicon film 60 and the barrier metal 34 are flatly removed by, for example, a CMP method until the surfaces of the gate electrodes 22n, 22p and the interlayer insulating film 30 are exposed, and the barrier metal 34 and the polycrystalline silicon The film 60 is selectively left (FIGS. 18D and 20D).
[0158]
Next, an aluminum film 46 having a thickness of, for example, 400 nm and a titanium film 48 having a thickness of, for example, 200 nm are deposited on the interlayer insulating film 30 by, for example, a sputtering method. Thereby, the gate electrodes 22n and 22p and the polycrystalline silicon film 60 come into direct contact with the aluminum film 46 (FIGS. 19A and 21A).
[0159]
Next, heat treatment is performed in a nitrogen atmosphere at 350 to 500 ° C., for example, 400 ° C., for example, for 5 minutes. By this heat treatment, a reaction proceeds from the interface between the gate electrodes 22n and 22p and the polycrystalline silicon film 60 and the aluminum film 46, and the polycrystalline silicon film 60 is replaced by the aluminum film 62, and the gate electrodes 22n and 22p Are replaced by gate electrodes 22n 'and 22p' made of aluminum (FIGS. 19B and 21B).
[0160]
At this time, since the aluminum film 46 is in direct contact with the upper surfaces of the gate electrodes 22n and 22p, the aluminum replacement proceeds from the upper surfaces of the gate electrodes 22n and 22p. Therefore, even when the gate width of the gate electrodes 22n and 22p is long, the heat treatment for replacing aluminum can be performed in a short time.
[0161]
Next, the aluminum film 62 and the titanium film 48 on the interlayer insulating film 30 are removed by, for example, a CMP method. As a result, a contact plug 38 buried in the contact hole 32 and made of the barrier metal 34 and the aluminum film 62 is formed (FIGS. 19C and 21C).
[0162]
Next, for example, in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment shown in FIGS. 4D and 6D, the semiconductor device is electrically connected to the source / drain diffusion layers 28n and 28p via the contact plug 38. The wiring layer 56 thus formed and the wiring layer 58 electrically connected to the gate electrodes 22n 'and 22p' are formed (FIGS. 19D and 21D).
[0163]
As described above, according to the present embodiment, the contact plug is replaced with aluminum in addition to the gate electrode, so that the contact resistance can be further reduced and the speed of the transistor can be increased. Further, since the gate electrode and the contact plug are simultaneously replaced with aluminum, it is possible to prevent an increase in manufacturing cost due to an increase in the number of steps.
[0164]
In addition, since the height of the gate electrode and the height of the interlayer insulating film are substantially equal to each other and the surface on which the aluminum film used for aluminum replacement is formed is flat, it is not necessary to form the aluminum film in the contact hole. Therefore, the gate electrode can be easily and reliably replaced with aluminum.
[0165]
Further, since the aluminum film used for aluminum replacement is formed directly on the upper surface of the gate electrode, aluminum replacement of the gate electrode can be advanced from the upper surface of the gate electrode. Thus, even when the gate width of the gate electrode is long, heat treatment for replacing aluminum can be performed in a short time.
[0166]
In the above embodiment, the gate electrode of the P-type transistor is also replaced with aluminum. However, similarly to the first to third embodiments, only the gate electrode of the N-type transistor may be replaced with aluminum. Aluminum has a preferable work function as a gate electrode of an N-type transistor, but is not necessarily preferable as a gate electrode of a P-type transistor. Thus, for example, p ⁺ When the desired characteristics of the P-type transistor can be obtained by the polysilicon gate, only the gate electrode of the N-type transistor may be replaced with aluminum.
[0167]
[Modified embodiment]
The present invention is not limited to the above embodiment, and various modifications are possible.
[0168]
For example, in the above embodiment, the gate electrode before aluminum replacement is formed of a polycrystalline silicon film, but it is not always necessary to use polycrystalline silicon immediately after the formation. Instead of the polycrystalline silicon film, a single crystal silicon film or an amorphous silicon film may be formed. Note that even in the case of using an amorphous silicon film, since it is crystallized at the time of heat treatment for activating impurities, it is in a polycrystalline state when aluminum replacement is performed. In place of the polycrystalline silicon film, other materials that can be replaced with aluminum, such as a germanium film, a SiGe film, a carbon film, a silicon carbide film, _x Si _y Film, Ni _x Si _y Film, Ti _x Si _y A silicide film such as a film can also be used.
[0169]
Further, in the above embodiment, when replacing the polycrystalline silicon film with aluminum, the titanium film is formed on the aluminum film serving as the aluminum source, but the titanium film is not necessarily provided. Although the titanium film has an effect of sucking out excess silicon and has an effect of promoting aluminum substitution, it is possible to perform aluminum substitution without the titanium film.
[0170]
Further, in the above embodiment, the polycrystalline silicon is replaced with aluminum, but it is also possible to replace it with another metal material. For example, instead of aluminum, a metal such as copper, silver, ruthenium, platinum, palladium, or gold may be used, and polycrystalline silicon may be substituted for these metals. The replacement metal formed by replacing the material to be replaced with a metal material includes the material to be replaced slightly in the film. For example, when replacing silicon with aluminum, about 0.2 to 0.7% of silicon is contained in the substituted aluminum depending on the heat treatment temperature. In other words, by measuring the concentration of the material to be replaced in the film, it is possible to estimate whether or not the material to be replaced is a replacement metal formed by replacing the material to be replaced with a metal material.
[0171]
In the above embodiment, the method of replacing the contact plug connected to the gate electrode and the silicon substrate with aluminum has been described. However, the present invention may be applied to a case where another wiring layer or contact plug is replaced with aluminum.
[0172]
As described above in detail, the features of the present invention are summarized as follows.
[0173]
(Supplementary Note 1) a first gate electrode made of a substitution metal formed on a semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the impurity diffusion region;
A contact plug formed in the opening and made of a barrier metal;
A semiconductor device comprising:
[0174]
(Supplementary Note 2) In the semiconductor device according to Supplementary Note 1,
The contact plug has a barrier metal layer formed at least at the bottom of the opening, and a tungsten film formed on the barrier metal layer.
A semiconductor device characterized by the above-mentioned.
[0175]
(Supplementary Note 3) a first gate electrode made of a substitution metal formed on the semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the impurity diffusion region;
A contact plug formed in the opening, having a barrier metal layer formed at least at the bottom of the opening, and a film made of a substitution metal formed on the barrier metal layer;
A semiconductor device comprising:
[0176]
(Supplementary Note 4) In the semiconductor device according to any one of claims 1 to 3,
The impurity diffusion region is formed in self-alignment with the first gate electrode.
A semiconductor device characterized by the above-mentioned.
[0177]
(Supplementary Note 5) A first gate electrode made of a substitution metal formed on a semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the first gate electrode;
A contact plug made of a substitution metal formed in the opening;
A semiconductor device comprising:
[0178]
(Supplementary Note 6) In the semiconductor device according to Supplementary Note 5,
The contact plug has a plane pattern substantially equal to the first gate electrode.
A semiconductor device characterized by the above-mentioned.
[0179]
(Supplementary Note 7) In the semiconductor device according to any one of Supplementary Notes 1 to 4,
The insulating film has a height substantially equal to the first gate electrode
A semiconductor device characterized by the above-mentioned.
[0180]
(Supplementary Note 8) In the semiconductor device according to any one of Supplementary Notes 1 to 7,
A second gate electrode formed on the semiconductor substrate and including a P-type silicon film;
A semiconductor device characterized by the above-mentioned.
[0181]
(Supplementary Note 9) In the semiconductor device according to any one of Supplementary Notes 1 to 7,
A second gate electrode formed on the semiconductor substrate and made of a substitution metal,
The first gate electrode is a gate electrode of an N-type transistor, and the second gate electrode is a gate electrode of a P-type transistor.
A semiconductor device characterized by the above-mentioned.
[0182]
(Supplementary Note 10) In the semiconductor device according to any one of Supplementary Notes 1 to 9,
The replacement metal is aluminum containing 0.2-0.7% silicon.
A semiconductor device characterized by the above-mentioned.
[0183]
(Supplementary Note 11) A step of forming a first gate electrode made of a material to be replaced with a metal on a semiconductor substrate;
Forming an insulating film on the semiconductor substrate on which the first gate electrode is formed;
Forming a first opening reaching the semiconductor substrate in the insulating film;
Forming a barrier metal layer in the first opening;
Forming a second opening exposing at least a part of the first gate electrode in the insulating film;
Forming a metal film on the insulating film;
Replacing the material to be replaced constituting the first gate electrode with a metal material constituting the metal film by performing a heat treatment;
A method for manufacturing a semiconductor device, comprising:
[0184]
(Supplementary Note 12) In the method for manufacturing a semiconductor device according to supplementary note 11,
In the step of forming the barrier metal layer, the inside of the first opening is filled with the barrier metal layer.
A method for manufacturing a semiconductor device, comprising:
[0185]
(Supplementary Note 13) In the method of manufacturing a semiconductor device according to supplementary note 11,
After the step of forming the barrier metal layer, the method further includes a step of forming a film made of the material to be replaced in the first opening where the barrier metal layer is formed,
In the step of performing the heat treatment, the material to be replaced forming the first gate electrode is replaced with the metal material, and the material to be replaced in the first opening is replaced with the metal material.
A method for manufacturing a semiconductor device, comprising:
[0186]
(Supplementary Note 14) In the method for manufacturing a semiconductor device according to supplementary note 13,
After the step of performing the heat treatment, the metal film on the insulating film is removed, so that the film formed of the barrier metal layer and the material to be replaced is embedded in the first opening. Forming a first contact plug made of a substituted metal film substituted for
A method for manufacturing a semiconductor device, comprising:
[0187]
(Supplementary Note 15) In the method for manufacturing a semiconductor device according to Supplementary Note 13 or 14,
The step of forming the film made of the material to be replaced is performed after the step of forming the second opening, and the film made of the material to be replaced is also formed in the second opening,
In the step of performing the heat treatment, the material to be replaced in the second opening is also replaced with the metal material.
A method for manufacturing a semiconductor device, comprising:
[0188]
(Supplementary Note 16) In the method of manufacturing a semiconductor device according to supplementary note 15,
After the step of performing the heat treatment, the metal film on the insulating film is removed, so that the metal film is replaced with the metal film that is embedded in the second opening and is replaced with the metal material. Forming a second contact plug made of a metal film;
A method for manufacturing a semiconductor device, comprising:
[0189]
(Supplementary Note 17) In the method of manufacturing a semiconductor device according to supplementary note 16,
Forming the first contact plug and the second contact plug simultaneously;
A method for manufacturing a semiconductor device, comprising:
[0190]
(Supplementary Note 18) In the method of manufacturing a semiconductor device according to any one of Supplementary Notes 11 to 17,
In the step of forming the second opening, the second opening having a plane pattern substantially equal to that of the first gate electrode is formed.
A method for manufacturing a semiconductor device, comprising:
[0191]
(Supplementary Note 19) In the method of manufacturing a semiconductor device according to supplementary note 11 or 12,
In the step of forming the second opening, the first gate electrode is removed by flattening the insulating film so that the height of the insulating film is substantially equal to the height of the first gate electrode. Forming the second opening exposing the upper surface of the substrate
A method for manufacturing a semiconductor device, comprising:
[0192]
(Supplementary Note 20) In the method of manufacturing a semiconductor device according to any one of Supplementary Notes 11 to 19,
Forming a second gate electrode including a P-type silicon film on the semiconductor substrate.
A method for manufacturing a semiconductor device, comprising:
[0193]
(Supplementary Note 21) In the method of manufacturing a semiconductor device according to any one of Supplementary Notes 11 to 20,
In the step of performing the heat treatment, the heat treatment is performed at a temperature of 350 to 500 ° C.
A method for manufacturing a semiconductor device, comprising:
[0194]
(Supplementary Note 22) A step of forming a gate electrode made of a material to be replaced with a metal on the semiconductor substrate;
Forming an insulating film on the semiconductor substrate on which the gate electrode is formed,
Forming an opening in the insulating film exposing at least a part of the gate electrode;
Forming a metal film on the insulating film and in the opening;
By performing the heat treatment, the material to be replaced is replaced with a metal material constituting the metal film, the gate electrode made of the metal material is formed, and the gate electrode made of the metal material in the opening is electrically connected to the gate electrode. Forming a contact plug connected to the
A method for manufacturing a semiconductor device, comprising:
[0195]
【The invention's effect】
As described above, according to the present invention, in a semiconductor device having a gate electrode in which polycrystalline silicon is replaced with aluminum, a contact plug connected to a source / drain diffusion layer has a conductive property having a barrier property against aluminum replacement. Since it is made of a conductive material, there is no need to separately form a barrier metal layer for preventing the contact plug from being replaced with aluminum. Therefore, the manufacturing process can be shortened, and the manufacturing cost can be reduced. In addition, by using a material having higher conductivity than a polycrystalline silicon plug, contact resistance can be reduced and the speed of a transistor can be increased.
[0196]
Further, by replacing the contact plug with the gate electrode by aluminum, the contact resistance can be further reduced, and the speed of the transistor can be increased. Further, since the gate electrode and the contact plug are simultaneously replaced with aluminum, it is possible to prevent an increase in manufacturing cost due to an increase in the number of steps.
[0197]
Also, since a polycrystalline silicon film is filled in the contact hole connected to the gate electrode and the surface on which the aluminum film used for replacing aluminum is formed is flattened, it is not necessary to form an aluminum film in the contact hole. Therefore, even when the gate electrode is replaced with aluminum via a contact hole having a large aspect ratio, the aluminum can be easily and reliably replaced. Since the polycrystalline silicon film filling the contact hole connected to the gate electrode is formed simultaneously with the polycrystalline silicon film filling the contact hole connected to the silicon substrate, the number of manufacturing steps does not increase.
[0198]
Also, by replacing the opening connected to the gate electrode with a pattern substantially equal to the gate electrode or making the height of the gate electrode almost equal to the height of the interlayer insulating film, aluminum replacement of the gate electrode proceeds from above the upper surface of the gate electrode. Can be done. Thus, even when the gate width of the gate electrode is long, heat treatment for replacing aluminum can be performed in a short time.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view showing the structure of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 3 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 4 is a process sectional view (part 3) illustrating the method for fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 5 is a process sectional view (part 4) illustrating the method for fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 6 is a process sectional view (part 5) illustrating the method for fabricating the semiconductor device according to the first embodiment of the present invention;
FIG. 7 is a schematic sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention;
FIG. 8 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the second embodiment of the present invention;
FIG. 9 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the second embodiment of the present invention.
FIG. 10 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the third embodiment of the present invention.
FIG. 11 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the third embodiment of the present invention.
FIG. 12 is a schematic sectional view illustrating a structure of a semiconductor device according to a fourth embodiment;
FIG. 13 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the fourth embodiment of the present invention;
FIG. 14 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the fourth embodiment of the present invention.
FIG. 15 is a process sectional view (part 3) illustrating the method for fabricating the semiconductor device according to the fourth embodiment of the present invention.
FIG. 16 is a process sectional view (part 4) illustrating the method for fabricating the semiconductor device according to the fourth embodiment of the present invention.
FIG. 17 is a schematic sectional view showing the structure of a semiconductor device according to a fifth embodiment of the present invention;
FIG. 18 is a process sectional view (part 1) illustrating the method for fabricating the semiconductor device according to the fifth embodiment of the present invention.
FIG. 19 is a process sectional view (part 2) illustrating the method for fabricating the semiconductor device according to the fifth embodiment of the present invention.
FIG. 20 is a process sectional view (part 3) illustrating the method for fabricating the semiconductor device according to the fifth embodiment of the present invention.
FIG. 21 is a process sectional view (part 4) illustrating the method for fabricating the semiconductor device according to the fifth embodiment of the present invention.
FIG. 22 is a process sectional view (part 1) for illustrating the conventional method of manufacturing a semiconductor device.
FIG. 23 is a process sectional view (2) showing the conventional method of manufacturing the semiconductor device;
FIG. 24 is a process sectional view (part 3) for illustrating the conventional method of manufacturing a semiconductor device.
FIG. 25 is a process sectional view (part 4) illustrating the conventional method for manufacturing a semiconductor device.
[Explanation of symbols]
10. Silicon substrate
12… Element isolation film
14 ... P well
16 ... N well
18 ... Gate insulating film
20, 60 ... polycrystalline silicon film
22, 66 ... gate electrode
24 ... impurity diffusion region
26 ... sidewall insulating film
28 ... Source / drain diffusion layer
30 ... interlayer insulating film
32 ... Contact hole
34 ... Barrier metal
36 ... Tungsten film
38, 50… Contact plug
40 ... Photoresist film
42 ... Opening
44… Contact hole
46, 54, 62: Aluminum film
48 ... Titanium film
52 ... Titanium nitride film
56, 58 ... wiring layer
64 ... opening
100 ... silicon substrate
102: Element isolation film
104 ... P well
106 ... Gate electrode
108: source / drain diffusion layer
110, 120 ... interlayer insulating film
112, 122, 124 ... contact holes
114, 130, 132 ... contact plug
116 ... Pad
118 ... Photoresist film
126,136 ... Aluminum film
128 ... Titanium film
134: titanium nitride film
138, 140 ... wiring layer

Claims (10)

A first gate electrode made of a substitution metal formed on a semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the impurity diffusion region;
And a contact plug formed in the opening and made of a barrier metal. A first gate electrode made of a substitution metal formed on a semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the impurity diffusion region;
A semiconductor, comprising: a contact plug formed in the opening, having a barrier metal layer formed at least at the bottom of the opening, and a film made of a replacement metal formed on the barrier metal layer. apparatus. A first gate electrode made of a substitution metal formed on a semiconductor substrate;
An impurity diffusion region formed in the semiconductor substrate;
An insulating film formed on the semiconductor substrate on which the first gate electrode is formed and having an opening reaching the first gate electrode;
A contact plug made of a substitution metal formed in the opening. The semiconductor device according to claim 1, wherein
The semiconductor device, wherein the insulating film has a height substantially equal to that of the first gate electrode. Forming a first gate electrode made of a material to be replaced with a metal on a semiconductor substrate;
Forming an insulating film on the semiconductor substrate on which the first gate electrode is formed;
Forming a first opening reaching the semiconductor substrate in the insulating film;
Forming a barrier metal layer in the first opening;
Forming a second opening exposing at least a part of the first gate electrode in the insulating film;
Forming a metal film on the insulating film;
Replacing the material to be replaced constituting the first gate electrode with a metal material constituting the metal film by performing a heat treatment. The method for manufacturing a semiconductor device according to claim 5,
After the step of forming the barrier metal layer, the method further includes a step of forming a film made of the material to be replaced in the first opening where the barrier metal layer is formed,
In the step of performing the heat treatment, the material to be replaced forming the first gate electrode is replaced with the metal material, and the material to be replaced in the first opening is replaced with the metal material. Manufacturing method of a semiconductor device. The method for manufacturing a semiconductor device according to claim 6,
The step of forming the film made of the material to be replaced is performed after the step of forming the second opening, and the film made of the material to be replaced is also formed in the second opening,
In the step of performing the heat treatment, the material to be replaced in the second opening is also replaced with the metal material. The method for manufacturing a semiconductor device according to claim 7,
After the step of performing the heat treatment, the metal film on the insulating film is removed, so that the metal film is replaced with the metal film that is embedded in the second opening and is replaced with the metal material. A method for manufacturing a semiconductor device, further comprising a step of forming a second contact plug made of a metal film. The method for manufacturing a semiconductor device according to claim 5, wherein
The method of manufacturing a semiconductor device according to claim 1, wherein, in the step of forming the second opening, the second opening having a plane pattern substantially equal to that of the first gate electrode is formed. The method for manufacturing a semiconductor device according to claim 5,
In the step of forming the second opening, the first gate electrode is removed by flattening the insulating film so that the height of the insulating film is substantially equal to the height of the first gate electrode. Forming the second opening exposing the upper surface of the semiconductor device.

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