JP2004170149A - Insulation detecting device of non-grounded power source - Google Patents

Insulation detecting device of non-grounded power source Download PDF

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JP2004170149A
JP2004170149A JP2002334197A JP2002334197A JP2004170149A JP 2004170149 A JP2004170149 A JP 2004170149A JP 2002334197 A JP2002334197 A JP 2002334197A JP 2002334197 A JP2002334197 A JP 2002334197A JP 2004170149 A JP2004170149 A JP 2004170149A
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switch
power supply
voltage
capacitor
abnormality
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JP3890504B2 (en
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俊宏 ▲高▼木
Toshihiro Takagi
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Yazaki Corp
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Yazaki Corp
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an insulation detecting device of a non-grounded power source which can detect an abnormality of a second switch part, even when abnormality is in the state of insulation and abnormality is in the second switch part. <P>SOLUTION: When an abnormality detecting means 11 detects that a power source voltage of a power source 3 which is estimated by an operation means 11 is at most a determination voltage for determining the power source voltage to be abnormal, estimation of power source voltage of the power source 3 is repeated based on a voltage detected by a voltage detecting means 11 after shutoff of first switching means S1, S2. The abnormality detecting means 11 is so constituted that the second switch part S2 is determined to be abnormal, when change is not present in a value of the power source voltage estimated by repeating estimation of the power source voltage of the power source 3 for a previously set determination period. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、非接地電源の絶縁検出装置に係り、特に、電気による推進力を利用する車両に搭載された非接地の直流電源に好適な絶縁検出装置に関する。
【０００２】
【従来の技術】
非接地電源の絶縁検出装置は、非接地の直流電源の正及び負端子に接続され、接地電位部からは絶縁された正及び負側の主回路配線の接地電位部に対する絶縁抵抗つまり地絡抵抗を検出することで、接地電位部に対する絶縁や地絡状態を検出するものである（例えば、特許文献１参照）。このような従来の絶縁検出装置では、非接地の直流電源の正端子と接地電位部との間にコンデンサを直列に設定時間の間接続するスイッチング手段、非接地の電源の負端子と接地電位部との間にコンデンサを直列に設定時間の間接続するスイッチング手段、各スイッチング手段の遮断後にコンデンサの両端子間の電圧を検出する検出手段を接続する検出用のスイッチング手段、検出手段で検出した各スイッチング手段の遮断後のコンデンサの両端子間電圧とコンデンサを完全に充電することによって予め算出しておいた電源電圧とに基づいて電源の接地電位部に対する絶縁抵抗つまり地絡抵抗を求める演算手段などを備えており、演算手段で求められた地絡抵抗から絶縁状態の検出や判定などを行っている。
【０００３】
このような絶縁検出装置では、地絡抵抗を求める際、コンデンサの容量などを定数として含む式を用いるが、定数として用いるコンデンサの容量などには、製品間における容量などのばらつきや温度変化による容量のばらつきなどが存在し、さらに容量などの経時変化などが生じる場合もある。このように定数として用いる値にばらつきや変化がある場合、求めた地絡抵抗の値と実際の地絡抵抗の値との間の計測誤差が増大するため、絶縁状態の検出精度が低下してしまう。したがって、コンデンサの容量など地絡抵抗を求める際の定数となる値にばらつきや変化などがあっても、地絡抵抗の計測誤差をできるだけ低減し、絶縁状態の検出精度を向上することが望まれている。
【０００４】
そこで本願の発明者らは、正端子側及び負端子側の配線が接地電位部から絶縁された直流電源にコンデンサを直列に第１の設定時間の間接続する第１のスイッチング手段と、電源の正端子と接地電位部との間にコンデンサを直列に第２の設定時間の間接続する第２のスイッチング手段と、電源の負端子と接地電位部との間にコンデンサを直列に第２の設定時間の間接続する第３のスイッチング手段と、第１、第２及び第３の各スイッチング手段の遮断後にコンデンサの両端子間の電圧を検出する電圧検出手段を接続する第４のスイッチング手段と、第１のスイッチング手段を遮断後の電圧検出手段での検出電圧に基づいて電源の電源電圧を推定し、この推定した電源電圧と第２及び第３のスイッチング手段を遮断後の検出手段での各検出電圧とに基づいて電源の接地電位部に対する絶縁抵抗を求める演算手段とを備えた構成の絶縁検出装置を考えている。
【０００５】
さらにこのとき、第１のスイッチング手段が、電源の正端子に接続された第１のスイッチ部と、電源の負端子に接続された第２のスイッチ部とを含み、第３のスイッチング手段が、第２のスイッチ部と、第１のスイッチに直列に接続された第３のスイッチ部とを含み、第２のスイッチング手段が、第１のスイッチ部と、第２のスイッチ部に直列に接続された第４のスイッチ部とを含み、第４のスイッチング手段が、第３のスイッチ部と第４のスイッチ部とを含み、第１のスイッチ部と第３のスイッチ部との間と、第２のスイッチ部Ｓ２と第４のスイッチ部との間とに、正側から負側に向かう方向に整流する第１のダイオード、第１の抵抗及びコンデンサを直列に接続し、第１のダイオード及び第１の抵抗に並列に、この第１ダイオードと逆方向に整流する第２のダイオード及び第２の抵抗を直列に接続し、検出手段を第３のスイッチ部と第４のスイッチ部との間に接続し、検出手段と第４のスイッチ部との間を接地電位部に接地した構成としている。
【０００６】
このような構成の絶縁検出装置とすることにより、コンデンサを完全に充電するのに要する時間よりも短い時間で設定した第１の設定時間の間第１のスイッチング手段によって直流電源と接地電位部との間にコンデンサが直流に接続されて充電される。このときのコンデンサの両端端子間の電圧を第４のスイッチング手段によって接続された電圧検出手段で検出し、この検出した電圧から演算手段が電源電圧を推定し、この電源電圧と、第２及び第３のスイッチング手段遮断後の電圧検出手段での検出電圧とに基づいて接地電位部に対する絶縁抵抗を求めることで、絶縁抵抗の計測誤差を低減し、絶縁状態の検出精度を向上できる。
【０００７】
ここで、このような絶縁検出装置では、各スイッチング手段に異常が生じてしまうと誤った地絡抵抗値を求めることになる。このため、本願の発明者らは、各スイッチング手段の異常を検出する異常検出手段を備えた構成とすることを考えている。この異常検出手段は、上記のように各スイッチング手段が２つのスイッチ部つまりスイッチとなる部品を含む場合、例えば、第２のスイッチ部のみを予め設定した時間の間閉路した後、第４のスイッチング手段を閉路したときの電圧検出手段での検出電圧に基づいて第１のスイッチ部の異常を判定し、第１のスイッチ部のみを予め設定した時間の間閉路した後、第４のスイッチング手段を閉路したときの電圧検出手段での検出電圧に基づいて第２のスイッチ部の異常を判定し、第１のスイッチング手段を予め設定した時間の間閉路した後、第３のスイッチ部を遮断及び第４のスイッチ部を閉路したときの電圧検出手段での検出電圧に基づいて第３のスイッチ部の異常を判定し、第１のスイッチング手段を予め設定した時間の間閉路した後、第３のスイッチ部を閉路及び第４のスイッチ部を遮断したときの電圧検出手段での検出電圧に基づいて前記第４のスイッチ部の異常を検出することにより個々のスイッチの異常を検出するものである。
【０００８】
【特許文献１】
特開平８−２２６９５０号公報（第４−７頁、第１図）
【発明が解決しようとする課題】
ところで、前述のような本願の発明者らが考えている絶縁検出装置では、第２のスイッチ部及び第４のスイッチ部が閉路したとき、第２のスイッチ部と第４のスイッチ部とが接地電位部を介して電源に直列に接続され回路を形成する。このため、絶縁状態に異常があり絶縁抵抗が基準となる抵抗値よりも低くなっている状態で第２のスイッチ部に異常があり第２のスイッチ部が閉路状態になっていたり、ショートしている場合、第２のスイッチ部の異常を検出するために、第４のスイッチング手段を閉路してコンデンサの両端子間電圧を検出すると、電圧検出手段には本来のコンデンサの両端子間電圧よりも低い電圧しか印可されない。
【０００９】
しかし、本願の発明者らが考えている絶縁検出装置の異常検出手段は、第２のスイッチ部に異常が生じている場合、第２のスイッチ部が正常で有れば検出されない電圧が電圧検出手段で検出されることにより第２のスイッチ部の異常を判定するものであるため、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合には、第２のスイッチ部の異常を検出できない場合が生じることになる。
【００１０】
本発明の課題は、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合でも、第２のスイッチ部の異常を検出することにある。
【００１１】
【課題を解決するための手段】
本発明の非接地電源の絶縁検出装置は、正端子側及び負端子側の配線が接地電位部から絶縁された直流電源にコンデンサを直列に、このコンデンサが完全に充電される時間よりも短い第１の設定時間の間接続する第１のスイッチング手段と、電源の正端子と接地電位部との間にコンデンサを直列に第２の設定時間の間接続する第２のスイッチング手段と、電源の負端子と接地電位部との間にコンデンサを直列に第２の設定時間の間接続する第３のスイッチング手段と、第１、第２及び第３の各スイッチング手段の遮断後にコンデンサの両端子間の電圧を検出する電圧検出手段を接続する第４のスイッチング手段と、第１のスイッチング手段を遮断後の電圧検出手段での検出電圧に基づいて電源の電源電圧を推定し、この推定した電源電圧と第２及び第３のスイッチング手段を遮断後の検出手段での各検出電圧とに基づいて電源の接地電位部に対する絶縁抵抗を求める演算手段と、第１、第２、第３及び第４のスイッチング手段で生じた異常を検出する異常検出手段とを備え、第１のスイッチング手段が、電源の正端子に接続された第１のスイッチ部と、電源の負端子に接続された第２のスイッチ部とを含み、第３のスイッチング手段が、第２のスイッチ部と、第１のスイッチ部に直列に接続された第３のスイッチ部とを含み、第２のスイッチング手段が、第１のスイッチ部と、第２のスイッチ部に直列に接続された第４のスイッチ部とを含み、第４のスイッチング手段が、第３のスイッチ部と第４のスイッチ部とを含み、第１のスイッチ部と第３のスイッチ部との間と、第２のスイッチ部と第４のスイッチ部との間とに、正側から負側に向かう方向に整流する第１のダイオード及びコンデンサを直列に接続し、第１のダイオードに並列に、この第１ダイオードと逆方向に整流する第２のダイオードを接続し、電圧検出手段を第３のスイッチ部と第４のスイッチ部との間に接続し、電圧検出手段と第４のスイッチ部との間を接地電位部に接地しており、異常検出手段により、演算手段で推定した電源の電源電圧がこの電源電圧の異常を判定するための判定電圧以下であることを検出したとき、第１のスイッチング手段を遮断後の電圧検出手段での検出電圧に基づく電源の電源電圧の推定を繰り返し、異常検出手段は、予め設定した判定時間の間電源の電源電圧の推定を繰り返したときに推定した電源電圧の値に変化がないとき、第２のスイッチ部の異常を判定する構成とすることにより上記課題を解決する。
【００１２】
推定した電源電圧が電源電圧の異常を判定するための判定電圧以下である場合、電源は正常であるが一時的に電源電圧が低くなっているとき、例えば電源の立ち上がり時には、第１のスイッチング手段を遮断後の電圧検出手段での検出電圧に基づく電源の電源電圧の推定を繰り返して行くと、推定した電源電圧は上昇し始める。しかし、絶縁状態に異常があり、かつ第２のスイッチ部に異常があるときには、電源の電源電圧の推定を繰り返しても推定した電源電圧は上昇しない。したがって、このような構成とすれば、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合でも、第２のスイッチ部の異常を検出できる。
【００１３】
ところで、電圧検出手段と第４のスイッチ部との間の接地電位部に接地している部分と、第４のスイッチ部との間に抵抗などの部品が設置されている場合、第２のスイッチ部に異常があるときに絶縁抵抗の値が低くなると、接地している部分と第４のスイッチ部との間に設置された抵抗などの部品に印加される電圧が電源電圧に近くなる。さらに、第２のスイッチ部の異常を検出するために電源の電源電圧の推定を繰り返しおこなうと、第４のスイッチング手段が作動して第４のスイッチ部が閉路する度に、絶縁抵抗の値によっては、接地している部分と第４のスイッチ部との間に設置された抵抗などの部品に電源電圧に近い電圧が断続的に印加されることになる。したがって、絶縁抵抗の値が低くなると、この部品にかかるストレスは増大することになり、場合によっては破損してしまう可能性がある。このため、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合の第２のスイッチ部の異常検出動作によって回路を構成する部品にかかるストレスを低減する必要がある。
【００１４】
これに対して、異常検出手段により、演算手段で推定した電源の電源電圧がこの電源電圧の異常を判定するための判定電圧以下であることを検出した場合、電源の電源電圧の推定を繰り返すときの第４のスイッチング手段の作動周期を、電源の電源電圧が正常の場合の第４のスイッチング手段の作動周期よりも長くする構成とする。このような構成とすれば、接地している部分と第４のスイッチ部との間に設置された抵抗などの部品に電源電圧に近い電圧が印加される可能性が有る場合には、第４のスイッチング手段の動作周期、つまり第４のスイッチ部の開閉周期は、電源の電源電圧が正常の場合の周期よりも長くなる。このため、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合の第２のスイッチ部の異常検出動作によって回路を構成する部品にかかるストレスを低減できる。
【００１５】
さらに、異常検出手段は、第２のスイッチ部のみを第３の設定時間の間閉路した後、第４のスイッチング手段を閉路したときの電圧検出手段での検出電圧に基づいて第１のスイッチ部の異常を判定し、第１のスイッチ部のみを第４の設定時間の間閉路した後、第４のスイッチング手段を閉路したときの電圧検出手段での検出電圧に基づいて第２のスイッチ部の異常を判定し、第１のスイッチング手段を第５の設定時間の間閉路した後、第３のスイッチ部を遮断及び第４のスイッチ部を閉路したときの電圧検出手段での検出電圧に基づいて第３のスイッチ部の異常を判定し、第１のスイッチング手段を第６の設定時間の間閉路した後、第３のスイッチ部を閉路及び第４のスイッチ部を遮断したときの電圧検出手段での検出電圧に基づいて第４のスイッチ部の異常を検出する構成とする。
【００１６】
【発明の実施の形態】
以下、本発明を適用してなる絶縁検出装置の一実施形態について図１乃至図１１を参照して説明する。図１は、本発明を適用してなる絶縁検出装置の概略構成を示す図である。図２は、本発明を適用してなる絶縁検出装置の絶縁抵抗計測動作を示すフロー図である。図３は、本発明を適用してなる絶縁検出装置の絶縁抵抗の計測工程における電源電圧推定過程の動作を示すフロー図である。図４は、電源電圧正常時及び異常時の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。図５は、判定電圧と推定した電源電圧との関係及びマイコンのＡ／Ｄデータの読み込み周期を説明する図であり、（ａ）は電源の立ち上がり時を、（ｂ）は絶縁不良が発生しているときの第２スイッチ異常時を示す図である。図６は、第２スイッチの異常検出における各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【００１７】
図７は、第１スイッチの異常検出における各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。図８は、第３スイッチの異常検出における各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。図９は、第４スイッチの異常検出における各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。図１０は、本発明を適用してなる絶縁検出装置の絶縁抵抗計測過程の動作を示すフロー図である。図１１は、絶縁抵抗の値に対する各電源電圧の計測時間で検出した絶縁抵抗の値の検出誤差を示す図である。なお、図４のタイムチャートでは、個別スイッチ異常検出過程の検出電圧ＶＣ及びＡ／Ｄ変換値は、スイッチに異常がない場合の状態を示し、図６乃至図９のタイムチャートでは、個別スイッチ異常検出過程の検出電圧ＶＣ及びＡ／Ｄ変換値は、スイッチに異常がある場合の状態を示している。
【００１８】
本実施形態の絶縁検出装置１は、図１に示すように、例えば電力を利用して推進力を得る電気推進車両などの電力源となる直流電源３に対して適用したものである。電源３は、複数の蓄電池などを直列接続したものであり、電源３の正端子側の正側主回路配線５ａと負端子側の負側主回路配線５ｂが、各々、接地電位部７、例えば車体などから絶縁されており、電源３は非接地電源となっている。絶縁検出装置１は、第１スイッチＳ１、第２スイッチＳ２、第３スイッチＳ３、第４スイッチＳ４、コンデンサ９、電圧検出手段と演算手段を兼ねると共に絶縁状態を判定するマイコン１１、そして各スイッチを設定された時間に応じて開閉制御する図示していないスイッチング制御回路などで構成されている。
【００１９】
なお、本実施形態のマイコン１１は、第１スイッチＳ１、第２スイッチＳ２、第３スイッチＳ３、第４スイッチＳ４などの各スイッチの異常を検出する異常検出手段も兼ねている。さらに、図示していないスイッチング制御回路をマイコン１１に一体に含めるなど、電圧検出手段、演算手段、異常検出手段及びスイッチング制御回路などは、別体または一体に適宜形成できる。また、図１で示した第１スイッチＳ１、第２スイッチＳ２、第３スイッチＳ３、第４スイッチＳ４は、例えばリレーや半導体スイッチといった様々なスイッチ機能を有する部品からなるスイッチ部を接点として模式的に示したものである。
【００２０】
電源３の正端子側には、この正端子側から第１スイッチＳ１及び第３スイッチＳ３が順次直列に接続され、電源３の負端子側には、この負端子側から第２スイッチＳ２、第４スイッチＳ４及び第４抵抗Ｒ４が順次直列に接続されている。第１スイッチＳ１と第３スイッチＳ３との間から第２スイッチＳ２と第４スイッチＳ４との間には、第１ダイオードＤ１、第１抵抗Ｒ１及びコンデンサ９が順次直列に接続されている。第１抵抗Ｒ１とコンデンサ９との間から第１スイッチＳ１と第３スイッチＳ３との間には、第２ダイオードＤ２及び第２抵抗Ｒ２が順次直列に接続されている。すなわち、第１ダイオードＤ１及び第１抵抗Ｒ１と、第２ダイオードＤ２及び第２抵抗Ｒ２とは並列に接続されている。また、第２ダイオードＤ２と第２抵抗Ｒ２との間の部位から接地電位部７に、バイパス手段として、第５スイッチＳ５、そして第２抵抗Ｒ２よりも抵抗が低い第５抵抗Ｒ５が順次直列に接続されている。第１ダイオードＤ１は、正側から負側に向かう方向に整流するものであり、第２ダイオードＤ２は、第１ダイオードＤ１と逆方向に整流するものである。
【００２１】
第３スイッチＳ３と第４抵抗Ｒ４間には、第３スイッチＳ３と第４抵抗Ｒ４に対して直列に第３抵抗Ｒ３が接続されており、第３スイッチＳ３と第３抵抗Ｒ３との間には、検出手段と演算手段を兼ねるマイコン１１がマイコン１１のアナログ／デジタル変換ポートつまりＡ／Ｄポートを介して接続されている。また、第３抵抗Ｒ３と第４抵抗Ｒ４との間の部位は、接地電位部７に接地されている。
【００２２】
したがって、電源３にコンデンサ９を直列に第１の設定時間の間接続する第１のスイッチング手段は、第１スイッチＳ１、第２スイッチＳ２及び図示していないスイッチング制御回路などで、電源３の正端子と接地電位部７との間にコンデンサ９を直列に第２の設定時間の間接続する第２のスイッチング手段は、第１スイッチＳ１、第４スイッチＳ４及び図示していないスイッチング制御回路などで、接地電位部７と電源３の負端子との間にコンデンサ９を直列に第２の設定時間の間接続する第３のスイッチング手段は、第２スイッチＳ２、第３スイッチＳ３及び図示していないスイッチング制御回路などで、第４のスイッチング手段は、第３スイッチＳ３、第４スイッチＳ４及び図示していないスイッチング制御回路などで形成されている。なお、コンデンサ９には、例えば数μＦといった比較的高容量のものが用いられ、第１抵抗Ｒ１と第２抵抗Ｒ２には、例えば数百ｋΩといった比較的高い抵抗値のものが用いられている。
【００２３】
このような構成の絶縁検出装置の動作と本発明の特徴部について説明する。本実施形態の絶縁検出装置１は、絶縁状態の計測を開始すると、図２に示されるように、電源３の電源電圧を推定するための電源電圧推定過程を行う（ステップ１０１）。ステップ１０１では、図３及び図４に示すように、電源電圧推定過程を開始すると、図示していないスイッチング制御回路が第１スイッチＳ１及び第２スイッチＳ２を第１の設定時間である第１閉路時間Ｔ１の間、閉路する（ステップ２０１）。すなわち、第１のスイッチング手段により、接地電位部７を介さずに電源３にコンデンサ９を直列に接続する回路が形成され、第１閉路時間Ｔ１の間、コンデンサ９への充電が行われ、コンデンサ９の両端子間の電圧ＶＣが上昇する。なお、第１閉路時間Ｔ１は、コンデンサ９を完全に充電するのに必要な時間よりも短い時間に設定されており、例えばコンデンサ９を完全に充電するのに必要な時間の１／５〜１／１０といったような短い時間となっており、第１閉路時間Ｔ１は、必要とされる絶縁抵抗の計測誤差範囲によって選択されたものである。
【００２４】
ステップ２０１において第１閉路時間Ｔ１が経過すると、第１スイッチＳ１及び第２スイッチＳ２が開路つまり遮断され、第１閉路時間Ｔ１よりも短い所定時間ｔｗ１経過後、第３スイッチＳ３及び第４スイッチＳ４が閉路される（ステップ２０３）。すなわち、第４のスイッチング手段により、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路が形成されると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路が形成され、コンデンサ９の両端子間の電圧ＶＣが降下する。ここで、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込む（ステップ２０５）。このときのコンデンサ９の両端子間電圧ＶＣの値つまり検出電圧Ｖ０により、次式（１）から推定の電源電圧Ｖ０ｓを算出する（ステップ２０７）。
Ｖ０ｓ＝Ｖ０／（１−ＥＸＰ（−Ｔ１／Ｃ・Ｒ１）） …（１）
ただし、式（１）において、Ｔ１は第１スイッチＳ１及び第２スイッチＳ２の閉路時間、Ｃはコンデンサ９の容量、Ｒ１は第１抵抗Ｒ１の抵抗値である。
【００２５】
一方、図示していないスイッチング制御回路は、ステップ２０５でコンデンサ９の両端子間の電圧ＶＣを検出した後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で、第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせることで、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して、第１閉路時間Ｔ１よりも短い所定時間ｔｄ１経過後、第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込み、電圧ＶＣが０Ｖであることを確認する（ステップ２０９）。
【００２６】
このようなステップ１０１の電源電圧推定過程の後、図２に示すように、このステップ１０１で推定した電源電圧Ｖ０ｓと、電源電圧の異常を検出するために予め設定した判定電圧とを比較して電源３の電源電圧の異常を判定する（ステップ１０３）。ステップ１０３において、ステップ１０１で推定した電源電圧Ｖ０ｓが、図５に示すように判定電圧以下であり電源電圧が異常と判定されると、図２に示すように、電源電圧が変動しているかを判断する（ステップ１０５）。ステップ１０５において、図５に示すように電源電圧が変動していない場合には、図２に示すように、ステップ１０１の電源電圧推定過程におけるＡ／Ｄ変換データの読み込み周期、つまりＡ／Ｄ変換データの読み込みに連動する第３スイッチＳ３と第４スイッチＳ４を閉路する周期、さらに言い換えれば第４のスイッチング手段を作動する周期を、電源電圧が正常なとき、またはステップ１０５において電源電圧が変動しているときのＡ／Ｄ変換データの読み込み周期Ｐ１よりも長い周期Ｐ２に変更する（ステップ１０７）。なお、周期Ｐ２は、周期Ｐ１がコンマ数秒であるのに対して、数秒といったオーダーに設定されている。
【００２７】
ステップ１０７でＡ／Ｄ変換データの読み込み周期を変更した後、図２及び図５に示すように、判定時間ｈが経過したか否かを判断し（ステップ１０９）、ステップ１０９で判定時間ｈが経過していない場合には、ステップ１０１に戻る。したがって、図５（ｂ）に示すように電源電圧Ｖ０ｓが判定電圧以下であり、電源電圧Ｖ０ｓにほとんど変動が無かった場合、図２に示すように、判定時間ｈが経過するまでステップ１０１〜１０９を繰り返す。このとき、ステップ１０７のＡ／Ｄ変換データの読み込み周期の変更は初回のみ行い、判定時間ｈが経過するまでのステップ１０１〜１０９を繰り返すサイクルでは、ステップ１０７をスキップしＡ／Ｄ変換データの読み込み周期の変更は行わない。このため、ステップ１０１〜１０９を繰り返すサイクルにおけるステップ１０１の電源電圧推定過程は、周期Ｐ２で行われる。
【００２８】
ステップ１０９において判定時間ｈが経過すると、判定時間ｈの間、電源電圧Ｖ０ｓにほとんど変動が無かったことになるため、異常検出手段であるマイコン１１は、Ｓ２が故障により閉路したままの状態になっているか、またはその他のショート故障などの異常が発生していると判定し（ステップ１１１）、例えば絶縁抵抗値の計測を中止し、警報などにより第２スイッチＳ２の異常を告知する。なお、判定時間ｈは、周期Ｐ２が数秒であるのに対して、数分といったオーダーに設定されている。また、判定時間ｈは、電源３の使用を開始したときの電源電圧が定格電圧になるまでの時間、つまり電源電圧の立ち上がり時間に応じて決定している。
【００２９】
一方、ステップ１０１〜１０９を繰り返すサイクルにおいて、図５（ａ）に示すように電源電圧Ｖ０ｓが上昇すると、ステップ１０５において、電源３の電源電圧Ｖ０ｓが変動したと判断されるため、第１スイッチＳ１、第２スイッチＳ２、第３スイッチＳ３、そして第４スイッチＳ４の異常を個別に検出する個別スイッチ異常検出過程（ステップ１１３）へ進む。絶縁検出装置１の構成及び絶縁抵抗の検出動作などからもわかるように、推定した電源電圧Ｖ０ｓは、各スイッチＳ１、Ｓ２、Ｓ３、Ｓ４にショート状態になっているといった異常が生じている場合にも異常な値を示す。そこで、ステップ１０３で電源電圧の異常が判定された場合、電源電圧の異常またはスイッチ部の異常が生じていると考えられるため、異常の原因の判断、そしてスイッチ部に異常がある場合の異常があるスイッチ部の特定のため、各スイッチＳ１、Ｓ２、Ｓ３、Ｓ４を個別に検査する個別スイッチ異常検出過程１１３を行う。
【００３０】
第２スイッチの異常検出では、図４に示すように、他のスイッチを遮断した状態で第１スイッチＳ１を例えば第１の設定時間である第１閉路時間Ｔ１の間、閉路する。このとき、第２スイッチＳ２に異常がなければ、電源３にコンデンサ９を直列に接続する回路は形成されず、コンデンサ９の両端子間の電圧ＶＣは上昇しない。第１閉路時間Ｔ１経過後、さらに第１閉路時間Ｔ１よりも短い所定時間ｔｗ１経過して第３スイッチＳ３及び第４スイッチＳ４を閉路する。つまり、第４のスイッチング手段により、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路を形成すると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路を形成する。ここでマイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、コンデンサ９には充電が行われていないため、マイコン１１で電圧は検出されない。マイコン１１で電圧が検出されないことにより、異常検出手段であるマイコン１１は、第２スイッチＳ２に異常はないと判断する。
【００３１】
この後、図示していないスイッチング制御回路は、マイコン１１でコンデンサ９の両端子間の電圧ＶＣを検出した後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせる。これにより、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して、第１閉路時間Ｔ１よりも短い所定時間ｔｄ１経過後、第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込み、電圧ＶＣが０Ｖであることを確認し、第１スイッチ異常検出過程１０７へ進む。
【００３２】
一方、第２スイッチＳ２が故障などにより閉路状態またはショート状態になっているといった異常があると、電源３にコンデンサ９を直列に接続する回路が形成された状態となり、図６に示すように、第１閉路時間Ｔ１の間、コンデンサ９への充電が行われ、コンデンサ９の両端子間の電圧ＶＣが上昇する。したがって、スイッチＳ３及び第４スイッチＳ４を閉路し、マイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、第２スイッチＳ２の異常によりコンデンサ９への充電が行われたため、コンデンサ９の両端子間の電圧ＶＣに相当する電圧がマイコン１１で検出される。コンデンサ９の両端子間の電圧ＶＣに相当する電圧が検出されたことにより、異常検出手段であるマイコン１１は、第２スイッチＳ２が異常であると判断し、例えば絶縁抵抗値の計測を中止し、警報などにより異常を告知する。
【００３３】
第１スイッチの異常検出では、図４に示すように、他のスイッチを遮断した状態で第２スイッチＳ２を例えば第１の設定時間である第１閉路時間Ｔ１の間、閉路する。このとき、第１スイッチＳ１に異常がなければ、電源３にコンデンサ９を直列に接続する回路は形成されず、コンデンサ９の両端子間の電圧ＶＣは上昇しない。第１閉路時間Ｔ１経過後、さらに第１閉路時間Ｔ１よりも短い所定時間ｔｗ１経過して第３スイッチＳ３及び第４スイッチＳ４を閉路する。つまり、第４のスイッチング手段により、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路を形成すると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路を形成する。ここでマイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、コンデンサ９には充電が行われていないため、マイコン１１で電圧は検出されない。マイコン１１で電圧が検出されないことにより、異常検出手段であるマイコン１１は、第１スイッチＳ１に異常はないと判断する。
【００３４】
この後、図示していないスイッチング制御回路は、マイコン１１でコンデンサ９の両端子間の電圧ＶＣを検出した後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせる。これにより、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して、第１閉路時間Ｔ１よりも短い所定時間ｔｄ１経過後、第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込み、電圧ＶＣが０Ｖであることを確認し、第３スイッチ異常検出過程１０９へ進む。
【００３５】
一方、第１スイッチＳ１が故障などにより閉路状態またはショート状態になっているといった異常があると、電源３にコンデンサ９を直列に接続する回路が形成された状態となり、図７に示すように、第１閉路時間Ｔ１の間、コンデンサ９への充電が行われ、コンデンサ９の両端子間の電圧ＶＣが上昇する。したがって、スイッチＳ３及び第４スイッチＳ４を閉路し、マイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、第１スイッチＳ１の異常によりコンデンサ９への充電が行われたため、コンデンサ９の両端子間の電圧ＶＣに相当する電圧がマイコン１１で検出される。コンデンサ９の両端子間の電圧ＶＣに相当する電圧が検出されたことにより、異常検出手段であるマイコン１１は、第１スイッチＳ１が異常であると判断し、例えば絶縁抵抗値の計測を中止し、警報などにより異常を告知する。
【００３６】
第３スイッチの異常検出及び第４スイッチの異常検出は、本実施形態では一つの過程の中で行われる。第３スイッチ及び第４スイッチの異常検出では、図４に示すように、他のスイッチを遮断した状態で第１スイッチＳ１及び第２スイッチＳ２を例えば第１の設定時間である第１閉路時間Ｔ１の間、閉路する。つまり、第１スイッチング手段により、電源３にコンデンサ９を直列に接続する回路を形成し、第１閉路時間Ｔ１の間、コンデンサ９への充電を行う。これにより、コンデンサ９の両端子間の電圧ＶＣが上昇する。第１閉路時間Ｔ１経過後、さらに第１閉路時間Ｔ１よりも短い所定時間ｔｗ１経過して第３スイッチＳ３の異常を検出するため、第３スイッチＳ３を遮断した状態で第４スイッチＳ４を閉路する。
【００３７】
このとき、第３スイッチＳ３に異常がなければ、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路、そして第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路は形成されない。ここでマイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、マイコン１１のＡ／Ｄポートには電圧が印加されず、マイコン１１で電圧は検出されない。マイコン１１で電圧が検出されないことにより、異常検出手段であるマイコン１１は、第３スイッチＳ３に異常はないと判断する。
【００３８】
続いて、第３スイッチＳ３を閉路し、第３スイッチＳ３を閉路してから所定時間ｔｗ１経過した後、第４スイッチＳ４の異常を検出するため、第３スイッチＳ３を閉路した状態で第４スイッチＳ４を遮断する。このとき、第４スイッチＳ４に異常がなければ、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路、そして第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路は形成されない。ここでマイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、マイコン１１のＡ／Ｄポートには電圧が印加されず、マイコン１１で電圧は検出されない。マイコン１１で電圧が検出されないことにより、異常検出手段であるマイコン１１は、第４スイッチＳ４に異常はないと判断する。
【００３９】
この後、図示していないスイッチング制御回路は、マイコン１１のＡ／Ｄポートでの読み込みを行った後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせる。これにより、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して、第１閉路時間Ｔ１よりも短い所定時間ｔｄ１経過後、第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込み、電圧ＶＣが０Ｖであることを確認し、第３スイッチ異常検出過程１０９へ進む。絶縁抵抗計測過程１１３へ進む。
【００４０】
一方、第３スイッチＳ３が故障などにより閉路状態またはショート状態になっているといった異常があると、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路を形成した状態となると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路を形成した状態となる。したがって、マイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、図８に示すように、第３スイッチＳ３の異常によりマイコン１１のＡ／Ｄポートにコンデンサ９の両端子間の電圧ＶＣが印加されるため、コンデンサ９の両端子間の電圧ＶＣに相当する電圧がマイコン１１で検出される。コンデンサ９の両端子間の電圧ＶＣに相当する電圧が検出されたことにより、異常検出手段であるマイコン１１は、第３スイッチＳ３が異常であると判断し、例えば絶縁抵抗値の計測を中止し、警報などにより異常を告知する。
【００４１】
また、第４スイッチＳ４が故障などにより閉路状態またはショート状態になっているといった異常があると、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路を形成した状態となると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路を形成した状態となる。したがって、マイコン１１がＡ／Ｄポートを介してコンデンサ９の両端子間の電圧ＶＣを読み込むと、図９に示すように、第４スイッチＳ４の異常によりマイコン１１のＡ／Ｄポートにコンデンサ９の両端子間の電圧ＶＣが印加されるため、コンデンサ９の両端子間の電圧ＶＣに相当する電圧がマイコン１１で検出される。コンデンサ９の両端子間の電圧ＶＣに相当する電圧が検出されたことにより、異常検出手段であるマイコン１１は、第４スイッチＳ４が異常であると判断し、例えば絶縁抵抗値の計測を中止し、警報などにより異常を告知する。
【００４２】
なお、図８及び図９は、図４とは異なり、第３スイッチの異常検出及び第４スイッチの異常検出を個別に実施した場合の図を示しており、また、第３スイッチの異常検出は、第３スイッチＳ３及び第４スイッチＳ４を同時に閉路した後、第３スイッチＳ３のみを遮断する方法を示している。
【００４３】
各スイッチの異常検出においてスイッチの異常が検出されなかった場合、つまり電源電圧自体の異常であることが検出された場合、または、図２及び図４に示すように、ステップ１０３の電源電圧異常判定において電源電圧の異常が検出されなかった場合、絶縁抵抗を計測するための絶縁抵抗計測過程（ステップ１１５）に進む。ステップ１１５の絶縁抵抗計測過程では、図示していないスイッチング制御回路は、図４及び図１０に示すように、第１スイッチＳ１及び第４スイッチＳ４を第２の設定時間である第２閉路時間Ｔ２の間、閉路する（ステップ３０１）。
【００４４】
すなわち、第２のスイッチング手段により、電源３の正端子と接地電位部７との間にコンデンサ９を直列に接続した回路、つまり、図１に示すように、正側主回路配線５ａ、第１スイッチＳ１、第１ダイオードＤ１、第１抵抗Ｒ１、コンデンサ９、第４スイッチＳ４、第４抵抗Ｒ４、接地電位部７、そして図１において点線で示すような位置に仮定される負端子側の地絡抵抗Ｒｎ、負側主回路配線５ｂを順次直列に電源３に接続した回路が形成される。これにより、第２閉路時間Ｔ２の間、コンデンサ９への充電が行われ、図４に示すように、地絡抵抗Ｒｎの値に応じてコンデンサ９の両端子間の電圧ＶＣが上昇する。なお、第２の設定時間である第２閉路時間Ｔ２も、第１閉路時間Ｔ１と同様に、コンデンサ９を完全に充電するのに必要な時間よりも短く、所定時間ｔｗ１、ｔｄ１よりも長い時間に設定されている。
【００４５】
ステップ３０１において第２閉路時間Ｔ２が経過すると、図４及び図１０に示すように、第１スイッチＳ１が開路つまり遮断され、所定時間ｔｗ１経過後、第３スイッチＳ３が閉路され、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態となる。すなわち、第４のスイッチング手段により、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路が形成されると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路が形成され、コンデンサ９の両端子間の電圧ＶＣが降下する。そして、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込む（ステップ３０３）。このときのコンデンサ９の両端子間電圧ＶＣの値つまり検出電圧ＶＣＮにより、次式（２）から電源３の負端子側の接地電位部７となる車体などに対する絶縁抵抗、すなわち負端子側の地絡抵抗Ｒｎを算出する（ステップ３０５）。
Ｒｎ＝−Ｒ１−Ｔ２／Ｃ・ｌｎ（１−ＶＣＮ／Ｖ０ｓ） …（２）
ただし、式（２）において、Ｔ２は第１スイッチＳ１及び第４スイッチＳ４の閉路時間、Ｃはコンデンサ９の容量、Ｒ１は第１抵抗Ｒ１の抵抗値、電源電圧Ｖ０ｓはステップ１０１の電源電圧推定過程で推定した電源電圧である。
【００４６】
一方、図示していないスイッチング制御回路は、ステップ３０５でコンデンサ９の両端子間の電圧ＶＣを検出した後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で、第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせることで、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して、第２閉路時間Ｔ２よりも短い所定時間ｔｄ２経過後、第３スイッチＳ３、第４スイッチＳ４及び第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込む（ステップ３０７）。
【００４７】
ステップ３０７で電圧ＶＣが０Ｖであることが確認されたら、図示していないスイッチング制御回路は、第２スイッチＳ２及び第３スイッチＳ３を第２の設定時間である第２閉路時間Ｔ２の間、閉路する（ステップ３０９）。すなわち、第３のスイッチング手段により、接地電位部７と電源３の負端子との間にコンデンサ９を直列に接続した回路、つまり、図１に示すように、正側主回路配線５ａ、図１において点線で示すような位置に仮定される正端子側の地絡抵抗Ｒｐ、接地電位部７、第３抵抗Ｒ３、第３スイッチＳ３、第１ダイオードＤ１、第１抵抗Ｒ１、コンデンサ９、第２スイッチＳ２、そして負側主回路配線５ｂを順次直列に電源３に接続した回路が形成される。これにより、第２閉路時間Ｔ２の間、コンデンサ９への充電が行われ、図４に示すように、地絡抵抗Ｒｐの値に応じてコンデンサ９の両端子間の電圧ＶＣが上昇する。
【００４８】
ステップ３０９において第２閉路時間Ｔ２が経過すると、図４及び図１０に示すように、第２スイッチＳ２が開路つまり遮断され、所定時間ｔｗ１経過後、第４スイッチＳ４が閉路され、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態となる。すなわち、第４のスイッチング手段により、コンデンサ９の両端子間の電圧を検出するマイコン１１が接続された回路が形成されると共に、第２抵抗Ｒ２、第３抵抗Ｒ３、そして第４抵抗Ｒ４を含むコンデンサ９からの放電回路が形成され、コンデンサ９の両端子間の電圧ＶＣが降下する。そして、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込む（ステップ３１１）。このときのコンデンサ９の両端子間電圧ＶＣの値つまり検出電圧ＶＣＰにより、次式（３）から電源３の正端子側の接地電位部７となる車体などに対する絶縁抵抗、すなわち正端子側の地絡抵抗Ｒｐを算出する（ステップ３１３）。
Ｒｐ＝−Ｒ１−Ｔ２／Ｃ・ｌｎ（１−ＶＣＰ／Ｖ０ｓ） …（３）
ただし、式（３）において、Ｔ２は第２スイッチＳ２及び第３スイッチＳ３の閉路時間、Ｃはコンデンサ９の容量、Ｒ１は第１抵抗Ｒ１の抵抗値、電源電圧Ｖ０ｓはステップ１０１の電源電圧推定過程で推定した電源電圧である。
【００４９】
一方、図示していないスイッチング制御回路は、ステップ３１３でコンデンサ９の両端子間の電圧ＶＣを検出した後、第３スイッチＳ３及び第４スイッチＳ４が閉路された状態で、第５スイッチＳ５を閉路して第２抵抗Ｒ２をバイパスさせることで、第２抵抗Ｒ２の抵抗値を下げた状態とし、コンデンサ９からの放電に要する時間を短縮する。第５スイッチＳ５を閉路して所定時間ｔｄ２経過後、第３スイッチＳ３、第４スイッチＳ４及び第５スイッチＳ５を開路つまり遮断した後、マイコン１１は、Ａ／Ｄポートを介してＡ／Ｄ変換データ、つまりコンデンサ９の両端子間の電圧ＶＣを読み込む（ステップ３１５）。そして、ステップ３１５で電圧ＶＣが０Ｖであることが確認された時点で、１回の絶縁状態の検出サイクルを終了する。また、絶縁状態の検出を行う間、図２、図３及び図１０に示す、ステップ１０１からステップ１１５までの絶縁抵抗の計測サイクルを繰り返す。
【００５０】
マイコン１１は、１回または複数回の絶縁抵抗の計測サイクルで求めた電源３の正端子側の地絡抵抗Ｒｐと、負端子側の地絡抵抗Ｒｎの値から絶縁状態を判定する。例えば、電源３の正端子側の地絡抵抗Ｒｐと、予め定められた基準抵抗値とを比較し、地絡抵抗Ｒｐが基準抵抗値以下になっている場合には、絶縁不良が生じていると判定する。
【００５１】
ここで、式（２）、（３）などからわかるように、コンデンサ９の容量Ｃ、さらに第１抵抗Ｒ１の抵抗値Ｒ１が製品間差や温度変化などによりばらつくと、電源３の正端子側の地絡抵抗Ｒｐ、負端子側の地絡抵抗Ｒｎの計測精度に影響し、検出した地絡抵抗Ｒｐ、Ｒｎの値の精度が低下してしまう。したがって、絶縁状態の検出精度が低下してしまうことになる。特にコンデンサ９は、浮遊容量を考慮すると数μＦといった比較的大きな値のものが必要となるため、例えば製品間差において±５％程度のばらつきがあるとすると、これに温度変化を考慮すると±１０％程度のばらつきが生じる場合があり、このようなコンデンサ９の容量のばらつきが絶縁状態の検出精度を低下させてしまうことになる。加えて、経時変化による部品定数の変化によって生じるばらつきなども絶縁状態の検出精度を低下させてしまうことになる。
【００５２】
これに対して本実施形態の絶縁検出装置１では、絶縁検出のサイクルの最初の段階で第１スイッチＳ１と第２スイッチＳ２を、コンデンサ９を完全に充電するのに要する時間よりも短い第１閉路時間Ｔ１の間閉路することにより、電源３の電源電圧を推定している。第１スイッチＳ１と第２スイッチＳ２を短時間閉路してコンデンサ９を充電する場合は、実際のコンデンサ９の容量と抵抗Ｒ１の抵抗値とで決定される時定数Ｃ・Ｒ１で充電されるときの充電到達電圧を推定する方式であるため、推定した電源電圧Ｖ０ｓは、実際の電源３の電源電圧ではなく、コンデンサ９と抵抗Ｒ１の容量及び抵抗値の誤差、つまりばらつきを含んだ値となる。そして、このばらつきを含む推定した電源電圧Ｖ０ｓを、絶縁検出のサイクルにおける以降に続くステップで行う正端子側の地絡抵抗Ｒｐ、負端子側の地絡抵抗Ｒｎの演算に用いることで、コンデンサ９の容量のばらつきに対する補正が行われ、コンデンサ９の容量のばらつきによって生じる実際の正端子側地絡抵抗Ｒｐ及び負端子側地絡抵抗Ｒｎの値と、算出した正端子側地絡抵抗Ｒｐ及び負端子側地絡抵抗Ｒｎの値との誤差を低減することができる。したがって、絶縁状態の検出精度を向上できる。
【００５３】
このような本実施形態の絶縁検出装置１によって計測した正端子側の地絡抵抗Ｒｐ及び負端子側の地絡抵抗Ｒｎの値と、実際の正端子側の地絡抵抗Ｒｐ及び負端子側の地絡抵抗Ｒｎの値との誤差をある所定の規格容量を有するコンデンサ９、そしてある所定の規格抵抗値を有する第１抵抗Ｒ１を用いた場合を想定して計算した結果を図１１に示す。なお、コンデンサ９は、製品間差と温度変化を考慮して±１０％程度の容量のばらつきが、第１抵抗Ｒ１は、製品間差と温度変化を考慮して±２％程度の容量のばらつきがあるものとする。図１１において、Ｖ０計測時間は、第１閉路時間Ｔ１を意味し、したがって、第１閉路時間Ｔ１をｔ秒、２ｔ秒、そして３ｔ秒、ただしｔ＜２ｔ＜３ｔとした場合の計測誤差を示している。なお、図１１は、縦軸を検出精度つまり検出誤差、横軸を地絡抵抗の値として計算結果をグラフ化したものである。
【００５４】
図１１からわかるように、従来の絶縁検出装置で検出した場合、つまり補正無しの場合に比べて、本実施形態の絶縁検出装置１で検出した場合、つまり補正ありの場合の方が各地絡抵抗値に対して計測誤差が低減されている。さらに、Ｖ０計測時間つまり第１閉路時間Ｔ１の設定によって計測誤差の低減度合いが異なっており、第１閉路時間Ｔ１がｔ秒のときには、地絡抵抗が小さくなるにしたがって誤差が大きくなるが、地絡抵抗が大きくなるにしたがって誤差が小さくなっている。第１閉路時間Ｔ１が２ｔ秒のときには、地絡抵抗が大きい場合には、第１閉路時間Ｔ１がｔ秒のときよりも誤差が大きくなるが、各地絡抵抗にわたって平均的に誤差が小さくなっている。第１閉路時間Ｔ１が３ｔ秒のときにも各地絡抵抗にわたって平均的に誤差が小さくなっているが、誤差は、第１閉路時間Ｔ１が２ｔ秒のときよりも大きい。
【００５５】
したがって、絶縁不良を判定する地絡抵抗の値の設定を比較的大きな値とする場合には、第１閉路時間Ｔ１をｔ秒とするのが好ましく、絶縁不良を判定する地絡抵抗の値の設定を比較的小さな値とする場合には、第１閉路時間Ｔ１を２ｔ秒とするのが好ましい。このように、第１閉路時間Ｔ１つまり第１の設定時間は、絶縁不良を判定する地絡抵抗の値周辺で計測誤差が小さくなるように選択するのが好ましい。例えば、図１１において絶縁不良を判定する地絡抵抗の値をＲΩに設定したとすれば、第１閉路時間Ｔ１として２ｔ秒を選択するのが好ましく、このとき、従来の絶縁検出装置では±１０％以上の計測誤差があるのに対し、本実施形態の絶縁検出装置１では、±２％以下の計測誤差となり、絶縁状態の検出精度を向上できることになる。
【００５６】
ところで、図２に示すステップ１０３の個別スイッチ異常検出過程における第２スイッチの異常検出では、ショート状態になっているといった異常が第２スイッチに発生している場合、図６に示すように、第１スイッチＳ１を閉路することによってコンデンサ９が充電される。したがって、この後、第４のスイッチング手段の作動によって第３及び第４スイッチＳ３、Ｓ４が閉路すると、マイコン１１のＡ／Ｄポートにコンデンサ９の両端子間電圧に対応する電圧が印加され、マイコン１１でコンデンサ９の両端子間電圧に対応する電圧が検出されることから第２スイッチＳ２の異常を検出できる。
【００５７】
しかし、図１からわかるように、第２スイッチＳ２に異常が有りショート状態にある場合、正端子側地絡抵抗Ｒｐの値が接地電位に近くなるに連れて、第４のスイッチング手段が作動して第３及び第４スイッチＳ３、Ｓ４が閉路したときにマイコン１１のＡ／Ｄポートに印加される電圧は、接地電位に近づくことになる。したがって、絶縁不良が生じているとき、つまり正端子側地絡抵抗Ｒｐの値が基準抵抗値よりも低いときには、第２スイッチＳ２に異常が発生していても、図４に示すように、マイコン１１で異常の発生を判断するような電圧は検出されず、第２スイッチＳ２の異常を検出できない場合がある。
【００５８】
これに対して、本実施形態の絶縁検出装置１では、判定時間ｈの間繰り返し行ったステップ１０１の電源電圧推定過程で得た推定した電源電圧Ｖ０ｓにほとんど変化が無いことから第２スイッチＳ２の異常を検出できる。すなわち、推定した電源電圧が判定電圧以下であっても、例えば電源の立ち上がり時などである場合には、ステップ１０１の電源電圧推定過程で得た推定した電源電圧Ｖ０ｓは、上昇し始めるが、絶縁不良のときに第２スイッチＳ２に異常がある場合には、ステップ１０１の電源電圧推定過程で得た推定した電源電圧Ｖ０ｓは上昇しない。したがって、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合でも、第２のスイッチ部の異常を検出できる。
【００５９】
さらに、図１からわかるように、第２スイッチＳ２に異常が発生してショート状態にある場合、正端子側地絡抵抗Ｒｐの値が接地電位に近くなるに連れて、第４のスイッチング手段が作動して第３及び第４スイッチＳ３、Ｓ４が閉路したとき、第４抵抗Ｒ４に印加される電圧は電源３の電源電圧に近くなる。したがって、推定した電源電圧Ｖ０ｓが判定電圧以下で、第２スイッチＳ２の異常を検出するためにステップ１０１の電源電圧推定過程が繰り返し行われるとき、コンマ数秒といった通常の周期Ｐ１で第３スイッチＳ３が断続的に閉路する。これにより、正端子側地絡抵抗Ｒｐの値が接地電位に近くなるに連れて、第４抵抗Ｒ４にかかるストレスが増大し、第４抵抗Ｒ４が破損する可能性がある。
【００６０】
これに対して、本実施形態の絶縁検出装置１では、ステップ１０１の電源電圧推定過程で得た推定した電源電圧Ｖ０ｓが判定電圧以下であることを検出した場合、電圧検出手段であるマイコン１１のＡ／Ｄデータの読み込み周期を、電源の電源電圧が正常の場合の第４のスイッチング手段の作動周期Ｐ１から、周期Ｐ１よりも長い周期Ｐ２に変更する。したがって、第４抵抗Ｒ４に電源電圧に近い電圧が印加される周期が長くなり、第４抵抗Ｒ４にかかるストレスを低減できる。すなわち、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合の第２のスイッチ部の異常検出動作によって回路を構成する部品にかかるストレスを低減できる。
【００６１】
また、第２スイッチＳ２以外のスイッチＳ１、Ｓ３、Ｓ４などの異常の検出方法は、本実施形態のステップ１１３の異常検出方法に限らず様々な異常検出方法を用いることができる。
【００６２】
また、本実施形態では、正端子側の地絡抵抗Ｒｐと負端子側の地絡抵抗Ｒｎを個別に算出し、これにより絶縁不良の部位も検出できるようにしている。しかし、絶縁不良の部位を検出せず絶縁不良の発生のみを判定する場合などには、推定した電源電圧Ｖ０ｓと検出電圧ＶＣＰ、ＶＣＮなどとに基づいて正端子側の地絡抵抗Ｒｐと負端子側の地絡抵抗Ｒｎとを代表する地絡抵抗値などを算出する別の式を用いることもできる。
【００６３】
また、本実施形態の絶縁検出装置１では、演算手段となるマイコン１１によって式（１）や式（２）、（３）によって推定した電源電圧Ｖ０ｓや地絡抵抗値Ｒｎ、Ｒｐを演算している。しかし、これらの式（１）や式（２）、（３）といった複雑な関数式の演算にかかる時間を短縮するため、マイコン１１の記憶手段となるメモリなどにアドレスに対応させて推定した電源電圧Ｖ０ｓや地絡抵抗値Ｒｎ、Ｒｐなどを記憶した電源電圧用データテーブルや地絡抵抗値用データテーブルなどを準備し、演算手段であるマイコン１１で各々のデータテーブルに対応したアドレスを演算する構成にすることもできる。このとき、演算手段であるマイコン１１は、電源電圧を推定するために検出したコンデンサ９の両端子間電圧ＶＣの値つまり検出電圧Ｖ０、推定した電源電圧Ｖ０ｓ及び地絡抵抗値Ｒｎ、Ｒｐを求めるために検出したコンデンサ９の両端子間電圧ＶＣの値つまり検出電圧ＶＣＮ、ＶＣＰなどから、式（１）や式（２）、（３）よりも簡単なアドレスの演算式により、各々電源電圧用データテーブルのアドレス、地絡抵抗値用データテーブルのアドレスを算出し、この算出した各々のアドレスから推定した電源電圧Ｖ０ｓや地絡抵抗値Ｒｎ、Ｒｐを決定する。
【００６４】
また、第５スイッチＳ５を含むバイパス手段としては、本実施形態の構成に限らず、バイパス手段は、図１２に示すように、第２抵抗Ｒ２の両端子間に、第２抵抗Ｒ２と並列に第５スイッチＳ５が接続されている構成にすることもできる。また、絶縁検出のための１サイクルに要する時間の短縮などの必要性がない場合などには、第５スイッチＳ５を含むバイパス手段を設けない構成にすることもできる。
【００６５】
また、本発明は、本実施形態において示した回路構成に限らず、正端子側及び負端子側の配線が接地電位部から絶縁された直流電源にコンデンサを直列に第１の設定時間の間接続する第１のスイッチング手段、電源の正端子と接地電位部との間に前記コンデンサを直列に第２の設定時間の間接続する第２のスイッチング手段、電源の負端子と接地電位部との間にコンデンサを直列に第２の設定時間の間接続する第３のスイッチング手段、第１、第２及び第３の各スイッチング手段の遮断後にコンデンサの両端子間の電圧を検出する検出手段を接続する第４のスイッチング手段などをそなえていれば様々な回路構成の絶縁検出装置に適用することができる。
【００６６】
【発明の効果】
本発明によれば、絶縁状態に異常がありかつ第２のスイッチ部に異常がある場合でも、第２のスイッチ部の異常を検出できる。
【図面の簡単な説明】
【図１】本発明を適用してなる絶縁検出装置の一実施形態の概略構成を示す図である。
【図２】本発明を適用してなる絶縁検出装置の一実施形態の絶縁抵抗計測の動作を示すフロー図である。
【図３】本発明を適用してなる絶縁検出装置の一実施形態の電源電圧推定過程の動作を示すフロー図である。
【図４】電源電圧正常時及び異常時の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【図５】判定電圧と推定した電源電圧との関係及びマイコンのＡ／Ｄデータの読み込み周期を説明する図であり、（ａ）は電源の立ち上がり時を、（ｂ）は絶縁不良が発生しているときの第２スイッチ異常時を示す図である。
【図６】第２スイッチの異常検出過程の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【図７】第１スイッチの異常検出過程の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【図８】第３スイッチの異常検出過程の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【図９】第４スイッチの異常検出過程の各スイッチ部の動作に対するコンデンサの充放電状態と電圧の読み込みタイミングを示すタイムチャートである。
【図１０】本発明を適用してなる絶縁検出装置の一実施形態の絶縁抵抗計測過程の動作を示すフロー図である。
【図１１】絶縁抵抗の値に対する各電源電圧の計測時間で検出した絶縁抵抗の値の検出誤差を示す図である。
【図１２】本発明を適用してなる絶縁検出装置の変形例の概略構成を示す図である。
【符号の説明】
１ 絶縁検出装置
３ 電源
５ａ 正側主回路配線
５ｂ 負側主回路配線
７ 接地電位部
９ コンデンサ
１１ マイコン
Ｓ１ 第１スイッチ
Ｓ２ 第２スイッチ
Ｓ３ 第３スイッチ
Ｓ４ 第４スイッチ
Ｒｐ 正端子側地絡抵抗
Ｒｎ 負端子側地絡抵抗[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an insulation detection device for an ungrounded power supply, and more particularly to an insulation detection device suitable for an ungrounded DC power supply mounted on a vehicle that uses electric propulsion.
[0002]
[Prior art]
The insulation detection device of the ungrounded power supply is connected to the positive and negative terminals of the ungrounded DC power supply, and is insulated from the ground potential part by the insulation resistance to the ground potential part of the main circuit wiring on the positive and negative sides, that is, the ground fault resistance. Is detected to detect insulation with respect to the ground potential portion and a ground fault state (for example, see Patent Document 1). In such a conventional insulation detection device, switching means for connecting a capacitor in series between a positive terminal of an ungrounded DC power supply and a ground potential section for a set time, a negative terminal of an ungrounded power supply and a ground potential section A switching means for connecting a capacitor in series for a set time, a switching means for detection connecting a detection means for detecting a voltage between both terminals of the capacitor after each switching means is cut off, Calculation means for obtaining an insulation resistance to a ground potential portion of a power supply, that is, a ground fault resistance, based on a voltage between both terminals of the capacitor after the switching means is cut off and a power supply voltage previously calculated by fully charging the capacitor. And detects and determines the insulation state from the ground fault resistance obtained by the calculation means.
[0003]
In such an insulation detection device, when obtaining the ground fault resistance, an expression including the capacitance of the capacitor as a constant is used. However, the capacitance of the capacitor used as the constant includes a capacitance due to variation in capacitance between products and a temperature change. In some cases, and there is also a case where a change over time in the capacity or the like occurs. If the values used as constants vary or change in this way, the measurement error between the obtained ground fault resistance value and the actual ground fault resistance value increases, and the insulation state detection accuracy decreases. I will. Therefore, it is desirable to reduce the measurement error of the ground fault resistance as much as possible and to improve the detection accuracy of the insulation state, even if there are variations or changes in the values used as constants for obtaining the ground fault resistance such as the capacitance of the capacitor. ing.
[0004]
Therefore, the inventors of the present application provide first switching means for connecting a capacitor in series for a first set time to a DC power supply in which the wiring on the positive terminal side and the wiring on the negative terminal side are insulated from the ground potential portion; Second switching means for connecting a capacitor in series between the positive terminal and the ground potential for a second set time, and second setting in series for a capacitor between the negative terminal of the power supply and the ground potential A third switching means connected for a time, a fourth switching means connected to a voltage detecting means for detecting a voltage between both terminals of the capacitor after the first, second and third switching means are cut off; The power supply voltage of the power supply is estimated based on the voltage detected by the voltage detection means after the first switching means has been cut off, and the estimated power supply voltage and each of the voltages detected by the detection means after the second and third switching means have been cut off. Detection voltage Contemplates insulation detecting device of the configuration and an arithmetic means for obtaining the insulation resistance to ground potential of the power based on.
[0005]
Further, at this time, the first switching unit includes a first switch unit connected to a positive terminal of the power supply and a second switch unit connected to a negative terminal of the power supply, and the third switching unit includes: A second switch unit; and a third switch unit connected in series to the first switch, wherein second switching means is connected in series to the first switch unit and the second switch unit. A fourth switch unit, wherein the fourth switching means includes a third switch unit and a fourth switch unit, and a second switch unit is provided between the first switch unit and the third switch unit. A first diode, a first resistor, and a capacitor that rectify in the direction from the positive side to the negative side are connected in series between the switch unit S2 and the fourth switch unit. 1 in parallel with the first diode A second diode and a second resistor, which are rectified to each other, are connected in series, the detection means is connected between the third switch section and the fourth switch section, and the detection section is connected between the detection means and the fourth switch section. Is grounded to a ground potential portion.
[0006]
With the insulation detection device having such a configuration, the DC power supply and the ground potential unit are connected by the first switching means for a first set time set in a time shorter than the time required for completely charging the capacitor. During this time, the capacitor is connected to DC and charged. At this time, the voltage between both terminals of the capacitor is detected by the voltage detecting means connected by the fourth switching means, and the calculating means estimates the power supply voltage from the detected voltage, and this power supply voltage is compared with the second and the third power supply voltage. By obtaining the insulation resistance with respect to the ground potential portion based on the voltage detected by the voltage detection unit after the switching unit is shut off, the measurement error of the insulation resistance can be reduced and the detection accuracy of the insulation state can be improved.
[0007]
Here, in such an insulation detecting device, if an abnormality occurs in each switching means, an erroneous ground fault resistance value is obtained. For this reason, the inventors of the present application have considered a configuration including an abnormality detection unit that detects an abnormality of each switching unit. When the switching means includes two switch units, that is, parts to be switches, as described above, for example, after the second switch unit is closed for a predetermined time, the abnormality detection unit performs the fourth switching operation. An abnormality of the first switch unit is determined based on the voltage detected by the voltage detection unit when the unit is closed, and only the first switch unit is closed for a preset time, and then the fourth switching unit is closed. An abnormality of the second switch unit is determined based on the voltage detected by the voltage detection unit when the circuit is closed, and after closing the first switching unit for a preset time, the third switch unit is shut off and the second switch unit is closed. After determining the abnormality of the third switch unit based on the voltage detected by the voltage detection unit when the switch unit is closed, and closing the first switching unit for a preset time, The abnormality of each of the switches is detected by detecting the abnormality of the fourth switch on the basis of the voltage detected by the voltage detecting means when the switch is closed and the fourth switch is cut off. .
[0008]
[Patent Document 1]
JP-A-8-226950 (page 4-7, FIG. 1)
[Problems to be solved by the invention]
By the way, in the insulation detection device considered by the present inventors as described above, when the second switch unit and the fourth switch unit are closed, the second switch unit and the fourth switch unit are grounded. A circuit is formed in series with a power supply via a potential section. For this reason, in a state where the insulation state is abnormal and the insulation resistance is lower than the reference resistance value, the second switch section has an abnormality and the second switch section is in a closed state or short-circuited. In this case, when the fourth switching means is closed and the voltage between both terminals of the capacitor is detected in order to detect the abnormality of the second switch section, the voltage detecting means detects a voltage higher than the voltage between both terminals of the capacitor. Only low voltages are applied.
[0009]
However, the abnormality detection means of the insulation detection device considered by the inventors of the present application is such that when an abnormality occurs in the second switch section, a voltage that is not detected if the second switch section is normal is detected by voltage detection. Since the abnormality of the second switch unit is determined by the detection by the means, if the insulation state is abnormal and the second switch unit is abnormal, the abnormality of the second switch unit is determined. In some cases, detection may not be possible.
[0010]
An object of the present invention is to detect an abnormality in the second switch unit even when the insulation state is abnormal and the second switch unit is abnormal.
[0011]
[Means for Solving the Problems]
The insulation detection device for an ungrounded power supply according to the present invention includes a capacitor connected in series to a DC power supply in which the wiring on the positive terminal side and the wiring on the negative terminal side are insulated from the ground potential portion, and the time shorter than the time required for the capacitor to be fully charged. A first switching means connected for one set time; a second switching means connected in series between a positive terminal of the power supply and a ground potential for a second set time; A third switching means for connecting a capacitor in series between the terminal and the ground potential section for a second set time, and a third switching means for connecting the first, second and third switching means between both terminals of the capacitor. A power supply voltage of a power supply is estimated based on a voltage detected by the fourth switching means for connecting a voltage detection means for detecting a voltage, and the voltage detection means after the first switching means is cut off. No. A calculating means for obtaining an insulation resistance of the power supply with respect to a ground potential portion based on the detection voltages obtained by the detecting means after the third switching means is cut off; and a first, second, third and fourth switching means. Abnormality detecting means for detecting an abnormality that has occurred, wherein the first switching means includes a first switch connected to a positive terminal of the power supply and a second switch connected to a negative terminal of the power supply. Wherein the third switching unit includes a second switch unit and a third switch unit connected in series to the first switch unit, and wherein the second switching unit includes a first switch unit; A fourth switch unit connected in series to the second switch unit, wherein the fourth switching means includes a third switch unit and a fourth switch unit, and the first switch unit and the third switch unit. Between the switch unit and the second switch. A first diode and a capacitor that rectify in a direction from the positive side to the negative side are connected in series between the switch section and the fourth switch section, and the first diode and the capacitor are connected in parallel with the first diode. A second diode that rectifies in the reverse direction is connected, the voltage detection means is connected between the third switch section and the fourth switch section, and the ground potential is connected between the voltage detection means and the fourth switch section. The first switching means is shut off when the abnormality detecting means detects that the power supply voltage of the power supply estimated by the arithmetic means is equal to or lower than a judgment voltage for judging the abnormality of the power supply voltage. The estimation of the power supply voltage of the power supply based on the voltage detected by the voltage detection means after that is repeated, and the abnormality detection means changes the power supply voltage value estimated when the estimation of the power supply voltage of the power supply is repeated for a preset determination time. When there is no change The above-mentioned problem is solved by adopting a configuration in which abnormality of the second switch section is determined.
[0012]
When the estimated power supply voltage is equal to or lower than the determination voltage for determining the abnormality of the power supply voltage, the first switching means is used when the power supply is normal but the power supply voltage is temporarily low, for example, when the power supply rises. When the estimation of the power supply voltage of the power supply based on the voltage detected by the voltage detection unit after turning off the power supply is repeated, the estimated power supply voltage starts to increase. However, when the insulation state is abnormal and the second switch unit is abnormal, the estimated power supply voltage does not increase even if the estimation of the power supply voltage of the power supply is repeated. Therefore, with such a configuration, even if the insulation state is abnormal and the second switch unit is abnormal, the abnormality of the second switch unit can be detected.
[0013]
By the way, when a part such as a resistor is installed between a part grounded to a ground potential part between the voltage detecting means and the fourth switch part and the fourth switch part, the second switch If the value of the insulation resistance becomes low when there is an abnormality in the part, the voltage applied to a component such as a resistor installed between the grounded part and the fourth switch part becomes close to the power supply voltage. Further, when the estimation of the power supply voltage of the power supply is repeatedly performed in order to detect the abnormality of the second switch section, every time the fourth switching means is operated and the fourth switch section is closed, the value of the insulation resistance is used. In this case, a voltage close to the power supply voltage is intermittently applied to components such as a resistor provided between the grounded portion and the fourth switch unit. Therefore, when the value of the insulation resistance decreases, the stress applied to this component increases, and in some cases, the component may be damaged. For this reason, it is necessary to reduce the stress applied to the components constituting the circuit by the abnormality detection operation of the second switch when the insulation state is abnormal and the second switch is abnormal.
[0014]
On the other hand, when the abnormality detection means detects that the power supply voltage of the power supply estimated by the calculation means is equal to or less than the determination voltage for determining the abnormality of the power supply voltage, the estimation of the power supply voltage of the power supply is repeated. The operation cycle of the fourth switching means is set to be longer than the operation cycle of the fourth switching means when the power supply voltage of the power supply is normal. With such a configuration, when there is a possibility that a voltage close to the power supply voltage is applied to a component such as a resistor provided between the grounded portion and the fourth switch portion, the fourth The operation cycle of the switching means, that is, the open / close cycle of the fourth switch unit, is longer than the cycle when the power supply voltage of the power supply is normal. For this reason, the stress applied to the components constituting the circuit can be reduced by the abnormality detection operation of the second switch when the insulation state is abnormal and the second switch is abnormal.
[0015]
Further, the abnormality detecting means closes only the second switch for the third set time, and then detects the first switch based on the voltage detected by the voltage detecting when the fourth switching is closed. Is determined, and only the first switch unit is closed for the fourth set time, and then the second switch unit is closed based on the voltage detected by the voltage detection unit when the fourth switching unit is closed. After judging an abnormality and closing the first switching means for a fifth set time, based on the voltage detected by the voltage detection means when the third switch is turned off and the fourth switch is closed. After the abnormality of the third switch is determined, the first switch is closed for a sixth set time, and then the third switch is closed and the fourth switch is turned off. Based on the detection voltage of A configuration for detecting an abnormality of the switch unit.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of an insulation detection device to which the present invention is applied will be described with reference to FIGS. FIG. 1 is a diagram showing a schematic configuration of an insulation detection device to which the present invention is applied. FIG. 2 is a flowchart showing an insulation resistance measuring operation of the insulation detection device to which the present invention is applied. FIG. 3 is a flowchart showing the operation of the power supply voltage estimation process in the insulation resistance measurement process of the insulation detection device according to the present invention. FIG. 4 is a time chart showing the charging / discharging state of the capacitor and the voltage reading timing with respect to the operation of each switch unit when the power supply voltage is normal and abnormal. 5A and 5B are diagrams for explaining the relationship between the determination voltage and the estimated power supply voltage and the reading cycle of the A / D data of the microcomputer. FIG. 5A shows the time when the power supply rises, and FIG. FIG. 8 is a diagram showing a second switch abnormality when the switch is on. FIG. 6 is a time chart showing the charging / discharging state of the capacitor and the timing of reading the voltage with respect to the operation of each switch unit in the abnormality detection of the second switch.
[0017]
FIG. 7 is a time chart showing the charging / discharging state of the capacitor and the voltage reading timing with respect to the operation of each switch unit when the abnormality of the first switch is detected. FIG. 8 is a time chart showing the charging / discharging state of the capacitor and the timing of reading the voltage with respect to the operation of each switch unit in the abnormality detection of the third switch. FIG. 9 is a time chart showing the charging / discharging state of the capacitor and the timing of reading the voltage with respect to the operation of each switch unit in the abnormality detection of the fourth switch. FIG. 10 is a flowchart showing the operation of the insulation resistance measuring process of the insulation detection device according to the present invention. FIG. 11 is a diagram illustrating a detection error of the insulation resistance value detected during the measurement time of each power supply voltage with respect to the insulation resistance value. In the time chart of FIG. 4, the detected voltage VC and the A / D conversion value in the individual switch abnormality detection process show a state where there is no abnormality in the switch, and in the time charts of FIGS. The detection voltage VC and the A / D conversion value in the detection process indicate a state when there is an abnormality in the switch.
[0018]
As shown in FIG. 1, the insulation detection device 1 of the present embodiment is applied to a DC power supply 3 serving as a power source of, for example, an electric propulsion vehicle that obtains propulsion using electric power. The power supply 3 is formed by connecting a plurality of storage batteries and the like in series. The positive main circuit wiring 5a on the positive terminal side and the negative main circuit wiring 5b on the negative terminal side of the power supply 3 are each connected to the ground potential unit 7, for example. The power supply 3 is insulated from the vehicle body and the like, and is a non-grounded power supply. The insulation detection device 1 includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a capacitor 9, a microcomputer 11 which also serves as a voltage detection unit and a calculation unit and determines an insulation state, and each switch. It is composed of a switching control circuit (not shown) that controls opening and closing according to the set time.
[0019]
Note that the microcomputer 11 of the present embodiment also functions as an abnormality detection unit that detects an abnormality of each switch such as the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4. Further, the voltage detection means, the calculation means, the abnormality detection means, the switching control circuit, and the like can be separately formed or integrally formed, for example, by including a switching control circuit (not shown) in the microcomputer 11 integrally. Further, the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 shown in FIG. 1 are typically formed by using, for example, a switch unit composed of components having various switch functions such as a relay and a semiconductor switch as a contact. This is shown in FIG.
[0020]
A first switch S1 and a third switch S3 are sequentially connected in series to the positive terminal of the power supply 3 from the positive terminal, and a second switch S2 and a second switch S2 are connected to the negative terminal of the power supply 3 from the negative terminal. The four switches S4 and the fourth resistor R4 are sequentially connected in series. A first diode D1, a first resistor R1, and a capacitor 9 are sequentially connected in series between the first switch S1 and the third switch S3 and between the second switch S2 and the fourth switch S4. A second diode D2 and a second resistor R2 are sequentially connected in series between the first resistor R1 and the capacitor 9 and between the first switch S1 and the third switch S3. That is, the first diode D1 and the first resistor R1, and the second diode D2 and the second resistor R2 are connected in parallel. As a bypass means, a fifth switch S5 and a fifth resistor R5 having a lower resistance than the second resistor R2 are sequentially connected in series from a portion between the second diode D2 and the second resistor R2 to the ground potential section 7. It is connected. The first diode D1 rectifies in the direction from the positive side to the negative side, and the second diode D2 rectifies in the direction opposite to the first diode D1.
[0021]
A third resistor R3 is connected between the third switch S3 and the fourth resistor R4 in series with the third switch S3 and the fourth resistor R4, and is connected between the third switch S3 and the third resistor R3. Is connected to the microcomputer 11 via an analog / digital conversion port of the microcomputer 11, that is, an A / D port. Further, a portion between the third resistor R3 and the fourth resistor R4 is grounded to the ground potential section 7.
[0022]
Accordingly, the first switching means for connecting the capacitor 9 in series with the power supply 3 for the first set time is a first switch S1, a second switch S2, a switching control circuit (not shown), and the like. A second switching means for connecting a capacitor 9 in series between the terminal and the ground potential unit 7 for a second set time includes a first switch S1, a fourth switch S4, a switching control circuit (not shown), and the like. The third switching means for connecting a capacitor 9 in series between the ground potential unit 7 and the negative terminal of the power supply 3 for a second set time includes a second switch S2, a third switch S3, and not shown. In a switching control circuit or the like, the fourth switching means is formed by a third switch S3, a fourth switch S4, a switching control circuit (not shown), and the like. The capacitor 9 has a relatively high capacitance of, for example, several μF, and the first resistor R1 and the second resistor R2 have a relatively high resistance of, for example, several hundred kΩ. .
[0023]
The operation of the insulation detecting device having such a configuration and the features of the present invention will be described. When starting the measurement of the insulation state, the insulation detection device 1 of this embodiment performs a power supply voltage estimation process for estimating the power supply voltage of the power supply 3 as shown in FIG. 2 (step 101). In step 101, as shown in FIG. 3 and FIG. 4, when the power supply voltage estimation process is started, a switching control circuit (not shown) switches the first switch S1 and the second switch S2 to a first closed circuit for a first set time. The circuit is closed during the time T1 (step 201). That is, the first switching means forms a circuit for connecting the capacitor 9 in series to the power supply 3 without passing through the ground potential unit 7, and the capacitor 9 is charged during the first closed time T1, and the capacitor 9 is charged. 9, the voltage VC between both terminals increases. The first closing time T1 is set to a time shorter than the time required to completely charge the capacitor 9, and is, for example, 1/5 to 1 to 1 times the time required to completely charge the capacitor 9. / 10, and the first closing time T1 is selected according to the required measurement error range of the insulation resistance.
[0024]
In step 201, when the first closing time T1 elapses, the first switch S1 and the second switch S2 are opened or cut off, and after the lapse of a predetermined time tw1 shorter than the first closing time T1, the third switch S3 and the fourth switch S4. Is closed (step 203). That is, the fourth switching means forms a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and includes the second resistor R2, the third resistor R3, and the fourth resistor R4. A discharge circuit from the capacitor 9 is formed, and the voltage VC between both terminals of the capacitor 9 drops. Here, the microcomputer 11 reads the A / D conversion data via the A / D port, that is, the voltage VC between both terminals of the capacitor 9 (Step 205). Based on the value of the voltage VC between both terminals of the capacitor 9 at this time, that is, the detected voltage V0, the estimated power supply voltage V0s is calculated from the following equation (1) (step 207).
V0s = V0 / (1−EXP (−T1 / C · R1)) (1)
In the equation (1), T1 is the closing time of the first switch S1 and the second switch S2, C is the capacitance of the capacitor 9, and R1 is the resistance value of the first resistor R1.
[0025]
On the other hand, the switching control circuit (not shown) detects the voltage VC between both terminals of the capacitor 9 in step 205 and then closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed. By bypassing the second resistor R2, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After the fifth switch S5 is closed and a predetermined time td1 shorter than the first closed time T1 has elapsed, the fifth switch S5 is opened or shut off, and then the microcomputer 11 outputs the A / D converted data via the A / D port. That is, the voltage VC between both terminals of the capacitor 9 is read, and it is confirmed that the voltage VC is 0 V (step 209).
[0026]
After the power supply voltage estimation process in step 101, as shown in FIG. 2, the power supply voltage V0s estimated in step 101 is compared with a determination voltage set in advance to detect an abnormality in the power supply voltage. An abnormality in the power supply voltage of the power supply 3 is determined (step 103). In step 103, when the power supply voltage V0s estimated in step 101 is equal to or lower than the determination voltage as shown in FIG. 5 and the power supply voltage is determined to be abnormal, as shown in FIG. A determination is made (step 105). In step 105, if the power supply voltage does not fluctuate as shown in FIG. 5, as shown in FIG. 2, the read cycle of A / D conversion data in the power supply voltage estimation process in step 101, that is, A / D conversion The cycle for closing the third switch S3 and the fourth switch S4 linked to the data reading, in other words, the cycle for operating the fourth switching means, is set when the power supply voltage is normal, or when the power supply voltage fluctuates in step 105. Is changed to a period P2 longer than the reading period P1 of the A / D conversion data when the data is read (step 107). The cycle P2 is set to an order of several seconds, whereas the cycle P1 is several seconds in the comma.
[0027]
After changing the read cycle of the A / D conversion data in step 107, as shown in FIGS. 2 and 5, it is determined whether or not the determination time h has elapsed (step 109). If not, the process returns to step 101. Therefore, when the power supply voltage V0s is equal to or lower than the determination voltage as shown in FIG. 5B and the power supply voltage V0s hardly changes, as shown in FIG. 2, steps 101 to 109 are performed until the determination time h elapses. repeat. At this time, the read cycle of the A / D conversion data in step 107 is changed only for the first time, and in the cycle in which steps 101 to 109 are repeated until the determination time h elapses, step 107 is skipped and the read of the A / D conversion data is performed. The cycle is not changed. For this reason, the power supply voltage estimation process in step 101 in the cycle in which steps 101 to 109 are repeated is performed in cycle P2.
[0028]
When the determination time h elapses in step 109, the power supply voltage V0s hardly fluctuates during the determination time h, and the microcomputer 11 serving as the abnormality detection means remains in a state in which S2 remains closed due to a failure. It is determined that there is an abnormality such as a short-circuit failure or the like (step 111). For example, the measurement of the insulation resistance value is stopped, and the abnormality of the second switch S2 is notified by an alarm or the like. The determination time h is set to an order such as several minutes while the period P2 is several seconds. Further, the determination time h is determined according to a time until the power supply voltage reaches the rated voltage when the use of the power supply 3 is started, that is, according to a rise time of the power supply voltage.
[0029]
On the other hand, when the power supply voltage V0s rises as shown in FIG. 5A in the cycle in which steps 101 to 109 are repeated, it is determined in step 105 that the power supply voltage V0s of the power supply 3 has changed. , The second switch S2, the third switch S3, and the fourth switch S4 individually detect abnormalities (step 113). As can be seen from the configuration of the insulation detection device 1 and the operation of detecting the insulation resistance, the estimated power supply voltage V0s is used when the switches S1, S2, S3, and S4 have an abnormality such as a short circuit. Also show abnormal values. Therefore, if it is determined in step 103 that the power supply voltage is abnormal, it is considered that the power supply voltage is abnormal or the switch unit is abnormal. Therefore, the cause of the abnormality is determined, and the abnormality when the switch unit is abnormal is determined. In order to identify a certain switch unit, an individual switch abnormality detection step 113 for individually inspecting each of the switches S1, S2, S3, and S4 is performed.
[0030]
In the abnormality detection of the second switch, as shown in FIG. 4, the first switch S1 is closed for a first closing time T1, which is a first set time, for example, in a state where the other switches are shut off. At this time, if there is no abnormality in the second switch S2, a circuit for connecting the capacitor 9 in series to the power supply 3 is not formed, and the voltage VC between both terminals of the capacitor 9 does not increase. After the lapse of the first closing time T1, the third switch S3 and the fourth switch S4 are closed after a lapse of a predetermined time tw1 shorter than the first closing time T1. That is, the fourth switching means forms a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and the capacitor including the second resistor R2, the third resistor R3, and the fourth resistor R4. 9 to form a discharge circuit. Here, when the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, the voltage is not detected by the microcomputer 11 because the capacitor 9 is not charged. Since the voltage is not detected by the microcomputer 11, the microcomputer 11 as the abnormality detecting means determines that the second switch S2 has no abnormality.
[0031]
Thereafter, the switching control circuit (not shown) closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed after the microcomputer 11 detects the voltage VC between both terminals of the capacitor 9 by the microcomputer 11. To bypass the second resistor R2. As a result, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After the fifth switch S5 is closed and a predetermined time td1 shorter than the first closed time T1 has elapsed, the fifth switch S5 is opened or shut off, and then the microcomputer 11 outputs the A / D converted data via the A / D port. That is, the voltage VC between both terminals of the capacitor 9 is read, and it is confirmed that the voltage VC is 0 V. Then, the process proceeds to the first switch abnormality detecting step 107.
[0032]
On the other hand, if there is an abnormality such as the second switch S2 being in a closed state or a short circuit state due to a failure or the like, a circuit in which the capacitor 9 is connected in series to the power supply 3 is formed, and as shown in FIG. During the first closing time T1, the capacitor 9 is charged, and the voltage VC between both terminals of the capacitor 9 increases. Therefore, when the switch S3 and the fourth switch S4 are closed and the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, the capacitor 9 is charged due to the abnormality of the second switch S2. Therefore, the microcomputer 11 detects a voltage corresponding to the voltage VC between both terminals of the capacitor 9. When the voltage corresponding to the voltage VC between both terminals of the capacitor 9 is detected, the microcomputer 11 as the abnormality detecting means determines that the second switch S2 is abnormal, and stops measuring the insulation resistance value, for example. Notify an abnormality by alarm.
[0033]
In the abnormality detection of the first switch, as shown in FIG. 4, the second switch S2 is closed, for example, for a first closing time T1, which is a first set time, while the other switches are shut off. At this time, if there is no abnormality in the first switch S1, a circuit for connecting the capacitor 9 to the power supply 3 in series is not formed, and the voltage VC between both terminals of the capacitor 9 does not increase. After the lapse of the first closing time T1, the third switch S3 and the fourth switch S4 are closed after a lapse of a predetermined time tw1 shorter than the first closing time T1. That is, the fourth switching means forms a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and the capacitor including the second resistor R2, the third resistor R3, and the fourth resistor R4. 9 to form a discharge circuit. Here, when the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, the voltage is not detected by the microcomputer 11 because the capacitor 9 is not charged. Since the voltage is not detected by the microcomputer 11, the microcomputer 11 as the abnormality detecting means determines that the first switch S1 has no abnormality.
[0034]
Thereafter, the switching control circuit (not shown) closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed after the microcomputer 11 detects the voltage VC between both terminals of the capacitor 9 by the microcomputer 11. To bypass the second resistor R2. As a result, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After the fifth switch S5 is closed and a predetermined time td1 shorter than the first closed time T1 has elapsed, the fifth switch S5 is opened or shut off, and then the microcomputer 11 outputs the A / D converted data via the A / D port. That is, the voltage VC between both terminals of the capacitor 9 is read, and it is confirmed that the voltage VC is 0V.
[0035]
On the other hand, when there is an abnormality such as the first switch S1 being in a closed state or a short-circuit state due to a failure or the like, a circuit in which the capacitor 9 is connected in series to the power supply 3 is formed, and as shown in FIG. During the first closing time T1, the capacitor 9 is charged, and the voltage VC between both terminals of the capacitor 9 increases. Therefore, when the switch S3 and the fourth switch S4 are closed and the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, the capacitor 9 is charged due to the abnormality of the first switch S1. Therefore, the microcomputer 11 detects a voltage corresponding to the voltage VC between both terminals of the capacitor 9. When the voltage corresponding to the voltage VC between both terminals of the capacitor 9 is detected, the microcomputer 11 as the abnormality detecting means determines that the first switch S1 is abnormal, and stops measuring the insulation resistance value, for example. Notify an abnormality by alarm.
[0036]
The abnormality detection of the third switch and the abnormality detection of the fourth switch are performed in one process in the present embodiment. In the abnormality detection of the third switch and the fourth switch, as shown in FIG. 4, the first switch S1 and the second switch S2 are set to a first closed time T1 which is, for example, a first set time while the other switches are shut off. Closed during That is, a circuit for connecting the capacitor 9 in series with the power supply 3 is formed by the first switching means, and the capacitor 9 is charged during the first closing time T1. As a result, the voltage VC between both terminals of the capacitor 9 increases. After the lapse of the first closing time T1, the fourth switch S4 is closed with the third switch S3 shut off in order to detect the abnormality of the third switch S3 after the lapse of a predetermined time tw1 shorter than the first closing time T1. .
[0037]
At this time, if there is no abnormality in the third switch S3, a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and a second resistor R2, a third resistor R3, and a fourth resistor R4 are included. No discharge circuit from the capacitor 9 is formed. Here, when the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, no voltage is applied to the A / D port of the microcomputer 11 and the microcomputer 11 does not detect the voltage. Since the voltage is not detected by the microcomputer 11, the microcomputer 11 as the abnormality detecting means determines that the third switch S3 has no abnormality.
[0038]
Subsequently, after a predetermined time tw1 has elapsed since the third switch S3 was closed and the third switch S3 was closed, in order to detect an abnormality of the fourth switch S4, the fourth switch S3 was closed and the fourth switch S3 was closed. Cut off S4. At this time, if there is no abnormality in the fourth switch S4, a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and a second resistor R2, a third resistor R3, and a fourth resistor R4 are included. No discharge circuit from the capacitor 9 is formed. Here, when the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, no voltage is applied to the A / D port of the microcomputer 11 and the microcomputer 11 does not detect the voltage. Since the voltage is not detected by the microcomputer 11, the microcomputer 11 as the abnormality detecting means determines that the fourth switch S4 has no abnormality.
[0039]
Thereafter, the switching control circuit (not shown) reads the data at the A / D port of the microcomputer 11 and then closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed. The second resistor R2 is bypassed. As a result, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After the fifth switch S5 is closed and a predetermined time td1 shorter than the first closed time T1 has elapsed, the fifth switch S5 is opened or shut off, and then the microcomputer 11 outputs the A / D converted data via the A / D port. That is, the voltage VC between both terminals of the capacitor 9 is read, and it is confirmed that the voltage VC is 0V. Proceed to the insulation resistance measurement step 113.
[0040]
On the other hand, if there is an abnormality such as the third switch S3 being in a closed state or a short-circuit state due to a failure or the like, a circuit is formed in which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is formed, and , The second resistor R2, the third resistor R3, and the fourth resistor R4. Therefore, when the microcomputer 11 reads the voltage VC between both terminals of the capacitor 9 via the A / D port, as shown in FIG. 8, the abnormality of the third switch S3 causes the A / D port of the microcomputer 11 to connect the capacitor 9 to the A / D port. Since the voltage VC between both terminals is applied, the microcomputer 11 detects a voltage corresponding to the voltage VC between both terminals of the capacitor 9. When the voltage corresponding to the voltage VC between both terminals of the capacitor 9 is detected, the microcomputer 11 as the abnormality detecting means determines that the third switch S3 is abnormal, and stops measuring the insulation resistance value, for example. Notify an abnormality by alarm.
[0041]
Further, when there is an abnormality such as the fourth switch S4 being closed or short-circuited due to a failure or the like, a circuit is formed in which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is formed, and , The second resistor R2, the third resistor R3, and the fourth resistor R4. Therefore, when the microcomputer 11 reads the voltage VC between the two terminals of the capacitor 9 through the A / D port, as shown in FIG. 9, the abnormality of the fourth switch S4 causes the capacitor 9 to be connected to the A / D port of the microcomputer 11. Since the voltage VC between both terminals is applied, the microcomputer 11 detects a voltage corresponding to the voltage VC between both terminals of the capacitor 9. When the voltage corresponding to the voltage VC between both terminals of the capacitor 9 is detected, the microcomputer 11 as the abnormality detecting means determines that the fourth switch S4 is abnormal, and stops measuring the insulation resistance value, for example. Notify an abnormality by alarm.
[0042]
FIGS. 8 and 9 are diagrams different from FIG. 4 in a case where the abnormality detection of the third switch and the abnormality detection of the fourth switch are individually performed. , The third switch S3 and the fourth switch S4 are simultaneously closed, and then only the third switch S3 is cut off.
[0043]
If no switch abnormality is detected in the abnormality detection of each switch, that is, if it is detected that the power supply voltage itself is abnormal, or as shown in FIG. 2 and FIG. If no abnormality in the power supply voltage is detected in step (1), the process proceeds to an insulation resistance measuring step (step 115) for measuring the insulation resistance. In the insulation resistance measurement process of step 115, as shown in FIGS. 4 and 10, the switching control circuit (not shown) sets the first switch S1 and the fourth switch S4 to the second closed time T2, which is the second set time. , The circuit is closed (step 301).
[0044]
That is, a circuit in which the capacitor 9 is connected in series between the positive terminal of the power supply 3 and the ground potential unit 7 by the second switching means, that is, as shown in FIG. The switch S1, the first diode D1, the first resistor R1, the capacitor 9, the fourth switch S4, the fourth resistor R4, the ground potential unit 7, and the ground on the negative terminal side assumed at a position shown by a dotted line in FIG. A circuit is formed in which the short-circuit resistance Rn and the negative-side main circuit wiring 5b are sequentially connected in series to the power supply 3. Thereby, the capacitor 9 is charged during the second closing time T2, and as shown in FIG. 4, the voltage VC between both terminals of the capacitor 9 increases according to the value of the ground fault resistance Rn. Note that the second closed time T2, which is the second set time, is also shorter than the time required for completely charging the capacitor 9 and longer than the predetermined times tw1, td1, similarly to the first closed time T1. Is set to
[0045]
When the second closing time T2 elapses in step 301, as shown in FIGS. 4 and 10, the first switch S1 is opened or shut off, and after the lapse of a predetermined time tw1, the third switch S3 is closed and the third switch S3 is opened. And the fourth switch S4 is closed. That is, the fourth switching means forms a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and includes the second resistor R2, the third resistor R3, and the fourth resistor R4. A discharge circuit from the capacitor 9 is formed, and the voltage VC between both terminals of the capacitor 9 drops. Then, the microcomputer 11 reads the A / D conversion data, that is, the voltage VC between both terminals of the capacitor 9 via the A / D port (Step 303). Based on the value of the voltage VC between both terminals of the capacitor 9 at this time, that is, the detection voltage VCN, the insulation resistance with respect to the vehicle body or the like which becomes the ground potential portion 7 on the negative terminal side of the power supply 3 from the following equation (2), that is, the ground on the negative terminal side A short-circuit resistance Rn is calculated (step 305).
Rn = -R1-T2 / C.ln (1-VCN / V0s) (2)
In the equation (2), T2 is the closing time of the first switch S1 and the fourth switch S4, C is the capacitance of the capacitor 9, R1 is the resistance value of the first resistor R1, and the power supply voltage V0s is the power supply voltage estimation in step 101. This is the power supply voltage estimated in the process.
[0046]
On the other hand, the switching control circuit (not shown) detects the voltage VC between both terminals of the capacitor 9 in step 305, and then closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed. By bypassing the second resistor R2, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After closing the fifth switch S5 and elapse of a predetermined time td2 shorter than the second closing time T2, the third switch S3, the fourth switch S4, and the fifth switch S5 are opened or shut off, and then the microcomputer 11 sets the A / A A / D conversion data, that is, a voltage VC between both terminals of the capacitor 9 is read through the D port (step 307).
[0047]
If it is confirmed in step 307 that the voltage VC is 0 V, the switching control circuit (not shown) closes the second switch S2 and the third switch S3 for the second set time, that is, the second closed time T2. (Step 309). That is, a circuit in which the capacitor 9 is connected in series between the ground potential section 7 and the negative terminal of the power supply 3 by the third switching means, that is, as shown in FIG. , A ground fault resistor Rp on the positive terminal side assumed at a position indicated by a dotted line, a ground potential portion 7, a third resistor R3, a third switch S3, a first diode D1, a first resistor R1, a capacitor 9, and a second A circuit is formed in which the switch S2 and the negative-side main circuit wiring 5b are sequentially connected in series to the power supply 3. Thereby, the capacitor 9 is charged during the second closing time T2, and as shown in FIG. 4, the voltage VC between both terminals of the capacitor 9 increases according to the value of the ground fault resistance Rp.
[0048]
When the second closing time T2 elapses in step 309, as shown in FIGS. 4 and 10, the second switch S2 is opened or shut off, and after the elapse of a predetermined time tw1, the fourth switch S4 is closed and the third switch S3 is opened. And the fourth switch S4 is closed. That is, the fourth switching means forms a circuit to which the microcomputer 11 for detecting the voltage between both terminals of the capacitor 9 is connected, and includes the second resistor R2, the third resistor R3, and the fourth resistor R4. A discharge circuit from the capacitor 9 is formed, and the voltage VC between both terminals of the capacitor 9 drops. Then, the microcomputer 11 reads the A / D conversion data via the A / D port, that is, the voltage VC between both terminals of the capacitor 9 (Step 311). Based on the value of the voltage VC between both terminals of the capacitor 9 at this time, that is, the detection voltage VCP, the insulation resistance to the vehicle body or the like which becomes the ground potential portion 7 on the positive terminal side of the power supply 3 from the following equation (3), that is, the ground on the positive terminal side The short-circuit resistance Rp is calculated (step 313).
Rp = -R1-T2 / C.ln (1-VCP / V0s) (3)
In the equation (3), T2 is the closing time of the second switch S2 and the third switch S3, C is the capacitance of the capacitor 9, R1 is the resistance value of the first resistor R1, and the power supply voltage V0s is the power supply voltage estimation in step 101. This is the power supply voltage estimated in the process.
[0049]
On the other hand, the switching control circuit (not shown) detects the voltage VC between both terminals of the capacitor 9 in step 313, and then closes the fifth switch S5 with the third switch S3 and the fourth switch S4 closed. By bypassing the second resistor R2, the resistance value of the second resistor R2 is reduced, and the time required for discharging from the capacitor 9 is reduced. After a predetermined time td2 has elapsed after closing the fifth switch S5, the third switch S3, the fourth switch S4, and the fifth switch S5 are opened or shut off, and then the microcomputer 11 performs A / D conversion via the A / D port. The data, that is, the voltage VC between both terminals of the capacitor 9 is read (step 315). Then, when it is confirmed in step 315 that the voltage VC is 0 V, one insulation state detection cycle ends. In addition, while detecting the insulation state, the measurement cycle of the insulation resistance from step 101 to step 115 shown in FIGS. 2, 3, and 10 is repeated.
[0050]
The microcomputer 11 determines the insulation state from the values of the ground fault resistance Rp on the positive terminal side and the ground fault resistance Rn on the negative terminal side of the power supply 3 obtained in one or more insulation resistance measurement cycles. For example, the ground fault resistance Rp on the positive terminal side of the power supply 3 is compared with a predetermined reference resistance value. If the ground fault resistance Rp is equal to or less than the reference resistance value, insulation failure has occurred. Is determined.
[0051]
Here, as can be seen from the equations (2) and (3), if the capacitance C of the capacitor 9 and the resistance value R1 of the first resistor R1 vary due to a difference between products or a temperature change, the positive terminal of the power supply 3 The measurement accuracy of the ground fault resistance Rp and the ground fault resistance Rn on the negative terminal side is affected, and the accuracy of the detected values of the ground fault resistances Rp and Rn is reduced. Therefore, the detection accuracy of the insulation state is reduced. In particular, since the capacitor 9 needs to have a relatively large value of several μF in consideration of the stray capacitance, for example, if there is a variation of about ± 5% in the difference between products, it is ± 10% in consideration of a temperature change. % In some cases, and such variation in the capacitance of the capacitor 9 reduces the detection accuracy of the insulation state. In addition, variations caused by changes in component constants due to changes over time also lower the detection accuracy of the insulation state.
[0052]
On the other hand, in the insulation detection device 1 of the present embodiment, the first switch S1 and the second switch S2 in the first stage of the insulation detection cycle are set to the first switch S1 and the second switch S2, which are shorter than the time required to completely charge the capacitor 9. By closing the circuit for the closing time T1, the power supply voltage of the power supply 3 is estimated. When charging the capacitor 9 by closing the first switch S1 and the second switch S2 for a short time, when charging is performed with a time constant C · R1 determined by the actual capacitance of the capacitor 9 and the resistance value of the resistor R1. The estimated power supply voltage V0s is not an actual power supply voltage of the power supply 3 but a value including an error between the capacitance and resistance value of the capacitor 9 and the resistor R1, that is, a value including variation. . Then, the estimated power supply voltage V0s including this variation is used in the calculation of the ground fault resistance Rp on the positive terminal side and the ground fault resistance Rn on the negative terminal side to be performed in the subsequent steps in the cycle of insulation detection. Of the capacitance of the capacitor 9, the actual values of the positive terminal side ground fault resistance Rp and the negative terminal side ground fault resistance Rn, and the calculated positive terminal side ground fault resistance Rp and negative value. An error with the value of the terminal-side ground fault resistance Rn can be reduced. Therefore, the detection accuracy of the insulation state can be improved.
[0053]
The values of the ground fault resistance Rp on the positive terminal side and the ground fault resistance Rn on the negative terminal side measured by the insulation detection device 1 of the present embodiment and the actual ground fault resistance Rp on the positive terminal side and the actual ground fault resistance Rp on the negative terminal side are measured. FIG. 11 shows a result of calculating an error from the value of the ground fault resistance Rn on the assumption that the capacitor 9 having a certain predetermined standard capacity and the first resistor R1 having a certain predetermined standard resistance value are used. The capacitor 9 has a capacitance variation of about ± 10% in consideration of the difference between products and the temperature change, and the first resistor R1 has a capacitance variation of about ± 2% in consideration of the difference between products and the temperature change. It is assumed that there is. In FIG. 11, the V0 measurement time means the first closed time T1, and therefore indicates a measurement error when the first closed time T1 is t seconds, 2t seconds, and 3t seconds, where t <2t <3t. ing. FIG. 11 is a graph of the calculation result with the vertical axis representing the detection accuracy, that is, the detection error, and the horizontal axis representing the value of the ground fault resistance.
[0054]
As can be seen from FIG. 11, the case where detection is performed by the insulation detection device 1 of the present embodiment, that is, the case where correction is performed, is greater than the case where detection is performed by the conventional insulation detection device, that is, no correction is performed. The measurement error is reduced with respect to the value. Further, the degree of reduction of the measurement error varies depending on the setting of the V0 measurement time, that is, the setting of the first closing time T1, and when the first closing time T1 is t seconds, the error increases as the ground fault resistance decreases. The error decreases as the resistance increases. When the first closing time T1 is 2t seconds, when the ground fault resistance is large, the error becomes larger than when the first closing time T1 is t seconds, but the error becomes smaller on average over the short-circuit resistance in each place. I have. Even when the first closing time T1 is 3 t seconds, the error is smaller on average across the short-circuit resistance, but the error is larger than when the first closing time T1 is 2 t seconds.
[0055]
Therefore, when the value of the ground fault resistance for determining the insulation failure is set to a relatively large value, the first closing time T1 is preferably set to t seconds. When the setting is a relatively small value, the first closing time T1 is preferably set to 2t seconds. As described above, it is preferable that the first closing time T1, that is, the first set time, is selected such that the measurement error becomes small around the value of the ground fault resistance for determining the insulation failure. For example, if the value of the ground fault resistance for judging insulation failure is set to RΩ in FIG. 11, it is preferable to select 2t seconds as the first closing time T1, and at this time, ± 10 %, Whereas the insulation detection device 1 of the present embodiment has a measurement error of ± 2% or less, and the insulation state detection accuracy can be improved.
[0056]
By the way, in the abnormality detection of the second switch in the individual switch abnormality detection process of step 103 shown in FIG. 2, when an abnormality such as a short-circuit occurs in the second switch, as shown in FIG. By closing one switch S1, the capacitor 9 is charged. Therefore, thereafter, when the third and fourth switches S3 and S4 are closed by the operation of the fourth switching means, a voltage corresponding to the voltage between both terminals of the capacitor 9 is applied to the A / D port of the microcomputer 11, and Since the voltage corresponding to the voltage between both terminals of the capacitor 9 is detected at 11, the abnormality of the second switch S2 can be detected.
[0057]
However, as can be seen from FIG. 1, when the second switch S2 is abnormal and is in a short circuit state, the fourth switching means operates as the value of the positive terminal side ground fault resistance Rp approaches the ground potential. Thus, when the third and fourth switches S3 and S4 are closed, the voltage applied to the A / D port of the microcomputer 11 approaches the ground potential. Therefore, when insulation failure occurs, that is, when the value of the positive terminal side ground fault resistance Rp is lower than the reference resistance value, even if an abnormality has occurred in the second switch S2, as shown in FIG. In some cases, a voltage that determines the occurrence of an abnormality in 11 is not detected, and an abnormality of the second switch S2 may not be detected.
[0058]
On the other hand, in the insulation detection device 1 of the present embodiment, since the estimated power supply voltage V0s obtained in the power supply voltage estimation process of step 101 repeatedly performed during the determination time h has almost no change, the second switch S2 Abnormality can be detected. In other words, even when the estimated power supply voltage is equal to or lower than the determination voltage, for example, at the time of rising of the power supply, the estimated power supply voltage V0s obtained in the power supply voltage estimation process in step 101 starts to increase. If there is an abnormality in the second switch S2 at the time of failure, the estimated power supply voltage V0s obtained in the power supply voltage estimation process in step 101 does not increase. Therefore, even if the insulation state is abnormal and the second switch unit is abnormal, the abnormality of the second switch unit can be detected.
[0059]
Further, as can be seen from FIG. 1, when an abnormality occurs in the second switch S2 and the second switch S2 is in a short-circuit state, as the value of the positive terminal side ground fault resistance Rp becomes closer to the ground potential, the fourth switching means is switched. When the third and fourth switches S3 and S4 are activated and closed, the voltage applied to the fourth resistor R4 becomes close to the power supply voltage of the power supply 3. Therefore, when the estimated power supply voltage V0s is equal to or lower than the determination voltage and the power supply voltage estimation process of step 101 is repeatedly performed to detect an abnormality of the second switch S2, the third switch S3 is turned on in a normal cycle P1 such as a few seconds. Closes intermittently. Accordingly, as the value of the positive terminal side ground fault resistance Rp becomes closer to the ground potential, the stress applied to the fourth resistor R4 increases, and the fourth resistor R4 may be damaged.
[0060]
On the other hand, in the insulation detection device 1 of the present embodiment, when it is detected that the estimated power supply voltage V0s obtained in the power supply voltage estimation process in step 101 is equal to or lower than the determination voltage, the microcomputer 11 serving as the voltage detection means The read cycle of the A / D data is changed from the operation cycle P1 of the fourth switching means when the power supply voltage of the power supply is normal to the cycle P2 longer than the cycle P1. Accordingly, the period in which a voltage close to the power supply voltage is applied to the fourth resistor R4 becomes longer, and the stress applied to the fourth resistor R4 can be reduced. That is, the stress applied to the components constituting the circuit can be reduced by the abnormality detection operation of the second switch when the insulation state is abnormal and the second switch is abnormal.
[0061]
Further, the abnormality detection method of the switches S1, S3, S4, etc. other than the second switch S2 is not limited to the abnormality detection method of step 113 of the present embodiment, and various abnormality detection methods can be used.
[0062]
Further, in the present embodiment, the ground fault resistance Rp on the positive terminal side and the ground fault resistance Rn on the negative terminal side are individually calculated, so that a portion having insulation failure can be detected. However, in the case where only the occurrence of insulation failure is determined without detecting the location of insulation failure, for example, the ground fault resistance Rp on the positive terminal side and the negative terminal on the basis of the estimated power supply voltage V0s and the detection voltages VCP, VCN, etc. Another formula for calculating a ground fault resistance value or the like representing the ground fault resistance Rn on the side can also be used.
[0063]
In addition, in the insulation detection device 1 of the present embodiment, the power supply voltage V0s and the ground-fault resistance values Rn and Rp estimated by the equations (1), (2), and (3) are calculated by the microcomputer 11 serving as the calculating means. I have. However, in order to reduce the time required for calculating these complex function expressions such as Expressions (1), (2), and (3), the power supply estimated in accordance with the address in a memory or the like serving as storage means of the microcomputer 11 is used. A power supply voltage data table or a ground fault resistance value data table storing the voltage V0s, the ground fault resistance values Rn, Rp, and the like are prepared, and an address corresponding to each data table is calculated by the microcomputer 11 which is a calculating means. It can also be configured. At this time, the microcomputer 11 which is a calculating means obtains the value of the voltage VC between both terminals of the capacitor 9 detected for estimating the power supply voltage, that is, the detected voltage V0, the estimated power supply voltage V0s, and the ground fault resistance values Rn and Rp. Therefore, from the value of the voltage VC between both terminals of the capacitor 9 detected, that is, the detected voltages VCN, VCP, and the like, each of the power supply voltages is calculated by an arithmetic expression of an address which is simpler than the expressions (1), (2), and (3). The address of the data table and the address of the ground fault resistance data table are calculated, and the power supply voltage V0s and the ground fault resistances Rn and Rp estimated from the calculated addresses are determined.
[0064]
Further, the bypass unit including the fifth switch S5 is not limited to the configuration of the present embodiment, and the bypass unit is provided between the two terminals of the second resistor R2 in parallel with the second resistor R2 as shown in FIG. A configuration in which the fifth switch S5 is connected may be employed. Further, when there is no need to shorten the time required for one cycle for insulation detection or the like, a configuration without the bypass unit including the fifth switch S5 can be adopted.
[0065]
In addition, the present invention is not limited to the circuit configuration shown in the present embodiment, and a capacitor is connected in series to a DC power supply whose positive terminal side and negative terminal side wiring are insulated from the ground potential portion for a first set time. First switching means, second switching means for connecting the capacitor in series between the positive terminal of the power supply and the ground potential section for a second set time, and between the negative terminal of the power supply and the ground potential section A third switching means for connecting a capacitor in series for a second set time, and a detecting means for detecting a voltage between both terminals of the capacitor after the first, second and third switching means are cut off. If it has the fourth switching means and the like, it can be applied to insulation detection devices having various circuit configurations.
[0066]
【The invention's effect】
According to the present invention, even when the insulation state is abnormal and the second switch unit is abnormal, the abnormality of the second switch unit can be detected.
[Brief description of the drawings]
FIG. 1 is a diagram showing a schematic configuration of an embodiment of an insulation detection device to which the present invention is applied.
FIG. 2 is a flowchart showing an operation of measuring insulation resistance of an embodiment of an insulation detection device to which the present invention is applied.
FIG. 3 is a flowchart showing an operation of a power supply voltage estimation process of an embodiment of the insulation detection device to which the present invention is applied.
FIG. 4 is a time chart showing a charge / discharge state of a capacitor and a voltage reading timing with respect to the operation of each switch unit when the power supply voltage is normal and abnormal.
5A and 5B are diagrams illustrating a relationship between a determination voltage and an estimated power supply voltage and a read cycle of A / D data of a microcomputer, wherein FIG. FIG. 6 is a diagram showing a second switch abnormality when the switch is in an abnormal state.
FIG. 6 is a time chart showing a charge / discharge state of a capacitor and a voltage reading timing with respect to an operation of each switch unit in a process of detecting an abnormality of a second switch.
FIG. 7 is a time chart showing a charging / discharging state of a capacitor and a voltage reading timing with respect to an operation of each switch unit in a process of detecting an abnormality of a first switch.
FIG. 8 is a time chart showing a charge / discharge state of a capacitor and a voltage reading timing with respect to an operation of each switch unit in a process of detecting an abnormality of a third switch.
FIG. 9 is a time chart showing a charge / discharge state of a capacitor and a voltage reading timing with respect to an operation of each switch unit in a process of detecting an abnormality of a fourth switch.
FIG. 10 is a flowchart showing an operation of an insulation resistance measuring process of an embodiment of the insulation detection device to which the present invention is applied.
FIG. 11 is a diagram illustrating a detection error of an insulation resistance value detected during a measurement time of each power supply voltage with respect to the insulation resistance value.
FIG. 12 is a diagram showing a schematic configuration of a modification of the insulation detection device to which the present invention is applied.
[Explanation of symbols]
1 Insulation detection device
3 power supply
5a Positive main circuit wiring
5b Negative main circuit wiring
7 Ground potential section
9 Capacitor
11 microcomputer
S1 First switch
S2 Second switch
S3 3rd switch
S4 4th switch
Rp Positive terminal side ground fault resistance
Rn Negative terminal side ground fault resistance

Claims (2)

正端子側及び負端子側の配線が接地電位部から絶縁された直流電源にコンデンサを直列に、該コンデンサが完全に充電される時間よりも短い第１の設定時間の間接続する第１のスイッチング手段と、前記電源の正端子と前記接地電位部との間に前記コンデンサを直列に第２の設定時間の間接続する第２のスイッチング手段と、前記電源の負端子と前記接地電位部との間に前記コンデンサを直列に第２の設定時間の間接続する第３のスイッチング手段と、前記第１、第２及び第３の各スイッチング手段の遮断後に前記コンデンサの両端子間の電圧を検出する電圧検出手段を接続する第４のスイッチング手段と、前記第１のスイッチング手段を遮断後の前記電圧検出手段での検出電圧に基づいて前記電源の電源電圧を推定し、該推定した電源電圧と前記第２及び第３のスイッチング手段を遮断後の前記検出手段での各検出電圧とに基づいて前記電源の前記接地電位部に対する絶縁抵抗を求める演算手段と、前記第１、第２、第３及び第４のスイッチング手段で生じた異常を検出する異常検出手段とを備え、
前記第１のスイッチング手段が、前記電源の正端子に接続された第１のスイッチ部と、前記電源の負端子に接続された第２のスイッチ部とを含み、前記第３のスイッチング手段が、前記第２のスイッチ部と、前記第１のスイッチに直列に接続された第３のスイッチ部とを含み、前記第２のスイッチング手段が、前記第１のスイッチ部と、前記第２のスイッチ部に直列に接続された第４のスイッチ部とを含み、前記第４のスイッチング手段が、前記第３のスイッチ部と前記第４のスイッチ部とを含み、前記第１のスイッチ部と前記第３のスイッチ部との間と、前記第２のスイッチ部と前記第４のスイッチ部との間とに、正側から負側に向かう方向に整流する第１のダイオード及び前記コンデンサを直列に接続し、前記第１のダイオードに並列に、該第１ダイオードと逆方向に整流する第２のダイオードを接続し、前記電圧検出手段を前記第３のスイッチ部と前記第４のスイッチ部との間に接続し、前記電圧検出手段と前記第４のスイッチ部との間を前記接地電位部に接地しており、
前記異常検出手段により、前記演算手段で推定した電源の電源電圧が該電源電圧の異常を判定するための判定電圧以下であることを検出したとき、前記第１のスイッチング手段を遮断後の前記電圧検出手段での検出電圧に基づく前記電源の電源電圧の推定を繰り返し、前記異常検出手段は、予め設定した判定時間の間、前記電源の電源電圧の推定を繰り返したときに推定した電源電圧の値に変化がないとき、前記第２のスイッチ部の異常を判定してなる非接地電源の絶縁検出装置。First switching in which a capacitor is connected in series to a DC power supply whose wiring on the positive terminal side and the negative terminal side are insulated from the ground potential portion for a first set time shorter than the time when the capacitor is completely charged Means, a second switching means for connecting the capacitor in series between a positive terminal of the power supply and the ground potential section for a second set time, and a second switching means for connecting the negative terminal of the power supply and the ground potential section. A third switching means for connecting the capacitor in series for a second set time, and detecting a voltage between both terminals of the capacitor after the first, second and third switching means are shut off. A fourth switching means for connecting a voltage detecting means, and a power supply voltage of the power supply is estimated based on a voltage detected by the voltage detecting means after the first switching means is cut off. Calculating means for calculating an insulation resistance of the power supply with respect to the ground potential portion based on the respective detection voltages of the detecting means after the second and third switching means have been cut off; and the first, second and third calculating means. And abnormality detecting means for detecting an abnormality occurring in the fourth switching means,
The first switching unit includes a first switch unit connected to a positive terminal of the power supply, and a second switch unit connected to a negative terminal of the power supply, wherein the third switching unit includes: The second switch unit; and a third switch unit connected in series to the first switch, wherein the second switching unit includes the first switch unit and the second switch unit. A fourth switch unit connected in series with the first switch unit, the fourth switching unit includes the third switch unit and the fourth switch unit, and the first switch unit and the third switch unit. A first diode and the capacitor, which rectify in the direction from the positive side to the negative side, are connected in series between the first switch section and the second switch section and between the second switch section and the fourth switch section. , In parallel with the first diode The first diode is connected to a second diode that rectifies in the opposite direction, the voltage detection unit is connected between the third switch unit and the fourth switch unit, and the voltage detection unit is connected to the second diode. 4 is grounded to the ground potential section, and
When the abnormality detection unit detects that the power supply voltage of the power supply estimated by the calculation unit is equal to or lower than a determination voltage for determining abnormality of the power supply voltage, the voltage after shutting off the first switching unit. The estimation of the power supply voltage of the power supply based on the detection voltage of the detection means is repeated, and the abnormality detection means estimates the value of the power supply voltage when the estimation of the power supply voltage of the power supply is repeated for a preset determination time. And an insulation detection device for an ungrounded power supply which determines an abnormality of the second switch section when there is no change in the second switch section. 前記異常検出手段により、前記演算手段で推定した電源の電源電圧が該電源電圧の異常を判定するための判定電圧以下であることを検出した場合、前記電源の電源電圧の推定を繰り返すときの前記第４のスイッチング手段の作動周期を、前記電源の電源電圧が正常の場合の前記第４のスイッチング手段の作動周期よりも長くしてなることを特徴とする請求項１に記載の絶縁検出装置。When the abnormality detection means detects that the power supply voltage of the power supply estimated by the calculation means is equal to or lower than a determination voltage for determining abnormality of the power supply voltage, the power supply voltage of the power supply is repeatedly estimated. The insulation detecting device according to claim 1, wherein an operation cycle of the fourth switching means is longer than an operation cycle of the fourth switching means when a power supply voltage of the power supply is normal.
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