JP2004151845A - Method of recording on media - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the time required for converting the image data of Y, Cb and Cr into the image data of R, G and G through TIFF conversion and writing the data on recording media and to simplify address management during the DMA transfer of the data. <P>SOLUTION: The total number of data to be transferred to a second memory device 50 by DMA transfer is set in a register 61. The number of DMA interruption data for which the DMA transfer is interrupted during the DMA transfer of all the data to issue the next media access command is set in a register 62. Before all the DMA data are transferred by the number set in the register 61, the DMA transfer and the TIFF conversion process executed by a DSP device 20 are temporarily interrupted every time the DMA data are transferred by the number set in the register 62, and a bus to the second memory device 50 is opened to enable the media access command to be issued from a control device 40 via an indirect register access process block 20-5 of the DSP device 20 to achieve recording in the second memory device 50. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for recording on a medium in a digital still camera having a second memory device managed by a detachable DOS-FAT (file allocation table) system such as a CF card as a recording medium for image data. It is.
[0002]
[Prior art]
Since the digital still camera was first released as a PC peripheral device, the digital still camera has been aiming for higher pixels and higher speed in order to approximate the performance of the silver halide camera.
[0003]
Conventionally, in a digital still camera of this type, a microcomputer controls a memory card in order to perform flexible control using a DOS-FAT file system. Therefore, the memory card is configured to be directly connected to the bus of the microcomputer or indirectly using the interface gate.
[0004]
However, in such a configuration, access to the medium is slow, and the processing time for writing to the memory card and the processing time for reading from the memory card occupy most of the recording / reproducing time, resulting in a very poor user interface. I was In order to solve the problem, a configuration of a digital still camera including a DMA processing block and an indirect memory access block has already been proposed (see Patent Document 1).
[0005]
Hereinafter, this digital still camera will be described with reference to the drawings.
[0006]
FIG. 3 shows a system configuration diagram of the digital still camera of the proposal example, FIG. 4 shows a recording processing time ratio of the proposal example of FIG. 1, and FIG. 5 shows a reproduction processing time ratio similarly.
[0007]
The digital still camera of the proposed example includes an image input device 10 such as a CCD or a CMOS sensor, a first memory device 30 such as an SDRAM, a control device 40 such as a microcomputer (CPU), and a CF (Compact Flash (registered trademark) memory). ) A second memory device 50 managed by a DOS-FAT system that can be attached and detached, such as a card, and a DSP device 21.
[0008]
The DSP device 21 processes an image signal output from the image input device 10 and writes the image signal into the first memory device as Y, Cb, and Cr image data in the first memory device 30; The image data of Y, Cb, and Cr stored in the first memory device 30 is compressed and written into the first memory device 30 as JPEG code data, or the JPEG code data stored in the first memory device 30 is converted into Y, Cb , Cr image data, a compression / expansion processing block 21-2 for performing processing for returning to image data, a CPU interface processing block 21-3 for performing interface processing with the control device 40, a first memory device 30, and a second memory. By performing DMA (Direct Memory Access) processing with the device 50, JPEG encoded data is stored in the first memory. A DMA processing block 21-4 for transferring data from the storage device 30 to the second memory device 50 or vice versa; an indirect register access processing block 21-5 for performing indirect register access processing between the control device 40 and the second memory device 50; It is composed of
[0009]
At the time of recording, the control device 40 causes the video signal processing block 21-1 of the DSP device 21 to perform video signal processing on the image signal fetched from the image input device 10 to obtain Y, Cb, and Cr image data. Then, this is written in the first memory device 30. Further, the compression processing is performed in the compression / decompression block 21-2, and the JPEG code data as the compression result is stored in the first memory device 30 (processing time A).
[0010]
Thereafter, the control device 40 realizes the issuance of the read command to the second memory device 50 by writing the command in the register of the indirect register access processing block 21-5 of the DSP device 21, and the directory entry of the second memory device 50. The information and the FAT data are read from the register of the indirect register access processing block 21-5 of the DSP device 21, the free space of the second memory device 50 is calculated, and the control device 40 transmits the free space to the second memory device 50. Is issued in the same manner as the read command (processing time B).
[0011]
Thereafter, the JPEG code data (for example, N cluster size) in the first memory device 30 is read from the first memory device 30 for the JPEG code data of one cluster using the DMA processing block 21-4 (processing The time C1) and the process of writing to the second memory device 50 (processing time D1) are multiplexed.
[0012]
When the data movement for one cluster is completed, the control device 40 again executes the FAT data reading process of the second memory device 50, the free space calculation process, the command issuing process to the second memory device 50 (processing time B), and A process of reading from the memory device 30 (processing time C1) and a process of writing to the second memory device 50 (processing time D1) are performed N times until all the JPEG code data is moved, thereby realizing recording (FIG. 4). reference). In this conventional method, the DMA process is completed once each time data transfer for one cluster is completed, and the DMA process is started from the beginning when data transfer for the next one cluster is performed. That is, the DMA processing is completed for each cluster.
[0013]
At the time of reproduction, the control device 40 issues a read command to the second memory device 50, and reads directory entry data and FAT data from the second memory device 50 from the register of the indirect register access processing block 21-5 of the DSP device 21. Read and calculate the position of JPEG code data (for example, N cluster size) (processing time H). After that, the FAT data at that position is read out, the chained data position is calculated, and a read command for one cluster is issued (processing time I). Thereafter, using the DMA processing block 21-4 of the DSP device 21, a process of reading data of one cluster from the second memory device 50 (processing time J1) and a process of writing to the first memory device 30 (processing time) K1) is performed while multiplexing.
[0014]
When the data movement of one cluster is completed, the control device 40 reads the FAT data in the second memory device 50 again, calculates the chained data position, and executes the read command issuing process (processing time I) to start the second memory device 50. The processing from the reading of the JPEG code data (processing time J1) and the processing of writing to the first memory device 30 (processing time K1) are performed N times until all the JPEG code data is moved. Also at this time, the DMA processing is completed every time one cluster of data is transferred.
[0015]
When the movement of the JPEG code data is completed, the compression is performed by the compression / decompression block 21-2 of the DSP device 21, and the video signal is output (processing time L) to realize the reproduction (see FIG. 5).
[0016]
That is, since the recording processing time has a relationship of processing time C1 <processing time D1 as shown in FIG. 4, processing time A + (processing time B + processing time D1) × N times, and processing time C1 × N times longer than in the related art. Time can be reduced. Further, the reproduction processing time has a relationship of processing time K1 <processing time J1 as shown in FIG. 5, so that processing time H + (processing time I + processing time J1) × N times + processing time L, and the processing time K1 × N times can be reduced.
[0017]
[Patent Document 1]
JP 2001-326893 A (pages 5 to 6, FIGS. 1 to 3)
[0018]
[Problems to be solved by the invention]
By the way, in a digital still camera, recording is generally performed in a memory card which is a recording medium in a JPEG format, but in some models, a JPEG format recording mode and a TIFF format recording mode for recording RGB data are used. There are cameras with.
[0019]
In the TIFF format, 2 million pixels (1600 × 1200) have a large data amount of 5.76 MB. Therefore, the recording format of a digital still camera is generally the JPEG format using compression. Since JPEG data is created from Y, Cb, and Cr image data, it is temporarily stored in memory in the form of Y, Cb, and Cr image data. It is common to hold. Therefore, conventionally, when performing TIFF recording, image data of Y, Cb, and Cr is converted into image data of R, G, and B, the conversion result is stored again in a memory, and recording on a recording medium is performed.
[0020]
In other words, when recording in the TIFF data format of a digital still camera, the image data of the Y, Cb, and Cr, which are the original data of the JPEG format, is conventionally stored in the SDRAM, and the image data is converted into R, G, and B image data. Then, the image data is held on the SDRAM again. TIFF data format recording has been realized by means for transferring the image data to a recording medium.
[0021]
However, such a method has a problem in that it takes time to perform the TIFF conversion, hold the converted data, and record the converted data. That is, a large amount of data conversion time and a long time for holding the data on the SDRAM are required, and the recording time is long, resulting in a poor user interface.
[0022]
On the other hand, when the DMA transfer is sequentially performed while converting the image data of Y, Cb, and Cr into the image data of R, G, and B while converting the data into the TIFF recording data, the transfer source data (the image of Y, Cb, and Cr) is obtained. Data) has a data amount of 2 bytes (4: 2: 0), whereas the transfer destination data (R, G, B image data) has a data amount of 3 bytes, and a medium such as a CF card has 512 bytes. Since the access is performed in integer multiples (for example, in units of clusters), the transfer source address management becomes complicated in the previous transfer method as described in Patent Document 1.
[0023]
Hereinafter, this case will be described in detail in the case of performing data management in units of 512 bytes. The transfer source is 2-byte data of Y, Cb, and Cr, whereas the CF card of the transfer destination is 3-byte data of R, G, and B. On the other hand, in order to generate 512-byte data to be sent to the transfer destination, 512/3 = 170.666..., So data of 171 pixels is required. The data of the 171st pixel is data of the 342th and 343th bytes. In other words, when data of 171 pixels or more (usually several megapixels) is subjected to RGB conversion, the transfer source data takes in data of 171 pixels, and when RG data of the RGB data is converted, 512 bytes are generated and terminated. Have to pause. In order to continuously resume the transfer, the data of the 171st pixel (addresses 342 and 343) is read again, B data is generated, and the data is sequentially written from the B data to the transfer destination. That is, when the DMA processing is restarted, it is necessary to manage how far the address has advanced and how far the RGB has been converted and completed. Therefore, the management of the address of the transfer source becomes complicated.
[0024]
Therefore, an object of the present invention is to reduce the time required for converting Y, Cb, and Cr image data into R, G, and B image data and writing the data to a recording medium, and at the same time, to address data when DMA-transferring data. The purpose is to provide a method of recording on media that is easy to manage.
[0025]
[Means for Solving the Problems]
According to the recording method of the present invention, the total number of DMA transfer data to the recording medium is set in the first register, and the DMA transfer is temporarily suspended during the DMA total data transfer in the second register. The number of DMA interrupted data for issuing the next media access command is set in the second register until the total number of DMA transfer data set in the first register is transferred. DMA transfer is temporarily interrupted every time DMA data of the number of DMA interrupted data is transferred, the bus for the recording medium is released, a media access command can be issued, and recording (recording command issuance) on the recording medium is performed. This is realized every time the DMA transfer is interrupted.
[0026]
According to this method, by setting the number of data corresponding to the data management unit of the recording medium in the second register, the DMA transfer can be interrupted in the data management unit of the recording medium. By releasing the bus to the medium, it becomes possible to issue a command to the recording medium. As a result, a command can be issued in the middle of the total number of data transfers, and when the interrupted DMA is restarted, the register to be operated is only the retransfer start bit, and high-speed access can be performed. Therefore, when recording continuous data on a medium, DMA transfer to the medium can be performed without considering the address management of the original data. When the DMA is restarted, the number of registers to be controlled is reduced, and the DMA transfer can be restarted at a high speed.
[0027]
Also, the address at the time of DMA interruption is held, and DMA processing is restarted from the next address of the held address, so that address management for DMA processing is simplified.
According to a second aspect of the present invention, there is provided a method for recording on a medium according to the first aspect, wherein the total number of DMA transfer data to the recording medium is calculated based on image data of Y, Cb, and Cr from R, G , B after setting the amount of data converted to image data in the first register, and the number of DMA interrupted data for issuing the next media access command depends on the FAT (file allocation table) free area of the recording medium. To realize TIFF (Tag Image File Format) recording on a recording medium while converting image data of Y, Cb, and Cr into image data of R, G, and B.
[0028]
According to this method, the number of DMA interrupted data for issuing the next media access command is set in the second register depending on the FAT (file allocation table) free area of the recording medium. Can be handled, and the writing process can be realized at high speed.
[0029]
According to a third aspect of the present invention, there is provided a method of recording on a medium, comprising: an image input device, a first memory device, a control device, and a second memory device as a recording medium for image data managed by the DOS-FAT system. A video signal processing block for processing an image signal output from an image input device and storing it as Y, Cb, Cr image data in a first memory device; an interface processing block for performing interface processing for a control device; A DMA processing / data conversion processing block for performing a DMA processing between the device and the second memory device and a data conversion process from Y, Cb, Cr image data to R, G, B image data; A DSP device comprising an indirect register access processing block for performing indirect register access processing between the two memory devices. Controller is a method of recording media in a digital still camera to achieve the issuance of commands and access to the second memory device through internal registers of the indirect register access processing block in the DSP device,
The first register sets the total number of DMA transfer data to the recording medium, and the second register sets the number of DMA interrupted data to temporarily suspend the DMA transfer and issue the next media access command during the DMA total data transfer. During the time until the total number of DMA data set in the first register is transferred, the DMA is transferred every time the DMA data set in the second register is transferred. The transfer is temporarily interrupted, the bus for the recording medium is released, a media access command can be issued, and recording on the recording medium is realized every time the DMA transfer is interrupted.
[0030]
According to this method, by setting the number of data corresponding to the data management unit of the second memory device in the second register, the DMA transfer can be interrupted in the data management unit of the second memory device, and the DMA transfer can be stopped. During suspension, the command can be issued by releasing the bus to the second memory device to the indirect register access processing block. As a result, a command can be issued in the middle of the total number of data transfers, and when the interrupted DMA is restarted, the register to be operated is only the retransfer start bit, and high-speed access can be performed. Therefore, when recording continuous data on a medium, DMA transfer to the medium can be performed without considering the address management of the original data. When the DMA is restarted, the number of registers to be controlled is reduced, and the DMA transfer can be restarted at a high speed.
[0031]
Also, the address at the time of DMA interruption is held, and DMA processing is restarted from the next address of the held address, so that address management for DMA processing is simplified.
[0032]
In addition, the address of the first memory device that is the DMA transfer source is held in the state at the time of interruption, and when the DMA is resumed after the command is issued, the transfer can be performed from the address continuous with the address at the time of interruption. Transfer processing between the image data of Y, Cb, and Cr, image data of R, G, and B, and data transfer processing between the second memory device and the DSP device. Can be multiplexed, so that the access processing to the second memory device can be shortened, and the total recording time can be shortened.
[0033]
According to a fourth aspect of the present invention, there is provided a method for recording on a medium according to the third aspect, wherein the total number of DMA transfer data to the recording medium is calculated based on image data of Y, Cb, and Cr from R and G. , B after setting the amount of data converted to image data in the first register, and the number of DMA interrupted data for issuing the next media access command depends on the FAT (file allocation table) free area of the recording medium. To realize TIFF (Tag Image File Format) recording on a recording medium while converting image data of Y, Cb, and Cr into image data of R, G, and B.
[0034]
According to this method, the number of DMA interrupted data for issuing the next media access command is set in the second register depending on the FAT (file allocation table) free area of the recording medium. Can be handled, and the writing process can be realized at high speed.
[0035]
BEST MODE FOR CARRYING OUT THE INVENTION
The method of recording on a medium according to the present invention is a method of recording on a medium in a digital still camera including a DMA processing / data conversion processing block and an indirect register access processing block, and performs TIFF conversion and media recording simultaneously. This makes it possible to reduce the time for performing the TIFF conversion and the time for holding the converted data in the conventional example, and to shorten the processing time for writing to a recording medium (memory card) as compared with the conventional method.
[0036]
Hereinafter, an embodiment of a recording method on a medium according to the present invention will be described by taking a digital still camera as an example.
[0037]
The digital still camera according to the embodiment of the present invention includes an image input device 10 such as a CCD or a CMOS sensor, a first memory device 30 such as an SDRAM, a control device 40 such as a microcomputer (CPU), and a CF (Compact Flash). It comprises a second memory device 50 managed by a detachable DOS-FAT system such as a (registered trademark) memory) card, and a DSP device 20.
[0038]
The DSP device 20 performs a DMA transfer between the video signal processing block 20-1, the compression signal processing block 20-2, the CPU interface processing block 20-3, and the first memory device 30 and the second memory device 50. A DMA processing / data conversion processing block 20-4 provided with a data transfer processing function to perform and a conversion processing function to perform TIFF conversion from Y, Cb, and Cr image data to R, G, and B image data; It has an indirect register access processing block 20-5 for performing indirect register access processing between the memory device 40 and the second memory device 50. The difference from the proposal example of FIG. 3 is that, instead of the DMA processing block 21-4, a conversion processing function of performing TIFF conversion from Y, Cb, and Cr image data to R, G, and B image data is also provided. Is that the TIFF data (R, G, B image data) can be recorded in the second memory device 50 by using the DMA processing / data conversion processing block 20-4 provided in the present embodiment. is there.
[0039]
In this digital still camera, as described above, the DSP device 20 is provided with the indirect register access processing block 20-5, and the first and second registers (not shown) for temporarily interrupting the DMA processing are further provided. ) In the DMA processing / data conversion processing block 20-4, the DMA can be interrupted in the data management unit (for example, in units of 512 bytes) of the second memory device 50, and the second memory device 50 is interrupted during the DMA interruption. By releasing the bus to the indirect register access processing block 20-5, the command can be issued, the address of the DMA transfer source is held in the interrupted state, and when the DMA is resumed after the command is issued and when the DMA is interrupted. Data transfer processing between the first memory device 30 and the DSP device 20 , Y, Cb, and Cr image data into R, G, and B image data, and multiplex data transfer processing between the second memory device 50 and the DSP device 20. It is possible to shorten the access process to the 50, and to shorten the total recording time.
[0040]
The comparison between the number of transfer data and the values of the first and second registers, the interruption of DMA, and the holding of the address are performed by providing the first and second registers in the DMA processing / data conversion processing block 20-4. And is executed in the DMA processing / data conversion processing block 20-4. The release of the bus is executed by the DMA processing / data conversion processing block 20-4 and the indirect register access processing block 20-5.
[0041]
Here, data written to the first and second registers will be described with reference to FIG.
[0042]
In the first register, the total number of DMA transfer data to be DMA-transferred to the second memory device 50 is set, and in the second register, the number of DMA interrupted data is set, and a command is issued to the medium every time the DMA is interrupted. , Realize media recording. As the total number of DMA transfer data, for example, the total number of R, G, and B image data of one still image is set. As the number of DMA interrupted data, the number of bytes of the data management unit of the second memory device 50 is set to an integral multiple of 512 bytes in the case of a CF card.
[0043]
More specifically, the first register sets, for example, the total number of image data after converting Y, Cb, and Cr image data corresponding to one still image into R, G, and B image data. I do. In the second register, a unit for issuing a command to the second memory device 50 as a recording medium (that is, the number of DMA interrupted data) is set depending on a free area of the FAT of the medium.
[0044]
Here, a method of setting the number of DMA interrupted data depending on the free area of the FAT will be described. The free area of the FAT is managed in cluster units, and there are a case where the free area exists continuously and a case where the free area exists discontinuously. If they are continuous, the size up to the discontinuity or the maximum transferable number is set as the number of DMA interrupted data. The more consecutive clusters, the faster the access.
[0045]
Depending on the media, there are a media (compact flash (registered trademark) card) that can access up to several MBs in succession, and a media (smart media (registered trademark)) in which access must be interrupted in units of 128 bytes. For a medium that can continuously receive data, writing a command in which a large amount of data is continuously transmitted enables high-speed writing in terms of data management. However, as a medium, when the free area of the FAT is not continuous, it is necessary to receive a command as to where to write the FAT and write it to the address. In this case, the system manages the FAT status of the media, and issues a command using the maximum transferable number as an upper limit and the size of the continuous free area of the FAT as a command issuing unit.
[0046]
Further, in order to realize the switching between the completion and the interruption of the DMA processing, the register may be switched between resetting and not resetting the address register in the DMA processing / data conversion processing block 20-4. . With such a configuration, when resetting is not performed, DMA processing is interrupted, and the effects of simplifying address management and shortening the transfer time during continuous transfer appear.
[0047]
When the transfer source data stored in the first memory device 30 is, for example, Y, Cb, Cr image data of 4: 2: 0, one pixel is composed of two bytes, but stored in the second memory device 50. Since the transfer destination data to be transferred is R, G, and B image data, one pixel is composed of three bytes. Since the recording medium (for example, in the case of a CF card) manages data in units of 512-byte integer multiples, it depends on the number of destination data (CF card management unit, for example, 512-byte integer multiples) before conversion. DMA is interrupted in the middle of the data transfer, and a command is issued. Also, when resuming DMA, it has an address holding function so that the source address (read address of the first memory device 30) can be resumed from the address following the interrupted address, and TIFF data recording is performed by continuous DMA conversion operation. make it happen.
[0048]
Note that the above interruption of the DMA is caused when the image data after the TIFF conversion is DMA-transferred to the number of data management units or the number of the image data before the TIFF conversion corresponding to the number that can be completely fit in one continuous free area. Is being done.
[0049]
Here, the TIFF recording operation on the medium in the digital still camera will be described in detail.
[0050]
At the time of recording TIFF data, the image signal fetched from the image input device 10 is subjected to video signal processing in the video signal processing block 20-1 of the DSP device 20, and is generated in the first memory device 30 as Y, Cb, and Cr image data. And hold. The control device 40 issues the command to the second memory device 50 by writing the command to the register of the indirect register access processing block 20-5 of the DSP device 20. As the above command, for example, a command indicating which cluster is to be written and in what size data is issued as an ATA command.
[0051]
Further, the directory entry information and the FAT data of the second memory device 50 are read from the register of the indirect register access processing block 20-5 of the DSP device 20, and the free space of the second memory device 50 is calculated. The control device 40 realizes the issuance of the write command to the second memory device 50 by writing the command to the register of the indirect register access processing block 20-5.
[0052]
Then, the first register (for setting the total number of DMA transfer data) sets the data amount of the R, G, and B image data after the TIFF conversion of the Y, Cb, and Cr image data in the first memory device 30 to the TIFF data size. Register 61), and the number of UNIT transfer bytes in the unit for issuing the next command is set in the second register (register for setting the number of DMA interrupted data) 62 to the DMA processing / data conversion processing block 20-4. , Starting, reading out the Y, Cb, Cr image data from the first memory device 30, and converting the Y, Cb, Cr image data into TIFF data (R, G, B image data). , The process of writing TIFF data (R, G, B image data) to the second memory device 50 is multiplexed.
[0053]
Here, since the media receives data in units of 512 bytes, if TIFF data of 171 pixels is output, a fraction of 1 byte is output. However, 1024 bytes of data are recorded, and the data size is 513 bytes, and the directory entry is 513 bytes. Record. The personal computer uses only 513 bytes of information of 1024 bytes.
[0054]
When the data transfer ends with the number of UNIT transfer bytes, the control device 40 again performs the FAT data reading process of the second memory device 50, the free space calculation process, the command issuing process to the memory device 50, and the unit for issuing the next command. Is set in the second register 62, and the unit transfer is started. Until the total number of bytes of the DMA transfer set in the second register 61 is completed, TIFF data recording is realized by repeating the command issue and the UNIT transfer.
[0055]
The end of the data transfer in the unit transfer byte count is detected as follows. Does the DSP device 20 constantly monitor the number of transfer data and interrupt the DMA transfer when it matches the value of the second register 62? In addition, the DSP device constantly monitors the total number of DMA transfer data, and when it reaches the value of the first register 61, an interrupt occurs, notifies the microcomputer, and terminates the DMA transfer. At this time, the address register of the DMA is not reset.
[0056]
The end of the DMA processing is performed when the DSP device 20 constantly monitors the number of transfer data and the number of transfer data reaches the set value of the first register 61. At this time, another interrupt occurs. At this time, the address register of the DMA is reset.
[0057]
According to this embodiment, the DMA transfer can be interrupted in the data management unit of the second memory device 50 by setting the number of data corresponding to the data management unit of the second memory device 50 in the second register 62. During the interruption of the DMA transfer, the command can be issued by releasing the bus to the second memory device 50 to the indirect register access processing block 20-5. In addition, the address of the first memory device that is the DMA transfer source is held in the state at the time of interruption, and when the DMA is resumed after the command is issued, the transfer can be performed from the address continuous with the address at the time of interruption. 30, a data transfer process between the Y and Cb and Cr image data to an R, G and B image data, and a data transfer process between the second memory device 50 and the DSP device 20. Multiplexing of the data transfer process can be performed, the access process to the second memory device 50 can be reduced, and the total recording time can be reduced.
[0058]
Also, the address at the time of DMA interruption is held, and DMA processing is restarted from the next address of the held address, so that address management for DMA processing is simplified.
[0059]
By utilizing the present invention, the recording process can be shortened in the camera system, and this technology will be used as the number of pixels increases in the future, and a comfortable user interface will be obtained.
[0060]
【The invention's effect】
According to the recording method on the medium of the present invention, by setting the number of data corresponding to the data management unit of the recording medium in the second register, it is possible to interrupt the DMA transfer in the data management unit of the recording medium. By releasing the bus to the recording medium during the interruption of the transfer, it is possible to issue a command to the recording medium.
[0061]
As a result, a command can be issued in the middle of the total number of data transfers, and when the interrupted DMA is restarted, the register to be operated is only the retransfer start bit, and high-speed access can be performed. Therefore, when recording continuous data on a medium, DMA transfer to the medium can be performed without considering the address management of the original data. When the DMA is restarted, the number of registers to be controlled is reduced, and the DMA transfer can be restarted at a high speed.
[0062]
Also, the address at the time of DMA interruption is held, and DMA processing is restarted from the next address of the held address, so that address management for DMA processing is simplified.
[0063]
In particular, according to the third aspect of the present invention, the DMA transfer source address is held in the interrupted state, and when the DMA is resumed after the command is issued, the data can be transferred from the address continuous to the interrupted address, thereby enabling data transfer. Processing and data conversion processing from Y, Cb, Cr image data to R, G, B image data can be multiplexed, so that access processing to a recording medium can be shortened, and the total recording time can be shortened. Can be achieved.
[0064]
Further, according to the second and fourth aspects of the present invention, the microcomputer in the medium can handle a large amount of data, and the writing process can be realized at high speed.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a digital still camera for explaining a recording method on a medium according to the present invention.
FIG. 2 is a schematic diagram showing set values of first and second registers.
FIG. 3 is a block diagram illustrating a configuration of a digital still camera of a proposal example.
FIG. 4 is a flow chart of a ratio of a recording processing time in the configuration of FIG. 3;
FIG. 5 is a flow chart of a ratio of a reproduction processing time in the configuration of FIG. 3;
[Explanation of symbols]
10 Image input device
20 Video signal processing, compression / decompression processing equipment
20-1 Video signal processing block
20-2 compression / decompression processing block
20-3 CPU Interface Processing Block
20-4 DMA Processing / Data Conversion Processing Block
20-5 Indirect Register Access Processing Block
30 first memory device
40 control device
50 Second memory device
61 1st register (DMA transfer total data number setting register)
62 Second register (DMA interrupt data number setting register)

Claims (4)

The first register sets the total number of DMA transfer data to the recording medium, and the second register sets the number of DMA interrupted data to temporarily suspend the DMA transfer and issue the next media access command during the DMA total data transfer. Then, until the DMA total data of the DMA transfer total data set in the first register is transferred, the DMA data of the DMA interrupted data set in the second register is transferred. Recording method for temporarily interrupting DMA transfer, opening a bus to the recording medium, enabling the issuance of the media access command, and realizing recording on the recording medium every time DMA transfer is interrupted. . The amount of data converted from Y, Cb, Cr image data to R, G, B image data is set in the first register as the total number of DMA transfer data to the recording medium, and the next media access command is issued. The number of DMA interrupted data to be transferred is set in the second register depending on the FAT empty area of the recording medium, and the Y, Cb, and Cr image data is converted to R, G, and B image data while being converted to the recording medium. 2. The method for recording on a medium according to claim 1, wherein the TIFF recording is realized by performing the TIFF recording. An image input device, a first memory device, a control device, a second memory device as a recording medium for image data managed by the DOS-FAT system, and an image signal output from the image input device. A video signal processing block that stores Y, Cb, and Cr image data in a first memory device; an interface processing block that performs an interface process with respect to the control device; a DMA process between the first memory device and the second memory device; DMA processing / data conversion processing block for performing data conversion processing from Y, Cb, Cr image data to R, G, B image data, and indirect register access processing between the control device and the second memory device A DSP device comprising an indirect register access processing block for performing A of the indirect register access processing method of recording media in a digital still camera for implementing the issuance and access commands to said second memory device through an internal register of the block,
The first register sets the total number of DMA transfer data to the recording medium, and the second register sets the number of DMA interrupted data to temporarily suspend the DMA transfer and issue the next media access command during the DMA total data transfer. Then, until the DMA total data of the DMA transfer total data set in the first register is transferred, the DMA data of the DMA interrupted data set in the second register is transferred. Recording method for temporarily interrupting DMA transfer, opening a bus to the recording medium, enabling the issuance of the media access command, and realizing recording on the recording medium every time DMA transfer is interrupted. . The amount of data converted from Y, Cb, Cr image data to R, G, B image data is set in the first register as the total number of DMA transfer data to the recording medium, and the next media access command is issued. The number of DMA interrupted data to be transferred is set in the second register depending on the FAT empty area of the recording medium, and the Y, Cb, and Cr image data is converted to R, G, and B image data while being converted to the recording medium. 4. The method for recording on a medium according to claim 3, wherein the TIFF recording is realized by using TIFF recording.

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