JP2004138529A - Method for error analysis by cosmic ray neutron - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quickly evaluate soft error analysis by cosmic ray neutrons with over wide-range parameters. <P>SOLUTION: Construction of a device model by a hierachized component, start analysis technique for secondary ions on the basis of the characteristic values of the component, a simple inputting method and numeralization for a two-dimensional pattern and an error decision method based on them, encapsulation which enables a reuse of midway computation results from nuclear spallation reaction up to charge collection by secondary ions, and a simplified recomputation method for each capsule, are provided. <P>COPYRIGHT: (C)2004,JPO

Description

【００２４】
図８はＳＲＡＭメモリセルについて構築したモデルを説明する構成図であり、図８（ａ）は図８（ｂ）のＡ１−Ａ２断面図、図８（ｂ）は上面図である。
図８（ａ）の断面図に示すように、物理ノード２３には近くをイオンが通過しただけで電荷がドリフトで収集される領域が存在し、これと空乏層、物理ノードを含めて鋭敏領域２４と称する。鋭敏領域２４のうち、物理ノード２３内以外で発生した電子または空孔は物理ノード２３に収集されると考える。電子情報通信学会論文誌、Ｖｏｌ．　Ｊ７１−Ｃ、Ｎｏ．１０、ｐｐ．１４３６−１４４１（１９８８）記載のように、対向するソース・ドレイン間にイオンが貫通すると、無条件でエラーになるモード（ＡＬＰＥＮ効果）が提案されており、このＡＬＰＥＮ効果評価のため、図８（ｂ）の上面図に示すソース・ドレイン間のチャネル領域２９もコンポーネントとして考える。通常、物理ノードの側面は部分的に素子分離用酸化膜２８が接しているため、酸化膜２８の厚さ分のウェル２６、２７に該当する部分を便宜上アクテイブ３０と呼び、酸化膜下のウェルとは区別することにする。
【００２５】
基板上面は通常、配線／コンタクトと層間絶縁膜があるだけなので、電荷収集領域とはならないが、熱中性子がＢＰＳＧ膜中の^１０Ｂと反応してα粒子と^７Ｌｉが発生して、主として^７Ｌｉによりエラーが発生するような場合や、酸化膜、配線やコンタクトに不純物としてα線源が含まれている場合、Ｗ、Ｃｕなど重い元素を含む部品がある場合、発生する２次イオンも重くなるため、ソフトエラー耐性は低下する可能性がある。そのような評価のためには、基板上面の配線や層間絶縁膜などの部品もコンポーネントとして考慮する必要がある。
以上、述べたように、デバイスのコンポーネントとしては、ユニットも含め、物理ノード、鋭敏領域、アクテイブ、ウェルが最低減必要である。必要に応じて、チャネル、アイソレーション層、配線、コンタクト、層間絶縁膜を加える。
【００２６】
次に、核反応発生点の決定法について詳述する。
核破砕反応発生点の座標はユニット内に均等に選定する必要がある。ユニットの形状が直方体のように単純な場合は簡単で、直方体のＸ、Ｙ、Ｚ方向の辺の長さＬ_ｘ、Ｌ_ｙ、Ｌ_ｚに対し、それぞれ独立に乱数ｒｎｄを発生させ、次式で反応座標ｘ、ｙ、ｚを決めれば良い。
【００２７】
【数１】

多くのモンテカルロ計算では、上記の手法で十分である場合が多い。
【００２８】
ところが、宇宙線中性子ソフトエラー解析では、６角形のユニット（ハニカム構造）や、熱中性子の反応部位、コンポーネント毎に反応解析をする必要がある場合など、対象コンポーネントの形が複雑な場合が多く想定され、上記の手法では破綻する。そこで、本発明者らは次のような方法を考案した。
図９は多角形コンポーネントの三角柱コンポーネントへの分割方法を説明するための模式図である。先ず、図９に示すように多角形３４をその頂点を共有する三角形に分割する。それぞれの三角形の面積は三角形を構成する２辺から形成されるベクトルを使って、例えば三角形ＡＢＣについては、
【００２９】
【数２】

のように計算できる。
【００３０】
核破砕反応の発生点はこの三角形の面積Ｓ_ｉの全体の面積Ｓに対する比率Ｐ_ｉを用いて、
【数３】

のように、発生する三角柱番号ｉが決定できる。但し、Ｐｉ＝Ｓｉ／Ｓである。
【００３１】
次に、該三角柱内で発生する核破砕反応点のＸＹ面内の位置の決定について、図１０を用いて説明する。
図１０は三角形内にランダムに核破砕反応点を分散させる方法を説明するための模式図である。三角柱の上面または下面の三角形が図１０の三角形ΔＡＢＣ３５のようであった時、任意の辺の中点３７に対して点対象な三角形ΔＡＢＤ３６を形成し、全体として平行四辺形を形成する。平行四辺形の幅、高さ、斜辺の傾きをＬ、ｈ、θとした時、次式のようにすれば平行四辺形内に一様な確率で座標を決定できる。
【００３２】
【数４】

このようにして決めた点Ｐが、新たに付け加えられた三角形３６内にある時は、中点３７に対して点対象な位置Ｐ’におり返して、もとの三角形３５内の座標を決めれば、もとの三角形３５内で一様性を保ちながら、核破砕反応点を決めることができる。一般に多角形内に点があるか否かの判定は、多角形を含むと同一無限面内に点があり、点と多角形の頂点を一定の方向に順番に線でつないだ時連続する線が作る角度の総和が３６０度になれば良い。この時、新たな線が逆方向になった時は角度を負にすると約束する。核破砕反応のｚ軸方向位置は高さ方向に任意の位置に設定すれば良い。
【００３３】
デバイス内でイオンが鋭敏領域を通過するセルの絞込みのフローをその後の収集電荷量解析のフローを含め、図１１に示す。
図１１は構築したデバイスモデルを用いて２次イオンが通過した物理アドレス、物理ノードを求める場合の処理動作の一実施例を示すフローチャートであり、個々の２次イオンが通過するユニットの物理アドレスの求め方、ユニット内に複数の物理ノードがある場合のエラー判定のフローを示すものである。まず、デバイスの鋭敏領域の上端面と下端面で挟まれる部分を電荷収集層とし、ステップ１１０１で、２次イオンがこの電荷収集層を通過した場合、ステップ１１０２で、電荷収集層の入射点、出射点を計算し、ステップ１１０３で、入射点から出射点までの範囲で通過する全てのユニットについて順次鋭敏領域全体としての物理ノードを通過するか否かを判定し、ユニットセル内の物理ノードを通過した場合には、ステップ１１０４で、物理ノード毎の収集電荷量を計算し、ステップ１１０５で、対応する論理ノードへの収集電荷を積分していく。論理ノードへの収集電荷量が求まった後、ステップ１１０６で、総収集電荷量が臨界電荷量より大きく、ステップ１１０７でノードが有感状態にあれば、ステップ１１０８で、エラー登録（ＳＥＵ登録）をする。
【００３４】
エラー判定特定セルの鋭敏領域を通過しなければそのセルについて軌道解析する必要は無いので、先ず、図８（ａ）に示したように、鋭敏領域の上面３１、下面３２を含む無限平面ではさまれる鋭敏領域層３３を想定し、イオンがこの層を通過する座標を計算する。
イオンの軌道方程式は以下で表される。なお、ψは方位角である。
【００３５】
【数５】

平面の方程式が、
【数６】

とすれば、交点までのイオン軌道の長さｌ_ｐは、
【数７】

となる。
【００３６】
イオン軌道の長さｌ_ｐの値が負の時は、イオンは面から逆方向に飛んでいることになり計算を継続する必要は無い。ｌ_ｐを使って交点の座標は（数６）より求められる。
鋭敏領域層の上下面の通過点が決まれば、その２点を結ぶ線が通過するセルが解析対象のセルとなる。イオンの発生位置が鋭敏領域層の中の場合は、線の一方の端は発生点になる。イオンの停止位置が鋭敏領域層の中の場合も同様である。解析対象のセルが決まった時、次はセル内の鋭敏領域を実際に通過するか否かの判定をする。イオンの発生点または停止点も通過点とみなし、まずこれらがコンポーネント内にあるか否かを判定する。これは、点のＺ座標が鋭敏領域と同範囲にあり、２次元面内位置が鋭敏領域内にあることで判定できる。
【００３７】
真の通過点を求めるには、図１２に示すように鋭敏領域に対応するコンポーネント３８の面の全てについて、イオンの軌道３９との交点の有無を判定する。
図１２は典型的なコンポーネントについて２次イオン通過の判定法を説明するための模式図であり、典型的なコンポーネントとして六面体のコンポーネントを用いた。判定方法は鋭敏領域層について前記したように、該当する面を含む無限平面とのイオン軌道の交点４０、４１を求め、ｌ_ｐが正の場合、交点がコンポーネントの面内にあるかどうかを判定する。面内にあれば、その点は実際にコンポーネントを通過していることになる。
【００３８】
図１３は典型的なコンポーネントについて２次イオン通過の判定を行うためのフローチャートであり、ここでは、次イオンが複数の面から構成されるコンポーネントを通過するか、否かを判定する。まず、ステップ１３０１で、イオン発生点、またはステップ１３０２で停止点がコンポーネント内である場合には、それぞれ通過端点として記録する。次に、コンポーネントを構成する全ての面について、ステップ１３０３で、構成面を含む無限平面でのイオン飛跡との交点座標を計算し、ステップ１３０４で、イオンの進行方向が正方向か否かに決定する。次に、正の場合には、ステップ１３０５で、構成面との交点座標は構成面内か否かについて判定し、構成面内の場合には、ステップ１３０６で通過端点を登録する。ステップ１３０７で、通過端点が２点の場合には、ステップ１３０８で、そのイオンはそのコンポーネントを通過したことになる。それぞれの面の通過判定は、イオンの軌道と面を含む無限平面との交点を求め、その点が面内部にある場合、通過したとみなす。
【００３９】
イオンが物理ノードを通過し、さらに空乏層（コンポーネント下面、酸化膜に接していない側面）を通過している場合、ファネリング長の計算が必要になる。ウェルが反対極性のアイソレーション層に接しており、イオンが物理ノードの空乏層とアイソレーション層の両方を通過している場合、ウェル内のイオン軌道長の半分を電荷収集長とする。ファネリングが起きた時の電荷収集長はイオンが水平に近い状態で入射した時、これまでの扱いではウェル内で、イオンの飛程を上限として長くなりうるが、実際には、長くなるほど電界も弱くなり、電子と正孔の再結合確率も高くなるため補正が必要である。本発明者らは、電荷の収集効率は収集長が長くなるほど指数関数的に低下すると仮定し、次式のような補正法を採用した。
【００４０】
【数８】

ここで、ｘ_ｃは電荷収集長、Ｑ_ａｌｌは電荷収集長内の電子または正孔の全電荷、Ｑ_{ｃｏｌｌｅｃｔ}は実際に収集される電荷量、Ｌ_ｃｍａｘは実効的な最大収集長である。
【００４１】
以上のようにして計算したイオンの電荷収集軌道の解析例を図１４に示す。
図１４は典型的なＳＲＡＭについて、電荷収集のあった飛跡の表示例をデバイス上面に表示した上面図である。図は、中央のセル４２で核破砕反応を発生させ、２次イオンが発生した電荷が物理ノードに収集された場合だけ、軌跡を描いている。２次イオンが中央のセルから周辺のセルに向かって放射状に飛散し、各種のコンポーネントを通過している様子が良くわかる。
【００４２】
以上、デバイスモデルの効率的な構築方法と物理的な２次イオンの挙動解析手法を述べてきたが、最終的なエラーの判定はセルの論理状態を考慮して決定する必要がある。例えば、デバイスのソフトエラー耐性の評価試験では、特定のデータパターン（“１”、“０”の２次元パターン）で試験をすることが多いが、単純な場合はともかく、少し複雑なパターンになると、計算上の入力も解析も容易でない。少なくとも、データパターンの影響を解析で求める公開された技術は見当たらない。そこで、発明者らは以下のような手法を考案した。
図１５はメモリデバイス内の初期データパターンの入力方法を説明するための図であり、図１５（ａ）はコンピュータの入力画面に表示されたデータパターンを示し、図１５（ｂ）は図１５（ａ）のパターンを２次元方向の広げた場合の模式図である。
先ず、図１５（ａ）に示すようにコンピュータの入力画面に、最小繰り返しパターンの大きさの格子を表示させ、その格子の桝目に“１”または“０”を直接入力し、データパターンとする。このようにすれば、データパターンの入力は容易に行える。実際のデバイスに対しては図１５（ｂ）に示すように、このパターンを２次元方向に敷き詰めれば良い。
【００４３】
次に、このパターンを以下の式のように配列化する。但し、ｉはｘ方向、ｊはｙ方向の繰返しパターンの中の座標である。
【数９】

あるセルの論理ノードにエラー発生に十分な電荷が収集された場合、そのデバイス中の物理アドレス（２次元でのＸＹ位置番号。例えば中心セルを（０、０）とし、右横のセルは（１、０）等とする）が、（Ｎ_ｘ、Ｎ_ｙ）（Ｎ_ｘ、Ｎ_ｙは非負とする）とした時、
【数１０】

のようにして該セルの論理状態を求め、物理ノードとの表１で例示したような対応を考慮して、最終的にそのセルがエラーになるかどうか、を決定する。
【００４４】
さらに、ＭＢＵ解析の場合、同一ワード内のビット配置パターンを決定し、解析する必要がある。　の場合のパターンはそれほど複雑では無く、図１６に示すように、ＸまたはＹ方向に一定間隔置き、斜めにジグザグ、斜め一直線程度である。
図１６はメモリデバイス内の同一ワード内ビットパターンの入力方法を説明するためのビットパターンである。図は各種のデータパターンが示されており、同じワードのビットが横方向に一直線に並んでいる場合、縦方向に一直線に並んでいる場合、斜め方向に一直線に並んでいる場合、ジグザグの並んでいる場合を示している。図において、Ｘ、Ｙ方向の間隔を数値で入力すれば、Ｘ方向はＹ間隔がゼロ、Ｙ方向はＸ間隔がゼロ、斜め一直線はＸ、Ｙ間隔とも正、Ｘ方向ジグザグはＹ間隔を負、Ｙ方向ジグザグはＸ間隔を負で与えるなどの約束を決めれば各種のパターンの入力が可能である。
【００４５】
実際に１回の核破砕反応イベントで複数のセルがエラーを起こした場合、図１７に示すフローに従ってＭＢＵの判定をする。
図１７はメモリデバイス内のＭＢＵを抽出する解析の一実施例を示すフローチャートである。図において、先ず、ステップ１７０１で、ＭＣＵを起こしたセルのうち、特定のセル（例えば最初に登録されたセル）のワード内ビット番号をランダムに定め、同時エラーセルの解析を行う。同時にエラーを起こした全てのビットについて、その他のセル（Ａ以外）の物理アドレスがセルＡに対してビットパターンが一致する配置にあるか否かをステップ１７０４で判定し、一致する配置にある場合には、かつビット番号が同一ワード内であるときに、ステップ１７０５で、ＭＢＵと判定して、ＭＢＵ登録する。ステップ１７０６で、ＭＢＵとしての重複度Ｎ_ｍｂｕを求める。
【００４６】
このようにして求めた物理アドレス空間のエラービット位置（黒丸）表示例を図１８に示す。
図１８はメモリデバイス内でエラーのあったセルの物理アドレス分布を示す分布図である。図の黒点はエラーのおきた物理アドレスを示す。本発明によれば、これだけの大きなエラーの広がりと分布の歪を解析することができる。
【００４７】
シミュレータＣＯＲＩＭＳが入射粒子のエネルギーの任意のスペクトルに対応できることは特開２０００−２１５２５５号公報にその方法と共に示したとおりであるが、高度を変えた国内３ヶ所のフィールドでの実デバイスの測定結果とシミュレーション結果を図１９に示す。
図１９は国内３ヶ所で実施したフィールドでのエラーの実測値とシミュレーション結果を示す特性図であり、横軸に高度（ｍ）を、縦軸にエラーレート（Ａ．Ｕ．）を示す。図において、黒い菱形は測定結果を、折れ線はシミュレーション結果を示す。図に示すように、測定結果とシミュレーション結果は誤差２０％以内で良く一致しており、ＣＯＲＩＭＳが一通り満足できる精度を有していることがわかる。
【００４８】
以上、半導体デバイスの中性子ソフトエラー耐性を評価するためのシミュレーション手法について述べてきたが、宇宙線中性子ソフトエラーはデバイスの諸設計条件に依存して、多くの場合一層厳しくなることが予想され、評価に止まらず、耐性の向上策を練っていく必要がある。しかしながら、ここで問題になるのは、とりうる設計上のオプションや解析対象となるデバイスの数の多さに対し、例えば、図１９に示したシミュレーション結果は一点数時間の計算時間を要しているため、全てのオプションの吟味には大変な時間と労力を要する点に問題と限界がある。
【００４９】
各種のオプションの吟味を短時間で効率良く実施するため、発明者らはさらに以下に述べる４手法を考案した。
（１）中性子ソフトエラー計算は核破砕反応、２次イオン軌道解析、電荷収集解析、パターンに応じたエラー解析が大きなフローであるが、図１に示すように物理ノードへの電荷収集があった全ての場合について、少なくとも、核破砕反応イベント番号、セルの物理アドレス、物理ノード位置、電荷収集量を核破砕反応イベント単位で一まとめのデータとしてカプセル化し、データベースとして登録しておけば、これを利用して別オプションでの簡易再計算が可能になる。この時、実際より低い仮の臨界電荷量を与え、登録する範囲を広げておく。仮の臨界電荷量が余り小さいと、登録量が多くなりデータベースの負担になることにも注意が必要である。登録データのカプセルを出発点とすれば、核破砕反応、イオン軌道解析の負担が無くなるので、図２０に再計算フローを示すように、データパターン、ビットパターン、各種エラーモードの臨界電荷量を変えた時の結果が極めて短時間（発明者らの例では数秒）で得られる。
図２０は仮登録したエラーのデータベースを用いて別条件での計算を行う場合の処理の一実施例を示すフローチャートであり、図１に示した方法により作成したデータベースを活用し、同じデバイス、照射条件で、異なる臨界電荷量、データパターン、同一ワード内ビット配置に対する高効率シミュレーションのフローを示す。図において、ステップ２００１で、データパターン、ビットパターン、各モードの臨界電荷量を設定する。次に、全ての、ステップ２００２で確認する仮録エラーについて、ステップ２００３で、入射中性子ＩＤ番号、エラーモード、セル内ビット位置、収集電荷量、物理アドレス、核反応点からの距離などを読み込み、ステップ２００４で、収集電荷量が臨界電荷量よりも大きい場合には、ステップ２００５でノード有感状態か否かを判定し、ノード有感状態である場合には、ステップ２００６でＳＥＵを登録する。次に、ステップ２００７で、同時エラービットがある場合には、ステップ２００８でＭＣＵ登録を行い、ステップ２００９で同一ワードの場合にはステップ２０１０でＭＢＵ登録をする。このように、本実施例では、設定したパラメータに応じてエラー判定を行う。
【００５０】
この方法では、照射条件、デバイスの種類の組み合わせについて、一度計算しておけば、条件を変えた時の計算は再計算で実施できる。
（２）前記した手法はさらに以下のように拡張できる。
図２１は個別の核破砕反応について、仮登録する物理量の一実施例を示す模式図である。図２１に示すように、核破砕反応が起きた時の２次イオン４３の種類、エネルギー、方向はユニットの中の位置には依存せず決まる。そこで、核破砕反応イベント毎に生成する２次イオンの種類（例えば、原子番号（Ａ）、質量数（Ｍ））、エネルギー（Ｅ）、方向（方位角（Φ）、天頂角（θ））を順番に一まとめのデータとしてカプセル化し、データベースに登録しておけば、図２２に示すように２次イオンの発生位置を改めてランダムに設定することにより、全く別条件での結果が短時間で得られる。
図２２は個別の核破砕反応の仮登録データベースから、任意のデバイスについて別条件で解析する場合の一実施例を示す概略のフローチャートであり、仮登録した２次イオンデータを再利用して高効率シミュレーションをする場合の解析フローを示す。ステップ２２０１で核破砕反応毎に、発生するユニットをランダムに設定し、ステップ２２０２でそのユニット内で核破砕反応位置をランダムに設定し、ステップ２２０３でその点から、登録された２次イオンの種類、運動エネルギー、方向を使って軌道解析し、ステップ２２０４でエラーを判定し、登録する。
前記した手法（１）の場合は、再計算で評価できるオプションは、データパターン、ビットパターン、各エラーモードの臨界電荷量であったが、本手法では、照射条件が同じであれば、材料が同じ全てのデバイスについて簡易再計算が可能になる。本手法では、核破砕反応解析の負担が無くなる。
【００５１】
（３）さらに各種のコンポーネントの材料が異なる場合や、化合物である場合、上記２手法を以下のように拡張できる。
図２３は入射中性子のエネルギー毎に弁別して核破砕反応の仮登録データベースを作成する場合の一実施例を示すフローチャートである。図２３にフローを示すように、ステップ２３０１で、予め、中性子のエネルギーをグループ分けしておき、ステップ２３０２で中性子のエネルギー群毎のフラックスに分割し、ステップ２３０３で中性子のエネルギー群毎のユニット材料の全反応断面積に応じて核破砕数を決定し、全てのエネルギー群の計算がステップ２３０４での判定で計算が終了するまで、エネルギー群毎に、ステップ２３０５で全反応数を計算したか否かを判定し、計算途中の場合には、ステップ２３０６で単体元素を構成材料としたユニットに対し、核破砕反応を解析し、ステップ２３０７で、その時の中性子（例えば順序付けした番号）、中性子エネルギー、所属するエネルギー群（例えば番号）、発生した２次イオンの種類（例えば原子番号、質量数）、エネルギー、方向を一まとめのデータとしてカプセル化し、データベースに登録する。こうしたデータベースを材料毎に用意すれば、任意の中性子スペクトル、任意の構造、材料組成のデバイスの組み合わせについて再計算が可能になる。
【００５２】
実際の再計算の手法を図２４に示す。
図２４は入射中性子のエネルギー毎に弁別して仮登録した核破砕反応のデータベースを用いて任意のスペクトル、任意のデバイスについて解析する場合の一実施例を示すフローチャートである。図において、先ず、ステップ２４０１で与えられた任意の中性子スペクトルを、予め定めたエネルギー群に分割して、ステップ２４０２でエネルギー群毎のフラックスを求める。ステップ２４０３で各エネルギー群、コンポーネントの材料毎に、フラックスと全反応断面積に対応して計算上の核破砕反応数を決定し、その数だけ核破砕反応を起こす。ステップ２４０４で、全エネルギー群の計算を行なっている場合には、ステップ２４０５で全反応数計算したかを判別し、計算途中の場合には、ステップ２４０６で、核破砕反応を起こしたコンポーネントの材料毎にデータベースから該当する中性子エネルギー群の１核破砕反応イベントに対応するカプセルデータをランダム抽出し、ステップ２４０７で全２次イオンの計算を行なう。計算中の場合、ステップ２４０８で、以後の２次イオン軌道解析を行い、ステップ２４０９でエラー解析を実施する。コンポーネントの材料が化合物の場合は、その組成比と全反応断面積の積に対応させて反応核種を決定する。
【００５３】
（４）以上の３手法では、核破砕反応をイベント毎に、ある判定条件を満たしたもの全てを登録する必要があったが、２次イオンの種類毎に、エネルギースペクトルを保存しておく手法もある。
図２５は核破砕反応の結果生成される２次イオンのエネルギースペクトルを概念的に示す特性図であり、横軸に２次イオンのエネルギーを示し、縦軸に発生頻度を示す。図において、ｐは陽子を、αはアルファ線を、ＬｉはＬｉの２次イオンを、ＳｉはＳｉの２次イオンを示し、面積が発生頻度を示す。
核破砕反応の結果、２次イオン毎に図２５に示すようにエネルギースペクトルが得られる。このスペクトルは照射条件、材料が同じであれば、モンテカルロシミュレーションの誤差の範囲内で一致する。
【００５４】
図２６は核破砕反応の結果生成する２次イオンのエネルギースペクトルを用いて、別条件の解析をする場合の一実施例を示すフローチャートである。上記の事実を利用して、図２６にフローを示すように、エネルギースペクトルをイオン種毎にカプセル化してデータベースに登録し、これを利用した再計算が可能になる。すなわち、ステップ２６０１で、エネルギースペクトルの面積（図２５にα粒子について示した）に比例して発生する２次イオンの種類を決定したのち、ステップ２６０２で、該当するイオンのスペクトルを用いてイオンのエネルギーを決定する。次に、ステップ２６０３で、デバイス内の発生位置を確定し、イオンの進行方向はランダムに設定すれば、ステップ２６０４で、手法（１）と同等のエラー解析の再計算が可能となる。但し、この手法は核破砕反応イベント毎ではないので、ＭＣＥ、ＭＢＵの評価はできない点に限界もある。
【００５５】
なお、モンテカルロシミュレーションで実施される反復計算の単位フローについて、特定の状態、または時間フェースの途中計算結果の一部または全てを一旦保存し、別な条件の計算に再利用して、計算効率を高めるという考え方はモンテカルロシミュレーション一般に応用可能である。
また、本実施例は、説明を簡単にするために、ソフトエラーに限定したが、エラー判定以外の核破砕反応から電荷収集量計算までの手法はハードエラーでも全く同一である。
【００５６】
【発明の効果】
以上述べたように、本発明によれば、任意の材料組成、複雑形状のデバイスおよびその設定条件のモデル化が高効率で実施でき、任意の照射環境で、数多くの評価パラメータを高効率で評価できるため、半導体デバイスの宇宙線中性子ソフトエラーの評価・予測から耐性向上技術の確立までの労力・期間を著しく低減できる。
【図面の簡単な説明】
【図１】宇宙線中性子ソフトエラー耐性の解析フローを、途中計算結果を抽出すると共に、個別の２次イオンの発生以降について軌道解析の一実施例を示すフローチャートである。
【図２】宇宙線中性子ソフトエラーのメカニズムを概念的に示す断面図である。
【図３】ソフトエラー耐性の動作電圧依存特性を示す特性図である。
【図４】宇宙線中性子ソフトエラー耐性の解析を個別の２次イオンの発生以降についての解析処理動作の一実施例を示すフローチャートである。
【図５】デバイスモデルを構成する部品の階層構造を示す模式図である。
【図６】多角形柱のユニット内相対位置の座標を設定する方法を説明するための模式図である。
【図７】ＳＲＡＭについて「物理ノード」「論理ノード」の定義を説明するための回路図である。
【図８】ＳＲＡＭメモリセルについて構築したモデルを説明する構成図である。
【図９】多角形コンポーネントの三角柱コンポーネントへの分割方法を説明するための模式図である。
【図１０】三角形内にランダムに核破砕反応点を分散させる方法を説明するための模式図である。
【図１１】構築したデバイスモデルを用いて２次イオンが通過した物理アドレス、物理ノードを求める場合の処理動作の一実施例を示すフローチャートである。
【図１２】典型的なコンポーネントについて２次イオン通過の判定法を説明するための模式図である。
【図１３】典型的なコンポーネントについて２次イオン通過の判定を行うためのフローチャートである。
【図１４】典型的なＳＲＡＭについて、電荷収集のあった飛跡の表示例をデバイス上面に表示した上面図である。
【図１５】メモリデバイス内の初期データパターンの入力方法を説明するための図である。
【図１６】メモリデバイス内の同一ワード内ビットパターンの入力方法を説明するためのビットパターンである。
【図１７】メモリデバイス内のＭＢＵを抽出する解析の一実施例を示すフローチャートである。
【図１８】メモリデバイス内でエラーのあったセルの物理アドレス分布を示す分布図である。
【図１９】国内３ヶ所で実施したフィールドでのエラーの実測値とシミュレーション結果を示す特性図である。
【図２０】仮登録したエラーのデータベースを用いて別条件での計算を行う場合の処理の一実施例を示すフローチャートである。
【図２１】個別の核破砕反応について、仮登録する物理量の一実施例を示す模式図である。
【図２２】個別の核破砕反応の仮登録データベースから、任意のデバイスについて別条件で解析する場合の一実施例を示す概略のフローチャートである。
【図２３】入射中性子のエネルギー毎に弁別して核破砕反応の仮登録データベースを作成する場合の一実施例を示すフローチャートである。
【図２４】入射中性子のエネルギー毎に弁別して仮登録した核破砕反応のデータベースを用いて任意のスペクトル、任意のデバイスについて解析する場合の一実施例を示すフローチャートである。
【図２５】核破砕反応の結果生成される２次イオンのエネルギースペクトルを概念的に示す特性図である。
【図２６】核破砕反応の結果生成する２次イオンのエネルギースペクトルを用いて、別条件の解析をする場合の一実施例を示すフローチャートである。
【符号の説明】
１…宇宙線中性子、２…２次イオン、３…拡散層、４…空乏層、５…ウェル、６…ファネリング、７…キャパシタ、８…下地アイソレーション、９…層間絶縁膜、１０…配線層、１１…多角形の第１辺、１２…基準線、１３…多角形の第２辺、１４…ストレージノード、１５ａ、ｂ…ｎＭＯＳＦＥＴ、１６…ストレージノード、１７ａ、ｂ…ｐＭＯＳＦＥＴ、１８ａ、ｂ…ドライバＭＯＳＦＥＴ、１９ａ、ｂ…ビットノード、２０…ビットラインペア、２１…電源側拡散層、２２…アース側拡散層、２３…ｎＭＯＳＦＥＴ拡散層、２４…鋭敏領域、２５…ｐＭＯＳＦＥＴ拡散層、２６…アイソレーション酸化膜、２７…ｎ−Ｗｅｌｌ、２８…ｐ−Ｗｅｌｌ、２９…チャネル、３０…アクテイブ、３１…鋭敏領域上面、３２…鋭敏領域下層、３３…鋭敏領域層、３４…多角形柱端面、３５…三角形、３６…追加三角形、３７…平行四辺形対角線の交点、３８…コンポーネント、３９…２次イオン飛跡、４０…２次イオン入射点、４２…２次イオン出射点、４２…核破砕反応を起こすセル、４３…同一の核破砕反応に属する２次イオン。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention quickly builds a model for analyzing errors caused by cosmic-ray neutrons in semiconductor devices, and utilizes intermediate calculation results from spallation reactions to charge collection to a diffusion layer to obtain various irradiation conditions and devices. Error analysis method using cosmic ray neutrons to analyze error tolerance under conditions, especially on soft error analysis method using cosmic ray neutrons
[0002]
[Prior art]
2. Description of the Related Art In recent years, high integration of semiconductor devices has been remarkably advanced, as represented by Dynamic Random Access Memory (hereinafter abbreviated as DRAM). With the increase in integration, the area of memory cells tends to shrink, and the capacitance of capacitors decreases, so it is generally considered that it becomes more difficult to ensure resistance to soft errors caused by alpha rays, neutron rays, and the like. (See Non-Patent Document 1).
A soft error is a phenomenon in which information stored in a memory cell is inverted. For example, "1" information written in a storage node of a memory cell is generated when an electric charge generated in a semiconductor device by an alpha ray, a neutron ray, or the like is generated in a pn junction. There is a problem that the information is collected by the storage node due to the effect of the electric field which is essentially attached and is rewritten to “0” information.
[0003]
Soft errors are temporary nondestructive phenomena, but with the miniaturization and high integration of semiconductor devices, there is a concern that new hard errors (destructive phenomena) may increase (for example, Non-Patent Documents 1 and 2). , 3, 4).
[0004]
The basic principle of the present invention is already known. (See Patent Document 1)
[Non-patent document 1]
IBM J.M. Res. Developer. Vol. 40, no. 1, pp. 19-29 (1996)
[Non-patent document 2]
IEEE Transactions on Nuclear Science, Vol. 45, no. 6, pp. 2492-2499 (1998)
[Non-Patent Document 3]
IEEE Transactions on Nuclear Science, Vol. 47, no. 6, pp. 2373-2379 (2000),
[Non-patent document 4]
IEEE Transactions on Nuclear Science, Vol. 47, no. 6, pp. 2640-2647 (2000)
[Patent Document 1]
JP 2001-215255 A
[0005]
[Problems to be solved by the invention]
Soft errors due to alpha rays were recognized in the late 1970's. Alpha rays are emitted from radioactive isotopes such as uranium (U) and thorium (Th) contained in trace amounts in wiring materials and package materials constituting semiconductor devices. In the 1980s, in order to improve the resistance to soft errors caused by alpha rays, mainly (1) purifying materials used for semiconductor devices, (2) shielding alpha rays generated from package materials with a polyimide layer, etc. ) Well-structured semiconductor devices have been devised such as increasing or securing memory capacity and (4) providing a barrier layer for generated carriers. It is thought that the soft error caused by alpha rays was almost solved by this.
[0006]
On the other hand, the possibility of soft errors caused by cosmic rays and neutrons was pointed out at the end of the 1970s, almost the same as soft errors caused by alpha rays. Neutrons reaching the ground are generated by the reaction of high-energy cosmic rays with atomic nuclei such as oxygen contained in the atmosphere. ⁶ eV) to GeV (10 ⁹ eV) Very high energy secondary neutrons, up to the order.
[0007]
FIG. 2 is a sectional view conceptually showing the mechanism of the cosmic ray neutron soft error. In the figure, when a high-energy neutron 1 enters a semiconductor device, the neutron 1 collides with a nucleus of an atom constituting the semiconductor device at a certain probability, causing a spallation reaction. For example ²⁸ Protons from Si nuclei, from α particles, ²⁹ Si ( ²⁸ Secondary ions having all the atomic numbers are generated (the Si jumps out of the lattice position while absorbing the neutrons). The generated secondary ions 2 move in the semiconductor device while generating the number of electron-hole pairs corresponding to the energy. When the secondary ions pass through the diffusion layer portion 3 (hereinafter referred to as a storage node) that retains information, the charges generated in the electric field outside thereof flow along the electric field, and thus the charges are collected at the storage node 3. The electric field includes a depletion layer 4 outside the storage node 3 and a region called funneling 6 where the electric field of the depletion layer 4 extends in the well 5 region including the storage node 3. The semiconductor device shown in the figure is a DRAM in which a capacitor 7 is added on a storage node 3, but in many DRAMs, the lower periphery of the storage node (usually an n-type semiconductor) is formed of a semiconductor of opposite polarity (well and well). Further, a triple-well structure is employed in which the outside is surrounded by an isolation region 8 having the same polarity as the storage node. That is, when the pn junction is on both sides of the storage node 3 and the well 5 and the secondary ions 2 penetrate the storage node 3 and the isolation region 8, the funneling also extends from the pn junction around the isolation region 8. Approximately half of the generated charge is collected at the storage node 3. In this way, when the amount of collected charges exceeds a certain amount (critical charge amount), a phenomenon occurs in which “1” information is inverted to “0” information.
[0008]
It is basically the same as alpha-induced soft error, except for high energy neutrons,
(1) High energy of secondary ions generated,
(2) The scattering direction of secondary ions is isotropic,
Is different from the case of alpha rays. (1) indicates that the amount of charge generated in the semiconductor device is larger than that of alpha rays, and a soft error easily occurs in a semiconductor device in which the critical charge amount of the storage node is small. (2) shows the possibility that secondary ions may move from any direction when viewed from the storage node. The polyimide shielding (chip coat) used in the conventional countermeasures against alpha-ray soft errors uses neutron soft errors. Can not be a complete measure of
[0009]
On the other hand, miniaturization and low operating voltage of semiconductor memory devices are expected to continue without stopping in order to increase capacity and reduce power consumption, but one obstacle to this is to keep the critical charge high. To secure the capacitance of the storage node.
FIG. C. Baumann, 2000 IEEE Int'l Reliability Physics Symposium Proceedings, San Jose, CA, April 10-13, pp. 1-95. FIG. 152 is a characteristic diagram shown in FIGS. 152-157 (2000), and is a characteristic diagram showing operating voltage dependence of soft error resistance. The horizontal axis indicates the voltage (voltage) (V), and the vertical axis indicates the Normalized SER (au), that is, the standardized soft error rate of the SRAM. The white diamond lines indicate cosmic ray neutrons, and the black triangle lines indicate ¹⁰ A nuclear reaction with boron when a semiconductor device containing B is irradiated with thermal neutrons is shown, and a white square line shows α particles.
As shown in FIG. 3, when the operating voltage is reduced, the critical charge amount proportional to the product of the capacitance and the operating voltage is reduced, so that the error rate of the semiconductor device is increased. Further, it can be seen from the figure that the operating voltage dependency differs from each other. Alpha rays are the steepest, thermal neutrons are slower than that, cosmic ray neutrons have an inflection point at a certain value when the operating voltage is high, and even higher than that, the error rate greatly changes do not do.
[0010]
In any case, if the critical charge becomes too small, the cosmic-ray neutron soft error resistance continues to decrease, so it is important to secure the capacitance of the storage node. In a DRAM, Ta is used to reduce the cell area. ₂ O ₅ As a result, a lot of cost and manpower have been spent on adoption of high dielectric constant materials and development of adaptation processes. In an SRAM, since a capacitor is not usually built in unlike a DRAM, the capacitance of the storage node is being reduced, and this is also a constraint on the use of a low dielectric constant material for the interlayer insulating film.
[0011]
On the other hand, a case has been reported in which the secondary ions significantly increase the electrolytic strength in the vicinity of the gate oxide film, thereby destroying the oxide film (SEGR: Single Event Gate Rupture). It is possible that Furthermore, the miniaturization of semiconductor devices causes a significant complication of the vertical structure, the structure of cells such as elevated source / drain, and the arrangement of components such as diffusion layers, element isolation oxide films, wells, and wiring in cells. It is becoming impossible for simple device models to make evaluations that fully reflect reality.
[0012]
An object of the present invention is to provide a method of analyzing a cosmic ray neutron soft error for ensuring the resistance of a semiconductor device to a failure caused by a cosmic ray neutron in a short period of time. That is, a Monte Carlo simulation method for designing a semiconductor device is provided.
[0013]
[Means for Solving the Problems]
In order to evaluate the cosmic-ray neutron soft error resistance of a semiconductor device, the inventors reacted a neutron beam having an arbitrary energy spectrum with nuclear nuclei in the device, and generated secondary ions in the device. A Monte Carlo simulator CORIMS has been developed to analyze in detail the behavior of the charge collected at the storage node while flying over the sky.
[0014]
The basic principle is as described in JP-A-2001-215255 described in the conventional example, but the following improvements have been made to the basic analysis methods and algorithms to deal with complicated structures and arbitrary patterns. Short-term evaluation of MCU (Marcellular: multiple bits are selected in one nuclear reaction event) and MBU (multi-bit error: multiple bits in the same word of MCU are in error) Was realized.
1. Introduced the CAD method for device model construction, defined devices as a set of components, and made it possible to execute secondary ion orbit analysis in association with the model structure using a hierarchical device model centered on components. . Arbitrary polygons can be specified for the planar shape of the component, and it is possible to respond quickly to complicating component shapes and arrangements.
2. The calculation results from the spallation reaction to the device failure analysis were encapsulated so that they could be reused, and the complicated and time-consuming analysis parts were separated to realize faster analysis parameter evaluation.
3. An input / output method of an arbitrary two-dimensional pattern was established, and MCU and MBU analysis could be performed immediately.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings using some examples.
In the semiconductor device error analysis, an event occurring in one spallation reaction (one event) is defined as SEE (Single Event Effect), and among them, a soft error is defined as SEU (Single Event Upset). SBU (Single Bit Upset) when only a single cell (bit) in SEU causes an error, MCU (Multi-Cell Upset, MBU) when multiple cells simultaneously cause soft errors, A case where an error occurs in a plurality of bits in the same word in the memory of the MCU is called an MBU (Multi-bit Upset). Among them, the SBU has a rescue method called an ECC (Error Correction Code), which can cope with it. However, the MCU, especially the MBU, cannot cope with the normal ECC and is the biggest problem. Although a remedy method for the MBU is not impossible, there are disadvantages such as an increase in cost and an increase in chip area. Therefore, it is necessary to evaluate the MCU and MBU. However, it is necessary to evaluate in detail the effects of the data pattern in the device and the bit arrangement pattern in the same word, and there is no effective published method for this.
[0016]
In the cosmic ray neutron soft error simulation program CORIMS, analysis starts when high energy neutrons that have entered the device enter the constituent nuclei at an arbitrary random position in a specific cell in the device. By the intra-nuclear cascade (INC) calculation, which calculates the multiple scattering of the incident neutron and the nucleon in the nucleus as a cascade of two-body collisions, the energy is reduced to a level at which the nucleon cannot have the energy that is released outside the nucleus. Calculate the process by which the initial nucleon is released out of the nucleus until is dispersed into the nucleon. Then, using the remaining energy as excitation energy, the emission of light particles from the residual nucleus after the nucleon is emitted is calculated based on the evaporation theory. Also in this case, the calculation is performed using the reverse reaction cross section of two particles as the reverse process of continuous two-body collision. In the calculation of each collision process, calculations taking into account special relativistic effects are performed. As a result of this calculation, the position of the spallation reaction, the type, number, energy, and direction of the secondary ions are all determined. Next, for all the generated secondary ions, the presence / absence of the charge collection region such as the depletion layer attached to the diffusion layer in the device and the position of the passage through the charge collection region are determined, and the funneling calculation is performed as necessary. In addition, the charge collection amount is calculated, and an error determination is performed according to the electrical state or circuit state of the diffusion layer. If an error further occurs, statistical processing of the error is performed, including determination of the MCU or MBU.
[0017]
FIG. 1 is a flowchart showing an analysis flow of cosmic ray neutron soft error resistance, extracting an intermediate calculation result, and showing one embodiment of orbital analysis after generation of individual secondary ions. It shows the normal procedure of trajectory analysis and error analysis, including the preparation method for high-efficiency analysis.
In the figure, when a secondary ion has passed through a sensitive region in step 101, an error mode (cell mode, bit line mode, etc.) is discriminated in step 102 according to the nature of the passed sensitive region. At 103, the amount of collected charge is calculated. If it is determined in step 104 that the charge amount is smaller than the actual critical charge amount and larger than the non-zero provisional critical charge amount, in step 105, the spallation reaction identification number, the error mode, the bit position in the cell, the collected charge amount, and the physical address And the distance from the spallation reaction position are stored as a database.
Thereafter, it is determined in step 106 that the collected charge amount is larger than the critical charge amount. In step 107, the state of the memory cell "1" or "0", the activated state of the bit line pair, the read state, etc. Therefore, only when the sensitive area that has passed is in the "sensitive" state for an error, the error is counted as an error and registered in the SEU at step 108. In step 109, if an error has occurred in a plurality of bits at the same time for one spallation reaction, in step 110, it is registered as an MCU. Furthermore, if the physical address of the MCU belongs to the same word in step 111, it is registered as an MBU in step 112.
[0018]
Next, an analysis flow for each individual ion after generation of secondary ions will be described with reference to FIG.
FIG. 4 is a flowchart showing one embodiment of the analysis processing operation of the cosmic ray neutron soft error resistance analysis after the generation of individual secondary ions. It shows the procedure. If the secondary ions have passed through the sensitive region in step 401, an error mode (cell mode, bit line mode, etc.) is discriminated in step 402 according to the nature of the passed sensitive region, and then in step 403, Calculation of the amount of collected charges is performed. In step 404, if the collected charge amount is large in critical charge amount and the DRAM is used, in step 405, the passed sensitive area has an error so that an error occurs only when the bit information of the passed sensitive area is "1". If it is in the "sensed" state, it is counted as an error in step 406 and SEU registration is performed. In step 407, if an error has occurred in a plurality of bits at the same time for one spallation reaction, in step 408, it is registered as a multi-cell upset (MCU: Multi-Cell Upset). Further, in step 409, if the physical address belongs to the same word in the MCU, in step 410, it is registered as a multi-bit upset (MBU).
[0019]
For error analysis, it is necessary to analyze the trajectory of secondary ions in the device. First, the device is described in a hierarchical structure as shown in FIG.
FIG. 5 is a schematic diagram showing a hierarchical structure of components constituting a device model. As shown, the device consists of points, lines (if needed), surfaces, basic components, composite components (if needed), units, blocks (if needed), and up to eight layers up to the device. It is described in a hierarchical structure of “parts”.
The three-dimensional coordinate information has only "points", and "parts" in a certain hierarchy are composed of "parts" in the immediately lower hierarchy. "Lines" are usually unnecessary since "planes" can be constructed directly from "points". "Basic components" are relatively simple components such as cuboids and cylinders, and "Composite components" are more complex, where these components are fixed as a single part with a fixed relative position. It is a "component" with a simple shape. A unit equivalent to a cell such as a memory device is a “unit”. When a data pattern or the like is fixed, a block composed of a plurality of cells constituting a minimum repetition pattern of two-dimensional data is a “block”, and a “device” is a block of “blocks” spread in a semi-infinite two-dimensional manner (hereinafter referred to as “device”). In the description, “” added to the component hierarchy name is omitted.) When constructing a device model, the usual idea is to stack up the definitions from point → plane → component → unit → block → device and from the lowest layer to the top, but the method is complicated and sometimes the point It may take a long time to calculate the coordinates of. Therefore, the present inventors have devised a method of first providing a basic component, and using that as a starting point, a plane → point and a unit → block → device.
[0020]
First, the basic components were cylindrical, elliptical, and polygonal columns. For a cylinder and an elliptical cylinder, if the radius (or major axis and minor axis), height, and relative coordinates of a representative point in the unit (such as the center of the upper surface) are given, the arrangement in the unit is uniquely determined.
FIG. 6 is a schematic diagram for explaining a method of setting the coordinates of the relative position of the polygonal column in the unit. As shown in FIG. 6, the polygonal column is defined by first determining the relative coordinates in the unit of the representative point A (for example, one of the vertices of the upper surface polygon ABCD... X), and determining the side 11 to the next vertex B. Length L ₁ , The angle θ formed with the reference line 12 (such as the X axis), and the length L of the side 13 toward the next vertex C ₂ And the angle φ between the two sides 11 and 13 ₁ , And so on, the necessary number is sequentially given, so that the relative arrangement of the polygonal pillars in the unit is uniquely determined. The coordinates of the vertices that make up the polygon can be easily calculated. There are six faces constituting a polygon in the case of a rectangular parallelepiped, but each face is uniquely determined by giving the vertex coordinates of the faces in order. At this time, when the right-hand screw is turned in the direction of the order of the points, the surface can be characterized such that the direction in which the right-hand screw advances is the front. With such designation, it can be used as an index for determining whether a certain coordinate point is inside or outside the component, and for determining whether or not ions are traveling toward the component. .
[0021]
Hereinafter, a method of selecting components will be described with reference to FIG. 7 using a general 6-transistor SRAM (Static Random Access Memory) as an example.
FIG. 7 is a circuit diagram for explaining the definition of “physical node” and “logical node” for the SRAM. The SRAM has two storage nodes in one cell, one of which holds information of “1” and the other of which holds information of “0”. In brief, the nMOSFET 15a side of the storage node in the state of “1” When a certain amount of electrons are injected into the diffusion layer and the potential becomes lower than the potential of the other storage node 16, the information is inverted. In the case of the SRAM, since the load MOSs 17a and 17b have a function of maintaining the potentials of the storage nodes 14 and 16, the dynamic behavior actually poses a problem. The inventors use a separate circuit analysis simulator, apply a trapezoidal pulse current to the node, analyze the dynamic characteristics, and if an error occurs, obtain the total charge amount and use it as the critical charge amount, and use the soft error simulator. Input value. Diffusion layers 19a and 19b (referred to as bit nodes) for reading data are arranged in opposing portions of the storage nodes 14 and 16 of the driver MOSs 18a and 18b. An error may occur if the potential of the bit line increases or decreases due to the impact of secondary ions during the reading state. This is called a bit line mode error. That is, in the case of the SRAM, an error occurs when charges are injected into the two storage nodes 14 and 16 and the two bit nodes 19a and 19b. As described above, a virtual node that causes an error when its state changes is referred to as a “logical node”, whereas a node that actually exists as a diffusion layer and can change the state of the logical node is referred to as a “physical node”. I will. In the case of a bit node, the “logical node” and the “physical node” match. In the case of a storage node, the connection of the diffusion layer on the pMOSFET side and the diffusion layer on the nMOSFET side is a storage node, and thus the storage node has two physical nodes. When ions are applied to the diffusion layer 21 for supplying the power supply voltage or the diffusion layer 22 connected to the ground, no change occurs in the logic state. It does not become.
[0022]
Table 1 summarizes the correspondence between the diffusion layer and the logical nodes and the physical nodes, and the presence / absence of an error for each physical node.
[0023]
[Table 1]

[0024]
8A and 8B are configuration diagrams illustrating a model constructed for the SRAM memory cell. FIG. 8A is a cross-sectional view taken along line A1-A2 of FIG. 8B, and FIG. 8B is a top view.
As shown in the cross-sectional view of FIG. 8A, there is a region in the physical node 23 where charges are collected by drift just by passing ions nearby, and a sensitive region including the depletion layer and the physical node. 24. It is considered that electrons or vacancies generated outside the physical node 23 in the sensitive area 24 are collected by the physical node 23. IEICE Transactions, Vol. J71-C, No. 10, pp. As described in pp. 1436-1441 (1988), a mode (ALPEN effect) in which an error occurs unconditionally when ions penetrate between the opposed source and drain has been proposed. FIG. The channel region 29 between the source and the drain shown in the top view of b) is also considered as a component. Normally, since the element isolation oxide film 28 is partially in contact with the side surface of the physical node, a portion corresponding to the wells 26 and 27 corresponding to the thickness of the oxide film 28 is referred to as an active 30 for convenience, and a well below the oxide film is used. Will be distinguished from
[0025]
Since the upper surface of the substrate usually has only wiring / contacts and an interlayer insulating film, it does not serve as a charge collection region, but thermal neutrons in the BPSG film ¹⁰ Reacts with B and forms α particles ⁷ Li is generated and mainly ⁷ When an error occurs due to Li, when an oxide film, a wiring or a contact contains an α-ray source as an impurity, when there is a component containing a heavy element such as W or Cu, the generated secondary ions are also heavy. Therefore, the soft error resistance may decrease. For such evaluation, it is necessary to consider components such as wiring on the upper surface of the substrate and interlayer insulating films as components.
As described above, as the components of the device, the physical nodes, the sensitive areas, the active areas, and the wells, including the units, need to be minimized. Add a channel, an isolation layer, a wiring, a contact, and an interlayer insulating film as needed.
[0026]
Next, a method of determining a nuclear reaction occurrence point will be described in detail.
The coordinates of the spallation reaction occurrence points need to be evenly selected in the unit. It is easy if the unit is as simple as a rectangular parallelepiped, and the length L of the side of the rectangular parallelepiped in the X, Y, and Z directions _x , L _y , L _z , A random number rnd is generated independently, and the reaction coordinates x, y, and z may be determined by the following equation.
[0027]
(Equation 1)

For many Monte Carlo calculations, the above technique is often sufficient.
[0028]
However, in the cosmic ray neutron soft error analysis, it is assumed that the shape of the target component is complicated in many cases, such as when a hexagonal unit (honeycomb structure), a thermal neutron reaction site, or a reaction analysis for each component is required. However, the above method breaks down. Therefore, the present inventors have devised the following method.
FIG. 9 is a schematic diagram for explaining a method of dividing a polygon component into triangular prism components. First, as shown in FIG. 9, the polygon 34 is divided into triangles sharing its vertices. The area of each triangle is calculated using a vector formed from two sides constituting the triangle. For example, for the triangle ABC,
[0029]
(Equation 2)

It can be calculated as follows.
[0030]
The point of occurrence of the spallation reaction is the area S of this triangle. _i Ratio P to the total area S _i Using,
[Equation 3]

, The number i of the generated triangular prism can be determined. However, Pi = Si / S.
[0031]
Next, determination of the position in the XY plane of the spallation reaction point generated in the triangular prism will be described with reference to FIG.
FIG. 10 is a schematic diagram for explaining a method of randomly dispersing spallation reaction points in a triangle. When the triangle on the upper surface or the lower surface of the triangular prism is like the triangle ΔABC 35 in FIG. 10, a triangle ΔABD 36 symmetric with respect to the midpoint 37 of an arbitrary side is formed, and a parallelogram is formed as a whole. Assuming that the width, height, and inclination of the hypotenuse of the parallelogram are L, h, and θ, the coordinates can be determined within the parallelogram with uniform probability by using the following equation.
[0032]
(Equation 4)

When the point P determined in this way is within the newly added triangle 36, the point P is returned to the point target point P 'with respect to the midpoint 37, and the coordinates in the original triangle 35 are determined. For example, a spallation reaction point can be determined while maintaining uniformity within the original triangle 35. In general, whether a point is inside a polygon or not is determined by including a point on the same infinite plane when the polygon is included, and connecting the points and the vertices of the polygon in a certain direction in a continuous line. It suffices that the sum of the angles made by 360 becomes 360 degrees. At this time, we promise to make the angle negative if the new line goes in the opposite direction. The position of the spallation reaction in the z-axis direction may be set at an arbitrary position in the height direction.
[0033]
FIG. 11 shows the flow of narrowing down cells in which ions pass through the sensitive region in the device, including the flow of subsequent collected charge analysis.
FIG. 11 is a flowchart showing an embodiment of a processing operation for obtaining a physical address and a physical node through which a secondary ion has passed by using the constructed device model, and showing a physical address of a unit through which each secondary ion passes. 9 shows a flow of an error determination in a case where there are a plurality of physical nodes in a unit, and how to obtain the error. First, the portion sandwiched between the upper end surface and the lower end surface of the sensitive region of the device is a charge collection layer. In step 1101, when secondary ions pass through this charge collection layer, in step 1102, the incident point of the charge collection layer, The output point is calculated, and in step 1103, it is determined whether or not all the units passing in the range from the incident point to the output point sequentially pass through the physical node as the entire sensitive area, and the physical node in the unit cell is determined. If it has passed, in step 1104, the amount of collected charges for each physical node is calculated, and in step 1105, the collected charges to the corresponding logical node are integrated. After the amount of collected charges to the logic node is obtained, in step 1106, if the total amount of collected charges is larger than the critical amount of charge and the node is in a sensitive state in step 1107, error registration (SEU registration) is performed in step 1108. I do.
[0034]
Since it is not necessary to analyze the trajectory of the cell unless it passes through the sensitive area of the error determination specific cell, first, as shown in FIG. 8A, the cell is sandwiched between infinite planes including the upper surface 31 and the lower surface 32 of the sensitive area. Assuming a sensitive region layer 33, the coordinates through which ions pass through this layer are calculated.
The ion trajectory equation is given below. Here, ψ is the azimuth.
[0035]
(Equation 5)

The plane equation is
(Equation 6)

Then the length l of the ion orbit to the intersection _p Is
(Equation 7)

It becomes.
[0036]
Length of ion orbit l _p When the value of is negative, the ions are flying in the opposite direction from the surface, and there is no need to continue the calculation. l _p Is used to obtain the coordinates of the intersection from (Equation 6).
If the passing points on the upper and lower surfaces of the sensitive area layer are determined, the cell through which the line connecting the two points passes is the cell to be analyzed. When the ion generation position is in the sensitive region layer, one end of the line is the generation point. The same applies to the case where the ion stop position is in the sensitive region layer. When the cell to be analyzed is determined, it is next determined whether or not the cell actually passes through the sensitive area in the cell. Ion generation points or stop points are also regarded as passing points, and it is first determined whether or not these points are inside the component. This can be determined by the fact that the Z coordinate of the point is in the same range as the sensitive area and the position in the two-dimensional plane is in the sensitive area.
[0037]
In order to determine the true passage point, as shown in FIG. 12, the presence or absence of an intersection with the ion trajectory 39 is determined for all surfaces of the component 38 corresponding to the sensitive region.
FIG. 12 is a schematic diagram for explaining a method of determining secondary ion passage for a typical component. A hexahedral component was used as a typical component. As described above for the sensitive region layer, the determination method is to obtain the intersection points 40 and 41 of the ion trajectory with the infinite plane including the corresponding surface, _p Is positive, determine if the intersection is in the plane of the component. If so, the point is actually passing through the component.
[0038]
FIG. 13 is a flowchart for determining whether or not secondary ions pass through a typical component. Here, it is determined whether or not the next ion passes through a component composed of a plurality of surfaces. First, in step 1301, when the ion generation point or the stop point is in the component in step 1302, they are recorded as passing end points. Next, for all surfaces constituting the component, in step 1303, the coordinates of the intersection with the ion trajectory on the infinite plane including the component surface are calculated, and in step 1304, it is determined whether or not the traveling direction of the ions is the forward direction. I do. Next, in the case of a positive value, it is determined in step 1305 whether or not the coordinates of the intersection with the constituent surface are within the constituent surface. If the coordinates are within the constituent surface, the passing end point is registered in step 1306. If there are two passing endpoints in step 1307, then in step 1308 the ion has passed the component. In the determination of passage of each surface, an intersection between the ion trajectory and the infinite plane including the surface is obtained. If the point is inside the surface, it is considered that the surface has passed.
[0039]
When the ions pass through the physical node and further pass through the depletion layer (the lower surface of the component, the side surface not in contact with the oxide film), it is necessary to calculate the funneling length. When the well is in contact with the isolation layer having the opposite polarity and the ions pass through both the depletion layer and the isolation layer of the physical node, half of the ion orbit length in the well is defined as the charge collection length. The charge collection length when funneling occurs is that when ions are incident near horizontal, it can be longer in the well up to the range of the ions in the previous treatment, but in fact, the longer the longer, the more electric field It needs to be corrected because it becomes weaker and the recombination probability of electrons and holes increases. The present inventors have assumed that the charge collection efficiency decreases exponentially as the collection length increases, and adopted a correction method such as the following equation.
[0040]
(Equation 8)

Where x _c Is the charge collection length, Q _all Is the total charge of an electron or hole within the charge collection length, Q _collect Is the amount of charge actually collected, L _cmax Is the effective maximum collection length.
[0041]
FIG. 14 shows an example of analysis of the charge collection trajectory of ions calculated as described above.
FIG. 14 is a top view showing a display example of a track where charge collection has been performed on a typical SRAM in a typical SRAM. The figure depicts a trajectory only when a spallation reaction occurs in the central cell 42 and charges generated by secondary ions are collected at the physical node. It can be clearly seen that the secondary ions radiate radially from the central cell to the peripheral cells and pass through various components.
[0042]
As described above, the efficient construction method of the device model and the physical secondary ion behavior analysis method have been described. However, the final error determination needs to be determined in consideration of the logic state of the cell. For example, in an evaluation test for soft error resistance of a device, a test is often performed using a specific data pattern (a two-dimensional pattern of “1” and “0”). It is not easy to input and analyze in calculation. At least, there is no published technology that analyzes the effects of data patterns. Therefore, the inventors have devised the following method.
FIG. 15 is a diagram for explaining a method of inputting an initial data pattern in the memory device. FIG. 15A shows a data pattern displayed on an input screen of a computer, and FIG. It is a schematic diagram when the pattern of a) is expanded in the two-dimensional direction.
First, as shown in FIG. 15 (a), a grid having the size of the minimum repetition pattern is displayed on the input screen of the computer, and "1" or "0" is directly input to the grid grid to form a data pattern. . This makes it easy to input a data pattern. For an actual device, this pattern may be spread in a two-dimensional direction as shown in FIG.
[0043]
Next, this pattern is arranged as in the following equation. Here, i is the coordinate in the x direction and j is the coordinate in the repeated pattern in the y direction.
(Equation 9)

If enough charge is collected to cause an error in the logic node of a certain cell, the physical address (XY position number in two dimensions. For example, the center cell is (0, 0), and the cell on the right is ( 1, 0) etc.), but (N _x , N _y ) (N _x , N _y Is non-negative).
(Equation 10)

The logical state of the cell is obtained as described above, and it is finally determined whether or not the cell has an error in consideration of the correspondence between the physical node and the physical node as illustrated in Table 1.
[0044]
Furthermore, in the case of MBU analysis, it is necessary to determine and analyze a bit arrangement pattern in the same word. In the case of (1), the pattern is not so complicated. As shown in FIG. 16, the patterns are arranged at regular intervals in the X or Y direction, are obliquely zigzag, and are obliquely straight.
FIG. 16 is a bit pattern for explaining a method of inputting a bit pattern in the same word in the memory device. The figure shows various data patterns, where the bits of the same word are aligned in the horizontal direction, aligned in the vertical direction, aligned in the diagonal direction, zigzag aligned Is shown. In the drawing, if the intervals in the X and Y directions are input as numerical values, the Y direction is zero in the X direction, the X interval is zero in the Y direction, the diagonal straight line is both the X and Y intervals, and the X direction zigzag is the negative Y interval. For the zigzag in the Y direction, various patterns can be input if an agreement such as giving a negative X interval is determined.
[0045]
When an error occurs in a plurality of cells in one spallation reaction event, the MBU is determined according to the flow shown in FIG.
FIG. 17 is a flowchart showing an embodiment of the analysis for extracting the MBU in the memory device. In the figure, first, in step 1701, a bit number in a word of a specific cell (for example, a cell registered first) among cells in which an MCU has occurred is determined at random, and a simultaneous error cell is analyzed. At step 1704, it is determined whether or not the physical addresses of the other cells (other than A) have the bit pattern matching with the cell A for all the bits that have caused the error at the same time. In step 1705, when the bit number is within the same word, the MPU is determined to be an MBU, and the MBU is registered. In step 1706, the multiplicity N as the MBU _mbu Ask for.
[0046]
FIG. 18 shows a display example of the error bit positions (black circles) in the physical address space thus obtained.
FIG. 18 is a distribution diagram showing a physical address distribution of an error cell in the memory device. The black dots in the figure indicate the physical address where the error occurred. According to the present invention, such a large error spread and distribution distortion can be analyzed.
[0047]
The simulator CORIMS can cope with an arbitrary spectrum of the energy of the incident particle as described in Japanese Patent Application Laid-Open No. 2000-215255 together with the method. However, the measurement results of actual devices in three domestic fields with different altitudes are shown. FIG. 19 shows the simulation result.
FIG. 19 is a characteristic diagram showing actual measurement values and simulation results of errors in fields performed in three places in Japan, where the horizontal axis represents altitude (m) and the vertical axis represents error rate (AU). In the figure, black diamonds indicate measurement results, and broken lines indicate simulation results. As shown in the figure, the measurement result and the simulation result agree well within an error of 20% or less, indicating that CORIMS has satisfactory accuracy.
[0048]
The simulation method for evaluating the neutron soft error resistance of semiconductor devices has been described above. However, cosmic ray neutron soft errors are expected to become more severe in many cases depending on various device design conditions. In addition to this, it is necessary to develop measures to improve resistance. However, the problem here is that, for possible design options and a large number of devices to be analyzed, for example, the simulation result shown in FIG. 19 requires one point of calculation time. As such, there are problems and limitations in that examining all options can take a great deal of time and effort.
[0049]
In order to efficiently examine various options in a short time, the inventors have devised the following four methods.
(1) The neutron soft error calculation has a large flow of spallation reaction, secondary ion orbit analysis, charge collection analysis, and error analysis according to the pattern. However, charge collection to physical nodes was required as shown in Fig. 1. In all cases, if at least the spallation reaction event number, physical address of the cell, physical node position, and charge collection amount are encapsulated as a set of data in spallation reaction event units and registered as a database, By using it, simple recalculation with another option becomes possible. At this time, a provisional critical charge amount lower than the actual one is given to widen the registration range. It should also be noted that if the provisional critical charge is too small, the amount of registration will increase and the load on the database will increase. If the capsule of the registered data is used as the starting point, the burden of spallation reaction and ion orbit analysis is eliminated, so the data pattern, bit pattern, and critical charge amount of various error modes are changed as shown in the recalculation flow in FIG. Results in a very short time (a few seconds in our example).
FIG. 20 is a flowchart showing an embodiment of a process for performing a calculation under different conditions using a temporarily registered error database. The database created by the method shown in FIG. The flow of a high-efficiency simulation for different critical charge amounts, data patterns, and bit arrangements in the same word under conditions is shown. In the figure, in step 2001, a data pattern, a bit pattern, and a critical charge amount for each mode are set. Next, for all the provisional recording errors confirmed in step 2002, in step 2003, the incident neutron ID number, error mode, bit position in the cell, collected charge amount, physical address, distance from the nuclear reaction point, and the like are read. If the collected charge amount is larger than the critical charge amount in step 2004, it is determined in step 2005 whether or not the node is in the node sensitive state. If the node is in the node sensitive state, the SEU is registered in step 2006. Next, in step 2007, if there is a simultaneous error bit, MCU registration is performed in step 2008, and if the word is the same in step 2009, MBU registration is performed in step 2010. As described above, in this embodiment, an error determination is performed according to the set parameters.
[0050]
In this method, once the combination of the irradiation condition and the device type is calculated, the calculation when the condition is changed can be performed by recalculation.
(2) The method described above can be further extended as follows.
FIG. 21 is a schematic diagram showing an example of physical quantities to be temporarily registered for individual spallation reactions. As shown in FIG. 21, the type, energy, and direction of the secondary ions 43 at the time of the spallation reaction are determined without depending on the position in the unit. Therefore, the type of secondary ion generated for each fragmentation reaction event (eg, atomic number (A), mass number (M)), energy (E), direction (azimuth (Φ), zenith angle (θ)) Are sequentially encapsulated as a set of data and registered in the database, and the results under completely different conditions can be obtained in a short time by newly setting the generation positions of the secondary ions as shown in FIG. can get.
FIG. 22 is a schematic flowchart showing an embodiment in which an arbitrary device is analyzed under different conditions from the temporary registration database of individual spallation reactions. 4 shows an analysis flow for performing a simulation. In step 2201, a unit to be generated is randomly set for each spallation reaction. In step 2202, the spallation reaction position in the unit is set randomly. In step 2203, the type of the registered secondary ion is determined from that point. The trajectory is analyzed using the kinetic energy and the direction, and an error is determined and registered in step 2204.
In the above method (1), the options that can be evaluated by recalculation are the data pattern, the bit pattern, and the critical charge amount for each error mode. Simple recalculation is possible for all the same devices. This method eliminates the burden of spallation reaction analysis.
[0051]
(3) Further, when the materials of various components are different or when they are compounds, the above two methods can be extended as follows.
FIG. 23 is a flowchart showing an embodiment in which a temporary registration database of the spallation reaction is created by discriminating each energy of incident neutrons. As shown in the flow chart in FIG. 23, in step 2301, neutron energies are grouped in advance, divided into fluxes for each neutron energy group in step 2302, and unit material for each neutron energy group is divided in step 2303. The number of spallations is determined according to the total reaction cross-section of, and whether or not the total number of reactions has been calculated in step 2305 for each energy group until the calculation of all energy groups is completed by the determination in step 2304 If it is in the middle of the calculation, in step 2306 the spallation reaction is analyzed with respect to the unit using a single element as a constituent material. Affiliation energy group (eg, number), type of secondary ion generated (eg, atomic number, mass number), energy Over encapsulates direction as a summary of the data is registered in the database. By preparing such a database for each material, it is possible to recalculate any combination of devices having an arbitrary neutron spectrum, an arbitrary structure, and a material composition.
[0052]
FIG. 24 shows an actual recalculation method.
FIG. 24 is a flow chart showing an embodiment in which an arbitrary spectrum and an arbitrary device are analyzed using a database of the spallation reactions which are temporarily registered and discriminated for each energy of incident neutrons. In the figure, first, an arbitrary neutron spectrum given in step 2401 is divided into predetermined energy groups, and in step 2402, a flux for each energy group is obtained. In step 2403, for each energy group and component material, the calculated number of spallation reactions is determined corresponding to the flux and the total cross-sectional area of reaction, and the number of spallation reactions is caused by that number. In step 2404, if the calculation of all the energy groups is performed, it is determined whether or not the total number of reactions has been calculated in step 2405. If the calculation is in progress, in step 2406, the material of the component that has caused a spallation reaction is determined. At each time, capsule data corresponding to one nuclear fragmentation reaction event of the corresponding neutron energy group is randomly extracted from the database, and all secondary ions are calculated in step 2407. If the calculation is being performed, the subsequent secondary ion trajectory analysis is performed in step 2408, and the error analysis is performed in step 2409. When the component material is a compound, the reaction nuclide is determined according to the product of the composition ratio and the total reaction cross section.
[0053]
(4) In the above three methods, it is necessary to register all the spallation reactions that satisfy a certain determination condition for each event, but a method of storing an energy spectrum for each type of secondary ion There is also.
FIG. 25 is a characteristic diagram conceptually showing an energy spectrum of a secondary ion generated as a result of the nuclear fragmentation reaction. The horizontal axis shows the energy of the secondary ion, and the vertical axis shows the frequency of occurrence. In the figure, p indicates a proton, α indicates an alpha ray, Li indicates a secondary ion of Li, and Si indicates a secondary ion of Si, and the area indicates the frequency of occurrence.
As a result of the spallation reaction, an energy spectrum is obtained for each secondary ion as shown in FIG. This spectrum agrees within the error range of the Monte Carlo simulation if the irradiation conditions and materials are the same.
[0054]
FIG. 26 is a flowchart showing an embodiment in which another condition is analyzed using the energy spectrum of secondary ions generated as a result of the nuclear fragmentation reaction. Utilizing the above facts, as shown in the flow chart of FIG. 26, the energy spectrum is encapsulated for each ion species, registered in the database, and recalculation using this can be performed. That is, in step 2601, the type of secondary ion generated in proportion to the area of the energy spectrum (shown for α particles in FIG. 25) is determined, and then in step 2602, the ion Determine energy. Next, in Step 2603, if the generation position in the device is determined and the traveling direction of ions is set at random, in Step 2604, recalculation of error analysis equivalent to the method (1) becomes possible. However, since this method is not for each spallation reaction event, there is a limit in that MCE and MBU cannot be evaluated.
[0055]
For the unit flow of the iterative calculation performed in the Monte Carlo simulation, a part or all of the calculation result of the specific state or the halfway calculation of the time phase is temporarily saved and reused for calculation of another condition to improve the calculation efficiency. The idea of enhancing is applicable to Monte Carlo simulation in general.
Further, in the present embodiment, for simplicity of description, the method is limited to soft errors, but the method from the spallation reaction other than the error determination to the calculation of the charge collection amount is exactly the same even for hard errors.
[0056]
【The invention's effect】
As described above, according to the present invention, a device having an arbitrary material composition and a complicated shape and a setting condition thereof can be modeled with high efficiency, and a large number of evaluation parameters can be evaluated with high efficiency in an arbitrary irradiation environment. Therefore, the labor and period from the evaluation and prediction of the cosmic ray neutron soft error of the semiconductor device to the establishment of the technology for improving the resistance can be significantly reduced.
[Brief description of the drawings]
FIG. 1 is a flow chart illustrating an analysis flow of cosmic ray neutron soft error resistance, extracting an intermediate calculation result, and illustrating an embodiment of an orbit analysis after generation of individual secondary ions.
FIG. 2 is a sectional view conceptually showing a mechanism of a cosmic ray neutron soft error.
FIG. 3 is a characteristic diagram showing operating voltage dependence of soft error resistance.
FIG. 4 is a flowchart showing an embodiment of an analysis processing operation for analysis of cosmic ray neutron soft error resistance after generation of individual secondary ions.
FIG. 5 is a schematic diagram showing a hierarchical structure of components constituting a device model.
FIG. 6 is a schematic diagram for explaining a method of setting coordinates of a relative position of a polygonal column in a unit.
FIG. 7 is a circuit diagram for explaining the definition of “physical node” and “logical node” for an SRAM;
FIG. 8 is a configuration diagram illustrating a model constructed for an SRAM memory cell.
FIG. 9 is a schematic diagram for explaining a method of dividing a polygon component into triangular prism components.
FIG. 10 is a schematic diagram for explaining a method of randomly dispersing spallation reaction points in a triangle.
FIG. 11 is a flowchart illustrating an example of a processing operation for obtaining a physical address and a physical node through which a secondary ion has passed by using a constructed device model.
FIG. 12 is a schematic diagram for explaining a method of determining secondary ion passage for a typical component.
FIG. 13 is a flowchart for determining secondary ion passage for a typical component.
FIG. 14 is a top view showing a display example of a track where charge collection has been performed on a top surface of a typical SRAM.
FIG. 15 is a diagram for explaining a method of inputting an initial data pattern in a memory device.
FIG. 16 is a bit pattern for explaining a method of inputting a bit pattern in the same word in the memory device.
FIG. 17 is a flowchart illustrating an example of analysis for extracting an MBU in a memory device.
FIG. 18 is a distribution diagram showing a physical address distribution of an error cell in the memory device.
FIG. 19 is a characteristic diagram showing actual measured values and simulation results of errors in a field performed at three locations in Japan.
FIG. 20 is a flowchart illustrating an example of a process for performing a calculation under a different condition using a temporarily registered error database.
FIG. 21 is a schematic diagram showing an example of physical quantities to be temporarily registered for individual spallation reactions.
FIG. 22 is a schematic flowchart showing an embodiment in which an arbitrary device is analyzed under different conditions from a temporary registration database of individual spallation reactions.
FIG. 23 is a flowchart illustrating an embodiment in which a temporary registration database of a spallation reaction is created by discriminating each energy of incident neutrons.
FIG. 24 is a flowchart showing an embodiment in which an arbitrary spectrum and an arbitrary device are analyzed using a database of spallation reactions which are temporarily registered by discriminating each energy of incident neutrons.
FIG. 25 is a characteristic diagram conceptually showing an energy spectrum of a secondary ion generated as a result of a nuclear spallation reaction.
FIG. 26 is a flowchart showing an embodiment in which another condition is analyzed using an energy spectrum of a secondary ion generated as a result of a spallation reaction.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Cosmic ray neutron, 2 ... Secondary ion, 3 ... Diffusion layer, 4 ... Depletion layer, 5 ... Well, 6 ... Funering, 7 ... Capacitor, 8 ... Under isolation, 9 ... Interlayer insulating film, 10 ... Wiring layer , 11 ... first side of polygon, 12 ... reference line, 13 ... second side of polygon, 14 ... storage node, 15a, b ... nMOSFET, 16 ... storage node, 17a, b ... pMOSFET, 18a, b ... Driver MOSFETs 19a, b: bit nodes, 20: bit line pairs, 21: power-side diffusion layer, 22: ground-side diffusion layer, 23: nMOSFET diffusion layer, 24: sensitive region, 25: pMOSFET diffusion layer, 26: iso Oxide film, 27 n-well, 28 p-well, 29 channel, 30 active, 31 upper surface of sensitive area, 32 lower layer of sensitive area, 3 ... Sensitive area layer, 34... Polygonal prism end face, 35... Triangle, 36... Additional triangle, 37... Intersection of parallelogram diagonal line, 38. ... Secondary ion emission point, 42... Cell that causes a spallation reaction, 43.

Claims (13)

When performing a failure simulation of a semiconductor device caused by cosmic ray neutrons, a unit cell of the device is defined as a set of components, and a nuclear reaction between the cosmic ray neutrons and a nucleus constituting the device is generated 2. Analyzing the trajectory of the next ion in component units, and for a number of nuclear reaction events occurring at specific positions in the device, the amount of charge collected in the diffusion layer of the device, the position of the collection cell, the diffusion layer, and the occurrence of failure Determining the presence / absence of a cosmic ray neutron. 2. The error analysis method using cosmic ray neutrons according to claim 1, wherein the kind, energy, and traveling direction of the secondary ions generated as a result of the nuclear reaction event between the cosmic ray neutrons and the nuclei constituting the device are set. Storing a database as a database in units of events together with the energy of the cosmic ray neutrons, selecting a nuclear reaction event corresponding to a predetermined neutron energy from the database, and selecting the type, energy, and traveling direction of secondary ions contained therein. And / or performing a failure analysis of a charge generation amount and a failure in the semiconductor device with the following as initial values. The error analysis method using cosmic ray neutrons according to claim 1, wherein an energy spectrum of the secondary ions generated as a result of the nuclear reaction event between the neutrons and nuclei constituting the device is stored as a database for each generated nuclide. Storing and / or determining the nuclide of a secondary ion generated from the database according to the integrated value of the energy spectrum and determining energy from the energy spectrum of the nuclide. An error analysis method using cosmic ray neutrons, characterized in that: 2. The error analysis method using cosmic ray neutrons according to claim 1, wherein the amount of charge collected in the diffusion layer, the position of a cell in the device, and the position of the diffusion layer in the cell are temporarily stored as a database, Performing a failure analysis using data stored from a database as an initial value, and / or a failure analysis method using cosmic ray neutrons. 2. The error analysis method using cosmic-ray neutrons according to claim 1, wherein a failure to be analyzed as a failure analysis is one or both of a soft error and a hard error. 2. The error analysis method using cosmic ray neutrons according to claim 1, wherein a plurality of failed cells are simultaneously extracted in one nuclear reaction event as a failure analysis, and a plurality of cells processed logically simultaneously are extracted. And / or an error analysis method using cosmic ray neutrons. 2. The error analysis method using cosmic ray neutrons according to claim 1, wherein a generation position of said secondary ion is limited for a specific component. 2. The error analysis method using cosmic-ray neutrons according to claim 1, wherein when the component is a component or a cell having a polygonal top surface, the top surface shape is divided into arbitrary triangles, and a generated triangular prism is formed according to the top surface area. Determining the probability of occurrence, and connecting the triangular prism having the upper surface triangle and the upper surface triangle symmetrical with a point to form a parallelogram prism, and randomly determining a generation position inside the parallelogram prism. An error analysis method using cosmic ray neutrons, characterized by the following. 2. The error analysis method using cosmic ray neutrons according to claim 1, wherein the component connects a triangular prism having an upper surface triangle and a triangular prism having a point symmetric upper surface triangle to form a parallelogram, and a surface randomly determined inside the parallelogram prism. An error analysis method using cosmic ray neutrons, comprising a step of moving the in-plane occurrence position to a point target position with respect to the intersection of the diagonal lines of the parallelogram when the inside occurrence position is within the newly added triangle. . 2. The error analysis method using cosmic ray neutrons according to claim 1, further comprising a step of analyzing the spallation reaction according to a constituent material of each component at a position where the spallation reaction occurs. Error analysis method. 2. The error analysis method using cosmic ray neutrons according to claim 1, further comprising: providing a minimum pattern of a logic state of the cell as a two-dimensional matrix element; and determining a logic state of the cell at a position in an arbitrary device. An error analysis method using cosmic ray neutrons, comprising: 2. An error analysis method using cosmic ray neutrons according to claim 1, wherein a two-dimensional arrangement of cells for which logic information is simultaneously processed is provided at intervals of the number of cells in the X and Y directions of the cells, Deciding whether or not the fault locations that have occurred simultaneously in the cells are the cells to be processed simultaneously. 2. The error analysis method using cosmic-ray neutrons according to claim 1, wherein when determining whether a plurality of failed cells are cells to be processed simultaneously, a physical cell in a plurality of cells to be processed simultaneously is specified. A cosmic ray neutron error analysis method, comprising the step of determining a logical or logical order.

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