JP2004112882A - Inrush current suppressing method - Google Patents

Inrush current suppressing method Download PDF

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JP2004112882A
JP2004112882A JP2002269465A JP2002269465A JP2004112882A JP 2004112882 A JP2004112882 A JP 2004112882A JP 2002269465 A JP2002269465 A JP 2002269465A JP 2002269465 A JP2002269465 A JP 2002269465A JP 2004112882 A JP2004112882 A JP 2004112882A
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current
inrush current
transformer
voltage
circuit
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JP3829192B2 (en
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Toshihiko Tanaka
田中 俊彦
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Shimane University
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Shimane University
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an inrush current suppressing method of suppressing an inrush current with a simple structure in a single-phase circuit or a three-phase circuit. <P>SOLUTION: This inrush current suppressing method is used in a circuit for stepping down the voltage of a power supply 101. A power converter 131 is connected in series to the main transformer 102 through a matching transformer 134. The power converter 131 is operated as the braking resistance of the main transformer 102. In stopping the operation of the power converter 131, its output voltage is decreased in a prescribed time. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、変圧器の突入電流抑制方法に関し、特に、電圧形インバータを用いた突入電流抑制方法に関する。
【0002】
【従来の技術】
従来より、工場などの電力需要施設では変電所からの電力を引き入れるための受電設備を構内に有している。受電設備には、電圧を下げるための受電端大型変圧器に加えて、電路における地絡事故時や短絡事故時に動作する遮断機などの保護設備が設置されている。また、施設規模が大きく構内に建物が複数ある場合には、受電端大型変圧器の下位に、複数の中型変圧器やそれに付随する遮断器を設けて回路的に独立させている。これにより、ひとつの建物を停電させる場合でも他の施設は十全に電力供給することが可能となっている。
【0003】
しかしながら、大型変圧器や中型変圧器を無負荷で不用意に電源に接続(投入)すると、定格電流の数十倍の電流、すなわち突入電流が発生することが知られている。受電端大型変圧器の定格電流を超えた突入電流が生じると、第1に、構内回路外側直近に設けられている遮断器が誤作動し、構内総てが停電してしまうという問題点があった。これは、中型変圧器に対して突入電流が生じても起こりうる問題である。
【0004】
また、構内全体の停電を引き起こさなかった場合であっても、電圧波形が大きく歪み、場合によっては構内の他の建物の機器を含めて誤作動の原因となる場合があった。例えば、総合病院や大学の研究機関など、停止してはいけない機器が動作している施設では、このような誤動作は許されない。
【0005】
従来では、これらの問題を解決するために、単相回路では電源投入位相を調整する方法が用いられている。また、三相回路では、突入電流抑制抵抗を内蔵した変圧器が知られている(水野和宏ら「励磁突流抑制変圧器の開発」,電気学会静止器研究会資料,SA−94−29,(1994))。また、高速電流応答を有するPWM変換器を変圧器と並列接続し、突入電流を供給することで電源側における電圧瞬時低下などを抑制する方法も知られている(藤原勝次ら「並列形アクティブフィルタを用いた変圧器励磁突入電流補償回路」、平成10年電気学会全国大会,No.830)。
【0006】
【発明が解決しようとする課題】
しかしながら、従来の技術では以下の問題点があった。
すなわち、三相回路では、原理的に電源投入位相を調整しても、位相が120°ずつ相違している結果、必ず突入電流が生じるという問題点があった。
【0007】
また、変圧器に抑制抵抗を内蔵させる方式では、抑制抵抗を短絡除去する際に問題となる二次突入を防止できず、防止するためには抵抗値を制限する必要があるという問題点があった。
【0008】
また、並列形PWM変換器を用いる方式ではPWM変換器自身の容量(V×A)を大きくする必要があり経済的ではなく実用性が低いという問題点があった。
【0009】
本発明は上記に鑑みてなされたものであって、単相回路であっても三相回路であっても簡便な構成で突入電流を抑制する突入電流抑制方法を提供することを目的とする。
【0010】
【課題を解決するための手段】
上記の目的を達成するために、請求項1に記載の突入電流抑制方法は、変圧器を用いて電源電圧を降圧する回路において適用する突入電流抑制方法であって、整合用変圧器を介して電圧形インバータを前記変圧器と直列接続し、当該電圧形インバータを前記変圧器の制動抵抗として動作させることを特徴とする。
【0011】
また、請求項2に記載の突入電流抑制方法は、請求項1に記載の突入電流抑制方法において、前記電圧形インバータの動作を停止する際に所定の時間をかけて当該電圧形インバータの出力電圧を減少させることを特徴とする。
【0012】
【発明の実施の形態】
以下、本発明の実施の形態を図面を参照しながら詳細に説明する。
[実施の形態1]
図1は、実施の形態1の突入電流抑制方法を適用する基本回路構成(単相)を示した図である。図示したように、回路100は、電源101と、主変圧器102と、突入電流抑制器103とにより構成されている。
【0013】
突入電流抑制器103は、PWM変換器である電力変換器131と、電力変換器131を駆動する直流電源132と、電力変換器131の出力側に設けたスイッチングリプル抑制用フィフタ(LCフィルタ)133と、整合用変圧器134と、により構成されている。整合用変圧器は、電圧形インバータを電力系統と接続する際にお互いの電圧・電流定格を合わせるために用いられる変圧器である。図示したように、本発明では突入電流抑制器103を、整合用変圧器134を介して電源101と直列接続させている。
【0014】
なお、直流電源132は、図示を省略するが、その直近にコンデンサを配し、予め充電して使用するものとする。また、この直流コンデンサに回生用変換器を接続し(図示省略)、主変圧器102の投入時に発生するエネルギーを電源101に回生させる。なお、ここでは、電力変換器131としてPWM変換器を用いるが、これに限らずあらゆる電圧形インバータを用いることができる。
【0015】
実施の形態1では、主として計算機実験により検証を行うこととし、まず、突入電流を発生させるシステム(単相回路)を構築し、次に、本発明を適用した場合の実験結果について説明する。
【0016】
主変圧器102としては、定格電圧V=200[V]、定格電流30[A]、容量6000[VA]の単相変圧器を用いることとした。図2は、この主変圧器102の特性を示した図表である。また、図3は、図2に示した主変圧器102から導くことのできる変換器定数を示した図表である。実験では、電力系統の電磁過渡現象をシミュレーションする世界標準ソフトウェアであるPSCAD/EMTC(カナダのマニトバ HVDC リサーチセンター社製)を用いた。なお、実験では巻数抵抗は一次側と二次側で等しいと仮定し、突入電流減衰時間、飽和電圧、磁化電流、空心リアクタンスについては、図4に示した値を用いることとした。なお、簡便化のため、実験ではヒステリシスおよび残存磁束は考慮しないこととした。
【0017】
電源101としては、電圧実効値Vを200[V]、周波数を60[Hz]とし、6000[VA]をベースとした。電源側インピーダンスLを5%とした。
【0018】
まず、図1で、回路100から突入電流抑制器103を取り除き、電源電圧位相を0°で主変圧器102を投入した場合(スイッチSW1をONした場合)の電源電圧と電流波形を測定した。図5にその結果を示す。図示したように、回路100の電流iは最大で約330[A]を記録しており、主変圧器102の定格電流30[A]の8倍程度の電流、すなわち、突入電流が発生する系であることが確認できた。なお、回路100で電源電圧位相90°で主変圧器102を投入した場合には、図示を省略するが、理論的に確かめられているように無負荷電流量のみ流れ、突入電流は発生しないことが確認できた。
【0019】
次に、突入電流抑制器103の構成および作用を詳述する。図6は、電力変換器131の構成例を示した図であり、図7は、計算機実験に用いる回路定数を示した図表である。電力変換器131では、図8に示すような三角波比較方式PWM(Pulse Width Modulation)を用いて出力電圧vabを得る。電力変換器131は、主変圧器102に流入する電流iを検出して、K倍のゲインを乗じて三角波vと比較する。これにより、電力変換器131の出力電圧vab(図6参照)の平均値をK・i[VA]にすることができる。このことは、突入電流抑制器103がK[Ω]の抵抗として動作することを意味する。なお、実際には回路100では、LCフィルタ133を用いてスイッチングに起因する成分を取り除いている。
【0020】
図8に示したブロックのg〜gが図6に示したg〜gに接続される。主変圧器102は無負荷状態であるので、鉄心が飽和した場合に、無負荷電流I(図2参照)を超えないように電力変換器131の出力電圧voutを出力すべく制御ゲインKを決定する。なお、Sは図6の電力変換器131の運転停止を制御する信号を入力する。
【0021】
実施の形態1では、無負荷電流Iを超えないようにゲインを決定しているため、モデル化した主変圧器102の定格電流を0.3[A]として変圧器定数を決定した整合用変圧器134を用いる。整合用変圧器の定数を図9に示す。
【0022】
以上のようにして、計算機実験を行った。電源電圧vが0[V]となるt=0.0167[s]でSW1を閉じ、主変圧器102を電源101に投入した。結果を図10に示す。図5と比較すると明らかなように、投入直後に突入電流は発生しておらず定常状態となっていることが確認できる。しかしながら、電力変換器131の動作を急に停止した時点で二次突入が発生し2[A]程度の電流が流れていることがわかった。
【0023】
二次突入を防止し、電圧位相の急激な変化を防止するために、電力変換器131の出力電圧を50[ms]の時間をかけて減少させてみた。具体的には、t=0.1[s]経過後から50[ms]をかけて出力電圧voutを減少させ、t=0.15[s]で電力変換器131の動作を停止した。図11に結果を示す。主変圧器102を電源101に投入した瞬間は最大で約0.17[A]の電流が流れるが、1周期後には約0.12[A]となり定常状態を維持し、電源電圧にも影響を及ぼしていないことが確認できる。また、50[ms]の時間をかけて電力変換器131の出力電圧voutを減少させているため、二次突入も発生していないことが確認できた。突入電流抑制器103の動作を完全に停止すると、無負荷電流として回路100に0.28[A]の電流が流れ、一次二次とも突入電流が抑制されることが確認できた。
【0024】
次に、この計算機実験結果から、突入電流抑制器103の容量を求める。図10に示した結果では、電力変換器131の出力電圧voutの最大値は170[V]であった。また、電流iの最大値は0.17[A]であった。よって、電力変換器131のピーク値容量Ppeakは、
peak=170×0.17=28.9[VA]
となる。したがって、突入電流抑制器102の実効値容量は約15[VA]となる。よって、主変圧器102の容量6000[VA]に対して、1/400の容量の突入電流抑制器102で突入電流を抑制できたことになる。
【0025】
以上、実施の形態1の突入電流抑制方法によれば、簡便な構成で、単相回路の突入電流を抑制することが可能であることが明らかになった。
【0026】
[実施の形態2]
実施の形態2では、三相回路についての突入電流抑制方法について説明する。なお、実施の形態2では、特に断らないかぎり、実施の形態1と同様の構成要素については同一の符号を付し、その説明を省略する。
【0027】
図12は、実施の形態2の突入電流抑制方法を適用する基本回路構成(三相)を示した図である。図示したように、回路200は、回路100を三相分組合せた構成とし、一次側をΔ結線として電源101と接続している。実施の形態2では、三相電源電圧の線間電圧実効値を200[V]、周波数を60[Hz]として、10000[VA]をベースとしている。なお、単相回路100と同様に、電源側インピーダンスLを5%とした。
【0028】
まず、突入電流の発生を確認するために、図12で、回路200から突入電流抑制器103を除き、a相電圧位相0°で主変圧器102(Tra、Trb、およびTrc)を電源101(vsa、vsb、vsc、)に投入し電源電圧と電流波形を測定した。図13にその結果を示す。図示したように、a相で最大約330[A]の電流が流れ、b相にキルヒホッフの法則を満たすために−330[A]の電流が流れて、単相の場合と同様に、定格電流の10倍以上の突入電流が流れる系であることが確認できた。なお、回路100は、対称であるので、どの相で主変圧器102を電源101に投入しても同様の結果を得る。また、前述したように、位相が各相間で120°ずれているのでいずれかの相で必ず突入電流が発生する。
【0029】
三相回路の場合の回路定数を図14に示した値として、計算機実験を行った。なお、実験では、回路構成を三相とし、図14に示した回路定数以外は実施の形態1と同様とし、a相の電圧位相0°の時、三相同時に主変圧器102を電源101に投入した。結果を図15に示す。図13と比較すると明らかなように、投入直後に突入電流は発生しておらず定常状態となっていることが確認できる。しかしながら、電力変換器131の動作を急に停止した時点で二次突入が発生し3[A]程度の電流が流れていることがわかった。
【0030】
二次突入を防止し、電圧位相の急激な変化を防止するために、実施の形態1と同様に、電力変換器131の出力電圧を50[ms]の時間をかけて減少させ二次突入の防止を試みた。結果を図16に示す。電源101に投入した瞬間は、最大で0.12[A]程度の電流が流れるが、定常状態では0.08[A]程度の電流となる。電力変換器131の動作を完全に停止すると、無負荷電流として0.28[A]の電流が流れ、一次二次とも突入電流が電力変換器131によって抑制されていることがわかる。
【0031】
次に、この計算実験結果から、三相回路の場合の突入電流抑制器103の容量を求める。電力変換器131の出力電圧最大値は、1相当たり約120[V]である。また、電流iの最大値は0.12[A]である。よって、電力変換器131のピーク値容量Ppeakは、
peak=120×0.12=14.4[VA]
となる。したがって、電力変換器131の1台あたりの実効値容量は約7.2[VA]であり、三相一括すると、22[VA]となる。よって、主変圧器102の容量10000[VA]に対して、1/454の容量の突入電流抑制器102で突入電流を抑制できたことになる。
【0032】
以上実施の形態2の突入電流抑制方法によれば、三相回路であっても、簡便な構成で、突入電流を抑制することが可能であることが明らかになった。
【0033】
【発明の効果】
以上説明したように、本発明の突入電流抑制方法によれば、単相回路であっても三相回路であっても簡便な構成で突入電流を抑制する突入電流抑制方法を提供することができた。また、主変換器容量の数百分の1の容量で突入電流抑制を可能とした。すなわち、整合用変圧器の容量を主変圧器容量の数百分の1とすることができ、経済的な突入電流抑制方法を提供できたといえる。
【図面の簡単な説明】
【図1】実施の形態1の突入電流抑制方法を適用する基本回路構成(単相)を示した図である。
【図2】実施の形態1の主変圧器の特性を示した図表である。
【図3】図2に示した主変換器から導くことのできる変換器定数を示した図表である。
【図4】突入電流減衰時間、飽和電圧、磁化電流、空心リアクタンスを示した図表である。
【図5】構築した単相回路モデルを用いた数値実験で、突入電流が発生する様子を確認する図である。
【図6】実施の形態1の電力変換器の構成例を示した図である。
【図7】実施の形態1の計算器実験に用いる回路定数を示した図表である。
【図8】実施の形態1の電力変換器の信号生成構成ブロックを示した図である。
【図9】実施の形態1の整合用変圧器の定数を示した図表である。
【図10】実施の形態1の突入電流抑制方法を用い、主変換器を電源に投入した際の電流電圧の変化の様子を示した図である。
【図11】実施の形態1の突入電流抑制方法を用い、主変換器を電源に投入し、定常後、突入電流抑制器を緩やかに減衰させた際の電流電圧の変化の様子を示した図である。
【図12】実施の形態2の突入電流抑制方法を適用する基本回路構成(三相)を示した図である。
【図13】構築した三相回路モデルを用いた数値実験で、突入電流が発生する様子を確認する図である。
【図14】三相回路の場合の回路定数を示した図表である。
【図15】実施の形態2の突入電流抑制方法を用い、主変換器を電源に投入した際の電流電圧の変化の様子を示した図である。
【図16】実施の形態2の突入電流抑制方法を用い、主変換器を電源に投入し、定常後、突入電流抑制器を緩やかに減衰させた際の電流電圧の変化の様子を示した図である。
【符号の説明】
101 電源
102 主変圧器
103 突入電流抑制器
131 電力変換器(電力形PWM変換器)
132 駆動電源
133 LCフィルタ
134 整合用変圧器
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a rush current suppression method for a transformer, and more particularly to a rush current suppression method using a voltage type inverter.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, power demanding facilities such as factories have a power receiving facility for drawing in power from a substation in a premises. In the power receiving equipment, in addition to a large-sized power receiving end transformer for lowering the voltage, protection equipment such as a circuit breaker that operates in the event of a ground fault or short circuit in a power line is installed. In addition, when the facility scale is large and there are a plurality of buildings in the premises, a plurality of medium-sized transformers and circuit breakers associated therewith are provided below the large-sized transformer at the power receiving end so as to be circuit independent. As a result, even if one building loses power, the other facilities can fully supply power.
[0003]
However, it is known that when a large-sized transformer or a medium-sized transformer is unnecessarily connected (turned on) to a power supply with no load, a current several tens of times the rated current, that is, an inrush current is generated. If an inrush current exceeding the rated current of the large transformer at the receiving end occurs, firstly, there is a problem that the circuit breaker provided immediately outside the premises circuit malfunctions and the whole premises is powered down. Was. This is a problem that can occur even if an inrush current occurs in the medium-sized transformer.
[0004]
Further, even when a power failure does not occur in the entire premises, the voltage waveform is greatly distorted, and in some cases, a malfunction may occur including devices in other buildings in the premises. For example, such a malfunction is not allowed in a facility such as a general hospital or a research institution of a university where a device that must not be stopped is operating.
[0005]
Conventionally, in order to solve these problems, a method of adjusting a power-on phase is used in a single-phase circuit. Also, in the three-phase circuit, a transformer having a built-in inrush current suppression resistor is known (Kazuhiro Mizuno et al., "Development of Transformer for Suppressing Exciting Excitation", Materials of the Institute of Electrical Engineers of Japan, SA-94-29, ( 1994)). A method is also known in which a PWM converter having a high-speed current response is connected in parallel with a transformer and an inrush current is supplied to suppress a momentary voltage drop or the like on the power supply side (Katsuji Fujiwara et al. Transformer Exciting Inrush Current Compensation Circuit Using Filter ", IEICE National Convention, 1998, No. 830).
[0006]
[Problems to be solved by the invention]
However, the conventional technique has the following problems.
That is, in the three-phase circuit, even if the power-on phase is adjusted in principle, there is a problem that the inrush current always occurs as a result of the phase difference of 120 °.
[0007]
In addition, the method of incorporating a suppression resistor in a transformer cannot prevent secondary rush, which is a problem when short-circuiting the suppression resistor, and it is necessary to limit the resistance value in order to prevent it. Was.
[0008]
Further, in the system using the parallel type PWM converter, it is necessary to increase the capacity (V × A) of the PWM converter itself, and there is a problem that it is not economical and is not practical.
[0009]
The present invention has been made in view of the above, and an object of the present invention is to provide an inrush current suppressing method for suppressing an inrush current with a simple configuration regardless of whether the circuit is a single-phase circuit or a three-phase circuit.
[0010]
[Means for Solving the Problems]
In order to achieve the above object, a method for suppressing inrush current according to claim 1 is a method for suppressing inrush current applied in a circuit for stepping down a power supply voltage using a transformer, and the method for suppressing inrush current via a matching transformer. A voltage source inverter is connected in series with the transformer, and the voltage source inverter is operated as a braking resistor of the transformer.
[0011]
According to a second aspect of the present invention, there is provided an inrush current suppressing method according to the first aspect, wherein the output voltage of the voltage type inverter is taken over a predetermined time when the operation of the voltage type inverter is stopped. Is reduced.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[Embodiment 1]
FIG. 1 is a diagram showing a basic circuit configuration (single phase) to which the rush current suppressing method according to the first embodiment is applied. As shown, the circuit 100 includes a power supply 101, a main transformer 102, and an inrush current suppressor 103.
[0013]
The inrush current suppressor 103 includes a power converter 131 that is a PWM converter, a DC power supply 132 that drives the power converter 131, and a switching ripple suppression filter (LC filter) 133 provided on the output side of the power converter 131. And a matching transformer 134. The matching transformer is a transformer used to match the voltage and current ratings of each other when the voltage type inverter is connected to the power system. As shown, in the present invention, the rush current suppressor 103 is connected in series with the power supply 101 via the matching transformer 134.
[0014]
Although not shown, the DC power supply 132 is provided with a capacitor in the immediate vicinity thereof and is charged in advance and used. Further, a regenerative converter is connected to the DC capacitor (not shown), and energy generated when the main transformer 102 is turned on is regenerated to the power supply 101. Here, a PWM converter is used as the power converter 131, but the present invention is not limited to this, and any voltage-type inverter can be used.
[0015]
In the first embodiment, verification is mainly performed by computer experiments. First, a system (single-phase circuit) for generating an inrush current is constructed, and then, experimental results in a case where the present invention is applied will be described.
[0016]
As the main transformer 102, a single-phase transformer having a rated voltage V 0 = 200 [V], a rated current of 30 [A], and a capacity of 6000 [VA] is used. FIG. 2 is a chart showing the characteristics of the main transformer 102. FIG. 3 is a table showing converter constants that can be derived from the main transformer 102 shown in FIG. In the experiments, PSCAD / EMTC (manitoba HVDC Research Center, Canada), which is the world standard software for simulating electromagnetic transients in power systems, was used. In the experiment, the winding resistance was assumed to be equal on the primary side and the secondary side, and the values shown in FIG. 4 were used for the inrush current decay time, the saturation voltage, the magnetizing current, and the air-core reactance. For simplicity, the experiment did not consider hysteresis and residual magnetic flux.
[0017]
The power source 101, 200 [V] the voltage effective value V s, the frequency was 60 [Hz], was based on 6000 [VA]. The power supply side impedance L s was 5%.
[0018]
First, in FIG. 1, the inrush current suppressor 103 was removed from the circuit 100, and the power supply voltage and the current waveform when the main transformer 102 was turned on at a power supply voltage phase of 0 ° (when the switch SW1 was turned on) were measured. FIG. 5 shows the result. As shown, the current i s of circuit 100 at most has recorded about 330 [A], the main transformer 102 8 times the rated current 30 [A], that is, the inrush current is generated The system was confirmed. When the main transformer 102 is turned on at a power supply voltage phase of 90 ° in the circuit 100, although not shown, only the no-load current flows as theoretically confirmed, and no inrush current occurs. Was confirmed.
[0019]
Next, the configuration and operation of the inrush current suppressor 103 will be described in detail. FIG. 6 is a diagram illustrating a configuration example of the power converter 131, and FIG. 7 is a table illustrating circuit constants used in a computer experiment. The power converter 131 obtains the output voltage vab using a triangular wave comparison method PWM (Pulse Width Modulation) as shown in FIG. The power converter 131 detects the current i s flowing into the main transformer 102 is compared with the triangular wave v t is multiplied by the gain of K times. This makes it possible to the average value of the output voltage v ab of the power converter 131 (see FIG. 6) to K · i s [VA]. This means that the inrush current suppressor 103 operates as a resistance of K [Ω]. Actually, in the circuit 100, components caused by switching are removed by using the LC filter 133.
[0020]
G 1 to g 4 of the blocks shown in FIG. 8 is connected to g 1 to g 4 shown in FIG. Since the main transformer 102 is in a no-load state, when the iron core is saturated, the control gain K is set so as to output the output voltage v out of the power converter 131 so as not to exceed the no-load current I 0 (see FIG. 2). To determine. Incidentally, S 1 inputs a signal for controlling the operation stop of the power converter 131 of FIG.
[0021]
In the first embodiment, since the gain is determined so as not to exceed the no-load current I 0 , the rated current of the modeled main transformer 102 is set to 0.3 [A], and the transformer constant is determined. A transformer 134 is used. FIG. 9 shows the constants of the matching transformer.
[0022]
A computer experiment was performed as described above. Supply voltage v s closed is 0 [V] and becomes t = 0.0167 [s] at SW1, was charged with the main transformer 102 to the power source 101. The results are shown in FIG. As is clear from the comparison with FIG. 5, it can be confirmed that an inrush current has not occurred immediately after being turned on and is in a steady state. However, it was found that when the operation of the power converter 131 was suddenly stopped, a secondary rush occurred and a current of about 2 [A] was flowing.
[0023]
The output voltage of the power converter 131 was reduced over a period of 50 [ms] in order to prevent a secondary inrush and a rapid change in the voltage phase. Specifically, the output voltage v out was reduced by taking 50 [ms] after elapse of t = 0.1 [s], and the operation of the power converter 131 was stopped at t = 0.15 [s]. FIG. 11 shows the results. At the moment when the main transformer 102 is turned on to the power supply 101, a maximum current of about 0.17 [A] flows, but after one cycle, the current becomes about 0.12 [A], and a steady state is maintained, which also affects the power supply voltage. Is not affected. In addition, since the output voltage v out of the power converter 131 was reduced over 50 [ms], it was confirmed that the secondary inrush did not occur. When the operation of the rush current suppressor 103 was completely stopped, a current of 0.28 [A] flowed to the circuit 100 as a no-load current, and it was confirmed that the rush current was suppressed in both the primary and the secondary.
[0024]
Next, the capacity of the inrush current suppressor 103 is determined from the computer experiment results. In the result shown in FIG. 10, the maximum value of the output voltage v out of the power converter 131 was 170 [V]. The maximum value of the current i s was 0.17 [A]. Therefore, the peak value capacity P peak of the power converter 131 is
P peak = 170 × 0.17 = 28.9 [VA]
It becomes. Therefore, the effective value capacity of the inrush current suppressor 102 is about 15 [VA]. Accordingly, the inrush current can be suppressed by the inrush current suppressor 102 having a capacity of 1/400 with respect to the capacity of the main transformer 102 of 6000 [VA].
[0025]
As described above, according to the rush current suppressing method of the first embodiment, it has been clarified that the rush current of the single-phase circuit can be suppressed with a simple configuration.
[0026]
[Embodiment 2]
In a second embodiment, a description will be given of a rush current suppressing method for a three-phase circuit. In the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted unless otherwise specified.
[0027]
FIG. 12 is a diagram illustrating a basic circuit configuration (three-phase) to which the inrush current suppressing method according to the second embodiment is applied. As shown, the circuit 200 has a configuration in which the circuit 100 is combined for three phases, and the primary side is connected to the power supply 101 with a Δ connection. In the second embodiment, the line voltage effective value of the three-phase power supply voltage is set to 200 [V] and the frequency is set to 60 [Hz], and is based on 10,000 [VA]. Similarly to the single-phase circuit 100, and the power supply side impedance L s is 5%.
[0028]
First, in order to confirm occurrence of an inrush current, in FIG. 12, the inrush current suppressor 103 is removed from the circuit 200, and the main transformers 102 ( Tra , Trb , and Trc ) are set at 0 ° in the a-phase voltage phase. The power supply 101 (v sa , vsb , v sc ) was turned on, and the power supply voltage and the current waveform were measured. FIG. 13 shows the result. As shown, a current of about 330 [A] at maximum flows in the a phase, and a current of -330 [A] flows in the b phase in order to satisfy Kirchhoff's law. It was confirmed that the system was a system in which an inrush current of 10 times or more than that of the above system flowed. Since the circuit 100 is symmetrical, the same result is obtained regardless of the phase in which the main transformer 102 is turned on to the power supply 101. Further, as described above, since the phases are shifted from each other by 120 °, an inrush current always occurs in one of the phases.
[0029]
Computer experiments were performed with the circuit constants for a three-phase circuit as the values shown in FIG. In the experiment, the circuit configuration was three-phase, and the circuit configuration was the same as that of the first embodiment except for the circuit constants shown in FIG. 14. When the voltage phase of the a-phase was 0 °, the three-phase main transformer 102 was connected to the power supply 101 at the same time. I put it in. The result is shown in FIG. As is clear from comparison with FIG. 13, it can be confirmed that no rush current is generated immediately after the injection and a steady state is obtained. However, it was found that when the operation of the power converter 131 was suddenly stopped, a secondary rush occurred and a current of about 3 [A] was flowing.
[0030]
As in the first embodiment, the output voltage of the power converter 131 is reduced over 50 [ms] to prevent the secondary rush and to prevent a sudden change in the voltage phase. Tried prevention. FIG. 16 shows the results. At the moment when the power supply 101 is turned on, a maximum current of about 0.12 [A] flows, but in a steady state, a current of about 0.08 [A]. When the operation of the power converter 131 is completely stopped, a current of 0.28 [A] flows as a no-load current, and it can be seen that the rush current is suppressed by the power converter 131 in both the primary and secondary powers.
[0031]
Next, the capacity of the inrush current suppressor 103 in the case of the three-phase circuit is obtained from the calculation experiment results. The maximum output voltage of the power converter 131 is about 120 [V] per phase. The maximum value of the current i s is 0.12 [A]. Therefore, the peak value capacity P peak of the power converter 131 is
P peak = 120 × 0.12 = 14.4 [VA]
It becomes. Therefore, the effective value capacity per one power converter 131 is about 7.2 [VA], and becomes 22 [VA] when all three phases are combined. Accordingly, the inrush current can be suppressed by the inrush current suppressor 102 having a capacity of 1/454 with respect to the capacity of the main transformer 102 of 10,000 [VA].
[0032]
As described above, according to the rush current suppressing method of the second embodiment, it has been clarified that the rush current can be suppressed with a simple configuration even with a three-phase circuit.
[0033]
【The invention's effect】
As described above, according to the inrush current suppressing method of the present invention, it is possible to provide an inrush current suppressing method for suppressing an inrush current with a simple configuration regardless of whether the circuit is a single-phase circuit or a three-phase circuit. Was. Further, the inrush current can be suppressed with a capacity of several hundredths of the capacity of the main converter. That is, the capacity of the matching transformer can be reduced to several hundredths of the capacity of the main transformer, and it can be said that an economical rush current suppression method can be provided.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a basic circuit configuration (single phase) to which an inrush current suppressing method according to a first embodiment is applied.
FIG. 2 is a table showing characteristics of a main transformer according to the first embodiment.
FIG. 3 is a table showing converter constants that can be derived from the main converter shown in FIG. 2;
FIG. 4 is a table showing inrush current decay time, saturation voltage, magnetizing current, and air-core reactance.
FIG. 5 is a diagram for confirming how an inrush current occurs in a numerical experiment using a constructed single-phase circuit model.
FIG. 6 is a diagram illustrating a configuration example of a power converter according to the first embodiment.
FIG. 7 is a table showing circuit constants used in a computer experiment of the first embodiment.
FIG. 8 is a diagram showing signal generation configuration blocks of the power converter according to the first embodiment.
FIG. 9 is a table showing constants of the matching transformer according to the first embodiment;
FIG. 10 is a diagram showing a state of a change in a current voltage when the main converter is turned on using the inrush current suppressing method according to the first embodiment.
FIG. 11 is a diagram showing a state of a change in a current voltage when the inrush current suppressor is gradually attenuated after the main converter is turned on and a steady state is applied, using the inrush current suppression method according to the first embodiment. It is.
FIG. 12 is a diagram showing a basic circuit configuration (three-phase) to which the inrush current suppressing method according to the second embodiment is applied.
FIG. 13 is a diagram for confirming how an inrush current occurs in a numerical experiment using a constructed three-phase circuit model.
FIG. 14 is a table showing circuit constants in the case of a three-phase circuit.
FIG. 15 is a diagram showing a state of a change in a current voltage when the main converter is turned on using a rush current suppressing method according to the second embodiment.
FIG. 16 is a diagram showing a state of a change in a current voltage when the inrush current suppressor is gradually attenuated after the main converter is turned on and a steady state is applied, using the inrush current suppression method according to the second embodiment. It is.
[Explanation of symbols]
101 power supply 102 main transformer 103 inrush current suppressor 131 power converter (power type PWM converter)
132 Drive power supply 133 LC filter 134 Matching transformer

Claims (2)

変圧器を用いて電源電圧を降圧する回路において適用する突入電流抑制方法であって、整合用変圧器を介して電圧形インバータを前記変圧器と直列接続し、当該電圧形インバータを前記変圧器の制動抵抗として動作させることを特徴とする突入電流抑制方法。A rush current suppression method applied in a circuit for stepping down a power supply voltage using a transformer, wherein a voltage-type inverter is connected in series with the transformer via a matching transformer, and the voltage-type inverter is connected to the transformer. A rush current suppression method characterized by operating as a braking resistor. 前記電圧形インバータの動作を停止する際に所定の時間をかけて当該電圧形インバータの出力電圧を減少させることを特徴とする請求項1に記載の突入電流抑制方法。2. The rush current suppressing method according to claim 1, wherein when the operation of the voltage source inverter is stopped, the output voltage of the voltage source inverter is reduced for a predetermined time.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112968461A (en) * 2021-02-08 2021-06-15 国网安徽省电力有限公司电力科学研究院 Converter transformer phase selection closing excitation inrush current suppression method based on bias simulation
CN118137419A (en) * 2024-03-06 2024-06-04 保定市英电电力科技有限公司 Excitation-free inrush current closing control device and test method for transformer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112968461A (en) * 2021-02-08 2021-06-15 国网安徽省电力有限公司电力科学研究院 Converter transformer phase selection closing excitation inrush current suppression method based on bias simulation
CN118137419A (en) * 2024-03-06 2024-06-04 保定市英电电力科技有限公司 Excitation-free inrush current closing control device and test method for transformer

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