JP2004112001A

JP2004112001A - Multilayer wiring board

Info

Publication number: JP2004112001A
Application number: JP2004005721A
Authority: JP
Inventors: Haruo Ogino; 荻野　晴夫; Nobuyuki Minami; 南　宣行; Fujio Kojima; 小島　富士男; Kazuji Yamagishi; 山岸　一次; Yoshihiro Tamura; 田村　義広; Kenichi Kawada; 河田　健一
Original assignee: Hitachi Chemical Co Ltd
Current assignee: Showa Denko Materials Co Ltd
Priority date: 2004-01-13
Filing date: 2004-01-13
Publication date: 2004-04-08

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer wiring board excellent in wiring density and economical. <P>SOLUTION: The multilayer wiring board has a flexible layer at the outermost insulating layer in order to prevent an increase in the linear expansion coefficient. <P>COPYRIGHT: (C)2004,JPO

Description

　本発明は、多層配線板に関する。 The present invention relates to a multilayer wiring board.

　電子機器の小型・高性能化に伴い、これに使用される電子部品の実装方法もデュアルインラインパッケージの様に部品リードを配線板に挿入しはんだ付けする方法から、フラットパック、チップキャリアの様に配線板表面にはんだ付けする方法に高密度化してきた。また、近年ワイヤーボンド法やフリップチップを用いてＩＣチップを直接配線板上に実装する方法が採用されはじめた。 With the miniaturization and high performance of electronic equipment, the mounting method of the electronic components used for it has been changed from the method of inserting the component leads into the wiring board and soldering like a dual in-line package to the method of flat pack and chip carrier. The method of soldering to the surface of wiring boards has been increasing in density. In recent years, a method of directly mounting an IC chip on a wiring board using a wire bonding method or a flip chip has begun to be adopted.

　これら高密度実装に使用される配線板は、技術情報協会発行「ベアチップ実装、最新技術開発と信頼性対策」ｐ１００、図５に示される様に、高密度化するほどセラミックを絶縁基板とする配線板が使用されている。
「ベアチップ実装、最新技術開発と信頼性対策」技術情報協会発行 As shown in FIG. 5, a wiring board used for high-density mounting is made of ceramic as an insulating substrate as the density increases, as shown in FIG. Boards are used.
"Bare chip mounting, latest technology development and reliability measures" published by Technical Information Association

　セラミックを絶縁層とする配線板は、高密度表面実装時の接続信頼性が高いという特長がある。しかし、セラミック配線板は割れやすいため、汎用製品としては数センチ角程度の配線板が限界で、小さな配線板にしか適用できない問題点がある。また、セラミック配線板はその製造において高温・長時間の焼成を行う必要があるため、製造に多大なエネルギーがかかり、導体の材料も限定されるため、結果としてコストが高くなるという課題がある。配線 Wiring boards using ceramic as an insulating layer have the feature of high connection reliability during high-density surface mounting. However, since ceramic wiring boards are easily broken, a wiring board having a size of about several centimeters is the limit as a general-purpose product, and there is a problem that it can be applied only to a small wiring board. Further, the ceramic wiring board needs to be fired at a high temperature for a long time in its manufacture, so that a large amount of energy is required for the manufacture and the material of the conductor is limited, resulting in a problem that the cost is increased.

　本発明は、配線密度に優れ、かつ経済的な多層配線板を提供することを目的とするものである。 The present invention aims to provide an economical multilayer wiring board having excellent wiring density.

　本発明の多層配線板は、複数層の導体回路層が絶縁層を介して積層接着され、所定の導体回路層間を導体化された穴で電気的に接続してなる多層配線板において、Ｘ及びＹ方向の線膨張率が１３ｐｐｍ／℃以下のガラスクロス補強樹脂製の絶縁層を１層以上有することを特徴とする。 The multilayer wiring board of the present invention is a multilayer wiring board in which a plurality of conductive circuit layers are laminated and bonded via an insulating layer, and predetermined conductive circuit layers are electrically connected to each other through conductive holes. It is characterized by having one or more insulating layers made of glass cloth reinforced resin having a linear expansion coefficient of 13 ppm / ° C. or less in the Y direction.

　以上に説明したように、本発明によって、配線密度に優れ、かつ経済的な多層配線板を提供することができる。 As described above, according to the present invention, an economical multilayer wiring board having excellent wiring density can be provided.

　本発明の導体回路層１は、２層以上必要で、高密度化を達成するためには図１に例示する様に、３層またはこれ以上が望ましい。導体回路層１は既存の銅箔をエッチング法で回路形成したもの等、任意のものが使用できる。導体 The conductor circuit layer 1 of the present invention requires two or more layers, and in order to achieve high density, three or more layers are desirable as illustrated in FIG. As the conductive circuit layer 1, any one such as a circuit formed by etching an existing copper foil by an etching method can be used.

　複数の導体回路層は絶縁層２で絶縁され、この絶縁層の少なくとも１層には配線板の平面方向となるＸ及びＹ方向の線膨張率が室温付近で１３ｐｐｍ／℃以下のガラスクロス補強された樹脂製の絶縁層２ａを使用する必要がある。 The plurality of conductor circuit layers are insulated by the insulating layer 2, and at least one of the insulating layers is reinforced with glass cloth having a coefficient of linear expansion of 13 ppm / ° C. or less near room temperature in the X and Y directions that are the plane directions of the wiring board. It is necessary to use the insulating layer 2a made of resin.

　この特性を有する絶縁層は、厚いほど良く、配線板総厚の１／２以上であることが特に好ましい。この絶縁層の厚み方向となるＺ方向の線膨張率は、配線板自身の信頼性を確保するため低いほど良いが、１３ｐｐｍ／℃以下である必要は無い。 (4) The thicker the insulating layer having this property, the better, and it is particularly preferable that the thickness be equal to or more than の of the total thickness of the wiring board. The coefficient of linear expansion in the Z direction, which is the thickness direction of the insulating layer, is preferably as low as possible in order to secure the reliability of the wiring board itself, but need not be 13 ppm / ° C. or less.

　複数層の配線層を電気的に接続するため、導体化された穴３が必要である。この穴は図１−３に例示した様な配線板を貫通する穴とこの穴内に銅めっき４を施したスルーホールでも良く、導体化された非貫通ホールでも良い。 (4) In order to electrically connect a plurality of wiring layers, a hole 3 made conductive is required. This hole may be a hole penetrating the wiring board as illustrated in FIG. 1-3, a through hole in which copper plating 4 is applied in this hole, or a non-through hole made into a conductor.

　本発明の多層配線板は、図１に例示する様に、最外層となる絶縁層２ｂにガラスクロスを含有しない樹脂フィルムを用いることが特に好ましい。この樹脂フィルムはエポキシ樹脂、フェノール樹脂、ポリイミド樹脂やこれらの混合物、共重合物等が使用できる。多層 In the multilayer wiring board of the present invention, as illustrated in FIG. 1, it is particularly preferable to use a resin film containing no glass cloth for the outermost insulating layer 2b. For this resin film, an epoxy resin, a phenol resin, a polyimide resin, a mixture thereof, a copolymer or the like can be used.

　一般のガラスエポキシ基材（ＦＲ−４材）はＸ，Ｙ方向の線膨張率が１６ｐｐｍ／℃であるのに比較し、本発明の配線板は、線膨張率が１３ｐｐｍ／℃以下の絶縁層を用いるため、配線板全体の線膨張率を所定量以下にコントロールすることができる。さらに、最外層の絶縁層に樹脂フィルムを用いた場合、一般にフィルムはヤング率が低く柔軟であることと、厚みが薄いため、配線板全体の線膨張率を増加させない効果がある。 Compared to a general glass epoxy substrate (FR-4 material) having a linear expansion coefficient of 16 ppm / ° C. in the X and Y directions, the wiring board of the present invention has an insulating layer having a linear expansion coefficient of 13 ppm / ° C. or less. Because of this, the coefficient of linear expansion of the entire wiring board can be controlled to a predetermined amount or less. Further, when a resin film is used for the outermost insulating layer, the film generally has a low Young's modulus and is flexible and has a small thickness, so that there is an effect that the linear expansion coefficient of the entire wiring board is not increased.

　実施例１
　Ｘ，Ｙ方向の線膨張率が１１ｐｐｍの、ガラスクロス・エポキシ樹脂両面銅張り積層板であるＭＣＬ−Ｅ−６７９ＬＤ（日立化成工業株式会社製、商品名）の表面銅箔を既存のエッチング法で回路加工し、内層導体回路を形成した。次いで、その表面に、ガラスクロス・エポキシプリプレグであるＧＥＡ−６７９（日立化成工業株式会社製、商品名）と、銅箔とを重ね、１７０℃、４０ｋｇ／ｃｍ^２、６０分プレス積層し多層化した。 Example 1
The surface copper foil of MCL-E-679LD (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is a glass cloth / epoxy resin double-sided copper-clad laminate having a linear expansion coefficient of 11 ppm in the X and Y directions is obtained by an existing etching method. The circuit was processed to form an inner conductor circuit. Next, GEA-679 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a glass cloth epoxy prepreg, and a copper foil are superimposed on the surface, and press-laminated at 170 ° C., 40 kg / cm ² for 60 minutes to form a multilayer. did.

　次いで、ドリル穴あけ機で貫通穴を形成し、穴内に銅めっきを施した後、既存のエッチング法で外層導体回路を形成し本発明の多層配線板を得た。 (5) Next, through holes were formed by a drilling machine, copper plating was performed in the holes, and an outer conductor circuit was formed by an existing etching method to obtain a multilayer wiring board of the present invention.

　実施例２
　実施例１のＧＥＡ−６７９（日立化成工業株式会社製、商品名）に変えて、エポキシ接着フィルムであるＡＳ−３０００（日立化成工業株式会社製、商品名）を使用し、実施例１と同じ方法で本発明の多層配線板を得た。 Example 2
In place of GEA-679 (product name, manufactured by Hitachi Chemical Co., Ltd.) of Example 1, an AS-3000 (product name, manufactured by Hitachi Chemical Co., Ltd.) which is an epoxy adhesive film was used. The multilayer wiring board of the present invention was obtained by the method.

　実施例３
　実施例２の、ＭＣＬ−Ｅ−６７９ＬＤ（日立化成工業株式会社製、商品名）に変えて、Ｘ，Ｙ方向の線膨張率が、８ｐｐｍのガラスクロス・エポキシ樹脂・セラミック両面銅張り積層板であるＭＣＬ−ＣＥ−６７（日立化成工業株式会社製、商品名）を使用し、実施例２と同じ方法で本発明の多層配線板を得た。 Example 3
Instead of the MCL-E-679LD (trade name, manufactured by Hitachi Chemical Co., Ltd.) of Example 2, a glass cloth, epoxy resin, and ceramic double-sided copper-clad laminate having a linear expansion coefficient in the X and Y directions of 8 ppm was used. Using a certain MCL-CE-67 (trade name, manufactured by Hitachi Chemical Co., Ltd.), a multilayer wiring board of the present invention was obtained in the same manner as in Example 2.

　比較例１
　絶縁材料に、アルミナセラミックスを用い、層間の絶縁にもアルミナセラミックスを用い、回路は実施例１と同じ回路を形成し、多層配線板を得た。 Comparative Example 1
Alumina ceramics was used for the insulating material, and alumina ceramics was used for the insulation between the layers. The circuit was the same as that in Example 1, and a multilayer wiring board was obtained.

　比較例２
　実施例１において、ガラスクロス・エポキシ樹脂両面銅張り積層板であるＭＣＬ−Ｅ−６７９ＬＤ（日立化成工業株式会社製、商品名）に代えて、Ｘ，Ｙ方向の線膨張率が、１６ｐｐｍのガラスクロス・エポキシ樹脂両面銅張り積層板であるＭＣＬ−Ｅ−６７（日立化成工業株式会社製、商品名）を用い、ガラスクロス・エポキシプリプレグであるＧＥＡ−６７９（日立化成工業株式会社製、商品名）に代えて、ＧＥＡ−６７Ｎ（日立化成工業株式会社製、商品名）を用いた他は、実施例１と同様にして、多層配線板を得た。 Comparative Example 2
In Example 1, glass having a linear expansion coefficient of 16 ppm in the X and Y directions was used instead of MCL-E-679LD (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a glass cloth / epoxy resin double-sided copper-clad laminate. Using MCL-E-67 (trade name, manufactured by Hitachi Chemical Co., Ltd.), a double-sided copper-clad laminate made of cloth and epoxy resin, GEA-679 (trade name, manufactured by Hitachi Chemical Co., Ltd.), a glass cloth epoxy prepreg ) Was used in the same manner as in Example 1 except that GEA-67N (trade name, manufactured by Hitachi Chemical Co., Ltd.) was used to obtain a multilayer wiring board.

　このようにして作成した配線板の接続信頼性を、表面実装部品を配線板表面にはんだで実装し、（−５５℃、１０分）／（１２５℃、１０分）の条件で繰返して熱衝撃テストを行った。この結果を、断線しない状態を、２０００回保てれば◎、１０００回まで保てれば○、５００回まで保てれば△、５００回まで保てなければ×と評価した。この評価結果を表１に示す。また、使用した絶縁剤量の線膨張率を併記する。

The connection reliability of the wiring board prepared in this manner is measured by mounting the surface-mounted component on the surface of the wiring board with solder and repeating the conditions of (−55 ° C., 10 minutes) / (125 ° C., 10 minutes) under thermal shock. Tested. The results were evaluated as ◎ if the disconnection was maintained 2,000 times, れば if maintained up to 1000 times, Δ if maintained up to 500 times, and × if not maintained up to 500 times. Table 1 shows the evaluation results. In addition, the linear expansion coefficient of the amount of the used insulating agent is also described.

接続信頼性：表面実装部品を配線板表面にはんだで実装し−５５℃、１０分←→１２５℃、１０分に熱衝撃テストを行った。 Connection reliability: The surface mount components were mounted on the surface of the wiring board by soldering, and a thermal shock test was performed at −55 ° C. for 10 minutes ← → 125 ° C. for 10 minutes.

◎：２０００回ＯＫ
○：１０００回ＯＫ
△：　５００回ＯＫ
×：　５００回ＮＧ ◎: 2000 times OK
○: OK 1000 times
△: 500 times OK
×: 500 times NG

本発明の一実施例を示す多層配線板の断面図である。1 is a cross-sectional view of a multilayer wiring board according to an embodiment of the present invention. 本発明の別の実施例を示す多層配線板の断面図である。FIG. 6 is a cross-sectional view of a multilayer wiring board showing another embodiment of the present invention.

Explanation of reference numerals

１．導体回路層
２，２ａ，２ｂ．絶縁層
３．スルーホール
４．銅めっき
５．表面実装部品 1. Conductor circuit layer
2, 2a, 2b. 2. Insulating layer Through hole
4. Copper plating5. Surface mount components

Claims

A multilayer wiring board having a flexible layer in the outermost insulating layer that does not increase the coefficient of linear expansion.