JP2004103967A - Method for manufacturing substrate with built-in capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a substrate having a built-in capacitor for manufacturing a large capacitance capacitor with the high accuracy, the high reliability, excellent high frequency characteristics and an excellent mass productivity. <P>SOLUTION: There are provided a first electrode layer forming step of concurrently forming a wiring conductor 12 and a first electrode layer 11 serving as one electrode conductor of a capacitor on a conductive transfer substrate 10 by a pattern plating method; a dielectric layer forming step of forming a dielectric layer 30 so as to cover at least the overall surface of the first electrode layer; a second electrode layer forming step of forming a second electrode layer 51 serving as the other electrode conductor of the capacitor at a predetermined position on the dielectric layer by the pattern plating method; and a transfer step of transferring the first electrode layer 11, the dielectric layer 30 and the second electrode layer 51 into an insulated sheet 60 with the first electrode layer 11 outside. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a substrate with a built-in capacitor in which a capacitor is built in a wiring board.
[0002]
[Prior art]
The conventional method for forming a capacitor inside a substrate is to prepare two transfer substrates having electrodes formed on the surface, press a prepreg having a high dielectric constant between the transfer substrates, and press the prepreg on both sides of the prepreg 1 as shown in FIG. Generally, a capacitor was formed by arranging the electrodes 2. The thickness of the prepreg 1 is about 60 μm, and the thickness of the prepreg interposed between the electrodes 2 is about 20 μm.
[0003]
[Problems to be solved by the invention]
In the case of the capacitor having the configuration shown in FIG. 2, there are the following problems.
[0004]
{Circle around (1)} The prepreg interposed between the electrodes has defects such as pinholes and cannot be reduced in thickness.
[0005]
{Circle around (2)} The electrodes are formed by a plating method, but plating components such as chlorine are mixed as impurities, which may cause a decrease in reliability.
[0006]
(3) In some cases, impurities such as chlorine are mixed in the resin used for the prepreg itself.
[0007]
(4) An electrolyte solution such as a plating solution or an etching solution may remain on the surface and inside of the resin layer of the substrate having the electrode pattern, which adversely affects reliability.
[0008]
{Circle around (5)} Since the resin softens and flows during pressing, the film thickness varies depending on the pattern shape and the position inside the substrate, and the accuracy of the capacitor capacity is poor.
[0009]
In the case of a substrate having a built-in capacitor, when the electrode of the capacitor is formed into a required pattern by etching, there is an etching process including halogen, which may adversely affect reliability and the like. Further, the electrode layer and the wiring layer of the built-in capacitor are separate layers, and a separate process is required for forming the wiring layer, and the number of steps is large (for example, see Patent Document 1 below). In the case where a capacitor is formed on a process substrate and transferred to a mounting substrate, the process substrate is an insulating material such as a glass substrate, and the electrodes of the capacitor are formed by thin film technology such as evaporation. This is disadvantageous in terms of mass productivity, and the wiring layer must be formed separately from the capacitor (for example, see Patent Document 2 below).
[Patent Document 1]
JP-A-11-26943 [Patent Document 2]
JP 2000-323845 A
The present invention has been made in view of the above circumstances, and has as its object to provide a method of manufacturing a capacitor built-in substrate which is capable of manufacturing a large-capacity capacitor excellent in high-precision and high-reliability high-frequency characteristics inside a substrate and excellent in mass productivity. I do.
[0011]
Other objects and novel features of the present invention will be clarified in embodiments described later.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, a method of manufacturing a substrate with a built-in capacitor according to the invention of claim 1 of the present application is a method of forming a first electrode layer serving as one of a wiring conductor and a capacitor on a conductive transfer substrate by a pattern plating method. A first electrode layer forming step of forming simultaneously at
Forming a dielectric layer so as to cover at least the entire surface of the first electrode layer;
A second electrode layer forming step of forming a second electrode layer serving as the other electrode conductor of the capacitor on the dielectric layer at a predetermined position by a pattern plating method;
A transfer step of transferring the first electrode layer, the dielectric layer, and the second electrode layer to an insulating sheet with the first electrode layer outside.
[0013]
A method of manufacturing a substrate with a built-in capacitor according to a second aspect of the present invention is characterized in that, in the first aspect, the first and second electrode layers are formed by copper pyrophosphate plating.
[0014]
A method of manufacturing a substrate with a built-in capacitor according to a third aspect of the present invention is characterized in that, in the first or second aspect, barrier layers are formed above and below the dielectric layer.
[0015]
A method of manufacturing a substrate with a built-in capacitor according to a fourth aspect of the present invention is characterized in that, in the third aspect, the barrier layer and the dielectric layer are collectively dry-etched using the second electrode layer as a mask. .
[0016]
According to a fifth aspect of the present invention, there is provided a method of manufacturing a substrate with a built-in capacitor, wherein the dielectric layer is made of an organic material.
[0017]
The method of manufacturing a substrate with a built-in capacitor according to the invention of claim 6 of the present application is characterized in that in claim 1, 2, 3, 4, or 5, the dielectric layer is formed by vapor deposition polymerization.
[0018]
The method of manufacturing a substrate with a built-in capacitor according to claim 7 of the present invention is characterized in that in claim 1, 2, 3, 4, 5, or 6, the dielectric layer is made of polyurea, polyimide or polyparaxylylene. And
[0019]
According to a method of manufacturing a substrate with a built-in capacitor according to claim 8 of the present invention, the conductive transfer substrate according to claim 1, 2, 3, 4, 5, 6, or 7 is made of stainless steel whose surface is passivated. Features.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a method of manufacturing a substrate with a built-in capacitor according to the present invention will be described with reference to the drawings.
[0021]
FIG. 1 shows an embodiment of a method of manufacturing a substrate with a built-in capacitor according to the present invention. First, as shown in FIG. 1A, a first electrode layer 11 including a wiring conductor 12 having a predetermined pattern and one electrode conductor 13 of a capacitor is formed on a conductive transfer substrate 10 made of stainless steel or the like whose surface is passivated. Is formed in a thickness of several μm to several tens μm (for example, 10 μm) by a pattern plating method to perform the first electrode layer forming step. Here, the electroplating for forming the first electrode layer 11 is halogen-free plating containing no halogen in the plating process, for example, copper pyrophosphate plating. The type of metal to be plated is not limited to copper, and a metal that can be plated, such as Au, Ag, Ni, or Sn, can be used.
[0022]
The pattern plating method includes both a full additive method and a semi-additive method that do not use etching for patterning. The reason for using the pattern plating method is that (1) the pattern accuracy can be improved compared to forming the electrode layer pattern by the etching method, and the fine pattern can be handled. (2) The etching solution remains in the etching method. This adversely affects the reliability of the capacitor.
[0023]
The surface of the conductive transfer substrate 10 made of stainless steel or the like is subjected to the passivation treatment in order to improve the releasability of the conductor pattern. Also, by providing appropriate irregularities on the substrate surface, the electrode layer can be transferred before the transfer by the anchor effect. Is prevented from peeling off from the conductive transfer substrate 10. As the material of stainless steel, for example, SUS304TA material can be cited. The degree of unevenness for ensuring the adhesion of the pattern is, for example, in a range of 0.1 μm to 10 μm, preferably 0.2 μm to 2 μm in Rmax.
[0024]
Next, as shown in FIG. 1B, a barrier layer forming step is performed by forming a high-purity barrier layer 20 covering the entire surface of one electrode conductor 13 of the capacitor by a dry thin film method such as sputtering or vapor deposition. Do. The reason for providing the high-purity barrier layer 20 is to prevent the metal or impurities forming the first electrode layer 11 from diffusing into the dielectric layer 30 formed in a later step and causing insulation failure. To do that. The material of the barrier layer 20 is, for example, Ti, TiN, Ta, TaN, Cr, Ni, or the like, and its thickness is preferably as thin as possible within a range where the barrier effect can be secured. For example, it is 0.01 μm to 1 μm, preferably 0.02 μm to 0.2 μm.
[0025]
Next, as shown in FIG. 1C, a high-Q dielectric layer 30 is thermally decomposed on the barrier layer 20 so as to cover the entire surface of the electrode conductor 13 of the first electrode layer 11 with the barrier layer 20 interposed therebetween. The dielectric layer is formed by a dry thin film method such as a method (CVD), vapor deposition, sputtering and vapor deposition polymerization. The dielectric layer 30 is preferably made of a high-purity (no ionic impurities) high-Q material that is as thin as possible and free of pinholes. Further, when the dielectric layer is made of an organic material, flexibility is improved as compared with an inorganic material, and cracks that occur when the substrate is bent or the like can be prevented, which is preferable. For example, polyurea, polyimide or polyparaxylylene (trade name: Parylene N) is preferable. In particular, the dielectric layer 30 of polyparaxylylene can be easily formed as a high-Q, high-purity 0.1 to 25 μm pinhole-free film by a vapor deposition polymerization method, and the controllability of the film thickness is good. Excellent in heat resistance, chemical resistance and electrical insulation. Its electrical insulation is 280 kV / mm, relative permittivity ε = 2.6 (at 1 kHz), and Q = 5000 (at 1 kHz). In addition, the vapor deposition polymerization method is excellent in step coverage, and can form a uniform film even if the underlying electrode has irregularities. It is difficult to make the film thickness of the dielectric layer 30 thinner than 0.1 μm from the viewpoint of the possibility of pinholes and dielectric strength, but it is desirable to form the film thinner than 10 μm in order to secure sufficient capacitance. Incidentally, it is difficult to reduce the film thickness by forming a dielectric layer by electrodeposition, and the film thickness becomes about 10 μm or more, and ionic impurities may remain, which is not preferable. The dielectric layer may be formed on the entire surface of the substrate, or may be formed only on the electrode portion of the capacitor by masking with a metal mask or the like.
[0026]
Thereafter, as shown in FIG. 1D, a barrier layer forming step is performed by forming a high-purity barrier layer 40 covering the dielectric layer 30 by a dry thin film method such as sputtering or vapor deposition. The formation range of the barrier layer 40 needs to cover all the dielectric layers on the capacitor electrodes, and the other reason for providing the high-purity barrier layer 40 is the same as the reason for providing the barrier layer 20 described above. It may be the same as 20. In the case of forming a pattern by the semi-additive method, when the electric resistance of the barrier layer is sufficiently low, the barrier layer can be used as the underlying conductor layer. Otherwise, a thin film of a metal such as Cu having a low electric resistance is formed on the entire substrate on the barrier layer. The standard of the resistance is, for example, 5Ω or less in sheet resistance. In the case of Cu, the film thickness is 0.05 μm to 0.3 μm, preferably 0.07 μm to 0.15 μm.
[0027]
Next, as shown in FIG. 1E, the second electrode layer 51 having a predetermined pattern to be the other electrode conductor of the capacitor is formed by pattern plating with a thickness of several μm to several tens μm (for example, 10 μm). To form a second electrode layer forming step. Here, the electroplating for forming the second electrode layer 51 is preferably halogen-free plating containing no halogen in the plating process, for example, copper pyrophosphate plating (similar to the first electrode layer forming step).
[0028]
Then, as shown in FIG. 1F, the barrier layers 20 and 40 and the dielectric layer 30 are collectively (simultaneously) dry-etched using the second electrode layer 51 as a mask and a mixed gas of CF ₄ and O _2. Then, a dry etching process is performed by removing unnecessary portions. As a result, on the conductive transfer substrate 10, the capacitor and the wiring conductor 12 including the first and second electrode layers 11, 51, the barrier layers 20, 40, and the dielectric layer 30 are formed. As the dry etching apparatus, plasma etching, microwave-excited chemical dry etching, microwave plasma etching, reactive ion etching, ion milling, and the like can be used. Further, processing conditions can be made different between the barrier layer and the dielectric layer. For example, when a mixed gas of CF ₄ and O ₂ is used, it is preferable to increase the amount of CF ₄ in the former (barrier layer) process and increase the amount of O ₂ in the latter (dielectric layer).
[0029]
The conductive transfer substrate 10 on which the first and second electrode layers 11 and 51, the barrier layers 20 and 40, and the dielectric layer 30 have been formed, and after the dry etching step has been completed, is subjected to the transfer step of FIG. A sheet of vinyl benzyl or the like having a thickness of about several hundred μm (prepreg which is in a semi-cured state at the time of transfer) is turned over and superposed on one surface, and then the conductive transfer substrate The first and second electrode layers 11 and 51, the barrier layers 20 and 40, and the dielectric layer 30 are separated from the resin sheet 60 so that the first electrode layer 11 is on the outside (upper side) by peeling off the first electrode layer 10. (That is, the capacitor and the wiring conductor 12) are transferred and integrated in a buried state. At this time, when the wiring conductor layer 70 is transferred to the other surface of the resin sheet 60, the wiring conductor layer 70 is separately formed on a conductive transfer substrate 80 such as stainless steel whose surface is passivated by a pattern plating method. The formed one is prepared in advance, and the upper and lower portions of the resin sheet 60 are sandwiched between the conductive transfer substrates 10 and 80 on which the required layers have been formed at the time of the transfer step of FIG. The transfer substrates 10 and 80 may be peeled off.
[0030]
In the dry etching step of FIG. 1H, the first and second electrode layers 11, 51, barrier layers 20, 40, and dielectric layer 30, which constitute a capacitor and a wiring conductor, are transferred and integrated, and are then transferred to the surface of the resin sheet 60 after integration. The remaining barrier layer 20 is removed using a mixed gas of CF ₄ and O ₂ , thereby obtaining a completed capacitor built-in substrate. When the barrier layer 20 is an insulating layer, or when the barrier layer is formed only on the capacitor electrode, the removal may be omitted in some cases.
[0031]
According to this embodiment, the following effects can be obtained.
[0032]
(1) Since the first and second electrode layers 11 and 51 on both sides of the dielectric layer 30 are formed by plating (for example, copper pyrophosphate plating) using no halogen, impurities such as chlorine or the like are contained in the electrodes. High reliability without halogen.
[0033]
(2) The high-purity barrier layers 20 and 40 of Ti, TiN, Ta, TaN, Cr, Ni, etc. are interposed between the dielectric layer 30 and the first and second electrode layers 11 and 51. , 51 and the like (Cu and the like) and impurities can be prevented from diffusing into the dielectric layer. In this respect, the reliability can be improved, and even if the dielectric layer 30 is thinned, insulation failure does not occur. Capacitors of capacitance can be configured in the substrate.
[0034]
(3) Since the main part of the capacitor is dry-etched, it is possible to prevent the electrolyte in the etchant from entering the dielectric layer in the case of wet etching and lowering the reliability.
[0035]
(4) The dielectric layer 30 can be formed with high purity and high precision by a dry thin film method such as a thermal decomposition method (CVD), vapor deposition, sputtering, vapor deposition polymerization method, and the reliability is good. In particular, the polyparaxylylene dielectric layer 30 can be easily formed as a high-Q, high-purity 0.1 to 25 μm pinhole-free film by a vapor deposition polymerization method, and has heat resistance, chemical resistance, and electric resistance. It is preferable because both insulating properties are good, and a built-in capacitor with high accuracy and high reliability and large capacitance can be obtained.
[0036]
(5) The surfaces of the first and second electrode layers 11 and 51 on the dielectric layer side are slightly uneven on the conductive substrate by forming the electrode layers by bright electroplating such as copper pyrophosphate plating. Even in this case, the dielectric layer can be formed smoothly, the thickness of the dielectric layer can be made uniform, the pinhole can be reduced, and the electric field concentration due to the electrode unevenness does not occur.
[0037]
(6) Since the organic material is not contained in the conductive transfer substrate 10 and the layer formed thereon when the dielectric layer 30 is formed by the thin film technology, the heat resistance is good, the degassing is small, and the quality is good. A dielectric thin film can be formed at high speed. That is, in order to form a high-purity dielectric layer thinly, a dry thin film method such as thermal decomposition (CVD), vapor deposition, sputtering, or vapor deposition polymerization is preferably used. If the temperature rises and an organic structure is included on the conductive transfer substrate 10 side during the film formation, serious problems in reliability such as poor adhesion of the dielectric layer and reduced purity due to degassing and the like. cause. In the present embodiment, since the conductive transfer substrate 10 side (substrate 10, electrode layer 11, and barrier layer 20) is an inorganic material when forming the dielectric layer, the above problem can be avoided.
[0038]
(7) Since the dielectric layer 30 is transferred to the resin sheet 60 made of an organic material, if the dielectric layer 30 is made of an inorganic material, the resin sheet 30 may be cracked or cracked by bending. In the embodiment described above, such a problem does not occur because the dielectric layer 30 is made of an organic material such as polyurea, polyimide, or polyparaxylylene.
[0039]
【Example】
Hereinafter, a method for manufacturing a substrate with a built-in capacitor according to the present invention will be described in detail with reference to examples.
[0040]
First, as the conductive transfer substrate 10 in FIG. 1A, a substrate obtained by passivating the surface of a stainless steel (SUS304) plate having a thickness of 0.1 mm was prepared.
[0041]
Next, a liquid resist was applied on the conductive transfer substrate 10 subjected to the passivation treatment by a spin coater so that the film thickness after drying became 20 μm. Next, by exposing and developing by photolithography, a pattern for forming a 1 mm square capacitor upper electrode and a wiring pattern (a pattern for forming the first electrode layer 11 and the conductive transfer substrate 10 (Exposed portion) is formed in an area having a diameter of about 80 mm, and a copper pattern having a height of 15 μm is formed on the pattern where the conductive transfer substrate 10 is exposed by high-purity copper copper pyrophosphate plating on the first electrode layer 11. After that, the resist is peeled off using an organic peeling liquid, and the first electrode layer 11 is left on the conductive transfer substrate 10 as shown in FIG. A first electrode layer forming step was performed.
[0042]
Next, as shown in FIG. 1B, a titanium film having a thickness of 0.1 μm is sputtered on one electrode conductor 13 of the capacitor included in the first electrode layer 11 as a high-purity barrier layer 20 covering the entire surface thereof. Thus, a barrier layer forming step was performed.
[0043]
Then, as shown in FIG. 1C, a 5 μm-thick polyparaxylylene film as a dielectric layer 30 is formed so as to cover the entire surface of the electrode conductor 13 of the first electrode layer 11 with at least the barrier layer 20 interposed therebetween. Was formed by a vapor deposition polymerization method, and a dielectric layer forming step was performed.
[0044]
Thereafter, as shown in FIG. 1D, a barrier layer forming step was performed by forming a titanium film having a thickness of 0.1 μm as a high-purity barrier layer 40 covering the entire surface of the dielectric layer 30 by sputtering.
[0045]
Next, as shown in FIG. 1E, a second electrode layer 51 having a predetermined pattern to be the other electrode conductor of the capacitor is formed in a second electrode layer forming step by pattern plating in the same manner as the first electrode layer. Produced.
[0046]
Then, as shown in FIG. 1 (F), using the AG made versatile plasma device SYSTEM400, the second electrode layer 51 as a mask, the barrier layer in a mixed gas of CF ₄ and _{O 2} 20, 40 and the dielectric layer 30 Were dry-etched at the same time (simultaneously) to remove unnecessary portions, thereby performing a dry-etching step.
[0047]
The first and second electrode layers 11 and 51, the barrier layers 20 and 40, and the dielectric layer 30 are formed on a 100 μm-thick vinylbenzyl prepreg as the resin sheet 60 in FIG. The conductive transfer substrate 10 after the completion of the dry etching step is turned upside down, superposed and pressed, and then the conductive transfer substrate 10 is peeled off so that the first electrode layer 11 is on the outside (upper side). By transferring and integrating the first and second electrode layers 11 and 51, the barrier layers 20 and 40, and the dielectric layer 30 onto the sheet 60, a substrate having a capacitor embedded in the resin sheet 60 was manufactured.
[0048]
As a result, a high-precision large-capacity capacitor having high reliability and excellent high-frequency characteristics is provided inside the substrate, and a substrate with a built-in capacitor excellent in mass productivity can be realized.
[0049]
Although the embodiments and examples of the present invention have been described above, it is obvious to those skilled in the art that the present invention is not limited to these and various modifications and changes can be made within the scope of the claims. There will be.
[0050]
【The invention's effect】
As described above, the method for manufacturing a substrate with a built-in capacitor according to the present invention makes it possible to manufacture a large-capacity capacitor having high precision, high reliability, and excellent high-frequency characteristics inside the substrate, and to improve mass productivity. Can be.
[Brief description of the drawings]
FIG. 1 is an explanatory view showing an embodiment of a method of manufacturing a substrate with a built-in capacitor according to the present invention.
FIG. 2 is an explanatory view of a conventional method for manufacturing a substrate with a built-in capacitor.
[Explanation of symbols]
10, 80 conductive transfer substrate 11 first electrode layer 12 wiring conductor 13 electrode conductor 20, 40 barrier layer 30 dielectric layer 51 second electrode layer 60 resin sheet 70 wiring conductor layer

Claims (8)

A first electrode layer forming step of simultaneously forming a first electrode layer to be a wiring conductor and one electrode conductor of a capacitor on a conductive transfer substrate by a pattern plating method;
Forming a dielectric layer so as to cover at least the entire surface of the first electrode layer;
A second electrode layer forming step of forming a second electrode layer serving as the other electrode conductor of the capacitor at a predetermined position on the dielectric layer by pattern plating;
A step of transferring the first electrode layer, the dielectric layer and the second electrode layer to an insulating sheet with the first electrode layer facing outward. Production method. 2. The method of manufacturing a substrate with a built-in capacitor according to claim 1, wherein the first and second electrode layers are formed by copper pyrophosphate plating. 3. The method according to claim 1, wherein a barrier layer is formed above and below the dielectric layer. 4. The method according to claim 3, wherein the barrier layer and the dielectric layer are collectively dry-etched using the second electrode layer as a mask. 5. The method according to claim 1, wherein said dielectric layer is an organic material. The method for manufacturing a substrate with a built-in capacitor according to claim 1, 2, 3, 4, or 5, wherein the dielectric layer is formed by vapor deposition polymerization. 7. The method according to claim 1, wherein said dielectric layer is made of polyurea, polyimide or polyparaxylylene. 8. The method for manufacturing a substrate with a built-in capacitor according to claim 1, wherein the conductive transfer substrate is stainless steel whose surface is passivated.

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