JP2004102888A - Disaster preventive receiver - Google Patents

Disaster preventive receiver Download PDF

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JP2004102888A
JP2004102888A JP2002266772A JP2002266772A JP2004102888A JP 2004102888 A JP2004102888 A JP 2004102888A JP 2002266772 A JP2002266772 A JP 2002266772A JP 2002266772 A JP2002266772 A JP 2002266772A JP 2004102888 A JP2004102888 A JP 2004102888A
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terminal
voltage
terminal device
current
output
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JP4010450B2 (en
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Mitsuhiro Kurimoto
栗本 光広
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Hochiki Corp
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Hochiki Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a disaster preventive receiver of which transmitting performance is improved by sensing the terminal consumed current and making quick and stable the processing to cancel from the terminal response current. <P>SOLUTION: The disaster preventive receiver is equipped with a constant current circuit 13 to emit the current proportional to the current flowing in a transmission path 2 where a terminal unit 3a is connected and a differential amplifier 14 having an inverted input terminal where the output of the constant current circuit 13 is input connected, an input resistance R3 connected between the inverted input terminal and the grounding, and a feedback resistance R2 connected between the output terminal and the inverted input terminal. A CPU 15 takes in, with A/D converters 16 and 17, the input voltage V<SB>1</SB>of the inverted input terminal of the differential amplifier 14 and the output voltage V<SB>0</SB>of the output terminal during the call pause period of the terminal unit 3a, computes the non-inversion input voltage value V<SB>2k</SB>to maintain the output voltage V<SB>0</SB>to a preset target output voltage V<SB>ok</SB>, and emits the non-inversion input voltage value during the call period from a D/A converter 18 to a non-inversion input terminal of the differential amplifier 14. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、伝送路に接続した端末機器にアドレスを指定した呼出電圧信号を送信し、端末機器から電流応答信号を受信して監視する防災受信機に関する。
【0002】
【従来の技術】
従来、R型として知られた防災監視設備にあっては、受信機から引き出された伝送路に火災感知器、ガス漏れ検知器などの端末機器を接続して電源を供給し、受信機からのアドレス指定による端末の呼出で防災情報を収集して監視している。
【0003】
このような受信機による端末機器の呼出は、まず受信機から特定の端末機器のアドレスと呼出コマンドを含む呼出電圧信号を伝送路に送出する。呼出電圧信号を受信した端末機器は、呼出アドレスと自己アドレスの一致を検出すると、例えばその時の端末機器の状態を示す応答情報を、伝送路に電流を流す応答電流信号により送出している。
【0004】
このように呼出電圧信号に対する端末機器からの応答電流信号を受信機で正しく受信するためには、端末機器の消費電流により伝送路に流れる電流を応答電流信号から相殺する必要がある。
【0005】
そこで従来の受信機にあっては、図5のようなサンプルホールド回路100を設けている。このサンプルホールド回路100は、定電流回路106、入力抵抗R、スイッチ素子108、コンデンサC、オペアンプ(差動増幅器)110で構成される。
【0006】
図6は、従来の受信機における端末機器の呼出休止期間と呼出期間に対する図5のスイッチ素子108のオン、オフを示したタイミングチャートである。まず端末機器の呼出は、図6(A)のように、例えば1秒の周期Tで呼出休止期間T1と呼出期間T2を繰り返している。このため呼出期間T2のタイミングで、図5(B)のように、アドレスを指定した呼出電圧信号が伝送路に送出され順次端末機器を呼出し、その間のタイミングで呼出しアドレスと一致する端末機器から応答電流信号が伝送路に送出される。
【0007】
サンプルホールド回路100のスイッチ素子108は、呼出休止期間T1のあいだオンする。定電流回路106は、呼出休止期間T1において端末機器102の消費電流の合計として伝送路104に流れる線路電流に比例した電流を出力し、抵抗Rに出力電流に応じた受信電圧が発生する。このためコンデンサCはスイッチ素子108のオンにより、抵抗R1に発生した線路電流に比例した受信電圧に充電され、呼出期間T2に入るとスイッチ素子108がオフし、コンデンサCに線路電流に比例した受信電圧がホールドされる。
【0008】
そして呼出期間T2の間は、呼出休止期間T1にホールドしたコンデンサCの電圧と、端末機器からの応答電流信号による定電流回路106の出力電流に対応した受信電圧との差電圧をオペアンプ110で出力し、端末機器の消費電流に起因した電流を相殺した応答電流信号に比例した応答電圧信号を受信して処理するようにしている。
【0009】
【特許文献1】
特開平8−255294号公報
【特許文献2】
特開平3−237593号公報
【0010】
【発明が解決しようとする課題】
しかしながら、このような従来のサンプルホールド回路にあっては、呼出休止期間に伝送路に流れる端末機器の消費電流に比例した受信電圧をコンデンサでサンプルホールドして次の呼出期間で応答電流信号の受信電圧から相殺しているが、コンデンサの漏れ電流によって呼出期間中にホールド電圧が低下して消費電流の相殺が正確にできなくなる問題がある。
【0011】
またスイッチ素子を必要とするために回路コストが高くなる問題があり、更に、コンデンサが完全に充電するためにはかなり時間を要するため、呼出休止期間を長くとることから、端末機器呼出の高速化が困難となる問題があった。
【0012】
本発明は、端末機器の消費電流を検出して端末機器の応答電流から相殺する処理を高速且つ正確に行って伝送性能を向上させる防災受信機を提供することを目的とする。
【0013】
【課題を解決するための手段】
この目的を達成するため本発明は次のように構成する。
【0014】
本発明は、電源電圧が供給された伝送路に火災感知器、ガス漏れ検知器などの端末機器を接続し、端末機器の呼出期間と呼出休止期間を交互に設定し、呼出期間にアドレスを指定した呼出電圧信号を端末機器に順次送信すると共に各呼出電圧信号に対応して電流応答信号を前記端末機器から受信して監視する防災受信機を対象とする。
【0015】
このような防災受信機につき本発明は、端末機器を接続した伝送路に流れる電流に比例した電流を出力する定電流回路と、定電流回路の出力を反転入力端子に入力接続すると共に、反転入力端子と接地間に入力抵抗を接続し、出力端子と反転入力端子との間に帰還抵抗を接続した差動増幅器と、端末機器の呼出休止期間に、差動増幅器の反転入力端子の入力電圧(V1)と出力端子の出力電圧(V)をAD変換して取込み、出力電圧(V)を予め設定した目標出力電圧(Vok)に維持する非反転入力電圧値(V2k)を演算し、呼出期間に亘り非反転入力電圧値をDA変換して差動増幅器の非反転入力端子に出力するCPU回路とを備えたことを特徴とする。
【0016】
ここで、CPU回路は、非反転入力電圧値(V2k)を
【0017】
【数2】

Figure 2004102888
【0018】
として演算することを特徴とする。
【0019】
このような本発明の防災受信機によれば、端末機器の消費電流を相殺するための非反転入力電圧値(V2k)がCPU回路による演算で導出されるため、コンデンサの充放電時間を待つ必要がなく、呼出休止期間を短くし、伝送の高速化が可能となる。
【0020】
また端末機器の消費電流を相殺するための電圧値(V2k)をDA変換して差動増幅器に設定しているため、長時間経過してもDA変換出力は変動せず、呼出休止期間の設定によるサンプルホールドの回数を減らすことができ、全体と伝送の高速化が可能となる。即ち、呼出休止期間は、少なくとも2回のAD変換と1回のDA変換ができればよく、呼出休止期間が短くなり、またその回数が減ることで、伝送の高速化が可能となる。
【0021】
【発明の実施の形態】
図1は本発明の防災受信機を備えた防災監視設備の説明図である。図1において、防災受信機1から引き出された伝送路2に対しては、端末機器として例えば感知器用中継器3が複数接続されている。感知器用中継器3からは感知器回線L1〜Lnが引き出され、それぞれオンオフ型の火災感知器4を接続している。
【0022】
オンオフ型の火災感知器4は、火災を検出すると、感知器用中継器3からの感知器回線を短絡し、発報電流を流し、これを感知器用中継器3で受信して火災と判断する。
【0023】
端末機器としては感知器用中継器以外に熱や煙等のアナログ値を検出するアナログ感知器やガス漏れ検知器や防排煙制御機器などが、それぞれ固有のアドレスが設定されて伝送路2に接続される。
【0024】
防災受信機1には、MPUを用いた監視制御部5、伝送回路6、表示部7及び操作部8が設けられる。防災受信機1の伝送回路6は、端末アドレスを指定したポーリングにより端末機器の情報の収集を行う。
【0025】
感知器用中継器3側となる端末機器側には、例えば端末アドレスとしてアドレス1〜127が設定されており、定常監視状態にあっては端末アドレスを順次指定して端末側を呼び出し、呼び出した端末から、そのとき検出している端末情報を応答情報として送信させる。
【0026】
感知器用中継器3には、伝送回路9、CPU回路10、アドレス記憶部30及び火災受信回路11が設けられている。防災受信機1の伝送回路6と感知器用中継器3の伝送回路9は、伝送路2に設けている伝送線Sとコモン線SCで接続されている。
【0027】
また電源線Vにより、感知器用中継器3のCPU回路10及び火災受信回路11に対する電源供給が行われている。感知器用中継器3は、防災受信機1から呼出信号のアドレスとアドレス記憶部30に記憶した自己のアドレスが一致した際に自己の端末の情報を防災受信機1に電流信号として送出する。
【0028】
防災受信機1の伝送回路6から引き出された伝送線Sとコモン線SCの間には、感知器用中継器3側に対する電源供給を行うため規定の電源電圧が供給されている。
【0029】
伝送回路6から端末機器に対する呼出信号は、伝送線Sとコモン線SC間に供給している電源電圧に重畳した電圧信号を用いて呼出信号を送出する。この防災受信機1側からの呼出信号に対し、感知器用中継器3側となる端末の伝送回路9は、応答情報を電流信号として伝送線Sとコモン線SC間に送出する。
【0030】
防災受信機1の伝送回路6には本発明による応答電流受信回路12が設けられている。応答電流受信回路12は、伝送回路6による所定の呼出休止期間のタイミングで、感知器用中継器3を含む端末機器の消費電流により流れる伝送線Sとコモン線SC間の線路電流を検出し、これを呼出期間において端末機器からの呼出電流信号から相殺する受信処理を行っている。
【0031】
図2は図1の防災受信機1の伝送回路6に設けている応答電流受信回路12の実施形態を示した回路図である。
【0032】
図2において、応答電流受信回路12には、定電流回路13、差動増幅器として動作するオペアンプ14、CPU回路15、CPU回路15に設けらたA/D変換器16,17及びD/A変換器18、コンパレータ20、帰還抵抗R2、入力抵抗R3、基準電圧源21を備えている。
【0033】
定電流回路13には端末機器3aを接続した伝送路2が接続される。端末機器3aは、図1の感知器用中継器3を含む伝送路2に接続されている複数の機器を代表して表わしている。
【0034】
端末機器3aは、送受信動作を行わない定常時にあっても所定の消費電流を伝送路2に流しており、呼出信号の受信時及び応答信号の送信時には、それぞれに対応した信号電流を伝送路2に流すことになる。定電流回路13は、このような端末機器3aによって伝送路2に流れる線路電流に比例した電流Iを出力する。
【0035】
オペアンプ14は、反転入力端子(マイナス入力端子)と接地間に入力抵抗Rを接続し、また出力端子から反転入力端子の間に帰還抵抗Rを接続している。
【0036】
定電流回路13から出力された伝送路2の線路電流に比例した出力電流Iは、帰還抵抗Rと入力抵抗Rに電流I,Iのように分かれて流れる。これによってオペアンプ14の反転入力端子に受信電圧Vが発生する。
【0037】
オペアンプ14の反転入力端子の電圧Vは、CPU回路15に内蔵しているA/D変換器16によりデジタルデータとして取り込まれている。またオペアンプ14の出力電圧Vも、CPU回路15のA/D変換器17によりデジタルデータとして取り込まれている。更に、オペアンプ14の非反転入力端子(プラス入力端子)に対する入力電圧Vは、CPU回路15に設けているD/A変換器18から出力されている。
【0038】
オペアンプ14の出力電圧Vはコンパレータ20の反転入力端子に与えられ、非反転入力端子に対する基準電圧源21からの基準電圧と比較され、受信応答信号をパルス波形に成形して出力している。
【0039】
CPU回路15は、呼出休止期間のタイミングで端末機器3aの消費電流によって伝送路2に流れる電流を検出して、呼出期間中に端末機器3aの応答電流信号から相殺する相殺量を演算により決定する演算処理を行っている。このCPU回路15による端末機器の消費電流に対応した値を応答信号電流から相殺除去するための原理を説明すると次のようになる。
【0040】
まず、伝送路2に流れる電流に比例する定電流回路13の出力電流Iは、帰還抵抗Rに流れる電流Iと入力抵抗Rに流れる電流Iに分かれることから、オペアンプ14における非反転入力端子の電圧Vに関わりなく次式が成立する。
【0041】
【数3】
Figure 2004102888
【0042】
このときのオペアンプ14の出力電圧Vは端末機器3aの消費電流に依存しているため、この消費電流による値を相殺しない限りコンパレータ20による動作は正確にできない。
【0043】
ここで、コンパレータ20の基準電圧源21による基準電圧でパルス変換されるためのオペアンプ14の望ましい出力電圧、即ち目標出力電圧をVokとする。この目標出力電圧をVokを得るためのD/A変換器18により設定する非反転入力端子の電圧V2kを求める。
【0044】
このときの帰還抵抗Rを流れる電流をI2k、入力抵抗Rを流れる電流をI3k、更にオペアンプの反転入力端子に加わる電圧V1kとする。なおオペアンプ14の目標出力電圧Vokは、オペアンプ14の不飽和の範囲で設定した任意の電圧となる。したがって、
【0045】
【数4】
Figure 2004102888
【0046】
であり、また(1)式と同様に次の(3)式が成立する。
【0047】
【数5】
Figure 2004102888
【0048】
ここで、IとI2k及びIとI3kの間には次の関係がある。
【0049】
【数6】
Figure 2004102888
【0050】
この式と(1)(3)式とから次式が導かれる。
【0051】
【数7】
Figure 2004102888
【0052】
そこで目標出力電圧Vokを得るためにD/A変換器18で設定する電圧V1kは(2)(7)式より次式で与えられる。
【0053】
【数8】
Figure 2004102888
【0054】
図2の応答電流受信回路12に設けているCPU回路15は、この(8)式の演算を呼出休止期間のタイミングで行い、次の呼出期間の間にD/A変換器18によりオペアンプ14の非反転入力端子に演算した値を設定する。
【0055】
即ちCPU回路15は、呼出休止期間のタイミングで入力電圧VをA/D変換器16により取り込むと共に、出力電圧VをA/D変換器17により取り込み、(8)式により電圧V1kのデジタルデータを演算し、次の呼出期間に亘り、D/A変換器18によりアナログ電圧に変換した電圧V1kをオペアンプ14の非反転入力端子に出力する。
【0056】
これによってオペアンプ14の出力電圧Vは、伝送路2に流れる端末機器3aの消費電流に応じた電圧値を相殺した最適電圧Vokを維持することができ、この最適電圧Vokを規定電圧として端末機器3aから出力された応答電流に比例した受信電圧が重畳され、これをコンパレータ20で基準電圧源21の基準電圧と比較して受信応答電流に比例したパルス信号を出力し、端末応答データを判断することができる。
【0057】
図3は図2のCPU回路15による処理動作を呼出休止期間と呼出期間、更に呼出信号と共に表わしている。
【0058】
図3(A)は端末機器に対する防災受信機1側の呼出タイミングであり、呼出休止期間T11とその後の呼出期間T12でなる呼出周期T0を繰り返している。図3(B)は防災受信機1からの呼出信号であり、呼出期間T12の間に端末アドレスを順次指定した呼出信号が電圧呼出信号として間に空き期間を設けて順次伝送路2に送出される。この電圧呼出信号の後ろに続く空き期間が端末機器からの応答電流信号の送出期間となる。
【0059】
図3(C)は図2のCPU回路15の動作タイミングを示している。図3(A)の呼出休止期間T11のタイミングで、CPU回路15はCPU処理22を実行する。このCPU処理22は下側に拡大して示すように、入力電圧VのA/D変換23、出力電圧VのA/D変換24、更に(8)式の演算25を行う。
【0060】
そして、これに続く呼出期間T12の間、演算25で求めた(8)式の電圧V2kをD/A変換26によりアナログ電圧に変換し、オペアンプ14の非反転入力端子に電圧Vとして継続的に加えている。
【0061】
図4は図2のCPU回路15による演算処理のフローチャートである。図4において、まずステップS1で呼出休止期間か否かチェックしており、呼出休止期間を判別すると、ステップ2でオペアンプ14の反転入力端子に対する入力電圧VをA/D変換器16によりデジタルデータに変換して取り込む。
【0062】
次にステップS3で、出力電圧VをA/D変換器17によりデジタルデータに変換して取り込む。この演算処理にあっては、A/D変換器16,17で複数回取り込んで、その平均値を求めていることから、ステップS4で所定回数の取込み終了か否かをチェックし、所定回数に達していなければステップS2,S3の処理を繰り返す。ステップS4で所定回数の取込み終了を判別すると、ステップS5に進み、入力電圧Vと出力電圧Vの平均電圧を演算する。
【0063】
続いてステップS6で、(8)式に基づいて出力電圧V2kを演算する。そしてステップS7で、D/A変換器18により、演算した出力電圧V2kの値をアナログ電圧に変換し、コンパレータ20の非反転入力端子に出力する。
【0064】
なお図4の演算処理にあっては、ステップS2〜S5において呼出休止期間に入力電圧Vと出力電圧Vを複数回取り込んで、その平均値を求め、これにより(8)式から出力電圧V2kを演算しているが、平均値を求めずに入力電圧V,出力電圧Vを1回のA/D変換で取り込んで、(8)式から電圧V2kを演算してもよい。
【0065】
このようにA/D変換をそれぞれ1回とすることで、演算処理のための呼出休止期間を最短時間にすることができる。もちろん図4の演算処理のように、入力電圧V1,出力電圧V0の平均値を演算して用いることで、ノイズなどによる誤った演算結果を防ぐことができる。
【0066】
なお、本発明は上記の実施形態に限定されず、その目的と利点を損なうことのない適宜の変形を含む。また本発明は、上記の実施形態に示した数値による限定は受けない。
【0067】
また、この演算処理は、上記の1秒ごとの呼出休止期間毎に必ず行う必要はなく、呼出休止期間であれば任意のタイミングで行っても良い。例えば防災受信機に電源を供給してシステムを立ち上げた際や、1日若しくは週に1度行うような自動試験の際に演算処理を行うようにしても良い。
【0068】
【発明の効果】
以上説明してきたように本発明によれば、端末機器の消費電流を相殺するための電圧値をCPU回路による演算で求めることができるため、従来のサンプルホールド回路を利用した場合のコンデンサの充放電時間を待つ必要がなく、そのための呼出休止期間を短くすることができ、その分、呼出応答を行う伝送の高速化が実現できる。
【0069】
また、端末機器の消費電流を相殺する電圧値を演算した後にD/A変換して差動増幅器に設定しているため、増幅期間経過してもD/A変換出力は変動せず、このため呼出休止期間の間隔を長くし、且つその回数を減らすことができ、全体として呼出応答の伝送を高速化できる。
【0070】
特に、呼出休止期間は少なくとも2回のA/D変換と1回のD/A変換ができれば良く、従来のコンデンサの充放電に比べごく短いの呼出休止期間の設定で済む。
【0071】
また、従来のサンプルホールド回路のように高価なスイッチ素子を必要とせず、その分、コストダウンを図ることができる。
【図面の簡単な説明】
【図1】本発明が適用される防災監視設備の説明図
【図2】本発明の実施形態を示した回路図
【図3】呼出応答と図2のCPU回路による処理動作のタイミングチャート
【図4】図2のCPU回路における処理手順のフローチャート
【図5】従来の応答電流受信に用いるサンプルホールド回路の説明図
【図6】従来の呼出応答とサンプルホールドするめたのスイッチ素子のタイミングチャート
【符号の説明】
1:防災受信機
2:伝送路
3:感知器用中継器
3a:端末機器
4:火災感知器
5:監視制御部
6,9:伝送回路
7:表示部
8:操作部
10,15:CPU回路
11:火災受信回路
12:応答電流受信回路
13:定電流回路
14:オペアンプ(差動増幅器)
16,17:A/D変換器
18:D/A変換器
20:コンパレータ
21:基準電圧源[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a disaster prevention receiver that transmits a calling voltage signal with an address specified to a terminal device connected to a transmission line, and receives and monitors a current response signal from the terminal device.
[0002]
[Prior art]
Conventionally, in the disaster prevention monitoring equipment known as the R type, a terminal device such as a fire detector or a gas leak detector is connected to a transmission line drawn from the receiver to supply power, and the Disaster prevention information is collected and monitored by calling a terminal by address designation.
[0003]
When such a receiver calls a terminal device, the receiver first sends a ringing voltage signal including an address of a specific terminal device and a calling command to a transmission line. Upon detecting the coincidence between the calling address and the self-address, the terminal device that has received the ringing voltage signal sends response information indicating the state of the terminal device at that time, for example, by a response current signal that causes a current to flow through the transmission line.
[0004]
Thus, in order for the receiver to correctly receive the response current signal from the terminal device in response to the ringing voltage signal, it is necessary to offset the current flowing through the transmission line from the response current signal by the current consumption of the terminal device.
[0005]
Therefore, in a conventional receiver, a sample and hold circuit 100 as shown in FIG. 5 is provided. The sample and hold circuit 100 includes a constant current circuit 106, an input resistor R 1, the switch element 108, a capacitor C 1, including the operational amplifier (differential amplifier) 110.
[0006]
FIG. 6 is a timing chart showing ON / OFF of the switch element 108 in FIG. 5 with respect to a call suspension period and a call period of a terminal device in a conventional receiver. First, as shown in FIG. 6A, the call of the terminal equipment repeats the call suspension period T1 and the call period T2 at a cycle T of, for example, 1 second. For this reason, at the timing of the calling period T2, as shown in FIG. 5B, a calling voltage signal whose address is specified is transmitted to the transmission line, and the terminal device is called in sequence, and a response from the terminal device corresponding to the calling address is made in the meantime. A current signal is sent to the transmission line.
[0007]
The switch element 108 of the sample and hold circuit 100 is turned on during the call suspension period T1. The constant current circuit 106 outputs a current proportional in the call pause period T1 to the line current flowing through the transmission line 104 as the sum of the current consumption of the terminal device 102, the received voltage is generated in accordance with the output current to the resistor R 1. By turning on the order capacitor C 1 is the switch element 108, is charged to the received voltage proportional to the line current generated in the resistor R1, the switch element 108 is turned off enters the call period T2, proportional to the line current to the capacitor C 1 The received voltage is held.
[0008]
And during the call period T2, the voltage of the capacitor C 1 which is held in the calling pause period T1, the voltage difference between the received voltage corresponding to the output current of the constant current circuit 106 according to the response current signal from the terminal equipment by the operational amplifier 110 Then, a response voltage signal proportional to the response current signal obtained by canceling the current caused by the current consumption of the terminal device is received and processed.
[0009]
[Patent Document 1]
JP-A-8-255294 [Patent Document 2]
JP-A-3-237593
[Problems to be solved by the invention]
However, in such a conventional sample and hold circuit, the reception voltage proportional to the current consumption of the terminal equipment flowing through the transmission line during the paging pause period is sampled and held by the capacitor, and the reception current signal is received during the next paging period. Although the voltage is offset from the voltage, there is a problem that the hold voltage drops during the calling period due to the leakage current of the capacitor and the consumption current cannot be accurately offset.
[0011]
In addition, there is a problem that the circuit cost is increased due to the necessity of the switch element, and furthermore, it takes a considerable time to completely charge the capacitor. There was a problem that became difficult.
[0012]
SUMMARY OF THE INVENTION It is an object of the present invention to provide a disaster prevention receiver that detects current consumption of a terminal device and cancels it from a response current of the terminal device at high speed and accurately to improve transmission performance.
[0013]
[Means for Solving the Problems]
To achieve this object, the present invention is configured as follows.
[0014]
The present invention connects a terminal device such as a fire detector or a gas leak detector to a transmission line supplied with a power supply voltage, alternately sets a calling period and a calling pause period of the terminal device, and designates an address in the calling period. The present invention is directed to a disaster prevention receiver that sequentially transmits the ringing voltage signals to the terminal devices and receives and monitors a current response signal from the terminal devices corresponding to each ringing voltage signal.
[0015]
The present invention relates to such a disaster prevention receiver, a constant current circuit that outputs a current proportional to a current flowing through a transmission line connected to a terminal device, an output of the constant current circuit connected to an inverting input terminal, and an inverting input terminal. A differential amplifier in which an input resistor is connected between the terminal and the ground and a feedback resistor is connected between the output terminal and the inverting input terminal; and the input voltage of the inverting input terminal ( V1) and output voltage of the output terminals (V o) and AD conversion operation uptake, the non-inverting input voltage to maintain the output voltage (V o) the preset target output voltage (V ok) to (V 2k) And a CPU circuit for DA-converting the non-inverting input voltage value over the calling period and outputting to the non-inverting input terminal of the differential amplifier.
[0016]
Here, the CPU circuit sets the non-inverted input voltage value (V 2k ) to
(Equation 2)
Figure 2004102888
[0018]
Is calculated.
[0019]
According to such a disaster prevention receiver of the present invention, since the non-inverting input voltage value (V 2k ) for canceling the current consumption of the terminal device is derived by the calculation by the CPU circuit, the charging and discharging time of the capacitor is waited. There is no need, and the call suspension period can be shortened and the transmission speed can be increased.
[0020]
In addition, since the voltage value (V 2k ) for canceling the current consumption of the terminal device is DA-converted and set in the differential amplifier, the DA-converted output does not fluctuate even after a long time elapses, and during the call suspension period. The number of sample-and-hold operations can be reduced according to the setting, and the speed of the entire system and transmission can be increased. That is, it is sufficient that at least two AD conversions and one DA conversion can be performed during the call suspension period, and the call suspension period is shortened and the number of times is reduced, so that transmission can be speeded up.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is an explanatory diagram of a disaster prevention monitoring equipment provided with the disaster prevention receiver of the present invention. In FIG. 1, a plurality of, for example, sensor repeaters 3 are connected as terminal devices to a transmission line 2 drawn from a disaster prevention receiver 1. Detector lines L1 to Ln are drawn from the detector repeater 3, and are connected to on / off type fire detectors 4, respectively.
[0022]
Upon detecting a fire, the on / off type fire sensor 4 short-circuits the sensor line from the sensor repeater 3, causes an alarm current to flow, and receives it to determine a fire.
[0023]
In addition to the sensor repeater, analog devices that detect analog values such as heat and smoke, gas leak detectors, smoke control devices, etc. are connected to the transmission line 2 with their own unique addresses. Is done.
[0024]
The disaster prevention receiver 1 includes a monitoring control unit 5 using an MPU, a transmission circuit 6, a display unit 7, and an operation unit 8. The transmission circuit 6 of the disaster prevention receiver 1 collects information on terminal devices by polling specifying a terminal address.
[0025]
For example, addresses 1 to 127 are set as terminal addresses on the terminal device side serving as the sensor repeater 3 side, and in the regular monitoring state, the terminal side is sequentially designated to call the terminal side, and the called terminal is called. Then, the terminal information detected at that time is transmitted as response information.
[0026]
The sensor repeater 3 includes a transmission circuit 9, a CPU circuit 10, an address storage unit 30, and a fire receiving circuit 11. The transmission circuit 6 of the disaster prevention receiver 1 and the transmission circuit 9 of the sensor repeater 3 are connected by a transmission line S provided on the transmission line 2 and a common line SC.
[0027]
The power supply line V supplies power to the CPU circuit 10 and the fire receiving circuit 11 of the sensor repeater 3. When the address of the call signal from the disaster prevention receiver 1 matches the address of the self stored in the address storage unit 30, the sensor repeater 3 sends information of its own terminal to the disaster prevention receiver 1 as a current signal.
[0028]
A specified power supply voltage is supplied between the transmission line S drawn from the transmission circuit 6 of the disaster prevention receiver 1 and the common line SC to supply power to the sensor repeater 3 side.
[0029]
The call signal from the transmission circuit 6 to the terminal device is transmitted using a voltage signal superimposed on the power supply voltage supplied between the transmission line S and the common line SC. In response to the call signal from the disaster prevention receiver 1, the transmission circuit 9 of the terminal on the side of the sensor repeater 3 sends response information as a current signal between the transmission line S and the common line SC.
[0030]
The transmission circuit 6 of the disaster prevention receiver 1 is provided with a response current receiving circuit 12 according to the present invention. The response current receiving circuit 12 detects the line current between the transmission line S and the common line SC that flows due to the current consumption of the terminal equipment including the sensor repeater 3 at the timing of the predetermined call suspension period by the transmission circuit 6, Is canceled from the calling current signal from the terminal device during the calling period.
[0031]
FIG. 2 is a circuit diagram showing an embodiment of the response current receiving circuit 12 provided in the transmission circuit 6 of the disaster prevention receiver 1 of FIG.
[0032]
2, a response current receiving circuit 12 includes a constant current circuit 13, an operational amplifier 14 operating as a differential amplifier, a CPU circuit 15, A / D converters 16 and 17 provided in the CPU circuit 15, and a D / A converter. It has a circuit 18, a comparator 20, a feedback resistor R2, an input resistor R3, and a reference voltage source 21.
[0033]
The transmission line 2 to which the terminal device 3a is connected is connected to the constant current circuit 13. The terminal device 3a is representative of a plurality of devices connected to the transmission line 2 including the sensor repeater 3 of FIG.
[0034]
The terminal device 3a supplies a predetermined current consumption to the transmission line 2 even in a steady state in which the transmission / reception operation is not performed, and transmits a corresponding signal current to the transmission line 2 at the time of receiving a paging signal and transmitting a response signal. Will be flushed. Constant current circuit 13 outputs a current I 1 proportional to the line current flowing through the transmission path 2 by such terminal equipment 3a.
[0035]
Operational amplifier 14 is connected to the inverting input terminal (negative input terminal) is connected to the input resistor R 3 and the ground, also a feedback resistor R 2 between the inverting input terminal from the output terminal.
[0036]
Output current I 1 proportional to the line current of the transmission line 2 which is output from the constant current circuit 13 flows divided like a current I 2, I 3 in the feedback resistor R 2 and the input resistor R 3. This received voltages V 1 to the inverting input terminal of the operational amplifier 14 is generated.
[0037]
Voltage V 1 of the inverting input terminal of the operational amplifier 14 is taken in as digital data by the A / D converter 16 that is incorporated in the CPU circuit 15. The output voltage V 0 of the operational amplifier 14 is also captured as digital data by the A / D converter 17 of the CPU circuit 15. Further, an input voltage V 1 to a non-inverting input terminal (plus input terminal) of the operational amplifier 14 is output from a D / A converter 18 provided in the CPU circuit 15.
[0038]
Output voltage V 0 which the operational amplifier 14 is applied to the inverting input terminal of the comparator 20 is compared with a reference voltage from the reference voltage source 21 to non-inverting input terminal, it is molded to output the received response signal to the pulse waveform.
[0039]
The CPU circuit 15 detects the current flowing through the transmission line 2 based on the current consumed by the terminal device 3a at the timing of the call suspension period, and determines the amount of cancellation to be canceled out from the response current signal of the terminal device 3a during the calling period. An arithmetic operation is being performed. The principle of canceling out the value corresponding to the current consumption of the terminal device by the CPU circuit 15 from the response signal current will be described as follows.
[0040]
First, the output current I 1 of the constant current circuit 13 which is proportional to the current flowing in the transmission line 2, since the divided current I 3 flowing through the current I 2 and the input resistor R 3 that flows through the feedback resistor R 2, a non-in operational amplifier 14 the following equation is established regardless of the voltage V 2 of the inverting input terminal.
[0041]
[Equation 3]
Figure 2004102888
[0042]
Output voltage V 0 which operational amplifier 14 at this time because it depends on the current consumption of the terminal device 3a, the operation by the comparator 20 unless offset value due to the current consumption can not be accurately.
[0043]
Here, it is assumed that a desired output voltage of the operational amplifier 14 for pulse conversion with the reference voltage from the reference voltage source 21 of the comparator 20, that is, a target output voltage is V ok . The voltage V 2k of the non-inverting input terminal for setting the target output voltage by the D / A converter 18 for obtaining V ok is obtained.
[0044]
The current flowing through the feedback resistor R 2 in this case I 2k, current I 3k through input resistor R 3, further the voltage V 1k applied to the inverting input terminal of the operational amplifier. Note that the target output voltage V ok of the operational amplifier 14 is an arbitrary voltage set within the unsaturated range of the operational amplifier 14. Therefore,
[0045]
(Equation 4)
Figure 2004102888
[0046]
In addition, the following equation (3) is established similarly to the equation (1).
[0047]
(Equation 5)
Figure 2004102888
[0048]
Here, the following relationship exists between I 2 and I 2k and I 3 and I 3k.
[0049]
(Equation 6)
Figure 2004102888
[0050]
The following equation is derived from this equation and equations (1) and (3).
[0051]
(Equation 7)
Figure 2004102888
[0052]
Therefore, the voltage V 1k set by the D / A converter 18 to obtain the target output voltage V ok is given by the following equation from the equations (2) and (7).
[0053]
(Equation 8)
Figure 2004102888
[0054]
The CPU circuit 15 provided in the response current receiving circuit 12 in FIG. 2 performs the operation of the equation (8) at the timing of the call suspension period, and the D / A converter 18 operates the operational amplifier 14 during the next call period. Set the calculated value to the non-inverting input terminal.
[0055]
That is, the CPU circuit 15 takes in the input voltage V 1 by the A / D converter 16 at the timing of the call suspension period, takes in the output voltage V 0 by the A / D converter 17, and obtains the voltage V 1k by the equation (8). The digital data is calculated, and the voltage V 1k converted into an analog voltage by the D / A converter 18 is output to the non-inverting input terminal of the operational amplifier 14 over the next calling period.
[0056]
As a result, the output voltage V 0 of the operational amplifier 14 can maintain the optimum voltage V ok in which the voltage value according to the current consumption of the terminal device 3 a flowing through the transmission line 2 is offset, and this optimum voltage V ok is set as the specified voltage. The received voltage proportional to the response current output from the terminal device 3a is superimposed, and this is compared with the reference voltage of the reference voltage source 21 by the comparator 20 to output a pulse signal proportional to the received response current. You can judge.
[0057]
FIG. 3 shows the processing operation by the CPU circuit 15 of FIG. 2 together with a call suspension period, a call period, and a call signal.
[0058]
FIG. 3A shows a call timing on the disaster prevention receiver 1 side with respect to the terminal device, and a call cycle T0 including a call suspension period T11 and a subsequent call period T12 is repeated. FIG. 3B shows a calling signal from the disaster prevention receiver 1. A calling signal in which a terminal address is sequentially designated during a calling period T12 is sequentially transmitted to the transmission line 2 with a vacant period provided as a voltage calling signal. You. The vacant period following the voltage calling signal is the transmission period of the response current signal from the terminal device.
[0059]
FIG. 3C shows the operation timing of the CPU circuit 15 of FIG. The CPU circuit 15 executes the CPU processing 22 at the timing of the call suspension period T11 in FIG. As the CPU processing 22 shown enlarged in the lower, to input voltage V 1 of the A / D converter 23, the output A / D converter 24 of the voltage V 0, and (8) of the operational 25.
[0060]
Then, during the subsequent calling period T12, the voltage V 2k of the expression (8) obtained by the operation 25 is converted into an analog voltage by the D / A converter 26, and is continuously applied to the non-inverting input terminal of the operational amplifier 14 as the voltage V 2. In addition.
[0061]
FIG. 4 is a flowchart of the arithmetic processing by the CPU circuit 15 of FIG. 4, first it is checked whether the call sleep period at step S1, when it is determined the call pause period, the digital data by the input voltages V 1 and A / D converter 16 for the inverting input terminal of the operational amplifier 14 at step 2 Convert to and import.
[0062]
In step S3, it takes in the output voltage V 0 is converted by the A / D converter 17 into digital data. In this arithmetic processing, since the A / D converters 16 and 17 fetch the data a plurality of times and calculate the average value, it is checked in step S4 whether the fetching has been completed a predetermined number of times. If not, the processing of steps S2 and S3 is repeated. When determining the uptake end of the predetermined number in step S4, step S5, and calculates the average voltage of the input voltages V 1 and the output voltage V 0.
[0063]
Subsequently, in step S6, the output voltage V2k is calculated based on the equation (8). Then, in step S7, the D / A converter 18 converts the calculated value of the output voltage V2k into an analog voltage, and outputs the analog voltage to the non-inverting input terminal of the comparator 20.
[0064]
Note In the processing of FIG. 4 takes in a plurality of times between the input voltages V 1 to call idle period the output voltage V 0 in step S2 to S5, the average value calculated, thereby (8) output voltage from the formula Although V 2k is calculated, the input voltage V 1 and the output voltage V 0 may be acquired by one A / D conversion without calculating the average value, and the voltage V 2k may be calculated from the equation (8). .
[0065]
In this way, by performing the A / D conversion once, the call suspension period for the arithmetic processing can be minimized. Of course, by calculating and using the average value of the input voltage V1 and the output voltage V0 as in the calculation processing of FIG. 4, an erroneous calculation result due to noise or the like can be prevented.
[0066]
Note that the present invention is not limited to the above embodiment, and includes appropriate modifications without impairing the objects and advantages thereof. Further, the present invention is not limited by the numerical values shown in the above embodiments.
[0067]
Further, this arithmetic processing need not necessarily be performed for each of the above-described call suspension periods of one second, and may be performed at any timing during the call suspension period. For example, the arithmetic processing may be performed when power is supplied to the disaster prevention receiver and the system is started up, or when an automatic test is performed once a day or once a week.
[0068]
【The invention's effect】
As described above, according to the present invention, the voltage value for canceling the current consumption of the terminal device can be obtained by the calculation by the CPU circuit. There is no need to wait for time, and the call suspension period for that can be shortened, and accordingly, the speed of transmission for making a call response can be increased.
[0069]
In addition, since the voltage value for canceling the current consumption of the terminal device is calculated and D / A converted to be set in the differential amplifier, the D / A conversion output does not fluctuate even after the amplification period elapses. The interval of the call suspension period can be lengthened and the number of times can be reduced, and the transmission of the call response can be speeded up as a whole.
[0070]
In particular, it is sufficient that at least two A / D conversions and one D / A conversion can be performed during the call pause period, and the call pause period can be set to be very short as compared with the conventional capacitor charging / discharging.
[0071]
Further, an expensive switch element is not required unlike the conventional sample and hold circuit, and the cost can be reduced accordingly.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of disaster prevention monitoring equipment to which the present invention is applied. FIG. 2 is a circuit diagram showing an embodiment of the present invention. FIG. 3 is a timing chart of a call response and a processing operation by a CPU circuit of FIG. 4 is a flowchart of a processing procedure in the CPU circuit of FIG. 2. FIG. 5 is an explanatory diagram of a conventional sample and hold circuit used for receiving a response current. FIG. 6 is a conventional call response and a timing chart of a switch element for performing sample and hold. Description]
1: Disaster prevention receiver 2: Transmission line 3: Detector repeater 3a: Terminal device 4: Fire detector 5: Monitoring and control unit 6, 9: Transmission circuit 7: Display unit 8: Operation unit 10, 15: CPU circuit 11 : Fire receiving circuit 12: Response current receiving circuit 13: Constant current circuit 14: Operational amplifier (differential amplifier)
16, 17: A / D converter 18: D / A converter 20: Comparator 21: Reference voltage source

Claims (2)

電源電圧が供給された伝送路に火災感知器、ガス漏れ検知器などの端末機器を接続し、前記端末機器の呼出期間と呼出休止期間を設定し、前記呼出期間にアドレスを指定した呼出電圧信号を前記端末機器に順次送信すると共に各呼出電圧信号に対応して電流応答信号を前記端末機器から受信して監視する防災受信機に於いて、
前記端末機器を接続した前記伝送路に流れる電流に比例した電流を出力する定電流回路と、
前記定電流回路の出力を反転入力端子に入力接続すると共に、前記反転入力端子と接地間に入力抵抗を接続し、出力端子と前記反転入力端子との間に帰還抵抗を接続した差動増幅器と、
前記端末機器の呼出休止期間に、前記差動増幅器の反転入力端子の入力電圧(V1)と出力端子の出力電圧(V)をAD変換して取込み、前記出力電圧(V)を予め設定した目標出力電圧(Vok)に維持する非反転入力電圧値(V2k)を演算し、前記端末機器の呼出期間に亘り前記非反転入力電圧値をDA変換して前記差動増幅器の非反転入力端子に出力するCPU回路と、
を備えたことを特徴とする防災受信機。
A terminal device such as a fire detector or a gas leak detector is connected to the transmission line to which the power supply voltage is supplied, a calling period and a calling pause period of the terminal device are set, and a calling voltage signal specifying an address in the calling period. In the disaster prevention receiver that sequentially transmits to the terminal device and receives and monitors a current response signal from the terminal device corresponding to each ringing voltage signal,
A constant current circuit that outputs a current proportional to a current flowing through the transmission line to which the terminal device is connected,
A differential amplifier having the output of the constant current circuit connected to an inverting input terminal, an input resistor connected between the inverting input terminal and ground, and a feedback resistor connected between the output terminal and the inverting input terminal. ,
The call idle period of the terminal device, the inverting input input voltage (V1) and the output voltage of the output terminal of the terminals (V o) and AD conversion uptake, preset the output voltage (V o) of the differential amplifier A non-inverting input voltage value (V 2k ) to be maintained at the target output voltage (V ok ) is calculated, and the non-inverting input voltage value is DA-converted over the calling period of the terminal device to perform non-inversion of the differential amplifier. A CPU circuit for outputting to an input terminal;
A disaster prevention receiver comprising:
請求項1記載の防災受信機に於いて、前記CPU回路は、非反転入力電圧値(V2k)を
Figure 2004102888
として演算することを特徴とする防災受信機。
2. The disaster prevention receiver according to claim 1, wherein the CPU circuit outputs the non-inverted input voltage value (V 2k ).
Figure 2004102888
Disaster prevention receiver characterized by calculating as follows.
JP2002266772A 2002-09-12 2002-09-12 Disaster prevention receiver Expired - Fee Related JP4010450B2 (en)

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WO2010038476A1 (en) * 2008-10-02 2010-04-08 ホーチキ株式会社 Transmission input circuit
JP2010086446A (en) * 2008-10-02 2010-04-15 Hochiki Corp Transmission input circuit
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JP2010049603A (en) * 2008-08-25 2010-03-04 Hochiki Corp Monitoring system and current fluctuation control device
WO2010038480A1 (en) * 2008-10-02 2010-04-08 ホーチキ株式会社 Transmission input circuit
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