JP2004095992A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent secondary damage by protecting a peripheral circuit when a semiconductor device breakes down. <P>SOLUTION: In a semiconductor device having a semiconductor element and a frame for sealing the semiconductor element; the frame has a thin wall region which is relatively thinner than the surrounding regions, and when the pressure in a sealing space sealing the semiconductor element rises, the pressure is relieved by breaking a thin wall region. Since a broken portion is limited to the thin wall region, it is possible to prevent damages on a peripheral circuit due to broken pieces in breakdown by not arranging a peripheral component around the thin wall region. If the thin wall region is an inner wall which divides a sealing space and an energy adsorption space, pressure is relieved to the energy adsorption space by breaking the thin wall region when the pressure in the sealing space rises. Consequently, energy in a breakdown falls inside a module and does not affect the outside of the frame. Furthermore, since fragments due to breakdown disperse inside the energy adsorption space and do not go outside the frame, damage on the peripheral circuit can be prevented. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technique for preventing fragments from being scattered when a semiconductor device is destroyed, thereby preventing secondary damage to peripheral circuits.
[0002]
[Prior art]
Semiconductor devices are used as one of the components in various electric circuits. In such a semiconductor device, a tolerance such as a maximum value of a current that can flow or a maximum value of a voltage that can be applied is determined in advance. If a current or the like exceeding the withstand current flows, the normal operation of the semiconductor device cannot be guaranteed, and the semiconductor device may be damaged.
[0003]
For example, there is known a power module having an external shape as shown in FIG. 1 for controlling a power supply of a motor control device. This semiconductor device also has a predetermined tolerance. When an arm short-circuit or a load short-circuit occurs in the motor control device, the current flowing through the semiconductor device may exceed its resistance. As a result, the components of the semiconductor device become overheated, the pressure inside the semiconductor device 10 rises rapidly, and the semiconductor device may explode and be destroyed.
[0004]
[Problems to be solved by the invention]
When the semiconductor device explodes or the like, fragments of the frame of the semiconductor device scatter in all directions, and the frame and the terminal are deformed. Depending on the degree, secondary damage may be caused to peripheral circuits. FIG. 5 is a cross-sectional view of the conventional semiconductor device taken along aa 'of FIG. When the semiconductor element 1 provided inside explodes, fragments of the frame 2 scatter in all directions, and the frame may be deformed.
[0005]
An object of the present invention is to protect peripheral circuits when a semiconductor device is destroyed and prevent secondary damage.
[0006]
[Means for Solving the Problems]
The semiconductor device has a semiconductor element and a frame that seals the semiconductor element. The frame has a thin-walled region that is relatively thinner than the surrounding region, and when the pressure in the sealed space that seals the semiconductor element increases, the frame is broken to release the pressure. I do. Thereby, the above object can be achieved.
[0007]
The thin wall region is an inner wall that separates the sealed space and the energy absorbing space, and when the pressure of the sealed space that seals the semiconductor element rises, breaks the thin wall region to form the energy absorbing space. The pressure may be released.
[0008]
The energy absorbing space may be arranged adjacent to the closed space along a ground plane of the semiconductor device.
[0009]
The energy absorbing space may be arranged above the closed space in a direction perpendicular to a ground plane of the semiconductor device.
[0010]
The energy absorbing space may be filled with an absorbing material that absorbs energy due to destruction.
[0011]
Further, when the pressure in the closed space is the atmospheric pressure, the pressure in the energy absorbing space may be a negative pressure lower than the atmospheric pressure.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0013]
FIG. 1 is a perspective view showing an appearance of a semiconductor device 10 of the present invention. The semiconductor device 10 is formed by surrounding a semiconductor element (not shown) with a frame 2 and has two terminals 11 on its surface for ensuring electrical connection between the semiconductor element and the outside. For example, one of the terminals 11 is an E terminal for grounding, and the other is a C terminal for supplying current. In the figure, there is one semiconductor element 1, but the number may be plural.
[0014]
The features of the semiconductor device 10 of the present invention are as follows. When the semiconductor device 10 is destroyed, (1) the energy of the destruction is diverted at a limited portion of the frame 2, or (2) a predetermined space is provided in the semiconductor device 10. The idea is to absorb the energy of destruction in that space. Hereinafter, a configuration for realizing (1) and (2) will be described.
[0015]
(Example 1)
The configuration of (1) for dissipating the destructive energy at the limited location of the frame 2 will be described.
[0016]
FIG. 2 is a cross-sectional view of the semiconductor device 10 according to the first example, taken along aa 'of FIG. The semiconductor device 10 has a semiconductor element 1 sealed in a space surrounded by a frame 2. The feature of the semiconductor device 10 in this example is that the thickness of the frame 2 is partially different. That is, the frame 2 is composed of the thin wall region 21 having a relatively smaller thickness than the periphery and the other thick wall region 22. The thin wall region 21 has the same thickness as the frame 2 of the conventional semiconductor device (FIG. 5). The thick wall region 22 is thicker than the frame 2 of the conventional semiconductor device (FIG. 5).
[0017]
By providing the thin-walled region 21 and the thick-walled region 22 in this manner, when the pressure in the space that seals the semiconductor element 1 increases and the semiconductor device 10 explodes, only the thin-walled region 21 is broken. , Will release the pressure in the space. This is because the thick wall region 22 has a higher strength than the thin wall region 21. That is, since the semiconductor device 10 is destroyed only at the limited position of the thin wall region 21, the influence of the destruction can be easily predicted, and furthermore, the semiconductor device 10 can be designed so that no other components are arranged near the thin wall region 21. Thus, when the semiconductor device 10 is destroyed, peripheral circuits can be protected and secondary damage can be prevented.
[0018]
(Example 2)
Next, a description will be given of a configuration of (2) in which a predetermined space is provided in the semiconductor device 10 and energy of destruction is absorbed in the space.
[0019]
FIG. 3 is a cross-sectional view of the semiconductor device 10 according to the second example, taken along the line aa ′ in FIG. A feature of the semiconductor device 10 in this example is that the semiconductor device 10 has an energy absorption space 32 for absorbing energy when the semiconductor element 1 is broken, in addition to the space in which the semiconductor element 1 is provided.
[0020]
More specifically, an energy absorption space 32 is provided inside the semiconductor device 10 adjacent to the space in which the semiconductor element 1 is provided. These two spaces are separated by the inner wall 31 having the same thickness as the thin wall region 21 described in the first embodiment. This means that the inner wall 31 is a thin wall region. The thickness of the frame 2 is the same as the thick wall region 22 described in the first embodiment. Here, the energy absorbing space 32 is filled with an energy absorbing material 33 that effectively absorbs energy. The energy absorbing material 33 is, for example, a foaming agent.
[0021]
With this configuration, when the semiconductor element 1 is broken, only the inner wall 31 is broken. The destructive energy is absorbed by the energy absorbing material 33 in the energy absorbing space 32. As a result, the destruction energy falls within the semiconductor device 10 and does not affect the outside of the frame 2. In addition, debris due to the destruction scatters in the energy absorption space 32 and does not go out of the frame 2, so that secondary damage to peripheral circuits due to the destruction of the semiconductor device 10 can be prevented.
[0022]
Next, a modified example of the second example will be described. FIG. 4 is a cross-sectional view of the semiconductor device 10 taken along line bb ′ of FIG. The semiconductor device 10 of this modification also has a predetermined space in the semiconductor device, and absorbs destructive energy in that space. The feature of the semiconductor device 10 in this example is that the size of the semiconductor device 10 is reduced by providing the energy absorption space 42 above the space where the semiconductor elements are arranged.
[0023]
This will be described more specifically. First, in the semiconductor device of FIG. 3, the space in which the semiconductor element 1 is arranged and the energy absorption space 32 are arranged side by side in the direction a in FIG. This configuration is easy to manufacture, but on the other hand, the semiconductor device 10 spreads in the a direction, that is, along the ground plane of the semiconductor device 10, and the floor area (ground area) of the semiconductor device 10 is inevitably increased. growing. Therefore, the energy absorbing space 42 is provided above the space in which the semiconductor elements are arranged in the direction perpendicular to the ground plane of the semiconductor device 10. The energy absorbing space 43 is also filled with the energy absorbing material 43.
[0024]
4, the inner wall 41 corresponds to the inner wall 31 (FIG. 3). At the time of destruction, only the inner wall 41 is broken, and the destructive energy is absorbed by the energy absorbing material 43 in the energy absorbing space 42. Thereby, the same effect as that of the second embodiment described with reference to FIG. 3 can be obtained. Further, since the energy absorbing space 42 is provided above the space in which the semiconductor element 1 is arranged, the ground area of the semiconductor device 10 is smaller than when two spaces are provided in parallel along the ground surface of the semiconductor device 10. Can be reduced. Therefore, it is advantageous for miniaturization of the electric circuit itself.
[0025]
The embodiments of the present invention have been described above. In the above-described example, it has been described that the energy absorbing space is filled with the energy absorbing material. However, when the destructive energy can be sufficiently absorbed only by the energy absorbing space, it is not necessary to particularly provide the energy absorbing material. For example, the space (A) containing the semiconductor element 1 can be set to the atmospheric pressure, and the spaces 32 and 42 adjacent to the space via the inner walls 31 and 41 can be set to the negative pressure lower than the atmospheric pressure. As a result, destructive energy such as an explosion generated in the space A breaks the inner walls 31 and 41 and is absorbed in the negative pressure spaces 32 and 42.
[0026]
【The invention's effect】
The frame of the semiconductor device has a thin-walled region that is relatively thinner than the surrounding region, and when the pressure in the sealed space that seals the semiconductor element rises, the thin-walled region is broken to release the pressure. I do. Since the destruction point can be limited to the thin wall region, damage to peripheral circuits due to debris at the time of destruction can be prevented by not arranging peripheral components around the thin wall region.
[0027]
The thin wall region is an inner wall that separates the closed space from the energy absorbing space, and the pressure is released to the energy absorbing space. As a result, the energy at the time of destruction is stored in the module, and does not affect the outside of the frame. In addition, debris due to the destruction scatters into the energy absorbing space and does not come out of the frame, so that damage to peripheral circuits can be prevented.
[0028]
The energy absorbing space is arranged adjacent to the closed space along the ground plane of the semiconductor device. Such a configuration facilitates manufacturing.
[0029]
The energy absorbing space is disposed above the closed space in a direction perpendicular to the ground plane of the semiconductor device. Thus, the ground area of the semiconductor device can be reduced, which is advantageous for miniaturization of the electric circuit itself.
[0030]
The energy absorbing space is filled with an absorbing material that absorbs energy due to destruction. Thereby, the energy at the time of destruction can be efficiently absorbed not only by the energy absorbing space but also by the absorbing material.
[Brief description of the drawings]
FIG. 1 is a perspective view showing an appearance of a semiconductor device of the present invention.
FIG. 2 is a cross-sectional view of the semiconductor device according to the first example, taken along aa ′ of FIG. 1;
FIG. 3 is a cross-sectional view of the semiconductor device according to a second example, cut along aa ′ of FIG. 1;
FIG. 4 is a cross-sectional view of the semiconductor device taken along line bb ′ of FIG. 1;
FIG. 5 is a sectional view of a conventional semiconductor device.
[Explanation of symbols]
Reference Signs List 1 semiconductor element, 2 frame, 10 semiconductor device, 11 terminal, 21 thin wall region, 22 thick wall region, 31, 41 inner wall, 32, 42 energy absorbing space, 33, 43 energy absorbing material

Claims (5)

A semiconductor device having a semiconductor element and a frame that seals the semiconductor element,
The frame has a thin-walled region that is relatively thinner than a surrounding region, and releases the pressure by breaking the thin-walled region when the pressure in a sealed space that seals the semiconductor element increases. Semiconductor device. The thin wall region is an inner wall that separates the sealed space and the energy absorbing space, and when the pressure of the sealed space that seals the semiconductor element rises, breaks the thin wall region to form the energy absorbing space. The semiconductor device according to claim 1, wherein the pressure is released. The semiconductor device according to claim 2, wherein the energy absorption space is disposed adjacent to the closed space along a ground plane of the semiconductor device. The semiconductor device according to claim 2, wherein the energy absorption space is disposed above the closed space with respect to a direction perpendicular to a ground plane of the semiconductor device. The semiconductor device according to claim 2, wherein the energy absorbing space is filled with an absorbing material that absorbs energy due to destruction.

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