JP2004081748A - Electronic endoscope apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate electric wires by electromagnetically coupling a scope with a processor unit, and to form a good image even when the scope and the processor unit are electromagnetically coupled. <P>SOLUTION: The scope A and the processor unit B are electromagnetically coupled by an electromagnetic coupling unit 10, an image signal is superposed on a supply AC power at the scope A side, and a scope side reference pulse is superposed in a blanking period of a first field first horizontal line signal of the image signal. In the unit B, a processor side reference pulse is superposed in the blanking period of the second field first horizontal line signal. The image is processed by each type timing signal synchronized with these reference signals. Both the reference pulses are superposed with each other in the one field, and may be repeatedly synchronized with each other. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electronic endoscope apparatus, particularly to an arrangement for connecting an electronic endoscope as a scope to a processor apparatus, for supplying power between them and transmitting a video signal.
[0002]
[Prior art]
In an electronic endoscope apparatus, for example, an electronic endoscope (scope) equipped with a CCD (Charge Coupled Device), which is a solid-state imaging device, is connected to a processor device by a cable and a connector. Then, power is supplied from the processor device to the scope and various control signals are transmitted through the cable and the connector, and video signals and various control signals are transmitted from the scope to the processor device.
[0003]
That is, the scope is driven by a DC power supplied from a processor device via a power line, and a video signal captured by a CCD of the scope is sent to the processor device via a signal line. Is subjected to various color image processing, thereby displaying the image of the observed object on the monitor.
[0004]
[Problems to be solved by the invention]
However, in the above-mentioned electronic endoscope device, the cable connecting the scope and the processor device includes a power supply line and a plurality of signal lines, and since this cable connector has a multi-pin structure, any one of the connection pins makes contact. There is a possibility that a defect may occur or the connection pin may be damaged, and there is a problem that the cost is increased.
[0005]
The present invention has been made in view of the above problems, and an object of the present invention is to eliminate a connecting wire by electromagnetically coupling an electronic endoscope and a processor device, and to provide a good electromagnetic coupling. An object of the present invention is to provide an electronic endoscope apparatus capable of forming an image.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, according to a first aspect of the present invention, an electronic endoscope having an image sensor is connected to a main unit including a processor device, and power is supplied from the main unit to the electronic endoscope. In the electronic endoscope device, the electronic endoscope and the main body side device are electromagnetically coupled to each other, and an electromagnetic coupling portion for supplying power and a signal is provided on the main body side device; A power supply circuit for supplying alternating current (AC) power to the electromagnetic coupling unit, a power supply circuit provided in the electronic endoscope for extracting alternating current power supplied from the electromagnetic coupling unit, and the electromagnetic coupling Superimposing a video signal obtained by the image pickup element on a power supply of the unit, and superimposing a reference pulse on the electronic endoscope side or the processor side during a predetermined blanking period of a field or frame of the video signal. Circuit and A separation circuit that separates the video signal superimposed on the power supply of the electromagnetic coupling unit and the reference pulse on the electronic endoscope side or on the processor side, and an electronic endoscope side or processor side output from the separation circuit. A synchronization signal generating circuit for forming a signal synchronized with the reference pulse.
[0007]
According to a second aspect of the present invention, the reference pulse on one of the electronic endoscope side and the processor side is set to a predetermined frame of the first field (in the case of interlaced scanning) or the first frame (in the case of non-interlaced scanning) of the video signal. The present invention is characterized in that the reference pulse is superimposed on a ranking period and the other reference pulse is superimposed on a predetermined blanking period of the second field or the second frame of the video signal.
According to a third aspect of the present invention, in the processor device, the horizontal line signal of the video signal separated from the supply power is corrected by a horizontal synchronization signal generated by the processor-side synchronization signal generator.
According to a fourth aspect of the present invention, the electronic endoscope-side reference pulse is superimposed on a plurality of horizontal scanning blanking periods in a field or a frame of the video signal on the power supply, and the same is transmitted within the same field or frame. The processor-side reference pulse is superimposed in a plurality of horizontal scanning blanking periods in which the electronic endoscope-side reference pulse is not superimposed.
[0008]
According to the above configuration, the electronic endoscope and the processor device are electromagnetically coupled without using an electric wire. With this electromagnetic coupling, AC power is supplied from the processor device to the electronic endoscope, and the AC power is supplied to the electronic endoscope. A video signal is transmitted from the electronic endoscope to the processor device in a form superimposed on the power supply. Further, on this video signal, for example, an electronic endoscope side reference pulse (clock signal) of about 10 pulses is superimposed in a blanking period (or an optical black period) of the first horizontal line signal in the first first field. , About 10 processor-side reference pulses are superimposed during the blanking period of the first horizontal line signal in the next second field.
[0009]
In the processor device, for example, a clock signal synchronized with the electronic endoscope-side reference pulse of about 10 pulses is formed by the PLL operation, and the electronic endoscope also generates the processor-side reference pulse of about 10 pulses by the PLL operation. A clock signal synchronized with the pulse is formed, and the video signal is processed based on the synchronous clock signal and various timing signals formed thereby. According to this, a good video signal can be obtained by the synchronized timing signal. Conversely, the processor-side reference pulse is superimposed on the blanking period of the first horizontal line signal in the first field, and the scope-side reference pulse is superimposed on the blanking period of the first horizontal line signal in the second field. May be.
[0010]
Further, the electronic endoscope is provided with an image sensor of, for example, 270,000 pixels, and the processor device is configured so that the processing of the image sensor of 410,000 pixels is a reference. (1 million pixels-19.0632 MHz, 410,000 pixels-28.6363 MHz) may be different, but according to the configuration of claim 3, the horizontal line signal of the video signal obtained by the image sensor of 270,000 pixels is processed by the processor. Correction is made by the horizontal synchronizing signal formed by the oscillating signal on the device side, the state of contraction (or enlargement) in the horizontal direction is eliminated, and a good image is obtained.
[0011]
Furthermore, according to the configuration of the fourth aspect, for example, the reference pulse on the electronic endoscope side and the reference pulse on the processor side are alternately superimposed during the horizontal scanning blanking period in one field, so that the synchronization of both clock signals is good. Therefore, there is an advantage that sampling in a pixel unit is favorably performed by a synchronized timing signal. Also in this case, the effect is exhibited when oscillators having different oscillation frequencies are mounted.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
1 and 2 show the configuration of an electronic endoscope apparatus according to a first embodiment. In the first embodiment, the number of CCD pixels of a scope (electronic endoscope) A and the processor apparatus B are different from each other. The case where the reference number of CCD pixels is different will be described. In FIG. 1, the scope A is connected to the processor device B by an electromagnetic coupling unit 10 that electromagnetically couples. The electromagnetic coupling unit 10 has a primary winding 10a arranged on the processor device B side and a secondary winding 10b arranged on the scope A side. The primary winding 10a and the secondary winding 10b are arranged at a predetermined interval. It is configured to be. The electronic endoscope device includes a light source device for illuminating light from a distal end portion through a light guide. The electromagnetic coupling unit 10 is connected to an optical connector unit that connects the scope A to the light source device. It is also possible to provide a configuration in which the AC power is supplied from the light source device, and the video signal and the like are transmitted through a signal line connecting the light source device and the processor device.
[0013]
The scope A is provided with, for example, a CCD 12 of 270,000 pixels at its tip, a CCD driving circuit 13 for driving the CCD 12, a power receiving circuit 14 for converting alternating current (AC) to direct current (DC), A power supply forming circuit 15 for forming a plurality of power supply voltages by the DC power supply from the power supply receiving circuit 14, a waveform separating circuit 16 for separating the AC power supplied from the electromagnetic coupling unit 10, the reference pulse on the processor side, and the like. A waveform superimposing circuit 17 for superimposing a waveform of a video signal (interlaced scanning) on a waveform and for superimposing a scope-side reference pulse during a blanking period of the video signal, for example, the first horizontal line signal, the phase and oscillation of the processor-side reference pulse A phase comparison circuit 18 for comparing signal phases, a clock signal (for example, a frequency of 19.0632 MHz) for each pixel, Horizontal sync (HD) signal, a vertical synchronization (VD) signal, the timing generator (TG) 19 to form a signal such as a reset signal is provided.
[0014]
The timing generator 19 has a crystal oscillator 19a that oscillates a driving frequency of 19.0632 MHz for the 270,000 pixel CCD 12, and a variable capacitance diode 19b, and outputs a clock signal of the frequency 19.0632 MHz as the scope-side reference pulse, Further, by forming a PLL (Phase Locked Loop) together with the phase comparison circuit 18, it functions as a synchronization signal generation circuit that generates a signal synchronized with the processor-side reference pulse. Further, a buffer 20 for inputting the output signal of the CCD 12 and a microcomputer 21 for integrally controlling each circuit of the scope A are provided.
[0015]
On the other hand, the processor device B has a power supply circuit 23 for supplying AC power to the scope A via the electromagnetic coupling unit 10, and the control signal and the waveform of the processor-side reference pulse are supplied to the processor device B in the second field in the first horizontal direction. A waveform superimposing circuit 24 for superimposing the line signal during a blanking period, a high-pass filter (HPF) or a band-pass filter (BPF), and a waveform separating circuit 25 for separating the video signal or scope-side reference pulse, which is an AC component. Is provided. As the HPF or BPF of the waveform separation circuit 25, one that passes, for example, a band having a frequency of 14.32 ± 1.79 MHz is used. Further, a phase comparison circuit 26 and a synchronizing signal generator (SSG) 27 are provided so as to input the output of the waveform separation circuit 25, and the phase comparison circuit 26 provides the phase of the scope-side reference pulse and the oscillation signal. The phases are compared, and a voltage proportional to the phase difference is generated.
[0016]
The synchronizing signal generator 27 has a well-known LCR oscillator 27a and a variable capacitance diode 27b configured by combining L (coil), C (capacitor), and R (resistance), and drives, for example, a 410,000 pixel CCD. A frequency of 28.6363 MHz is generated, and an output voltage of the phase comparison circuit 26 is input to a connection point between the LCR oscillator 27a and the variable capacitance diode 27b to form a PLL, thereby synchronizing with the scope-side reference signal. A clock signal, a horizontal synchronization (HD) signal, a vertical synchronization (VD) signal, and the like are generated. The synchronizing signal generator 27 includes a frequency divider, and divides the oscillation frequency of 28.6363 MHz by 2/3 as a clock signal and a processor-side reference pulse adjusted to the driving frequency 19.0632 MHz of the scope A-side CCD 12. 19.0909 MHz is formed. Note that a crystal oscillator may be used instead of the LCR oscillator 27a.
[0017]
Further, the processor device B is provided with a microcomputer 31 for controlling the respective circuits, and further receives a video signal from the waveform separation circuit 25 and performs a correlated double sampling (CDS) circuit 32 for performing correlated double sampling. A / D converter 33, DSP (Digital Signal Processor) circuit 34 for performing various processes for forming a color image on a video signal, Electronic zoom circuit 35 for electronically enlarging / reducing an image, D / A converter 36, an amplifier 37 and the like are provided. The electronic zoom circuit 35 corrects not only the normal enlargement / reduction, but also the reduction or enlargement of the horizontal width caused by the difference between the clock frequencies used in the scope A and the processor B.
[0018]
FIG. 2 shows a specific circuit from the power receiving circuit 14 of the scope A to the waveform superimposing circuit 17. In the waveform superimposing circuit 17, the power / signal line 70 connected to the electromagnetic coupling unit 10, the ground and Between the coil L ₂ And a transistor Tr, and the collector of the transistor Tr is a coil L ₂ One end of the transistor Tr is connected to the ground, and the base of the transistor Tr is supplied with a video signal from the buffer 20 and a reference clock pulse from the timing generator 19 as a superimposed signal. The waveform separating circuit 16 has a high-pass filter (HPF—this may be a band-pass filter) 16a and a low-pass filter (LPF) 16b, and the HPF 16a has a frequency of 4.32 ± 1.79 MHz, for example. And separates the signal component supplied from the electromagnetic coupling unit 10, that is, the processor-side reference pulse and the control signal. The LPF 16b is configured to pass a power frequency of 50 Hz or 60 Hz, and separates the AC power supplied from the electromagnetic coupling unit 10.
[0019]
The power receiving circuit 14 is provided with a converter 14C for inputting the AC power separated by the LPF 16b and converting the power to DC. The power forming circuit 15 includes, for example, a DC voltage V required in the scope A. ₁ , V ₂ , V ₃ Are provided. The switching regulators 15a, 15b, 15c for forming the The configuration of the waveform superimposition circuit 17 described above is similarly used as the configuration of the waveform superposition circuit 24 in the processor device B.
[0020]
The first embodiment has the above configuration. When the processor device B is turned on, AC power is supplied from the power supply circuit 23 to the scope A via the electromagnetic coupling unit 10, and the waveform separation circuit 16 of the scope A is turned on. , AC power is taken out. That is, FIG. 3 shows a state in which the AC power supply and the signal are superimposed and separated, and the AC power supply and the signal supplied by the electromagnetic coupling unit 10 in FIG. As a result, an AC power supply having a waveform 100 shown in FIG. The AC power is supplied to the power receiving circuit 14, where the AC-DC conversion is performed by the converter 14 </ b> C, whereby the DC power is supplied to the power forming circuit 15. In this power supply forming circuit 15, switching regulators 15a, 15b, 15c provide a plurality of DC power supplies (V ₁ ~ V ₃ ) Are formed and supplied to each circuit.
[0021]
When the DC power is supplied to the CCD drive circuit 13, the CCD 12 is driven by the CCD drive circuit 13, and the object to be observed is imaged. The image pickup signal (video signal) output from the CCD 12 is supplied to a waveform superimposing circuit 17 via a buffer 20. The waveform superimposing circuit 17 superimposes the video signal on an AC power source, and at the same time, a timing generator 19 A reference pulse (clock signal) having a frequency of 19.0632 MHz output from the above is superimposed as a synchronizing signal in the horizontal scanning blanking period of the video signal.
[0022]
That is, as shown in FIG. 3B, a horizontal line signal waveform (substantial image) of the first field (in the case of interlaced scanning) is displayed on the AC waveform 100 at the timing of the horizontal scanning synchronization shown in FIG. Part) S _a1 , S _a2 .., The horizontal line signal waveform S of the second field _b1 , S _b2 , S _b3 … Are superimposed. Then, a blanking period B of the first horizontal line (1H) of the first field _a1 The reference pulse Se is superimposed by about 10 pulses, and the reference pulse is sent to the processor B via the electromagnetic coupling unit 10 together with the video signal.
[0023]
On the other hand, in the waveform separation circuit 25 of the processor device B, the signal component supplied via the electromagnetic coupling unit 10 is separated, and the HPF output shown in FIG. 3E is obtained. The output of the HPF 16a is supplied to the blanking period B as shown in FIG. _a1 And the horizontal line signal S as shown in FIG. 3 (G). _a1 , S _a2 , ... S _b1 , S _b2 Are separated into a level-shifted video signal, and the former scope-side reference pulse Se is supplied to the synchronization signal generator 27 via the phase comparator 26, and the latter is supplied to the CDS circuit 32. In the phase comparison circuit 26 and the synchronization signal generator 27, the PLL functions and the voltage applied to the variable capacitance diode 27b changes, so that the clock signal synchronized with the reference pulse Se (frequency 19.0632 MHz), and Timing signals such as a horizontal synchronization signal and a vertical synchronization signal are formed.
[0024]
That is, since the superposition position of the reference pulse Se is determined in advance to be the first horizontal line signal of the first field, the synchronization signal generator 27 performs horizontal scanning based on the input of the pulse Se. Synchronization and vertical scanning can be synchronized, and these horizontal synchronization signal and vertical synchronization signal or other timing signals are supplied to the CDS circuit 32 and the like. In the CDS circuit 32, the input video signal is correlated double-sampled, and the signal converted into a digital signal by the next-stage A / D converter 33 is subjected to color video processing in the DSP circuit 34. It is supplied to a monitor via an electronic zoom circuit 35, a D / A converter 36 and an amplifier 37.
[0025]
By the way, in this embodiment, the frequency of the reference pulse (clock signal) on the scope A side and the frequency of the reference pulse on the processor device B are different, and the processor device B only needs to synchronize based on the reference pulse on the scope side. Will be insufficient. That is, the reference pulse of about 10 pulses has a waveform due to transmission of the length from the scope A to the processor device B, passing through the electromagnetic coupling section 10, and the circuit constituting the PLL having a temperature characteristic. Distortion occurs, and this waveform distortion prevents an accurate synchronization state from being obtained. Therefore, in this example, the scope A is also synchronized based on the processor-side reference pulse.
[0026]
In the synchronization signal generator 27 of the processor device B of the first embodiment, a processor-side reference pulse having a frequency of 19.0909 MHz obtained by dividing the oscillation frequency of 28.6363 MHz of the oscillator 27a by 2/3 is formed. About 10 pulses of the processor-side reference pulse are input to the waveform superimposing circuit 24, and this reference pulse is superimposed as a synchronizing signal in the blanking period of the second horizontal line first signal of the video signal. That is, as shown in FIG. 3B, the blanking period B of the first horizontal line (1H) of the second field on the power supply. _b1 , A reference pulse Sp is superimposed by about 10 pulses.
[0027]
Then, in the waveform separating circuit 16 of the scope A, as shown in FIG. 3D, the second field first horizontal line signal S is output by the HPF 16a. _b1 Blanking period B _b1 Are separated, and this reference pulse Sp is supplied to a timing generator 19 via a phase comparison circuit 18. In the timing generator 19, a clock signal synchronized with the reference pulse Sp (frequency 19.0909 MHz) is formed by the function of the PLL and the change in the voltage applied to the variable capacitance diode 19b. That is, since the superimposed position of the processor-side reference pulse Sp is the first horizontal line signal of the second field, the horizontal scanning and the vertical scanning can be synchronized by inputting the pulse Sp.
[0028]
Thus, in the processor device B, the first field first horizontal line signal S _a1 Is synchronized with the scope-side reference pulse Se superimposed on the second field first horizontal line signal S _b1 By synchronizing with the processor-side reference pulse Sp superimposed on the signal, stable signal synchronization without waveform distortion is performed.
[0029]
Then, in the electronic zoom circuit 35 of this example, the horizontal line signal (horizontal width) is corrected. In this example, since the frequency of the reference pulse on the scope side is 19.0632 MHz and the frequency of the reference pulse on the processor side is 19.0909 MHz, a circular object displayed on the monitor 38 is considered as shown in FIG. Alternatively, this circle may be considered as an observation optical path area of the objective optical system), and a two-dot chain line f ₁ , The width in the horizontal direction is reduced, and the image is shifted to the left.
[0030]
Therefore, in the electronic zoom circuit 35 of this example, the horizontal line signal is corrected by the horizontal synchronizing signal of about 63.5 μsec formed from the oscillation frequency of 28.6363 MHz by the synchronizing signal generator 27. That is, in the image memory provided in the electronic zoom circuit 35, the image data written at the timing synchronized with the scope-side reference pulse is read out at the timing of the horizontal synchronization signal of about 63.5 μsec, so that the pixel h of FIG. (Several pixels to several tens of pixels) are stretched, and the solid line f ₂ Thus, an object having a good circular shape is formed.
[0031]
In the first embodiment, both the scope-side reference pulse Se and the processor-side reference pulse Sp are superimposed. However, only one of the scope-side reference pulse Se and the scope-side reference pulse Se may be superimposed. The processor-side reference pulse Sp may be superimposed on the blanking period of another horizontal line signal of the second field in the blanking period of another horizontal line signal in one field. Further, in the case of non-interlaced scanning, the scope-side reference pulse Se is superimposed on the blanking period of the first (first) frame first horizontal line signal, and the processor-side reference pulse Sp is applied to the first horizontal line of the second frame. It can be superimposed on the signal blanking period.
[0032]
Contrary to the first embodiment, the processor-side reference pulse Sp is supplied to the blanking period (B) of the first horizontal line signal of the first field (or the first frame). _a1 ) And the scope-side reference pulse Se is applied to the blanking period (B) of the first horizontal line signal of the second field (or the second frame). _b1 ) Can be superimposed. That is, even when the processor-side reference signal is sent from the processor device B first, the clock signal synchronized with the reference pulse is formed in the timing generator 19 of the scope A, and the position of the reference pulse is set to the first field of the first field. Since it can be recognized as a horizontal line signal (horizontal synchronization signal), horizontal scanning synchronization and vertical scanning synchronization can be achieved.
[0033]
FIG. 5 shows a configuration of a second embodiment of the present invention. In the second embodiment, both reference pulses are alternately repeated within one field in order to realize more accurate signal processing. It is superimposed. That is, in the CDS (correlated double sampling) circuit 32 of FIG. 1, the output signal of the CCD 12 is sampled and held for each pixel, and for example, as shown in the horizontal line signal of FIG. Is a signal that drops in pixel units. When this signal passes through the CDS circuit 32, the amplitude in pixel units is held as shown in FIG. 5B, and the signal is output from the envelope of the CCD output amplitude in FIG. Is extracted as a video signal.
[0034]
However, if the timing pulse output from the synchronizing signal oscillator 27 has a slight phase shift from the output (reading) timing pulse on the CCD 12 side, the amplitude of the pixel signal to be sampled cannot be accurately detected. As a result, a good video signal cannot be obtained. In particular, when the scopes A and 27B use oscillators 19a and 27a having different frequencies, the phases of both reference pulses do not match from the beginning, and the phase shift becomes large. Therefore, in the second embodiment, the scope-side reference pulse and the processor-side reference pulse are alternately superimposed every blanking period of the horizontal line signal in one field of the video signal.
[0035]
FIG. 6 shows the AC power and signals supplied by the electromagnetic coupling unit 10 of the second embodiment. The supplied AC power has a horizontal scanning period similar to that of the first embodiment. 1H, 2H, 3H... Horizontal line (scanning) signals S _a1 , S _a2 , S _a3 Are superimposed on a field-by-field basis. In the scope A, for example, the horizontal line signal S _a1 , S _a3 , S _a5 … Blanking period B _a1 , B _a3 , B _a5 .. Are superimposed on the scope-side reference pulse Se having a frequency of 19.0632 MHz by about 10 pulses. _a2 , S _a4 , S _a6 … Blanking period B _a2 , B _a4 , B _a6 , About 10 reference pulses Sp having a frequency of 19.0909 MHz (frequency of 28.6363 MHz divided by 2/3) are superimposed.
[0036]
Simultaneously with such a superposition operation, the phase comparison circuit 26 and the synchronization signal generation circuit 27 which have input the reference pulse Se form a signal synchronized with the reference pulse Se by the PLL operation, and the phase comparison circuit 18 which has input the reference pulse Sp. Also in the timing generator 19, signals synchronized with the reference pulse Sp are formed by the PLL operation, and these synchronization signals form a clock signal, a next reference pulse, and timing signals such as a horizontal synchronization signal and a vertical synchronization signal. .
[0037]
Such bidirectional transmission and synchronization of the reference pulses Se and Sp are continued as long as the video signal is output from the scope A. In the second embodiment, the timing signal synchronized with the read timing of the CCD 12 is set to the CDS. The CDS circuit 32 provides good correlated double sampling and holding. As a result, a video signal that accurately captures the envelope of the pixel signal amplitude is formed.
[0038]
Further, in the second embodiment, the crystal oscillator 19a is used for the timing generator 19 of the scope A and the LCR oscillator 27a is used for the synchronization signal generator 27 of the processor B, so that a large phase shift can be followed well. There is an advantage that a synchronized operation can be performed. That is, since the Q value width of the LCR oscillator 27a is larger than that of the crystal oscillator 19a, even when the scope A and the processor B have oscillators having different frequencies, they are based on the alternate transmission of the reference pulses Se and Sp. With a good synchronization signal, it is possible to accurately sample and hold the video signal. In the second embodiment, in the case of non-interlaced scanning, the scope-side reference pulse Se and the processor-side reference pulse Sp are alternately superimposed every horizontal scanning blanking period in one frame.
[0039]
In the first and second embodiments, the case where the scope A equipped with CCDs (270,000 pixels) having different numbers of pixels is connected to the processor B is described. For example, a scope equipped with a CCD having 410,000 pixels can be connected. In this case, the present invention can be applied in the same manner to improve the processing accuracy.
[0040]
【The invention's effect】
As described above, according to the present invention, the electronic endoscope and the processor device are electromagnetically coupled by the electromagnetic coupling unit, and the electronic endoscope side superimposes a video signal on a power supply, and For example, an electronic endoscope-side reference pulse or a processor-side reference pulse is superimposed during a blanking period of a field or a frame of a video signal, and video processing is performed by a timing signal synchronized with these reference pulses. The electronic endoscope and the processor device can be connected by the electromagnetic coupling portion without using a signal line, and as a result, contact failure of connection pins and the like are eliminated, and the manufacturing cost is reduced. In addition, the electromagnetic coupling unit can provide electrical isolation between the electronic endoscope and the processor device, thereby eliminating the conventionally employed isolation means and simplifying the configuration. There is also. Further, a good image can be formed even when an electronic endoscope equipped with image pickup devices having different numbers of pixels is used.
[0041]
Further, according to the second to fourth aspects of the present invention, it is possible to form a good image even when using an electronic endoscope equipped with an image pickup device having a different number of pixels. The state in which the width in the horizontal direction is reduced or enlarged is eliminated, and a good image is obtained. Furthermore, in the case of the invention of claim 4, the sample and hold can be performed accurately, and the image of the object to be observed can be formed and displayed more favorably.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of an electronic endoscope apparatus according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a specific configuration of a power supply circuit, a power supply forming circuit, a waveform separation circuit, and a waveform superposition circuit of the first embodiment.
FIG. 3 is a waveform diagram showing a state in which AC power and signals used in the first embodiment are superimposed and separated.
FIG. 4 is a diagram showing a circular subject processed in the first embodiment and displayed on a monitor.
FIG. 5 is a waveform diagram showing a sampling process in the CDS circuit of FIG. 1;
FIG. 6 is a diagram illustrating a state in which a transmission signal is superimposed on a supply (AC) power supply by a waveform superimposing circuit according to a second embodiment.
[Explanation of symbols]
A: scope (electronic endoscope), B: processor device,
12 ... CCD, 14 ... power receiving circuit,
14C: converter, 16, 25: waveform separation circuit,
16a: HPF (high-pass filter),
16b: LPF (low-pass filter),
17, 24 ... waveform superimposing circuit,
19 ... timing generator (TG),
19a: crystal oscillator, 21, 31: microcomputer,
23: power supply circuit 18, 26: phase comparison circuit
27 ... Synchronous signal generator (SSG)
27a: LCR oscillator, 32: CDS circuit,
34 ... DSP circuit, 35 ... Electronic zoom circuit.

Claims (4)

An electronic endoscope equipped with an imaging device is connected to a main body device including a processor device, and in the electronic endoscope device for supplying power to the electronic endoscope from the main body device,
An electromagnetic coupling unit for electromagnetically coupling between the electronic endoscope and the main unit side device, and for supplying power and a signal,
A power supply circuit provided in the main body side device, for supplying AC power to the electromagnetic coupling unit,
A power supply circuit provided in the electronic endoscope, for taking out AC power supplied from the electromagnetic coupling unit,
A video signal obtained by the imaging device is superimposed on a power supply of the electromagnetic coupling unit, and a reference pulse on the electronic endoscope side or the processor side is superimposed during a predetermined blanking period of a field or a frame of the video signal. A waveform superimposing circuit,
A separation circuit that separates the video signal superimposed on the power supply of the electromagnetic coupling unit and the reference pulse on the electronic endoscope side or the processor side,
A synchronizing signal generation circuit for forming a signal synchronized with a reference pulse on the electronic endoscope side or on the processor side output from the separation circuit. One of the reference pulses on the electronic endoscope side or the processor side is superimposed on a predetermined blanking period of the first field or the first frame of the video signal, and the other reference pulse is placed on the second field or the second frame of the video signal. 2. The electronic endoscope apparatus according to claim 1, wherein the electronic endoscope apparatus is superimposed on a predetermined blanking period. 3. The electronic device according to claim 1, wherein the processor corrects a horizontal line signal of a video signal separated from a power supply by a horizontal synchronization signal generated by the processor-side synchronization signal generator. Endoscope device. The electronic endoscope-side reference pulse is superimposed on a plurality of horizontal scanning blanking periods in the field or frame of the video signal on the power supply, and the electronic endoscope-side reference pulse is generated in the same field or frame. 4. The electronic endoscope apparatus according to claim 1, wherein a processor-side reference pulse is superimposed during a plurality of non-superimposed horizontal scanning blanking periods.

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