JP2004056048A - Solid imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve a dynamic range in a solid imaging device provided with two charge storage parts in one photoelectric conversion part in a pixel and having constitution assigning charges to the two charge storage parts in synchronization with intensity modulation of light. <P>SOLUTION: A solid imaging device is provided with a photo-gate 11, and a MOS transistor 16 for setting potential of a parasitic n<SP>+</SP>diffusion layer 15 produced between transfer gates 131 and 132 for transferring charge generated therein. Prior to transfer of signal charge, the parasitic diffusion layer 15 is set at prescribed potential through the MOS transistor 16. Since a potential pocket due to the parasitic diffusion layer 15 is buried, the signal charge transferred from the photo-gate 11 to floating diffusion layers 121 and 122 is not captured with the parasitic diffusion layer 15. As a result, a signal to very weak light can be taken out to improve the dynamic range. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a solid-state imaging device, and more particularly, to a solid-state imaging device manufactured using a CMOS semiconductor process.
[0002]
[Prior art]
2. Description of the Related Art In recent years, solid-state imaging devices have been used in various electronic devices such as digital cameras, camera-integrated VTRs, facsimiles, and mobile phones with a camera function, and the performance of the devices has been remarkably improved. Under such circumstances, the inventor of the present application has proposed a solid-state imaging device having a novel configuration in Japanese Patent Application No. 11-328400 (see Japanese Patent Application Laid-Open No. 2001-148808). Here, the principle of the solid-state imaging device will be briefly described with reference to FIGS.
[0003]
FIG. 8 is a conceptual diagram showing a schematic configuration of an image photographing device using an image sensor using a solid-state image sensor, and FIG. 9 is an explanatory diagram of its operation. The image photographing apparatus 100 includes an image sensor 110 that converts an optical signal into an electric signal and outputs the electric signal, a lens optical system 101 that forms an image of incoming light, and an auxiliary light L2 that is directed toward a target object 200. The light emitting unit 102 includes a light emitting unit 102 that emits light, a timing control unit 103 that controls operations of the light emitting unit 102 and the image sensor 110, and an image processing unit 104 that receives an output signal from the image sensor 110 and forms an image.
[0004]
Although pixel circuits are arranged two-dimensionally in the image sensor 110, only a schematic configuration of one pixel circuit 111 is illustrated here for simplification. That is, the signal charges stored in one photoelectric conversion unit 112 in the pixel circuit 111 are appropriately and selectively distributed to the two charge storage units 114 by the two charge transfer units 113. The charge accumulating unit 114 accumulates and accumulates the signal charges transferred a plurality of times, and the two accumulated charges are supplied to a differentiator 115 provided outside the pixel circuits 111 at a predetermined timing and provided in common to the pixel circuits 111. Is sent. The differentiator 115 outputs a difference voltage between the output voltages of the two charge accumulation units 114 included in each pixel circuit 111 in a time-division manner. Output of the image signal to the image processing unit 104 is usually performed in units of one frame. Note that the differentiator 115 may not be common to all pixel circuits. For example, a differentiator may be provided for each column direction of two-dimensionally arranged pixel circuits, or a differentiator may be provided for each pixel circuit. The same processing can be achieved by providing
[0005]
Under the control of the timing control unit 103, the light-emitting unit 102 is driven to blink (i.e., is modulated) at a constant period much shorter than one frame period, while the charge transfer unit 113 of the image sensor 110 is synchronized with the period. To distribute the signal charge. Therefore, while the light emitting unit 102 is on, the background light L1 and the auxiliary light L2 hit the subject 200, and the reflected lights L1R and L2R enter the photoelectric conversion unit 112 via the lens optical system 101. At this time, since the background light is also applied to the background object 201 present behind the subject 200, the reflected light L1R includes the light reflected by the background object 201. On the other hand, since the reaching distance of the auxiliary light L2 emitted from the light emitting unit 102 is relatively short, if the background object 201 is far behind the subject 200, the auxiliary light L2 does not reach the background object 201. , The reflected light L2R does not include the light reflected by the background object 201. On the other hand, since the auxiliary light L2 does not exist during the period when the light emitting unit 102 is off, only the reflected light L1R due to the background light from the subject 200 and the background object 201 is transmitted via the lens optical system 101 to the photoelectric conversion unit 112. Incident on.
[0006]
For this reason, if an image is created based on only the signal charges corresponding to the auxiliary light lighting period, the result is as shown in FIG. 9A, and the image is created based on only the signal charges corresponding to the auxiliary light extinguishing period. If so, the result is as shown in FIG. The image 201a with respect to the background object 201 is the same in both cases, but the image 200a or 200b with respect to the subject 200 becomes clearer in FIG. 9A including the reflected light by the auxiliary light L2. Is higher). In the image sensor 110, the difference between the two is obtained for each pixel circuit 111 by the differentiator 115. Therefore, in an image obtained based on a signal output from the image sensor 110, as shown in FIG. Therefore, the image of the background object 201 is canceled out and hardly appears, and only the image 200c of the subject 200 is clearly obtained.
[0007]
As described above, by using the solid-state imaging device, a target subject can be clearly imaged without being substantially affected by the background light. In the following description, a solid-state imaging device using the above-described method will be referred to as a distribution transfer type sensor.
[0008]
[Problems to be solved by the invention]
By the way, when manufacturing such a solid-state imaging device, if a general CMOS semiconductor process is used, the advantage is very large, for example, peripheral circuits such as a signal processing circuit can be integrated (one chip). Various proposals have heretofore been made for such a CMOS solid-state imaging device (for example, Japanese Patent Application Laid-Open Nos. 9-65210 and 11-145444). As an example of a basic pixel structure of a CMOS solid-state imaging device, a photogate as a photoelectric conversion unit, a floating diffusion layer (floating diffusion) for accumulating electric charges, and an electric charge stored immediately below the photogate are used. A transfer gate for transferring the charge signal to the floating diffusion layer; and a source follower amplifier for converting a charge signal accumulated in the floating diffusion layer into a voltage or a current and outputting the voltage or current.
[0009]
It is useful to adopt such a CMOS type structure also in the above-mentioned distribution transfer type sensor, and the present inventors are keenly studying to realize the distribution transfer type sensor using a general-purpose CMOS semiconductor process. In the process, some problems in realizing the distribution transfer type sensor have been clarified, but it has been found that it is particularly difficult to secure a sufficient dynamic range when using a CMOS semiconductor process. did. In this regard, there are mainly two factors. One is that the transfer efficiency of the charge is low when trying to transfer the signal charge generated at the photogate to the floating diffusion layer through the transfer gate, and the other is that the transfer gate is closed. Nevertheless, there is a problem of signal charge leakage that signal charges generated in the photogate leak to the floating diffusion layer and are accumulated.
[0010]
Further, as is apparent from the above description, in the distribution transfer type sensor, a common signal component, that is, a background light component is canceled by calculating a difference between signal voltages (or currents) after distribution to the two charge storage units. are doing. The premise is that the characteristics of the two signal paths from the signal charge distribution unit to the difference are the same. If there is a difference between the two characteristics, an output error corresponding to the difference will occur, and the image quality will be degraded.
[0011]
The present invention has been made in view of such a problem, and a main object thereof is to improve a dynamic range in a CMOS solid-state imaging device, particularly, in the above-described distribution transfer type sensor. . Another object of the present invention is to provide a solid-state imaging device capable of reducing a signal error by aligning characteristics of two signal paths after signal charges are distributed in a distribution transfer type sensor. It is to be.
[0012]
[Means for Solving the Problems and Effects]
According to the results of the study by the present inventors, the low charge transfer efficiency, which is one of the factors that degrade the dynamic range as described above, is due to the occurrence of a parasitic between a photoelectric conversion unit such as a photogate and the transfer gate. N ⁺ It can be assumed that a kind of potential pocket for trapping signal charges is formed in the diffusion layer, and a part of the signal charges to be transferred is trapped in the potential pocket. If a part of the signal charge is not transferred as described above, a voltage output cannot be obtained when the light received by the photoelectric conversion unit is weak, and the dynamic range is reduced.
[0013]
Therefore, in order to solve such a problem, the solid-state imaging device according to the first aspect of the present invention includes a photoelectric conversion unit that receives light to generate a signal charge, a charge storage unit that stores the signal charge, and an external control signal. Accordingly, one pixel is configured including a charge transfer unit that transfers a signal charge from the photoelectric conversion unit to the charge storage unit, and an output unit that outputs a voltage corresponding to the charge stored in the charge storage unit. A solid-state imaging device having a plurality of the pixels, further comprising a voltage applying unit for applying a predetermined voltage to a parasitic diffusion layer formed between the photoelectric conversion unit and the charge transfer unit. .
[0014]
As one embodiment of the present invention, the voltage application unit includes a switch unit that conducts the parasitic diffusion layer and the voltage supply unit by an ON operation, specifically, a transistor or the like, and an appropriate time before charge transfer. And control means for turning on the switch means.
[0015]
The phenomenon that occurs in the parasitic diffusion layer when an appropriate potential is externally applied to the parasitic diffusion layer by the voltage applying means has not been completely elucidated. It can be assumed that the pockets are filled, that is to say they are full or shallow without having to be full. Therefore, when the signal charge is transferred thereafter, the signal charge is not trapped in the potential pocket, or even if trapped, the trapped amount is small. Thus, according to the solid-state imaging device according to the first aspect of the present invention, trapping of signal charges by the parasitic diffusion layer can be avoided or reduced, so that even a small amount of signal charges can be reliably transferred to the charge storage unit. As a result, it is possible to obtain a signal for weak light that could not be conventionally taken out as an output voltage from the output unit, and it is possible to improve the dynamic range of the present element.
[0016]
As described above, it is considered that the transfer efficiency of signal charges can be improved by filling the potential pocket of the parasitic diffusion layer. However, according to the study of the present inventors, the potential at the time of filling the potential pocket is considered. Is too high, the potential itself of the charge storage unit fluctuates, that is, the charge storage unit is in a state where it is pre-biased, which hinders output of an accurate voltage even if signal charges are transferred thereafter. That phenomenon has been confirmed. This is presumed that, depending on the voltage applied to the parasitic diffusion layer, not only the potential pocket is filled but also the overflowing charge flows into the charge storage portion and fluctuates the potential. Therefore, in order to suppress such a phenomenon, in the solid-state imaging device according to the first invention, the voltage applied by the voltage applying unit is set to a voltage that does not affect the potential of the charge storage unit before charge transfer. Is preferred.
[0017]
It is considered that the specific numerical value of such a voltage depends on various conditions. For example, when the voltage applying unit uses a MOS transistor as the switch unit, the voltage near the sub-threshold voltage of the transistor is used. , About 0.5 to 0.6 V.
[0018]
In a CMOS type solid-state imaging device, ideally, when the transfer gate is closed, signal charges generated in the photoelectric conversion unit are held there without being diffused, and when the transfer gate is opened, the signal charges are simultaneously transferred to the charge storage unit. It is preferable to flow. However, according to the study of the present inventors, part of the signal charges generated immediately below and near the photogate, which is the photoelectric conversion unit, diffuses and spreads despite the transfer gate being closed. And the potential was changed. This is considered to be another factor that deteriorates the dynamic range as described above.
[0019]
Therefore, in order to solve such a problem, the solid-state imaging device according to the second aspect of the present invention provides a single photoelectric conversion unit, first and second two charge storage units, and first and second photoelectric conversion units. First and second two charge transfer units for selectively transferring charge to the second charge storage unit, and a first for outputting a voltage corresponding to the charge stored in the first and second charge storage units. , A second two output units, and a solid-state imaging device including a plurality of pixels.
In the circuit pattern in which the pixel is formed on a semiconductor substrate, the photoelectric conversion unit has a projecting piece projecting from substantially the center of a certain right side, and sandwiches a substantially center line of the projecting piece. And the first and second charge storage portions are disposed substantially symmetrically on both sides, and are separated on both sides with the protruding piece portion interposed between the first and second charge storage portions and the photoelectric conversion portion. It is characterized by forming a charge sweeping layer formed as described above.
[0020]
According to the configuration of the solid-state imaging device, for example, signal charges leaked from the photoelectric conversion unit when the charge transfer unit is closed are captured by the charge sweeping layer before reaching the charge storage unit, and are discharged to the outside. Will be done. Therefore, it is possible to prevent or reduce the undesired flow of the signal charge from the outside into the charge storage portion on the side where the charge transfer portion is not opened. As a result, potential fluctuations due to the original signal charge in the charge storage section are eliminated, and the dynamic range can be improved.
[0021]
In the solid-state imaging device according to the second aspect of the present invention, the signal charges are guided from the photoelectric conversion unit through the common projecting piece, and then distributed to both sides via the two charge transfer units on the left and right. Therefore, the conditions of the two signal paths thereafter can be made the same or close. Therefore, for example, the signal charge based on the background light component and the auxiliary light component is transferred to the first charge storage unit, the signal charge based on only the background light component is transferred to the second charge storage unit, and the difference between the first and second output units is determined. In this case, the elements other than the auxiliary light component are substantially the same, and the background light component is reliably canceled. Therefore, as described above, the characteristics of the distribution transfer type sensor, that is, the quality of the image formed by the output signal can be greatly improved.
[0022]
【Example】
Hereinafter, an embodiment of a solid-state imaging device according to the present invention will be described with reference to the drawings.
[0023]
The solid-state imaging device of the present embodiment includes a large number of pixels arranged one-dimensionally or two-dimensionally on a semiconductor substrate, but the solid-state imaging device has a feature in the configuration or structure of one pixel. This will be described in detail. FIG. 1 is a schematic configuration diagram of one pixel circuit 10 of the solid-state imaging device of the present embodiment. In this figure, the light source conversion unit and the charge storage unit are mainly shown in a longitudinal sectional view, and the others are drawn as circuits.
[0024]
One pixel circuit 10 includes one photo gate (PG: Photo Gate) 11 that is a photoelectric conversion unit and a first charge storage unit that stores two signal charges generated in the photo gate 11. A second floating diffusion layer (FD: Floating Diffusion) 121, 122 and two for transferring the signal charge stored in the photogate 11 to the first and second floating diffusion layers 121, 122 at a predetermined timing. For amplifying the signal charges added and accumulated in the first and second floating diffusion layers 121 and 122 as first and second transfer gates (TG: Transfer Gate) 131 and 132 as a transfer section of FIG. First and second source follower amplifiers 141 and 142 as output units.
[0025]
In FIG. 1, the left component including the photogate 11 is a first unit [I] for processing a background light component and a modulated light component as described later. The right component is the second unit [II] for processing only the background light component. PX is a control signal for controlling whether or not to accumulate signal charges generated immediately below the photogate 11, and TX1 and TX2 are controls for controlling the opening and closing of the first and second transfer gates 131 and 132, respectively. A signal RST is a control signal for resetting the potentials of the first and second floating diffusion layers 121 and 122 to the power supply voltage Vdd, and X is a voltage based on charges accumulated in the first and second floating diffusion layers 121 and 122. This is a control signal for controlling whether or not to output via the first and second source follower amplifiers 141 and 142.
[0026]
Light that has been intensity-modulated at a predetermined cycle enters the photogates 11 in a number of pixels included in the solid-state imaging device. Specifically, for example, as described with reference to FIG. 8, the subject 200 is irradiated with the auxiliary light L2 that blinks at a predetermined cycle, and the light L2R or background light reflected by the subject 200 arrives at the solid-state imaging device. It should be assumed. In this case, the modulated light may be considered in two states of “present” or “absent”. In the first state, the modulated light component + the background light component is obtained, and in the second state, only the background light component is obtained.
[0027]
FIG. 2 is a timing chart for explaining the operation of the solid-state imaging device of the present embodiment. In the pixel circuit 10 having the above configuration, the circuit operates in synchronization with the intensity modulation of the modulated light, that is, the blinking cycle. In FIG. 2, CK is the modulation (flashing) cycle, and is turned off when CK = 0 and turned on when CK = 1. First, in the lighting period (the first state), the modulated light component + the background light component is incident on the photogate 11, and a signal charge corresponding to the received light intensity is generated immediately below the photogate 11. Immediately before the lighting period ends, TX1 is applied to open the first transfer gate 131, and the signal charge is transferred and accumulated in the first floating diffusion layer 121. On the other hand, during the light-off period, only the background light component is incident on the photogate 11, and a signal charge corresponding to the received light intensity is generated immediately below the photogate 11. Then, the second transfer gate 132 is opened by applying TX2 immediately before the end of the light-off period, and the signal charge is transferred from the photogate 11 to the second floating diffusion layer 122 and accumulated.
[0028]
By repeating the above operation many times in synchronization with the blinking period during one frame period, the first floating diffusion layer 121 receives signal charges corresponding to the modulated light component + background light component in the second floating diffusion layer 122. The signal charge corresponding to only the background light component is added and accumulated. Then, after one frame period ends, the respective accumulated charges are taken out as voltages through the first and second source follower amplifiers 141 and 142, and a difference voltage between the two output voltages is obtained by an external differentiator. Then, the background light component common to both output voltages is removed, and only the signal due to the modulated light component remains.
[0029]
However, in a general CMOS process, as illustrated in FIG. 1, a parasitic n between the photogate 11 and the first and second transfer gates 131 and 132. ⁺ A diffusion layer (hereinafter referred to as “parasitic diffusion layer”) 15 is formed. FIG. 3B shows the result of obtaining the potential shape at the time of charge transfer in a structural model as shown in FIG. 3A by using a device simulator in order to investigate the influence of the parasitic diffusion layer 15. The conditions at this time are Vdd = 3.5V, PX = 0V, TX2 = 0V, TX1 = 1.4V, and the signal charges accumulated in the photogate 11 are transferred to the first floating diffusion layer via the first transfer gate 131. It is assumed that the data is to be transferred to the C.121.
[0030]
As is apparent from FIG. 3B, a potential pocket is formed between the photogate 11 and the transfer gates 131 and 132 due to the influence of the parasitic diffusion layer 15. Therefore, when an attempt is made to transfer signal charges from the photogate 11 to the first floating diffusion layer 121 via the first transfer gate 131, some of the signal charges are trapped in this potential pocket, in other words, fill the potential pocket. Therefore, it is considered that the signal charge that can reach the first floating diffusion layer 121 is reduced by that amount.
[0031]
It is most preferable not to form the parasitic diffusion layer 15, but it is difficult to avoid the formation of the parasitic diffusion layer 15 when a general-purpose CMOS process is used. Therefore, in the solid-state imaging device of the present embodiment, in order to eliminate the potential pocket of the parasitic diffusion layer 15 or to make the bottom shallow even if it does not completely disappear, the parasitic diffusion layer 15 is used as a drain (or source) and reset. A MOS transistor 16 having a source (or drain) connected to the power supply line Vrs is provided, and a control signal NDRS is externally input to the gate terminal of the MOS transistor 16.
[0032]
Although the function of the MOS transistor 16 has not been completely elucidated, it is considered that the mechanism is substantially as follows.
[0033]
FIG. 4 is a conceptual diagram schematically showing a potential state change. Before starting to accumulate signal charges, a high-level control signal is applied to the photogate 11 as PX, and a depletion layer for accumulating signal charges is provided immediately below the photogate 11 as shown in FIG. Form. Thereafter, when light is applied to the photogate 11 and signal charges are generated and stored immediately below the photogate 11, the potential immediately below the photogate 11 increases as shown in FIG. 4C. At this time, when the control signal NDRS is applied to the gate terminal of the MOS transistor 16 to make the MOS transistor 16 conductive, the potential of the parasitic diffusion layer 15 is set to a value close to Vrs.
[0034]
After the signal charges are sufficiently accumulated immediately below the photogate 11, the control signal TX2 is applied to open the second transfer gate 132 in order to transfer the signal charges to the second floating diffusion layer 122. Then, the potential immediately below the second transfer gate 132 decreases, but at this time, since the potential of the parasitic diffusion layer 15 has been raised first, the potential pocket at that portion disappears or the bottom becomes shallow even if it does not disappear. . As a result, when the second transfer gate 132 is opened, the signal charge is not trapped in the potential pocket, or even if it is trapped, the signal charge is small. Therefore, signal charges flow smoothly from the photogate 11 to the second floating diffusion layer 122 and accumulate in the second floating diffusion layer 122.
[0035]
In order to verify the effect of the potential setting by the MOS transistor 16, the present inventors actually prototyped a pixel circuit and determined the relationship between the amount of modulated light and the differential output voltage depending on whether or not the potential was set via the MOS transistor 16. It was measured. The result is shown in FIG. In the case where the potential setting by the MOS transistor 16 is not performed (no NDRS in FIG. 5), that is, in the state where the deep bottom potential pocket is formed in the parasitic diffusion layer 15 as in the conventional case, the modulated light amount is small (the illuminance is low). Case), for example, at about 0.3 nW or less, almost no difference output voltage is obtained.
[0036]
On the other hand, when the gate voltage of the MOS transistor 16 is set to 1.0 V and Vrs (NDRS in FIG. 5) = 0.38 V (that is, when the gate-source voltage VGS = 0.62 V) ), A differential output voltage is obtained even at a low illuminance of 0.3 nW or less. This is because even when the illuminance is low, that is, even when the amount of signal charges generated in the photogate 11 is relatively small, it is possible to reach the floating diffusion layers 121 and 122 without being almost trapped in the potential pocket when transferring the signal charges. It is considered that the result was as follows. That is, by setting the potential of the parasitic diffusion layer 15 at an appropriate timing by the MOS transistor 16, an output signal can be obtained even for weak light, and the dynamic range is improved.
[0037]
Even when the potential is set by the MOS transistor 16, if the gate-source voltage VGS at that time is too high, that is, the gate voltage of the MOS transistor 16 is set to 1.0 V, and Vrs (NDRS in FIG. 5) = When the voltage is set to 0.34 V (that is, when VGS = 0.66 V), as shown in FIG. 5, a phenomenon that the differential output voltage decreases in a region where the modulated light amount is large is observed. In such a state, as shown in FIG. 4E, it has been experimentally confirmed that the potential of the second floating diffusion layer 122 has already risen (the voltage approaches 0 V) before the signal charge is transferred. It is clear. It can be inferred that this is because the charge injected to fill the potential pocket overflowed, flowed into the second floating diffusion layer 122, and raised the potential. When such a phenomenon occurs, the floating diffusion layers 121 and 122 are in a pre-biased state, and there is less room for receiving signal charges from the photogate 11 when the transfer gates 131 and 132 are opened. As a result, the difference output is greatly reduced. From this, it can be seen that although setting the potential of the parasitic diffusion layer 15 by the MOS transistor 16 has a great effect, it is desirable to set the potential appropriately. Although the specific potential depends on various conditions, it is generally considered that it is desirable to set the gate-source voltage VGS of the MOS transistor 16 to a voltage near the sub-threshold voltage of the transistor.
[0038]
FIG. 6 is a schematic diagram of a circuit pattern of one pixel in the solid-state imaging device of the present embodiment. As shown in the figure, the photogate 11 is substantially rectangular, but has a tongue-shaped projecting piece 11a substantially at the center of its long side, and the first and the first sides are located on both sides of the center line C of the projecting piece 11a. The second floating diffusion layers 121 and 122 are symmetrically arranged. Although the first and second transfer gates 131 and 132 are arranged so as to surround the first and second floating diffusion layers 121 and 122, the portion facing the center line C is substantially the most effective for charge transfer. Contribute. That is, when the signal charges stored immediately below the photogate 11 are transferred to the first or second floating diffusion layers 121 and 122, the signal charges mainly come out of the protruding pieces 11a and move from the periphery of the center line C to the floating diffusion layers. It flows into 121 and 122. The first and second source follower amplifiers 141 and 142 are disposed outside the floating diffusion layers 121 and 122.
[0039]
In this way, by arranging the first unit [I] and the second unit [II] substantially symmetrically on both sides of the center line C, the electrical characteristics of both units can be made uniform. Also, in transferring the signal charge to any of the first and second floating diffusion layers 121 and 122, the outflow position of the signal charge from the photogate 11 is almost the same. The electrical conditions are the same, and it is possible to reliably cancel the background light component when taking the difference between the two output voltages.
[0040]
In the solid-state imaging device according to the present embodiment, a charge sweeping layer 17 is provided between the photogate 11 and the first and second floating diffusion layers 121 and 122. I have. Although not shown, a predetermined potential can be applied to the charge sweeping layer 17 from the outside. The function of the charge sweeping layer 17 is as follows.
[0041]
That is, a predetermined DC voltage is always applied to the charge sweeping layer 17 during the period in which the above-described photoelectric conversion operation is performed. Light incident on the photogate 11 and the electric charge accumulated in the depletion layer immediately below the photogate 11 are ideally charged by the first and second floating diffusion layers 121 unless the first and second transfer gates 131 and 132 are opened. , 122, but actually, even if the first and second transfer gates 131, 132 are closed, they gradually diffuse to the surroundings and accumulate in the first and second floating diffusion layers 121, 122. Will be done. Therefore, when a certain potential is applied to the charge sweeping layer 17, signal charges leaking from immediately below the photogate 11 are captured by the charge sweeping layer 17 and are discharged in the horizontal direction along the extending direction of the layer. That is, the charge sweeping layer functions as a kind of horizontal overflow drain, and can be prevented from flowing into the floating diffusion layers 121 and 122.
[0042]
FIGS. 7A and 7B are diagrams showing measurement results for verifying the effect of the charge sweeping layer 17, wherein FIG. 7A shows an output waveform when the charge sweeping layer 17 is provided, and FIG. 7B shows a case where the charge sweeping layer 17 is not provided. It is an output waveform in the case. Here, the background light component is substantially zero, and the modulated light component is accumulated only in the first floating diffusion layer 121. Therefore, the output voltage OUT2 on the second floating diffusion layer 122 side should be constant. However, in FIG. 7B, the output voltage OUT2 on the second floating diffusion layer 122 side also decreases. This is considered to be because a part of the signal charges stored in the photogate 11 when receiving the modulated light component leaks out and flows into the second floating diffusion layer 122 and is stored.
[0043]
On the other hand, in the output waveform in the case where the charge sweeping layer 17 is provided, the output voltage OUT2 to which the signal charge is not transferred hardly decreases, and the influence of the leak of the signal charge by the charge sweeping layer 17 is reduced. It can be seen that it has been removed. As a result, the influence of the leakage of the signal charge from the photogate 11 can be minimized, so that the potential of the floating diffusion layers 121 and 122 due to the leaked charge does not increase, and the dynamic range can be improved accordingly. It is valid.
[0044]
It should be noted that each of the above embodiments is merely an example, and it is apparent that modifications and modifications can be made as appropriate within the spirit of the invention. For example, although a photogate is used as the photoelectric conversion unit in the above embodiment, a photodiode or the like other than the photogate may be used as the photoelectric conversion unit.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of one pixel circuit of a solid-state imaging device according to an embodiment of the present invention.
FIG. 2 is a timing chart for explaining the operation of the solid-state imaging device according to the embodiment.
3A and 3B are diagrams illustrating a structural model (A) for simulating the solid-state imaging device according to the present embodiment and a simulation result of a potential shape during charge transfer (B).
FIG. 4 is a conceptual diagram schematically showing a potential state change in the solid-state imaging device according to the embodiment.
FIG. 5 is a graph showing measurement results showing the effect of setting the potential of a parasitic diffusion layer.
FIG. 6 is a schematic diagram of a circuit pattern of one pixel of the solid-state imaging device according to the embodiment.
FIG. 7 is a graph showing measurement results showing the effect of a charge sweeping layer.
FIG. 8 is a conceptual diagram showing a schematic configuration of an image photographing apparatus using an image sensor using the solid-state imaging device.
FIG. 9 is an operation explanatory diagram of the image photographing apparatus shown in FIG. 8;
[Explanation of symbols]
10 ... Pixel circuit
11 Photo gate
121, 122: floating diffusion layer
131, 132 ... transfer gate
141, 142: Source follower amplifier
15 Parasitic diffusion layer
16 ... MOS transistor
17 ... Charge sweeping layer

Claims (5)

A photoelectric conversion unit that receives light to generate a signal charge; a charge storage unit that stores the signal charge; and a charge transfer unit that transfers the signal charge from the photoelectric conversion unit to the charge storage unit in response to an external control signal. And an output unit that outputs a voltage corresponding to the charge stored in the charge storage unit, wherein one pixel is configured, and in a solid-state imaging device including a plurality of pixels,
A solid-state imaging device comprising: voltage applying means for applying a predetermined voltage to a parasitic diffusion layer formed between the photoelectric conversion unit and the charge transfer unit. The voltage applying unit includes a switch unit that conducts the parasitic diffusion layer and the voltage supply unit by an on operation, and a control unit that turns on the switch unit at an appropriate time before charge transfer. The solid-state imaging device according to claim 1. The solid-state imaging device according to claim 1, wherein the voltage applied by the voltage application unit is a voltage that does not affect the potential of the charge storage unit before charge transfer. The one pixel has two charge transfer units and two charge storage units for one photoelectric conversion unit, and a parasitic diffusion layer between the photoelectric conversion unit and each charge transfer unit. The solid-state imaging device according to claim 1, wherein the same voltage is applied to the solid-state imaging device. One photoelectric conversion unit, first and second charge storage units, and first and second charge transfer units for selectively transferring charges from the photoelectric conversion unit to the first and second charge storage units. One pixel includes two charge transfer units, and two first and second output units that output voltages according to the charges stored in the first and second charge storage units. In a solid-state imaging device having a plurality of the pixels,
In the circuit pattern in which the pixel is formed on a semiconductor substrate, the photoelectric conversion unit has a projecting piece projecting from substantially the center of a certain right side, and sandwiches a substantially center line of the projecting piece. And the first and second charge storage portions are disposed substantially symmetrically on both sides, and are separated on both sides with the protruding piece portion interposed between the first and second charge storage portions and the photoelectric conversion portion. A solid-state imaging device comprising a charge sweeping layer formed as described above.

Images