JP2004054904A - Memory card, system, semiconductor processor, and non-volatile memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a memory card which simplifies erase processing to shorten the entire processing time and is prevented from being illegally accessed after being discarded, and also to provide a system using the memory card. <P>SOLUTION: The system comprises a flash memory card and a host unit which is electrically connected to the flash memory and controls operation of the flash memory card, and the system has a purge command for executing the operation of erasing all information in a data area and a management information area in the flash memory besides an erase command for executing the operation of erasing information in the data area in the flash memory. When the purge command is issued from the host unit to the flash memory card once, information in all the areas in the flash memory is erased, and it is unnecessary to issue the purge command a plurality of times like the erase command. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor processing device such as a memory card and a nonvolatile memory device, and more particularly to a technology effective when applied to a flash memory card equipped with a memory such as a flash memory (flash EEPROM) and a system using the same. About.
[0002]
[Prior art]
According to the studies made by the present inventors, the following technologies can be considered for flash memory cards.
[0003]
For example, a flash memory card includes a flash memory having a data area for storing data, a controller for controlling writing, reading, and erasing operations on the data area in the flash memory. The flash memory and the controller are mounted on a mounting board. It is mounted on the top and stored in a case or the like.
[0004]
In the flash memory card configured as described above, for example, in a data erasing process as an example examined by the present inventors, a command is issued once from an external host device or the like, and a maximum of 256 sectors are designated and flashed. There is a technology that can erase data in a memory. In this technique, a maximum of 256 sectors can be designated in a single command issuance, and the host device issues a plurality of erase commands in accordance with the capacity to erase the entire data area of the flash memory.
[0005]
[Problems to be solved by the invention]
By the way, as a result of the present inventor's study on the above-mentioned flash memory card, the following has been clarified.
[0006]
For example, as described above, in order to erase the entire data area of the flash memory card, the host device needs to issue an erase command for all data sectors at most 256 times. For this reason, there is a problem that it takes a long time to complete the entire data erasing process due to the issuance of a large number of erasing commands by the host device and the overhead of increasing the number of processes.
[0007]
Further, in such a storage medium such as a flash memory card, erasing the data area alone does not mean that the information has been completely erased. It has also become a problem that unauthorized access is available, and this measure is required.
[0008]
Therefore, the inventor assumed that the flash memory card should be discarded, and furthermore, taking into account simplification of the erasing process and shortening of the processing time, the flash memory card was stored in the data area in order to prevent unauthorized access. It has been found that the management information for managing the data to be deleted also needs to be erased, and a method for erasing all the information in the data area and the management information area has been devised.
[0009]
Further, the present inventors have further studied a flash memory card in which a one-chip microcomputer for an IC card is mounted in a package. Such a flash memory card has a one-chip microcomputer for an IC card used for financial settlement or the like mounted on a flash memory card, so that the flash memory card is mounted on a portable device such as a mobile phone, for example. In this method, data that need to be stored is stored in a flash memory, and financial settlement or the like is performed by a portable device using a mounted one-chip microcomputer for an IC card.
[0010]
In such a flash memory card, information such as financial settlement information and an encryption key used for communication with a host is stored in a nonvolatile memory such as an EEPROM mounted on a one-chip microcomputer for an IC card. Such information may be stored in a flash memory. If such a flash memory card is discarded, or if the financial settlement information is illegally accessed by a person who has obtained the discarded flash memory card, personal information is leaked or economic damage is caused.
[0011]
Such information is usually stored in an access-restricted area instead of a normal data area so that the information is not easily accessed.
[0012]
Accordingly, the present invention also provides a flash memory card with a data area for preventing unauthorized access to the flash memory and the EEPROM mounted on the microcomputer chip for the IC card and improving the reliability of the flash memory card. Not only that, it is necessary to delete the access control area and the management information for managing the data stored in the access control area, and all information in the data area, the access control area, and the management information area is deleted. I figured out how to do it.
[0013]
Therefore, an object of the present invention is to provide a new command for erasing all information in the data area and the management information area, to simplify the erasing process, and to shorten the entire processing time, and to provide a memory card. It is to provide a used system.
[0014]
Another object of the present invention is to provide a memory card capable of preventing unauthorized access after discarding the memory card, and a system using the same.
[0015]
Another object of the present invention is to provide a non-volatile memory card having a function such as financial settlement of an IC card, which can prevent unauthorized access to financial settlement information and the like after discarding the memory card. , And a system using the same.
[0016]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0017]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
[0018]
According to the present invention, a data area for storing data, a memory having a management information area for storing information for managing data stored in the data area, and an operation for each area in the memory controlled by an externally supplied command The present invention is applied to a memory card having a controller and the like, and has the following features.
[0019]
(1) The command has a command for executing an operation of erasing all information in the data area and the management information area in the memory. Further, the controller has a function of repeatedly executing an operation of erasing a data area and a management information area in a memory in a predetermined block unit when a command is input once, and is particularly applied to a flash memory or the like. It is intended to be. Thus, the entire area of a memory such as a flash memory can be erased by one command input from the outside, so that the erasing process can be simplified and the overall processing time can be shortened. Become.
[0020]
(2) As a command, a first command for executing an operation of shifting from a normal state to a state before execution of erasure processing, and a command for shifting from a state before execution of erasure processing to an execution state of erasure processing, a data area and a management information area in a memory. And a second command for executing an operation of erasing all information. Further, the controller has a function of repeatedly executing an operation of erasing the data area and the management information area in the memory in a predetermined block unit when the second command is input following the first command, Particularly, the present invention is applied to a flash memory or the like. Thus, the entire area of a memory such as a flash memory can be erased only when the second command is input following the first command from the outside, so that the erasing process is not easily executed. Will be able to do it.
[0021]
In addition, the present invention is applied to a system including the memory card and a host device that supplies a command to the memory card and controls the operation of the memory card, and has the following features.
[0022]
(3) As commands, a third command for executing an operation of erasing information in the data area in the memory, and a fourth command for executing an operation of erasing all information in the data area and the management information area in the memory. It has. Further, the fourth command is a first command for executing an operation of shifting from a normal state to a state before execution of erasing processing, and a fourth command is for shifting from the state before execution of erasing processing to the state of execution of erasing processing. And a second command for executing an operation of erasing all information, and is particularly applied to a flash memory or the like. Thereby, the same processing as in the above (1) can be executed by one input of the fourth command from the host device, and by inputting the second command following the first command, the above ( The same processing as in 2) can be executed, and as a result, it is possible to cope with a case where the memory card is discarded (reuse is impossible). When the memory card is used again without being discarded, it can be handled by inputting the third command and erasing only the information in the data area of the memory.
[0023]
Further, the present invention provides a data area for storing data, a management information area for storing information for managing data stored in the data area, a function for performing a financial settlement or the like of an IC card in the memory card, A memory that stores payment information and the like and has an access-restricted area in which access is restricted in normal access of the memory card, and a management information area that stores information for managing data stored in the access-restricted area; Has a controller that controls the operation of each area in the memory by a command supplied from the same, has a microcomputer function of performing financial settlement of the IC card on the same semiconductor substrate as this controller, or on another semiconductor substrate, The operation control for the microcomputer function is also applied to the memory card performed by the controller, and the following features are provided. And it has a.
[0024]
(4) As a command, a first command for executing an operation of shifting from a normal state to a state before execution of erasure processing, and information stored in a data area in the memory and a management area for managing data stored in the data area. Command for executing the operation of erasing the memory, an access restriction area in the memory, a management area for managing data stored in the access restriction area, and a non-volatile memory such as an EEPROM formed on the same semiconductor substrate as the microcomputer function. And a sixth command for executing an operation of erasing information stored in the data area of the memory. Further, the controller repeatedly executes the operation of erasing the data area in the memory and the management information area of the data area in predetermined block units by inputting the fifth command following the first command. When the sixth command is input following the first command or the fifth command following the first command, an access-restricted area in the memory, a management information area for the access-restricted area, and a non-volatile memory such as an EEPROM. It has a function of repeatedly executing the operation of erasing the data area of the volatile memory in predetermined block units. Accordingly, when a fifth command is input following the first command from the outside, it is possible to erase the entire data area in the memory, and the fifth command following the first command or following the first command can be erased. When the sixth command is input following the above, it is possible to erase the financial settlement information and the like stored in the access restricted area and the data area of the non-volatile memory such as the EEPROM. Only one of the functions can be disabled, or both functions can be disabled.
[0025]
In addition, the present invention is applied to a system including the memory card and a host device that supplies a command to the memory card and controls the operation of the memory card, and has the following features.
[0026]
(5) As a command, a fifth command for executing an operation of erasing information stored in the data area in the memory and the management information area for the data area, and an access restriction area and an access restriction area in the memory. A management information area and a sixth command for executing an operation of erasing information stored in a data area of a nonvolatile memory such as an EEPROM. Thereby, by inputting either the fifth command or the sixth command following the first command from the host device, only one of the functions of the memory card function and the financial settlement function cannot be used. By inputting, both functions can be disabled. As a result, when an unauthorized access of the financial settlement function is detected in the host device, only the financial settlement function cannot be used, and the recurrence or expansion of the unauthorized access can be prevented. Further, when financial settlement information corresponding to a plurality of applications is provided, by erasing financial settlement information corresponding to a specific application, it is possible to prevent erroneous use of the specific application.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0028]
With reference to FIG. 1, an example of the configuration of a system using a memory card according to an embodiment of the present invention will be described. FIG. 1 shows a configuration diagram of a system using the memory card of the present embodiment.
[0029]
The system according to the present embodiment is, for example, a system using a flash memory card as an example of a memory card. The flash memory card 1 is electrically connected to the flash memory card 1, and commands are transmitted to the flash memory card 1. It comprises a host device 2 which supplies and controls the operation of the flash memory card 1.
[0030]
The flash memory card 1 includes a flash memory 11 for storing various information, a controller 12 for controlling the operation of the flash memory 11, and the like. In particular, the flash memory card 1 includes, in addition to a command (called an erase command) for executing an operation for erasing information in the data area in the flash memory 11 from the host device 2, a data area in the flash memory 11. A command (called a purge command) for executing an operation of erasing all information in the management information area is issued.
[0031]
The controller 12 includes a CPU 21 which performs arithmetic processing of the entire card, a function of controlling signals connected to the host device 2 and a register accessed by the host device 2, a control function of ECC generation and error detection / correction, a data buffer, and the like. , A user interface 22 for controlling an interface with the host device 2, a flash interface 24 for controlling an interface with the flash memory 11, and the like.
[0032]
Next, an example of a configuration of a flash memory in a flash memory card in the system according to the present embodiment will be described with reference to FIGS. FIG. 2 is a configuration diagram of a flash memory in the flash memory card, and FIG. 3 is a configuration diagram of a management information area in the flash memory.
[0033]
The flash memory 11 includes, for example, as shown in FIG. 2, a data area 31 for storing data and a management information area 32 for storing information for managing data stored in the data area 31. Although not limited to this, for example, in a 256 Mbit AND type memory cell array configuration, 2080 bytes are allocated to the data area 31 and 32 bytes are allocated to the management information area 32 per word line. 2080 bytes of the data area 31 correspond to four sectors. One sector stores 512-byte data and an 8-byte ECC code.
[0034]
Furthermore, in the flash memory 11, in addition to the data area 31 and the management information area 32, a data replacement area 33 for replacing a defective bit in the data area 31, and a management for managing information of the data replacement area 33 An information area 34, a failure / development registration block area 35 for registering the development of a defective bit, a management information area 36 for managing information of the failure / development registration block area 35, and the like are provided.
[0035]
In the management information area 32 of the data area 31, for example, as shown in FIG. 3, good / bad data determination information, sector address information, play determination information whether play-raise is possible, and the like are stored. It has become. The present invention is not limited to this. For example, when the play-raise determination information is “00h”, it indicates that data is stored in the corresponding sector and is in use, and when this sector is to be erased, By writing “FFh”, it can be determined that the state is the erased state.
[0036]
Next, an example of a processing flow based on a comparison between an erase command and a purge command in the system of the present embodiment will be described with reference to FIG. FIG. 4 is an explanatory diagram of a processing flow based on a comparison between an erase command and a purge command.
[0037]
In the case of processing using an erase command, an erase command is issued from the host device 2 to the flash memory card 1. In response to this, in the flash memory card 1, the controller 12 transfers, for example, All “FFh” data to the flash memory 11, for example, and further issues a write command. Thus, the write processing is performed in the flash memory 11.
[0038]
When performing a write process in the flash memory 11, after an erasing operation is performed in a predetermined block unit in the flash memory 11, data “FFh” to be written is written to the memory cell. In this case, since the data indicated by the threshold voltage after the erase operation of the flash memory is “FFh”, “FFh” is transferred to the flash memory as the data to be written, and the threshold voltage after the erase operation is May be transferred as write data to the flash memory.
[0039]
When the flash memory 11 has an erase command for erasing data in a predetermined block unit, an erase command may be issued instead of issuing a write command after transferring “FFh” data. In this case, the information of the block is read before issuing the erase command, and after issuing the erase command, writing back of the management information and the like is performed.
[0040]
In the case of the processing by the erase command, the processing is repeated in a predetermined block unit, and when the processing of the corresponding block is completed, the processing of the next block is sequentially performed. 1 is repeatedly issued, and the controller 12 transfers All “FFh” data to the flash memory 11 and further issues a write command, so that the write processing of the flash memory 11 is performed in block units. Executed sequentially.
[0041]
In the case of processing using a purge command, a purge command is issued from the host device 2 to the flash memory card 1 only once. In response to this, in the flash memory card 1, the controller 12 issues an erase command to the flash memory 11. At this time, the controller 12 repeats the processing in a predetermined block unit, and when the processing of the corresponding block ends, repeatedly issues an erase command in the same manner as described above in order to sequentially perform the processing of the next block. As a result, in the flash memory 11, the erase process is repeatedly issued between the controller 12 and the flash memory 11 by issuing the purge command from the host device 2 once, so that the write processing of the flash memory 11 is performed. It is executed sequentially in block units.
[0042]
As described above, when the processing by the erase command is compared with the processing by the purge command, the processing by the erase command repeatedly issues the erase command from the host device 2 to the flash memory card 1. In the processing by the purge command, the processing can be performed by issuing the purge command from the host device 2 to the flash memory card 1 once.
[0043]
Next, an example of a processing flow according to the erase command will be described in detail with reference to FIG. FIG. 5 shows a flowchart of processing by an erase command.
[0044]
First, when the process is started by issuing an erase command, it is determined whether or not the data is being written (step S11). Read defect determination information, sector address information, etc. (step S12). On the other hand, if the data is being written (YES), the management information of the corresponding block is read after the completion of the writing. Thereafter, the play-raise determination bit in the management information area 32 is checked (step S13).
[0045]
Further, as a result of the check, if the data of the corresponding block is not in the use state and the play-raise is possible, All “FFh” data is transferred to the erase target sector of the flash memory 11 (step S14), and the management information is transferred. (Step S15). Thereafter, a write command is issued to the flash memory 11 (step S16). As a result, write processing is performed on the erase target sector of the flash memory 11.
[0046]
Subsequently, it is determined whether or not there is a next sector (step S17). If there is a next sector (YES), the processing from step S11 is repeated, and if there is no next sector (NO), the process ends. It becomes.
[0047]
In the processing using the erase command as described above, since only the information in the data area 31 in the flash memory 11 is erased by the write processing, the flash memory card 1 can be used again.
[0048]
Next, an example of a processing flow according to the purge command will be described in detail with reference to FIG. FIG. 6 shows a flowchart of the processing by the purge command.
[0049]
First, when the process is started by issuing a purge command, it is determined whether or not erasing is being performed (step S21). If not, the management information of the corresponding block in the management information area 32 is read (step S22). On the other hand, when erasing is in progress, the management information of the corresponding block is read after completion. After that, an erase command is issued to the flash memory 11 (step S23). As a result, the erasing process for the erasing target sector of the flash memory 11 is performed.
[0050]
Subsequently, it is determined whether or not there is a next sector (step S24). If there is a next sector (YES), the processing from step S21 is repeated, and if there is no next sector (NO), the process ends. It becomes.
[0051]
In the processing using the purge command as described above, since all information in the data area 31 and the management information area 32 in the flash memory 11 is erased by the erasing processing, the flash memory card 1 cannot be used again.
[0052]
Next, the specifications of the purge command will be described in detail with reference to FIGS. FIG. 7 is an explanatory diagram of a state transition by a purge command, and FIGS. 8A and 8B are explanatory diagrams of a purge command.
[0053]
A purge command is different from a normal command, and is a purge command execution setting command for executing an operation for shifting from a normal state to a state before execution of erasing processing, and an erasing processing from a state before execution of erasing processing so that command processing is not easily executed. An execution command of a purge command for executing an operation for shifting to an execution state is provided, and is not executed unless the following procedure is performed. The command codes and parameters (registers SC, SN, CL, CH, DH) here are merely examples, and the present invention is not limited to these.
[0054]
(1) An arbitrary value (here, “00h”, “13h”, for example) is set in the register CL and the register CH, and a purge command execution setting command (here, command code “81h”, for example) is issued. Then, the execution setting of the purge command is performed, and the state before the command execution is set. When the execution setting command of the purge command is issued, the state shifts from the normal state to the state before the command is executed.
[0055]
(2) Immediately after the above (1), arbitrary values (here, “13h” and “00h”, for example) are set in the register CL and the register CH, and a purge command execution command (here, as an example) Command code “82h”) is issued to execute the purge command. By issuing the purge command execution command, the state shifts to the command execution state, and the purge command for erasing all information in the flash memory 11 can be executed. However, at this time, if a command other than the purge command execution command is issued, the state shifts to the normal state, and the purge command is not executed even if the purge command execution command is issued thereafter.
[0056]
Then, when the execution of the purge command is completed in the command execution state, the state shifts to the normal state.
[0057]
Therefore, according to the present embodiment, a new purge command is provided from the host device 2 to the flash memory card 1 for performing a process of erasing all areas of the flash memory 11 by issuing a single command. The entire area of the flash memory 11 can be automatically erased by issuing the purge command once without issuing the purge command a plurality of times unlike the erase command. As a result, the processing by the purge command can be simplified as compared with the erase command, and the processing time of the entire command can be reduced.
[0058]
Further, since the purge command issues a purge command execution setting command and does not transition to the command execution state unless a purge command execution command is subsequently issued, command processing cannot be easily executed unlike a normal command. It has become.
[0059]
The erase command allows the flash memory card 1 to be used again after the command issuance, whereas the purge command is used as a destruction command that disables the flash memory card 1 from being used again after the command is executed. Since the flash memory card 1 operates, unauthorized access after discarding the flash memory card 1 can be prevented.
[0060]
An example of the configuration of a system using a memory card according to another embodiment of the present invention will be described with reference to FIGS. This memory card has a financial settlement function in addition to the functions shown in FIGS. 1 to 8 as a memory card function. The memory card function is the same as the function shown in FIGS.
[0061]
The system using the memory card according to the present embodiment shown in FIG. 9 is, for example, a system using a flash memory card as an example of a memory card, and is electrically connected to the flash memory card 100 and the flash memory card 100. The flash memory card 100 includes a host device 2 that supplies a command to the flash memory card 100 and controls the operation of the flash memory card 100.
[0062]
The flash memory card 100 includes a flash memory 101 for storing various information, a controller 102 which is a control unit for controlling the operation of the flash memory 101, an IC card microcomputer 103 for performing financial settlement processing, and the like. The IC card microcomputer 103 includes an encryption processing unit for data communication with the host device 2. In particular, the flash memory 101 and the EEPROM 126 mounted on the IC card microcomputer 103 include, from the host device 2, an access-restricted area in the flash memory 101, a management information area for the access-restricted area, and a financial settlement stored in the EEPROM 126. A command (called a purge command) for executing an operation of erasing all information and the like is issued.
[0063]
The controller 102 includes a CPU 121 for controlling the arithmetic processing of the entire card, an IC card interface 125 for controlling the interface with the IC card microcomputer 103, and a command from the host device 2 in addition to the functions of the user logic 22 in FIG. When the payment is related to a payment, a user logic 122 having a control function of the IC card microcomputer 103, a host interface 123, a flash interface 124, and the like are provided.
[0064]
The system using the memory card according to the present embodiment shown in FIG. 10 is, for example, a system using a flash memory card as an example of a memory card, and is electrically connected to the flash memory card 200 and the flash memory card 200. The flash memory card 200 includes a host device 2 that supplies a command to the flash memory card 200 and controls the operation of the flash memory card 200.
[0065]
The flash memory card 200 shown in FIG. 10 is different from the flash memory card 100 shown in FIG. 9 in that the controller 102 and the IC card microcomputer 103 are formed on different semiconductor substrates, and a controller 202 formed on the same semiconductor substrate and various information. Is stored in the flash memory 201 for storing the information.
[0066]
In the controller 102 shown in FIG. 9, the IC card microcomputer 103 is connected to the user logic 122 via the IC card interface 125. In the controller 202 shown in FIG. 10, the IC card microcomputer 225 is connected to the CPU 221. . 9 has an IC card interface 125 and is therefore connected to the user logic 122. Also in FIG. 10, the IC card microcomputer 225 may be connected to the user logic 222. , The CPU 121 and the IC card interface 125 may be connected.
[0067]
Next, the specifications of the purge command will be described in detail with reference to FIGS. FIG. 11 is a timing chart of processing by a purge command, and FIG. 12 is an explanatory diagram of state transition by a purge command.
[0068]
The purge command is different from the normal command.To prevent the command processing from being executed easily, the purge command execution setting command to execute the operation of transitioning from the normal state to the state before the execution of the erasing processing, and whether or not to permit the execution of the command. It has an authentication command for determination and an execution command of a purge command for shifting from a state before execution of the erasing process to a state of execution of the erasing process, and is not executed unless the following procedure is performed. The command codes and parameters here are merely examples, and it goes without saying that the present invention is not limited to these.
[0069]
(1) Issuing of the execution setting command may be the same as the example of the purge command.
[0070]
(2) Immediately after the above (1), information for authenticating a valid access such as a password is set in the register CL and the register CH, and an authentication command is issued to perform authentication. Do. Here, when the authentication fails, the state shifts to the normal state, and the purge command is not executed even if the execution command of the purge command is issued thereafter. Although not particularly limited, the same response may be issued to the host device 2 regardless of whether authentication has succeeded or failed. By doing so, even if it is an unauthorized access to illegally obtain authentication information such as a personal identification number, even if authentication is successful, the fact can not be run with this authentication command, and the trust of the flash memory card It can contribute to the improvement of performance.
[0071]
(3) Immediately after successful authentication, following the above (2), an arbitrary value is set in the register CL and the register CH, a purge command execution command is issued, and the purge command is executed.
[0072]
However, at this time, if a command other than the purge command execution command is issued, the state shifts to the normal state, and the purge command is not executed even if the purge command execution command is issued thereafter.
[0073]
Then, when the execution of the purge command is completed in the command execution state, the state shifts to the normal state.
[0074]
A specific operation of the purge command will be described after FIG. Although the description will be made based on the system of FIG. 9, it goes without saying that there is no particular change in the system of FIG. In each of the examples shown in FIG. 13 and subsequent figures, when the execution command of the purge command is issued, the determination may be made based on the difference between the values set in the register CL and the register CH, or the command code may be different.
[0075]
FIG. 13 shows an example in which all or a part of the information stored in the EEPROM 126 mounted on the IC card microcomputer 103 is deleted by executing the purge command.
[0076]
After receiving the execution setting command of the purge command from the host device 2, the CPU 121 determines whether or not the access is valid based on the authentication command issued by the host device 2 (1). If the access is authenticated, the host device 2 deletes all the information stored in the EEPROM 126 in response to the execution command of the purge command (2). The erasing operation is performed by controlling the CPU or the controller included in the IC card microcomputer to perform the erasing operation sequentially, or by the CPU 121 directly controlling the erasing operation on the EEPROM 126.
[0077]
By erasing all information such as the financial settlement information and the encryption key stored in the EEPROM 126, the financial settlement function of the flash memory card cannot be used again. When information corresponding to a plurality of applications is stored in the EEPROM 126, for example, when one flash memory card 100 has financial settlement functions of different financial institutions, some of the For example, when the contract is canceled, only the financial settlement function related to the application cannot be used again.
[0078]
FIG. 14 shows an example in which part or all of the information stored in the EEPROM 126 mounted on the IC card microcomputer 103 and part or all of the information stored in the flash memory 101 are erased by executing the purge command. It is.
[0079]
By erasing all information stored in the EEPROM 126 and all information stored in the flash memory 101 (2, 3), both the memory card function and the financial settlement function of the flash memory card are used again. You can't do that.
[0080]
When information corresponding to a plurality of applications is stored in the EEPROM 126 and additional information is also stored in the flash memory 101 according to each application, all of the information stored in the EEPROM 126 is By erasing all of the additional information stored in the flash memory 101, the financial settlement function of the flash memory card cannot be used again.
[0081]
Further, by erasing information corresponding to a part of the application from the EEPROM 126 and additional information corresponding to the part of the application from the flash memory 101, only the financial settlement function related to the application can be used again. Disappears.
[0082]
FIG. 15 shows an example in which all or a part of the information stored in the flash memory 101 is erased by executing the purge command. Note that (1) to (5) in the figure correspond to steps S31 to S35 in FIG. 16 described later, respectively.
[0083]
The flash memory 101 or the EEPROM 126 may be configured to store attribute information of the IC card microcomputer, for example, information such as a transfer method and a transfer rate. When the financial settlement function of the IC card microcomputer is used, the IC card microcomputer communicates with the host device 2 using the attribute information. By deleting such information by executing the purge command, the host device 2 cannot recognize the IC card microcomputer and cannot use the financial settlement function of the flash memory card again.
[0084]
FIG. 16 shows an example of reset processing of the IC card microcomputer.
[0085]
In step S31, the IC card microcomputer acquires the attribute information of the IC card microcomputer stored in the flash memory 101 or the EEPROM 126, and performs an initialization operation of the IC card microcomputer in step S32. In step S33, transfer frequency setting and the like are performed based on the attribute information acquired in step S31. In step S34, it is determined whether or not the IC card microcomputer is operating normally. If the IC card microcomputer is operating normally, a command waiting state is set.
[0086]
If the attribute information of the IC card microcomputer has been erased, the frequency setting and the like cannot be performed in step S33. Therefore, in step S34, it is not determined that the IC card microcomputer is operating normally. Then, the IC card microcomputer is inactivated, and the external host device 2 cannot recognize the IC card microcomputer because there is no response from the IC card microcomputer.
[0087]
Further, the order of the acquisition of the attribute information in step S31 and the initialization operation of the IC card microcomputer in step S32 may be reversed.
[0088]
As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and can be variously modified without departing from the gist thereof. Needless to say.
[0089]
For example, in the above embodiment, a flash memory has been described as an example of a memory, but the present invention can be applied to a nonvolatile memory such as an EEPROM.
[0090]
Further, the present invention is effective when applied to a flash memory card as described above, but can be widely applied to all devices such as a memory module and a memory device equipped with a flash memory, a nonvolatile memory, and the like. .
[0091]
【The invention's effect】
The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.
[0092]
(1) By having a command for executing an operation of erasing all information in the data area and the management information area in the memory, the memory is not issued multiple times as in the erase command, but is issued by the command once. Can be erased, the erasing process can be simplified, and the overall processing time can be shortened.
[0093]
(2) A first command for executing the operation of shifting from the normal state to the state before the execution of the erasing process, and the first command for shifting from the state before the execution of the erasing process to the state of the erasing process, and all the data areas and the management information areas in the memory By having the second command for executing the operation of erasing information, the entire area of the memory can be erased only when the second command is input following the first command, so that the erasing process is simplified. Can be prevented from being executed.
[0094]
(3) By erasing the entire area of the memory after executing the command, the memory card cannot be used again as a memory card. Therefore, it is possible to prevent unauthorized access after discarding the memory card.
[0095]
(4) In a flash memory card having a financial settlement function such as an IC card microcomputer, by erasing all or a part of financial settlement information stored in an EEPROM or a flash memory mounted on the IC card microcomputer, the memory card is erased. It is not possible to use all of the financial settlement functions of this application or the financial settlement function for a specific application, so that unauthorized access after discarding this memory card can be prevented, or prevention of misuse of the specific application. It becomes possible.
[0096]
(5) The host device not only issues a purge command in accordance with an instruction from the user, but also performs an operation that seems to be intended for unauthorized access, for example, repeated input of authentication information such as an incorrect password. In this case, a purge command may be issued. By issuing the purge command, it becomes impossible to use the financial settlement function of the flash memory card, and it is possible to prevent continuation or expansion of unauthorized access. In addition, when an operation that seems to be intended for such unauthorized access is repeated, not only the instruction from the host device but also the controller of the flash memory card detects it and issues a purge command internally. You may make it.
[Brief description of the drawings]
FIG. 1 is a configuration diagram showing a system using a memory card according to an embodiment of the present invention.
FIG. 2 is a configuration diagram showing a flash memory in a flash memory card in the system according to the embodiment of the present invention;
FIG. 3 is a configuration diagram showing a management information area in a flash memory in the system according to the embodiment of the present invention;
FIG. 4 is an explanatory diagram showing a processing flow based on a comparison between an erase command and a purge command in the system according to the embodiment of the present invention;
FIG. 5 is a flowchart showing processing by an erase command in the system according to the embodiment of the present invention;
FIG. 6 is a flowchart showing processing by a purge command in the system according to the embodiment of the present invention;
FIG. 7 is an explanatory diagram showing a state transition by a purge command in the system according to the embodiment of the present invention.
FIGS. 8A and 8B are explanatory diagrams showing a purge command in the system according to the embodiment of the present invention.
FIG. 9 is a configuration diagram showing a system using a memory card according to another embodiment of the present invention.
FIG. 10 is a configuration diagram showing a system using a memory card according to another embodiment of the present invention.
FIG. 11 is a timing chart showing processing by a purge command in a system according to another embodiment of the present invention.
FIG. 12 is an explanatory diagram showing a state transition by a purge command in a system according to another embodiment of the present invention.
FIG. 13 is an explanatory diagram showing an example of erasing information in an EEPROM mounted on an IC card microcomputer by executing a purge command in a system according to another embodiment of the present invention.
FIG. 14 is an explanatory diagram showing an example of erasing information in an EEPROM mounted on an IC card microcomputer and information in a flash memory by executing a purge command in a system according to another embodiment of the present invention.
FIG. 15 is an explanatory diagram showing an example of erasing information in a flash memory by executing a purge command in a system according to another embodiment of the present invention.
FIG. 16 is a flowchart showing an example of reset processing of an IC card microcomputer in a system according to another embodiment of the present invention.
[Explanation of symbols]
1,100,200 Flash memory card
2 Host device
11, 101, 201 Flash memory
12, 102, 202 Controller
21, 121, 221 CPU
22, 122, 222 User logic
23, 123, 223 Host interface
24, 124, 224 flash interface
31 Data area
32 Management information area
33 Data replacement area
34 Management information area
35 Defective / expanded registration block area
36 Management information area
103,225 IC card microcomputer
125 IC card interface
126,226 EEPROM

Claims (21)

A data area for storing data, a memory having a management information area for storing information for managing data stored in the data area,
A controller for controlling the operation of each area in the memory by a command supplied from the outside,
A memory card having a command for executing an operation of erasing all information in the data area and the management information area in the memory as the command. The memory card according to claim 1,
The controller has a function of repeatedly executing an operation of erasing the data area and the management information area in the memory in a predetermined block unit when the command is input once. Memory card. The memory card according to claim 1,
The memory card, wherein the memory is a flash memory. A data area for storing data, a memory having a management information area for storing information for managing data stored in the data area,
A controller for controlling the operation of each area in the memory by a command supplied from the outside,
As the command, a first command for executing an operation of shifting from a normal state to a state before execution of erasure processing, and a command for shifting from the state before execution of erasure processing to an execution state of erasure processing, A second command for executing an operation of erasing all information in the area. The memory card according to claim 4,
A function of repeatedly executing an operation of erasing the data area and the management information area in the memory in a predetermined block unit by inputting the second command following the first command. A memory card comprising: The memory card according to claim 4,
The memory card, wherein the memory is a flash memory. A data area for storing data, a memory having a management information area for storing information for managing data stored in the data area, and a controller for controlling operation of each area in the memory by a command supplied from the outside. A memory card comprising:
A host device that supplies a command to the memory card to control the operation of the memory card,
As the command, a third command for executing an operation of erasing information in the data area in the memory, and a third command for executing an operation of erasing all information in the data area and the management information area in the memory. And four commands. The system according to claim 7,
The fourth command is a first command for executing an operation of shifting from a normal state to a state before execution of erasure processing, and a fourth command is for shifting from a state before execution of erasure processing to an execution state of erasure processing, A second command for executing an operation of erasing all information in the management information area. The system according to claim 7,
The system according to claim 1, wherein the memory is a flash memory. A control unit;
An encryption processing unit;
A first nonvolatile memory having a plurality of nonvolatile memory cells and storing encryption processing information,
The semiconductor processing device according to claim 1, wherein the control unit sets each nonvolatile memory cell of the first nonvolatile memory to a first state in response to a first command from the outside. The semiconductor processing device according to claim 10,
The control unit is capable of connecting a second nonvolatile memory,
The second nonvolatile memory has a plurality of word lines, and each word line has a plurality of nonvolatile memory cells included in a first region and a second region,
The control unit sequentially selects a plurality of word lines of the second nonvolatile memory in response to a second command from the outside, and stores a plurality of nonvolatile memory cells included in the first area and the second area in the first area. A semiconductor processing apparatus, wherein the semiconductor processing apparatus is set to one state. The semiconductor processing device according to claim 11,
The encryption processing unit and the first nonvolatile memory are formed on one semiconductor substrate,
The control unit is formed on one different semiconductor substrate,
The semiconductor processing apparatus according to claim 1, wherein the second nonvolatile memory is formed on another different semiconductor substrate. A first semiconductor processing device;
A second semiconductor processing device;
A first nonvolatile memory connected to the first semiconductor processing device;
The second semiconductor processing device has a second nonvolatile memory,
The first semiconductor processing device receives a plurality of commands from the outside,
In response to the input of the first command, the first semiconductor processing device performs control for erasing all storage information of the first nonvolatile memory,
The non-volatile memory device according to claim 1, wherein the first semiconductor processing device performs control for erasing all storage information in the second non-volatile memory in response to input of a second command. The nonvolatile memory device according to claim 13,
The first command has a first processing command and a second processing command,
The first semiconductor processing device transitions from a first state to a second state according to the first processing command,
The non-volatile memory device, wherein the first semiconductor processing device that has transitioned to the second state performs control for erasing all stored information in the first non-volatile memory by a second processing command. The nonvolatile memory device according to claim 14,
The second command has a first processing command, a third processing command, and a fourth processing command,
The first semiconductor processing device that has transitioned to the second state transitions from the second state to the third state according to the case where the result of the third processing command is the first result, and the result of the third processing command is the second result. Transits from the second state to the first state depending on the result,
The non-volatile memory device according to claim 1, wherein the first semiconductor processing device that has transitioned to the third state performs control for erasing all stored information in the second non-volatile memory by a fourth processing command. The nonvolatile memory device according to claim 15,
The non-volatile memory device according to claim 2, wherein the second semiconductor processing device is a semiconductor processing device for an IC card. A first semiconductor processing device;
A first non-volatile memory,
The first semiconductor processing device controls a first control unit that controls access to the first nonvolatile memory, a second nonvolatile memory, and controls access to the second nonvolatile memory. A second control unit, formed on one semiconductor substrate,
The first semiconductor processing device receives a plurality of commands from the outside,
In response to the input of the first command, the first control unit performs an erase operation control of information stored in the first nonvolatile memory,
The non-volatile memory device according to claim 2, wherein the second control unit controls an erasing operation of information stored in the second non-volatile memory in response to input of a second command. The nonvolatile memory device according to claim 17,
The first nonvolatile memory and the second nonvolatile memory each include a plurality of nonvolatile memory cells,
Each of the nonvolatile memory cells has a threshold voltage, and is controlled to be within one of a plurality of threshold voltage distributions,
A threshold voltage distribution of 1 indicates an erased state, other threshold voltage distributions indicate a written state,
The nonvolatile memory device according to claim 1, wherein the erase operation control controls a threshold voltage of the nonvolatile memory cell to be within a threshold voltage distribution indicating an erased state. The nonvolatile memory device according to claim 18,
The nonvolatile memory device according to claim 1, wherein the first control unit controls an erasing operation of all the stored information in the first nonvolatile memory in response to the input of the first command. The nonvolatile memory device according to claim 18,
In response to the input of the second command, the second control unit controls the erasing operation of all the stored information of the second nonvolatile memory and the erasing of a part of the stored information of the first nonvolatile memory. A nonvolatile memory device that performs operation control. The nonvolatile memory device according to claim 18,
In response to the input of the second command, the second control unit controls the erasing operation of a part of the storage information of the second nonvolatile memory and the control of the erasing of a part of the storage information of the first nonvolatile memory. A nonvolatile memory device, which performs erasing operation control.

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