JP2004032095A - Pulse width modulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pulse width modulator for reducing distortions in a pulse width modulation signal resulting from the pulse width modulation. <P>SOLUTION: The pulse width modulator includes a comparator 21 for modulating the pulse width of a signal of "1" with a center of the center time point during predetermined period to generate a first pulse width modulation signal, a comparator 22 for modulating the pulse width of the signal of "0" with a center of the center time point during predetermined period, and a selecting circuit 23 for switching and generating each pulse width modulation signal generated from the comparators 21 and 22. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention is used for a device such as a digital audio device having a function of converting digital data into analog data, and before demodulating the digital data into analog data, sets the pulse width of the digital data in accordance with the amplitude of the analog data. The present invention relates to a modulating pulse width modulator.
[0002]
[Prior art]
Digital amplifiers or amplifiers that use a digital-to-analog conversion method called 1-bit amplifiers are widely used because of their excellent conversion efficiency and the feasibility of integrated circuits. It is also expected to be applied to portable devices.
[0003]
For example, as shown in FIG. 12, in a conventional digital audio apparatus 101 using the above-described digital amplifier, a digital data string input from a sound source 102 includes an oversampling filter 111, a noise shaper 112, and a pulse as a pulse width modulator. The signal is demodulated into an analog signal through a width modulation circuit 113, a switching amplifier 114, and a low-pass filter (LPF) 115, and is reproduced by the speaker 103.
[0004]
That is, the digital data string from the sound source 102 is input to the noise shaper 112 after the digital data string is interpolated by the oversampling filter 111. Here, if the oversampling filter 111 is an eight-times oversampling filter, for example, eight times the sampling frequency (FS) of the digital data string, that is, if FS = 44.1 kHz, 44.1 kHz × 8 The digital data after interpolation is supplied to the noise shaper 112 at a rate of = 352.8 kHz.
[0005]
The noise shaper 112 performs a noise shaping process on the input digital data sequence, and then supplies the digital data sequence to a pulse width modulation circuit 113 at a subsequent stage. Here, if the noise shaper 112 is a seventh-order noise shaper, the digital data sequence is quantized into 47 levels and supplied to the pulse width modulation circuit 113.
[0006]
In the pulse width modulation circuit 113, the input data is converted into 1-bit data expressed by binary “1” or “0”. The pulse width modulation circuit 113 includes a comparator 121 and a counter 122. In the comparator 121, the pulse width of data from the noise shaper 112 is increased or decreased by one cycle of the master clock from the counter 122. As a result, a pulse signal having a 47-step pulse width corresponding to the input data is generated, and this pulse signal is output to the switching amplifier 114 as 1-bit data (PMW signal).
[0007]
The output pattern of the PWM signal of the pulse width modulation circuit 113 is, for example, a PWM output pattern as shown in FIG. 3, which is an explanatory diagram of the present invention. Here, a frequency eight times the sampling frequency is a repetition frequency of the output of the PWM signal. The counter output of the counter 122 during the repetition frequency of the PWM signal is 96 counts from 0 to 95. Then, the period of “1” is extended symmetrically around the center time point A (between the counter outputs 47 and 48) of the repetition period of the PWM signal by one period of the master clock, and the pulse width of the pulse signal having a different pulse width is changed. A PWM signal of the pattern is generated. The frequency of the master clock at this time is sampling clock (FS) × 8 × 48 × 2 = 44.1 × 8 × 48 × 2 = 33.8688 MHz.
[0008]
The PWM signal thus obtained is pulse-amplified by a switching amplifier 114 at a subsequent stage, and then a high-frequency component is removed by a low-pass filter 115. Thereby, the signal indicated by the digital data string from the sound source 102 is demodulated, and the analog signal demodulated by the speaker 103 is reproduced.
[0009]
Here, the data output cycle of the oversampling filter 111 and the pulse cycle of the PWM signal are set to be sufficiently short so that the demodulated analog signal does not have waveform distortion. Therefore, the digital audio device 101 can reproduce a high-quality audio signal with sufficiently small waveform distortion on the speaker 103.
[0010]
[Problems to be solved by the invention]
As described above, when data sampled at regular time intervals is expressed by a pulse width, that is, when pulse width modulation is performed, distortion occurs in the PWM signal due to the pulse width modulation. As a method of removing this distortion, it is conceivable to increase the multiple of oversampling and shorten the period of the pulse after PWM conversion. However, oversampling or PWM conversion processing per unit time is inversely proportional to the PWM pulse period. It increases and requires a high-speed operation clock. For this reason, it becomes an obstacle when the digital amplifier is formed into an integrated circuit, and may cause an increase in power consumption.
[0011]
Further, with the increase in the speed of the operation clock, the number of switching operations of the switching amplifier that receives the pulse after the PWM conversion increases, which causes a problem of further increasing power consumption.
[0012]
In addition, the necessity for measures against noise generated by high-speed switching increases, and it is expected that it is very difficult to ensure audio performance. That is, in the digital audio device 101, when the amount of noise generated increases, audio performance cannot be secured unless sufficient noise countermeasures are taken. Therefore, it becomes difficult to reproduce a high quality audio signal.
[0013]
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to reduce the pulse width of a PWM signal caused by pulse width modulation without increasing power consumption and the amount of noise generated. It is to provide a modulator.
[0014]
[Means for Solving the Problems]
In order to solve the above problem, a pulse width modulator of the present invention converts the pulse width of a binary signal “1” and “0” obtained by modulating an analog signal into the amplitude of the analog signal. A pulse width modulator that modulates the pulse width of the signal of “1” around a center time point of a predetermined period to generate a first pulse width modulation signal; A second signal generator for generating a second pulse width modulated signal by modulating a pulse width of the "0" signal around a center time point of a predetermined period; the first signal generator and the second signal Signal switching output means for switching and outputting each pulse width modulation signal generated by the generation means.
[0015]
According to the above-described configuration, the first pulse width modulation signal generated by adjusting the pulse width of the “1” signal and the pulse width of the “0” signal, in which the directions in which the distortions are generated are opposite, are set. By switching and outputting the adjusted and generated second pulse width modulation signal, it is possible to prevent the distortion of the output pulse width modulation signal from occurring in a certain direction. In other words, it is possible to output a pulse width modulation signal in which the direction in which the distortion occurs changes alternately.
[0016]
By alternately changing the direction in which the distortion is generated, the period of the distortion component of the output pulse width modulation signal can be shortened, so that the distortion component can be moved to a higher frequency band. It becomes.
[0017]
This makes it possible to make the distortion caused by the pulse width modulation higher than a certain frequency band, for example, an audible band, so that the distortion can be shifted to a frequency standby higher than the audible band in a frequency band where there is no practical problem. it can. As a result, distortion in the audible band can be completely removed by the low-pass filter, so that distortion of the pulse width modulation signal caused by pulse width modulation can be reduced.
[0018]
Therefore, it is not necessary to shorten the pulse period in order to reduce the distortion, so that problems such as an increase in power consumption and an increase in the amount of noise generated by shortening the pulse period do not occur. That is, it is possible to reduce the distortion of the pulse width modulation signal caused by the pulse width modulation without increasing the power consumption and the amount of generation of noise.
[0019]
When the first pulse width modulation signal is generated by the first signal generation means, the pulse width of the signal "1" may be expanded symmetrically around the center time point of the predetermined period. Also, when the second pulse width modulation signal is generated by the second signal generation means, the pulse width of the "0" signal is narrowed symmetrically around the center time point of the predetermined period. You may do so.
[0020]
In this case, the first pulse width modulation signal is a signal in which the pulse width of the signal of "1" is sequentially increased, and the second pulse width modulation signal is a signal in which the pulse width of the signal of "0" is sequentially reduced. Signal. That is, it is possible to generate two types of pulse width modulation signals having the same contents in which the directions in which distortion occurs are opposite to each other.
[0021]
Thereby, even if each pulse width modulation signal is switched at an appropriate timing, distortion due to the pulse width modulation signal can be reduced without affecting the reproduction signal.
[0022]
For example, the signal switching output means may alternately output the pulse width modulation signals generated by the first signal generation means and the second signal generation means for each sampling period of the analog signal. Good.
[0023]
In this case, the pulse width modulation signal is switched at each point where distortion due to pulse width modulation occurs, that is, at each repetition position according to the sampling period of the analog signal, so that the pulse width modulation signal output from the pulse width modulator is output. Can be almost eliminated.
[0024]
For example, if the switching timing of the pulse width modulation signal is performed at each repetition position of the sampling period of the analog signal as described above, the distortion of the pulse width modulation signal can be almost eliminated as described above. The switching operation in the switching output unit becomes frequent, which may be disadvantageous in terms of power consumption.
[0025]
Therefore, if the switching timing of the pulse width modulation signal is set not at the repetition cycle of the sampling cycle of the analog signal but at a certain repetition cycle, it is not necessary to frequently perform the switching operation in the signal switching output means. In addition, it is possible to suppress an increase in power consumption.
[0026]
However, also in this case, if the number of repetition cycles of the switching timing increases, the distortion due to the pulse width modulation may increase. Therefore, the number of repetition periods is considered in consideration of the magnitude of the generated distortion and power consumption. Is preferably determined.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described below. In this embodiment, an example in which the pulse width modulator is mounted on a digital audio device such as a CD (Compact Disc), an MD (Mini Disc), a DVD (Digital Versatile Disc), or the like will be described.
[0028]
FIG. 1 is a block diagram schematically illustrating a digital audio device according to the present embodiment. As shown in FIG. 1, the digital audio apparatus 1 outputs an analog signal corresponding to a digital signal from a sound source 2 to a speaker 3, and outputs an oversampling signal from an input side of the digital signal from the sound source 2. The configuration is such that a filter 11, a noise shaper 12, a pulse width modulation circuit (pulse width modulator) 13, a switching amplifier 14, and a low-pass filter (LPF) 15 are connected in series.
[0029]
The oversampling filter 11 interpolates between digital data whose sampling frequency input from the sound source 2 is FS, for example, by performing an interpolation operation on the basis of the input digital data sequence, so that the sampling frequency FS is higher than the sampling frequency FS. A high-frequency digital data string is output to the noise shaper 12. In the present embodiment, an example in which an 8 × oversampling filter is used as the oversampling filter 11 will be described. In this case, the frequency of the digital data string output to the noise shaper 12 is eight times the sampling frequency FS.
[0030]
The noise shaper 12 performs a noise shaping process on the input digital data sequence, and outputs quantized digital data to the pulse width modulation circuit 13. Details of the noise shaper 12 will be described later.
[0031]
The pulse width modulation circuit 13 converts the binary signal of “1” and “0” from the sound source 2 obtained by modulating the analog signal, that is, the pulse width of the quantized digital data from the noise shaper 12. The signal is modulated in accordance with the amplitude of the analog signal, and is output to the subsequent switching amplifier 14 as a 1-bit PWM signal. Details of the pulse width modulation circuit 13 will be described later.
[0032]
The switching amplifier 14 amplifies a pulse of the PWM signal from the pulse width modulation circuit 13 and is provided, for example, between a power supply line maintained at a high-level potential (for example, a power supply potential) and an output terminal. A first switching element that is turned on / off in response to the PWM signal; a power supply line that is maintained at a low-level potential (for example, a ground level); and the output terminal; The PWM signal is pulse-amplified and output to a low-pass filter 15 at a subsequent stage.
[0033]
The low-pass filter 15 removes high frequency components from the pulse-amplified PWM signal from the switching amplifier 14 to generate an analog signal. The generated analog signal is reproduced by the speaker 3.
[0034]
In the digital audio apparatus 1, an example has been described in which the speaker 3 is used as a reproducing unit for reproducing an analog signal obtained by modulating a digital signal from the sound source 2. However, the reproducing unit for reproducing an analog signal is, of course, used. If so, other devices such as headphones may be used in addition to the speaker 3.
[0035]
In the present embodiment, the sampling frequency FS of the digital signal output from the sound source 2 is, for example, 44.1 [kHz]. The output rate of the oversampling filter 11 is set to a value at which the noise shaper 12 can convert the number of quantization values with sufficient accuracy. For example, in the case of digital data from a CD, the bit width is 16 bits). In this embodiment, the noise shaper 12 is a seventh-order noise shaper, and outputs digital data quantized in 47 stages. ing. The output rate of the oversampling filter 11 is set to eight times the sampling frequency FS, that is, 352.8 [kHz].
[0036]
Here, the noise shaper 12 and the pulse width modulation circuit 13 according to the present embodiment will be described below.
[0037]
First, the noise shaper 12 will be described below with reference to FIG. FIG. 2 is a block diagram of the noise shaper 12.
[0038]
As shown in FIG. 12, the noise shaper 12 is a delta-sigma modulation circuit, for example, a seventh-order noise shaper provided with seven integrators 31a to 31g. That is, the noise shaper 12 cascade-connects the integrators 31 a, the adder 32 that adds the outputs of the integrators 31 a, and quantizes the output of the adder 32. A quantizer 33 that outputs a quantization result; and a subtractor that subtracts the quantization result transmitted via the delay unit 34 from an input signal to the noise shaper 12 and inputs the subtraction result to the first-stage integrator 31a. 35.
[0039]
The integrator 31a includes a multiplier 41 for multiplying an input signal of the integrator 31a by a predetermined coefficient, a delay unit 42 for delaying an output of the integrator 31a, an output of the multiplier 41 and an output of the delay unit 42. And an adder 43 that outputs the addition result as an output of the integrator 31a, and can output a value obtained by integrating the input signal. The subsequent integrators 31b are configured in the same manner as the first-stage integrator 31a. Further, in the present embodiment, the adder 32 adds the signals obtained by amplifying the outputs of the respective integrators 31a..., And each of the integrators 31a. . Are provided.
[0040]
Further, the quantizer 33 according to the present embodiment quantizes the output of the adder 32 into 47 levels, and outputs digital data indicating one of the levels to the pulse width modulation circuit 13.
[0041]
Further, the sampling frequency of the quantizer 33 is set to the same value as the sampling frequency of the oversampling filter 11. Note that the sampling frequency of the quantizer 33 is the repetition frequency of the output of the PWM signal.
[0042]
Here, as described above, the sampling frequency of the oversampling filter 11 is set to a value that allows the noise shaper 12 to convert the number of quantization values with sufficient accuracy, for example, eight times the sampling frequency FS. I have. Accordingly, the noise shaper 12 converts the digital data (for example, digital data having a bit width of 16 bits in the case of digital data from a CD) input to the noise shaper 12 into a quantization signal suitable for the pulse width modulation circuit 13. It can be converted into a digital signal of the number of values (for example, 47 levels) with a small error. It should be noted that the noise shaping process gives differential characteristics to the quantization error. Therefore, by setting the sampling frequency of the noise shaper 12 sufficiently high, a wide dynamic range can be obtained even with a small number of bits.
[0043]
As shown by the broken line in FIG. 2, in order to form a dip in the quantization noise distribution (noise floor) of the output of the noise shaper 12 and adjust the quantization noise distribution shape to a desired shape, The noise shaper 12 may be provided with a negative feedback path.
[0044]
In the example of FIG. 2, a negative feedback path 61 for negatively feeding the output of the third-stage integrator 31c to the input of the second-stage integrator 31b, and integrating the output of the fifth-stage integrator 31e with the fourth-stage integrator 31e A negative feedback path 62 for negatively feeding back to the input of the integrator 31d and a negative feedback path 63 for negatively feeding back the output of the seventh-stage integrator 31g to the input of the sixth-stage integrator 31f are shown. Each of the negative feedback paths 61 (62 and 63) includes a delay unit 42 of the integrator 31c (31e and 31f) and a multiplier 71 (72 and 73) for the negative feedback path 61 (62 and 63). Have been. When these multipliers 71 are provided and the negative feedback paths 61 are formed, the quantization noise level is sharply centered on the frequency (zero point frequency) corresponding to the gain of the loop including each of the negative feedback paths 61. descend.
[0045]
Here, in the frequency characteristic of the quantization noise, a portion where the level is reduced is referred to as a dip, and the dip formed by each of the negative feedback paths 61 suppresses the high-frequency quantization noise. The level of the quantization noise can be kept below a predetermined value up to an upper limit frequency of a desired use frequency band such as 20 kHz.
[0046]
In the above description, an example has been described in which the input signal to the noise shaper 12 is a digital signal, and the members 31a to 35 of the noise shaper 12 are implemented by digital circuits. The members 31a to 35 may be realized by analog circuits.
[0047]
Next, the pulse width modulation circuit 13 will be described below with reference to FIGS. FIG. 3 and FIG. 4 are waveform diagrams showing a pattern of the PWM conversion output in which the pulse width is modulated in the pulse width modulation circuit 13.
[0048]
As shown in FIG. 1, the pulse width modulation circuit 13 modulates the pulse width of the “1” signal of the digital signals from the noise shaper 12 to generate a first pulse width modulation signal. A comparator 21 as a means, a comparator 22 as a second signal generating means for modulating the pulse width of the signal of “0” to generate a second pulse width modulated signal, and a comparator 21 and 21 A selection circuit 23 as signal switching output means for switching and outputting each pulse width modulation signal to be output, a counter 24 for supplying a counter output to the comparators 21 and 22, and a selection signal to the selection circuit 23 And a frequency dividing circuit 25.
[0049]
In this embodiment, for convenience of explanation, a signal of “1” will be referred to as a high-level pulse, and a signal of “0” will be referred to as a low-level pulse.
[0050]
The pulse width modulation circuit 13 outputs a PWM signal having a designated pulse width and a fixed period of time between the center positions of the high-level and low-level pulses. The PWM signal output from the pulse width modulation circuit 13 includes a first pulse width modulation signal that gradually increases the high-level pulse width generated by the comparator 21 and a low-level pulse generated by the comparator 22. This is a signal obtained by alternately switching any one of the second pulse width modulation signals whose width is gradually narrowed by the selection circuit 23.
[0051]
At this time, the 8 × oversampling synchronous clock and the master clock are input to the counter 24, and a counter output is generated with reference to these clocks. The eight-times oversampling synchronous clock indicates a cycle eight times the sampling cycle, and this cycle is a pulse repetition cycle. The eight-times oversampling synchronous clock is also supplied to the frequency dividing circuit 25.
[0052]
As described above, the digital signal from the noise shaper 12 is data quantized into 47 stages, and the interval for expanding the pulse width of the PWM signal is one cycle of the master clock (corresponding to one unit of the counter output). Therefore, as shown in FIGS. 3 and 4, when the interval between the counter outputs 47 and 48 is set to the center time point A of the repetition period and the counter output is set to B, the comparator 21 compares A and B with each other. Referring to FIG. 3, the high-level pulse width of the digital signal from the noise shaper 12 is extended by one period of the master clock to generate a PWM signal of 47 patterns (FIG. 3), and the comparator 22 compares A and B with each other. With reference to this, the low-level pulse width of the digital signal from the noise shaper 12 is reduced by one period of the master clock to generate a PWM signal of 47 patterns (FIG. 4).
[0053]
When the PWM signal shown in FIG. 3 is output in a time series, it becomes like a PWM conversion output (1) shown in FIG. 8, and when the PWM signal shown in FIG. 4 is output in a time series, the PWM conversion output shown in FIG. It becomes like (2). In the present application, the two types of digital signals shown in FIGS. 3 and 4 are not output as PWM signals as they are, but the selector circuit 23 switches the digital signals shown in FIGS. It is supposed to. For example, it is output as a PWM signal such as a PWM conversion output (3) or (4) shown in FIG. The selection circuit 23 switches the PWM signal based on the selection signal from the frequency dividing circuit 25. Details of the switching of the PWM signal and details of the operation and effect of the switching will be described later.
[0054]
By the way, when converting multi-valued data (including analog data) into a 1-bit PWM signal, as shown in FIG. 3, it is symmetrical around the center time point A of the repetition period according to the input data. In accordance with the PWM conversion output pattern in which the period of “1” is extended by one master clock period, and as shown in FIG. In general, a PWM conversion output pattern in which the period of “0” is narrowed by one master clock period.
[0055]
However, no matter which of the PWM conversion output pattern (hereinafter, referred to as a first PWM pattern) shown in FIG. 3 and the PWM conversion output pattern (hereinafter, referred to as a second PWM pattern) shown in FIG. (Pulse width), a second-order distortion is generated. Note that these two types of patterns are distorted in different directions (distorted in opposite directions). Hereinafter, the phenomenon and the cause of the distortion occurring in the conversion will be described. For the sake of simplicity, the explanation will be made with the noise shaper processing omitted.
[0056]
Here, FIG. 5 is a diagram showing a difference between an input original waveform and a waveform reproduced by performing analog processing on a signal after PWM conversion. W0 in FIG. 5 is an original waveform, W1 is a waveform of a signal reproduced by performing analog processing on the signal of the first PWM pattern shown in FIG. 3, and W2 is a waveform of a signal reproduced by performing analog processing on the signal of the second PWM pattern shown in FIG. The waveform is shown.
[0057]
That is, the waveform W1 is a waveform after the 1-bit PWM signal of the first PWM pattern is subjected to the above-mentioned switching amplifier and low-pass filter processing. The waveform W2 is a waveform of the 1-bit PWM signal of the second PWM pattern, It is a waveform after performing an amplifier and a low-pass filter process.
[0058]
FIG. 5 shows that the difference between the original waveform W0 and the waveforms W1 and W2 increases as the level change amount increases. That is, it can be seen that the higher the frequency of the signal, the more significant the waveform distortion becomes.
[0059]
The principle of the generation of this distortion will be described below with reference to FIGS. FIG. 6 is a graph showing the relationship between the first PWM pattern shown in FIG. 3 and the distortion, and FIG. 7 is a graph showing the relationship between the second PWM pattern shown in FIG. 4 and the distortion.
[0060]
6, the upper straight line indicates a straight line L0 corresponding to the original signal shown in FIG. 5, and this straight line L0 is a waveform after oversampling by eight times, and the sampled digital data is S0 to S4. .
[0061]
In FIG. 6, the middle stage shows the waveform of a PWM signal obtained by PWM-converting the sampled digital data. In this PWM signal, the pulse width of each of the pulses P0P to P4P is a width corresponding to the digital data S0 to S4, and the center position of each of the pulses P0P to P4P is the sampling time t0 of each of the digital data S0 to S4. The waveform is synchronized with t4. The time of "1" and the time of "0" represent the energy in the positive direction and the energy in the negative direction, respectively, for each period of the digital data S0 to S4. Indicates the level of digital data S0 to S4.
[0062]
In FIG. 6, the lower part expresses positive and negative energies at the center of the time of “1” and the time of “0” in consideration of the adjacent periods, which are S0h to S4h and S01L to S34L, respectively. The dashed line Ep indicates positive energy, and the dashed line En indicates negative energy. The sum of both is a straight line L1. From the straight line L0 corresponding to the original signal, it can be seen that it is slightly shifted to the positive side. This is because S01L to S34L have moved temporally ahead of the ideal position. Further, it is easily presumed that as the inclination of the original signal increases, the amount of movement also increases, and the result is as shown in FIG.
[0063]
In FIG. 7, the upper straight line indicates a straight line L0 corresponding to the original signal shown in FIG. 5, and this straight line L0 is a waveform after 8 times oversampling, and the sampled digital data is S0 to S4. .
[0064]
In FIG. 7, the middle stage shows the waveform of a PWM signal obtained by PWM-converting the sampled digital data. In this PWM signal, the pulse width of each of the pulses P0N to P4N has a width corresponding to the digital data S0 to S4, and the center position of each of the pulses P0N to P4N is the sampling time t0 of each of the digital data S0 to S4. The waveform is synchronized with t4. The time of "1" and the time of "0" represent the energy in the positive direction and the energy in the negative direction, respectively, for each period of the digital data S0 to S4. Indicates the level of digital data S0 to S4.
[0065]
In FIG. 7, the lower part expresses positive and negative energies at the center of the time of “1” and the time of “0” in consideration of the adjacent periods, which are S01h to S34h and S0L to S4L, respectively. The dashed line Ep represents positive energy, and the dashed line En represents negative energy. The sum of the two is a straight line L2. From the straight line L0 corresponding to the original signal, it can be seen that it is slightly shifted to the negative side. This is because S01h to S34h have moved temporally behind the ideal position. Further, it is easily presumed that as the inclination of the original signal increases, the amount of movement also increases, and the result is as shown in FIG.
[0066]
As described above, a principle problem arises in that the center position in either the “1” period or the “0” period is displaced in a certain direction in each of the two typical patterns of the PWM signal.
[0067]
As a method for solving this, the frequency of 8 × FS is set as one cycle of the PWM pattern, but the cycle is shortened to 16 × FS, 32 × FS,. Similarly, the master clock can be increased twice, four times, and so on. However, in this method, it is necessary to increase the processing speed of the oversampling and the noise shaper by two times, four times, and so on. Further, the switching frequency of the switching amplifier circuit also increases twice, four times,..., Which causes a problem that power consumption increases.
[0068]
The present invention utilizes the fact that the distortion directions of the two types of PWM patterns are directly opposite (reverse), and is switched over for a predetermined period, for example, every sampling period or every predetermined number of sampling periods, so that the distortion is reduced. This is to prevent occurrence in a certain direction. For example, when the above two types of patterns are alternately switched in this correspondence, the distortion component moves to around 4 × FS, becomes a region much higher than the audible band, and is sufficiently removed by an external low-pass filter. There is no problem in terms of both characteristics and characteristics.
[0069]
The PWM signal output from the pulse width modulation circuit 13 in the digital audio device 1 is, for example, a PWM conversion output (1) of two types of PWM patterns, such as PWM conversion outputs (3) and (4) shown in FIG. ) (2) is switched. Note that the PWM conversion output (1) corresponds to the PWM conversion output shown in FIG. 6, and the PWM conversion output (2) corresponds to the PWM conversion output shown in FIG.
[0070]
Note that the PWM conversion output (1) is output by the comparator 21 in the pulse width modulation circuit 13 symmetrically with respect to the center time point of the predetermined period (sampling cycle of the analog signal) in the front-back direction of the signal of “1”. The PWM conversion output (2) generated so as to expand the pulse width is output by the comparator 22 in the pulse width modulation circuit 13 around a center time point of a predetermined period (analog signal sampling period). It is generated in such a way that the pulse width of the signal of “0” is narrowed symmetrically.
[0071]
In this case, the PWM conversion output (1) is a signal in which the pulse width of the signal “1” is sequentially increased, and the PWM conversion output (2) is a signal in which the pulse width of the signal “0” is sequentially reduced. Become. In other words, these two PWM conversion outputs are two types of pulse width modulation signals having the same contents in which the directions in which distortion occurs are opposite to each other.
[0072]
Thereby, even if each pulse width modulation signal is switched at an appropriate timing, the distortion can be reduced without affecting the reproduction signal.
[0073]
For example, the selection circuit 23 may alternately output the pulse width modulation signals generated by the comparators 21 and 22 every sampling period of the analog signal. This is the PWM conversion output (3) in FIG.
[0074]
In this case, the pulse width modulation signal is switched at each point where distortion due to pulse width modulation occurs, that is, at each repetition period according to the sampling period of the analog signal, so that the pulse width modulation signal output from the pulse width modulator is output. Can be almost eliminated.
[0075]
As described above, if the switching timing of the pulse width modulation signal is performed in each repetition period of the sampling cycle of the analog signal as described above, the distortion of the pulse width modulation signal can be almost eliminated as described above. In addition, the signal switching operation in the selection circuit 23 becomes frequent, which may be disadvantageous in terms of power consumption.
[0076]
Therefore, if the switching timing of the pulse width modulation signal is set not for each repetition period of the sampling period of the analog signal but for each fixed number of repetition periods, it is not necessary to frequently perform the switching operation in the signal switching output means. As a result, it is possible to suppress an increase in power consumption. As an example, as in the PWM conversion output (4) of FIG. 8, the switching may be performed every two sampling cycles (repetition periods) of the analog signal.
[0077]
However, also in this case, if the number of repetition periods increases, the distortion may increase. Therefore, it is preferable to determine the repetition period in consideration of the magnitude of the generated distortion and power consumption.
[0078]
As described above, in the pulse width modulation circuit 13 according to the present embodiment, although the waveform distortion occurs due to the PWM conversion in the comparators 21 and 22, the selection circuit 23 uses the PWMs whose distortion directions are opposite to each other. By switching the converted output alternately and outputting it as a PWM signal, the waveform distortion does not occur even when demodulated by the switching amplifier 14 and the low-pass filter 15 at the subsequent stage.
[0079]
Therefore, distortion due to PWM conversion can be prevented without shortening the pulse period of the PWM signal. Therefore, in order to prevent distortion due to the PWM conversion, the oversampling in the oversampling filter 11 is increased to increase the oversampling and reduce the period of the pulse of the PWM signal. An increase in processing can be suppressed.
[0080]
Here, if the pulse period of the PWM signal is shortened, a high-speed operation clock is required, which may cause problems such as an obstacle to integration into a circuit and an increase in power consumption. Further, in the switching amplifier 14 receiving the pulse after the PWM conversion, the number of times of switching increases, so that the power consumption increases. Further, the necessity for measures against noise generated by high-speed switching increases, and it becomes extremely difficult to secure audio performance.
[0081]
On the other hand, in the above configuration, distortion due to PWM conversion can be prevented without shortening the pulse period of the PWM signal, so that these problems can be avoided, and pulse width modulation with low power consumption and little noise can be achieved. The circuit 13 can be realized. Therefore, it can be suitably used not only for stationary devices but also for portable devices.
[0082]
In particular, digital amplifiers and amplifiers that use the digital-to-analog conversion method called 1-bit amplifiers have excellent conversion efficiency and the feasibility of integrated circuits, so they can be used not only for stationary devices but also for portable devices. However, by using the pulse width modulation circuit 11 as the pulse width modulation circuit of the amplifier, it is possible to realize a portable device that has a longer use time and can reproduce a signal without distortion.
[0083]
In the above description, the case where the noise shaper 12 is not provided has been described for convenience of description. However, even in the configuration in which the noise shaper 12 is provided as in the present embodiment, the PWM in the pulse width modulation circuit 13 may be used. Since the distortion generated by the conversion is canceled inside the pulse width modulation circuit 13, the pulse width modulation circuit 13 can output a PWM signal in which the waveform distortion does not occur even when demodulated.
[0084]
Hereinafter, the conventional pulse width modulation circuit 113 (see FIG. 12) will be described with reference to the spectrum (FIGS. 9 to 11) before and after the pulse width modulation processing when a 10 kHz sine wave is input. Compare with the pulse width modulation circuit 13 shown in FIG. That is, in the pulse width modulation circuit 113, as shown in FIG. 9, in the spectrum of the input signal to the pulse width modulation circuit 113, the noise distribution rising to the right by the 7th-order noise shaper 112 and the noise distribution of 10 [kHz] Signal components exist. On the other hand, in the spectrum of the output signal of the pulse width modulation circuit 113, as shown in FIG. 10, due to the PWM conversion in the pulse width modulation circuit 113, a second-order distortion component is generated around 20 [kHz].
[0085]
On the other hand, in the spectrum of the output signal of the pulse width modulation circuit 13 shown in FIG. 1, the component of 20 kHz is greatly attenuated as shown in FIG. Thus, it can be seen that the distortion has been clearly removed.
[0086]
In the above description, the case where the noise shaper 12 is provided in the digital audio device 1 as shown in FIG. 1 has been described as an example. However, even when the noise shaper 12 is not provided, the pulse width modulation is performed as described above. Since the circuit 13 can move the distortion to a frequency band where there is no practical problem, the same effect as in the present embodiment can be obtained.
[0087]
However, by providing the noise shaper 12 as in the present embodiment, it is possible to impart a differential characteristic to the quantization noise of the PWM signal. Therefore, by setting the sampling frequency at the time of quantization by the noise shaper 12 to be sufficiently high, even if the number of bits at the time of quantization is small, that is, the number of PWM signal patterns that can be output by the pulse width modulation circuit 13 is reduced. At least, a wide dynamic range can be secured.
[0088]
Although the digital audio apparatus 1 according to the present embodiment is provided with the oversampling filter 11, the sampling frequency FS of the digital data input from the sound source 2 and the repetition frequency of the PWM signal output from the pulse width modulation circuit 13 May be set equal and the oversampling filter 11 may be omitted. However, when the oversampling filter 11 is provided as in the digital audio device 1 according to the present embodiment, the frequency band of the original signal and the frequency band of the PWM signal can be easily separated by the oversampling process. Noise can be effectively removed.
[0089]
Further, the present invention is applicable not only to a digital audio device, but also to any device that needs to modulate the pulse width of digital data based on the amplitude of the analog data when converting the digital data to analog data. Thus, the same effect as when applied to a digital audio device can be obtained.
[0090]
【The invention's effect】
As described above, the pulse width modulator of the present invention modulates the pulse width of a binary signal “1” and “0” obtained by modulating an analog signal according to the amplitude of the analog signal. A first signal generating means for modulating a pulse width of the signal of "1" around a center time point of a predetermined period to generate a first pulse width modulation signal; A second signal generating means for generating a second pulse width modulated signal by modulating a pulse width of the signal of "0" around a time point, and generating the second pulse width modulated signal by the first signal generating means and the second signal generating means. And a signal switching output means for switching and outputting each of the pulse width modulation signals to be performed.
[0091]
Therefore, the first pulse width modulation signal generated by adjusting the pulse width of the “1” signal and the pulse width of the “0” signal are generated by adjusting the pulse width of the “1” signal, in which the directions in which the distortions are generated are opposite to each other. By switching and outputting the second pulse width modulation signal to be output, it is possible to prevent the distortion of the output pulse width modulation signal from occurring in a certain direction. In other words, it is possible to output a pulse width modulation signal in which the direction in which the distortion occurs changes alternately.
[0092]
By alternately changing the direction in which the distortion is generated, the period of the distortion component of the output pulse width modulation signal can be shortened, so that the distortion component can be moved to a higher frequency band. It becomes.
[0093]
This makes it possible to make the distortion caused by the pulse width modulation higher than a certain frequency band, for example, an audible band, so that the distortion can be shifted to a frequency standby higher than the audible band in a frequency band where there is no practical problem. it can. As a result, distortion in the audible band can be completely removed by the low-pass filter, so that distortion of the pulse width modulation signal caused by pulse width modulation can be reduced.
[0094]
Therefore, it is not necessary to shorten the pulse period in order to reduce the distortion, so that problems such as an increase in power consumption and an increase in the amount of noise generated by shortening the pulse period do not occur. That is, it is possible to reduce the distortion of the pulse width modulation signal caused by the pulse width modulation without increasing the power consumption and the amount of noise generated.
[0095]
When the first pulse width modulation signal is generated by the first signal generation means, the pulse width of the signal "1" may be expanded symmetrically around the center time point of the predetermined period. Also, when the second pulse width modulation signal is generated by the second signal generation means, the pulse width of the "0" signal is narrowed symmetrically around the center time point of the predetermined period. You may do so.
[0096]
In this case, the first pulse width modulation signal is a signal in which the pulse width of the signal of "1" is sequentially increased, and the second pulse width modulation signal is a signal in which the pulse width of the signal of "0" is sequentially reduced. Signal. That is, it is possible to generate two types of pulse width modulation signals having the same contents in which the directions in which distortion occurs are opposite to each other.
[0097]
As a result, there is an effect that the distortion can be reduced without affecting the reproduction signal even if each pulse width modulation signal is switched at an appropriate timing.
[0098]
For example, the signal switching output means may alternately output the pulse width modulation signals generated by the first signal generation means and the second signal generation means for each sampling period of the analog signal. Good.
[0099]
In this case, the pulse width modulation signal is switched at each point where distortion due to pulse width modulation occurs, that is, at each repetition position according to the sampling period of the analog signal, so that the pulse width modulation signal output from the pulse width modulator is output. This has the effect that distortion in can be almost eliminated.
[Brief description of the drawings]
FIG. 1 is a schematic block diagram of a digital audio device including a pulse width modulator of the present invention.
FIG. 2 is a schematic block diagram of a noise shaper provided in the digital audio device shown in FIG.
FIG. 3 is a waveform diagram of a PWM signal corresponding to a signal of "1" generated by a comparator in a pulse width modulation circuit provided in the digital audio device shown in FIG.
FIG. 4 is a waveform diagram of a PWM signal corresponding to a “0” signal generated by a comparator in a pulse width modulation circuit provided in the digital audio device shown in FIG. 1;
FIG. 5 is a waveform diagram showing a shift between an original signal and a signal having distortion.
FIG. 6 is an explanatory diagram showing a deviation of a PWM signal shown in FIG. 3 from an original signal.
FIG. 7 is an explanatory diagram showing a deviation of a PWM signal shown in FIG. 4 from an original signal.
FIG. 8 is a waveform diagram of a PWM signal according to FIGS. 3, 4 and the present embodiment.
FIG. 9 is a spectrum of an input signal to the pulse width modulation circuit.
FIG. 10 is a spectrum of an output signal of a conventional pulse width modulation circuit.
FIG. 11 is a spectrum of an output signal of a pulse width modulation circuit provided in the digital audio device shown in FIG.
FIG. 12 is a schematic block diagram of a digital audio device including a conventional pulse width modulator.
[Explanation of symbols]
1 Digital audio equipment
2 sound source
3 Speaker
11 Oversampling filter
12 Noise Shaper
13. Pulse width modulator (pulse width modulator)
14 Switching amplifier
15 Low-pass filter
21 Comparator (first signal generation means)
22 Comparator (second signal generation means)
23 Selection circuit (signal switching output means)
24 counter
25 divider circuit
31a-31g Integrator
32 adder
33 Quantizer
34 delay unit
35 Subtractor
41 Multiplier
42 delay unit
43 Adder
51 Multiplier
61 Negative feedback path
62 Negative feedback path
63 Negative feedback path
71 Multiplier
FS sampling frequency

Claims (3)

A pulse width modulator that modulates a pulse width of a binary signal “1” and “0” obtained by modulating an analog signal according to the amplitude of the analog signal,
First signal generation means for generating a first pulse width modulation signal by modulating a pulse width of the signal of “1” around a center time point of a predetermined period;
Second signal generating means for generating a second pulse width modulated signal by modulating a pulse width of the signal of “0” around a center time point of a predetermined period;
A pulse width modulator comprising: signal switching output means for switching and outputting each of the pulse width modulation signals generated by the first signal generation means and the second signal generation means. When the first signal generation means generates the first pulse width modulation signal, the first signal generation means expands the pulse width of the signal of “1” symmetrically around the center time point of the predetermined period, and
When the second signal generation means generates the second pulse width modulation signal, the second signal generation means narrows the pulse width of the signal of “0” symmetrically around the center time point of the predetermined period. The pulse width modulator according to claim 1, wherein The signal switching output means alternately outputs the pulse width modulation signals generated by the first signal generation means and the second signal generation means for each sampling period of an analog signal, and outputs the signal. Item 3. A pulse width modulator according to Item 2.

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